mach-armadillo5x0.c 14 KB

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  1. /*
  2. * armadillo5x0.c
  3. *
  4. * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
  5. * updates in http://alberdroid.blogspot.com/
  6. *
  7. * Based on Atmark Techno, Inc. armadillo 500 BSP 2008
  8. * Based on mx31ads.c and pcm037.c Great Work!
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  23. * MA 02110-1301, USA.
  24. */
  25. #include <linux/types.h>
  26. #include <linux/init.h>
  27. #include <linux/clk.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/gpio.h>
  30. #include <linux/smsc911x.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/irq.h>
  33. #include <linux/mtd/physmap.h>
  34. #include <linux/io.h>
  35. #include <linux/input.h>
  36. #include <linux/i2c.h>
  37. #include <linux/usb/otg.h>
  38. #include <linux/usb/ulpi.h>
  39. #include <linux/delay.h>
  40. #include <mach/hardware.h>
  41. #include <asm/mach-types.h>
  42. #include <asm/mach/arch.h>
  43. #include <asm/mach/time.h>
  44. #include <asm/memory.h>
  45. #include <asm/mach/map.h>
  46. #include <mach/common.h>
  47. #include <mach/iomux-mx3.h>
  48. #include <mach/ulpi.h>
  49. #include "devices-imx31.h"
  50. #include "crmregs-imx31.h"
  51. static int armadillo5x0_pins[] = {
  52. /* UART1 */
  53. MX31_PIN_CTS1__CTS1,
  54. MX31_PIN_RTS1__RTS1,
  55. MX31_PIN_TXD1__TXD1,
  56. MX31_PIN_RXD1__RXD1,
  57. /* UART2 */
  58. MX31_PIN_CTS2__CTS2,
  59. MX31_PIN_RTS2__RTS2,
  60. MX31_PIN_TXD2__TXD2,
  61. MX31_PIN_RXD2__RXD2,
  62. /* LAN9118_IRQ */
  63. IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
  64. /* SDHC1 */
  65. MX31_PIN_SD1_DATA3__SD1_DATA3,
  66. MX31_PIN_SD1_DATA2__SD1_DATA2,
  67. MX31_PIN_SD1_DATA1__SD1_DATA1,
  68. MX31_PIN_SD1_DATA0__SD1_DATA0,
  69. MX31_PIN_SD1_CLK__SD1_CLK,
  70. MX31_PIN_SD1_CMD__SD1_CMD,
  71. /* Framebuffer */
  72. MX31_PIN_LD0__LD0,
  73. MX31_PIN_LD1__LD1,
  74. MX31_PIN_LD2__LD2,
  75. MX31_PIN_LD3__LD3,
  76. MX31_PIN_LD4__LD4,
  77. MX31_PIN_LD5__LD5,
  78. MX31_PIN_LD6__LD6,
  79. MX31_PIN_LD7__LD7,
  80. MX31_PIN_LD8__LD8,
  81. MX31_PIN_LD9__LD9,
  82. MX31_PIN_LD10__LD10,
  83. MX31_PIN_LD11__LD11,
  84. MX31_PIN_LD12__LD12,
  85. MX31_PIN_LD13__LD13,
  86. MX31_PIN_LD14__LD14,
  87. MX31_PIN_LD15__LD15,
  88. MX31_PIN_LD16__LD16,
  89. MX31_PIN_LD17__LD17,
  90. MX31_PIN_VSYNC3__VSYNC3,
  91. MX31_PIN_HSYNC__HSYNC,
  92. MX31_PIN_FPSHIFT__FPSHIFT,
  93. MX31_PIN_DRDY0__DRDY0,
  94. IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
  95. /* I2C2 */
  96. MX31_PIN_CSPI2_MOSI__SCL,
  97. MX31_PIN_CSPI2_MISO__SDA,
  98. /* OTG */
  99. MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  100. MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  101. MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  102. MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  103. MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  104. MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  105. MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  106. MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  107. MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  108. MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  109. MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  110. MX31_PIN_USBOTG_STP__USBOTG_STP,
  111. /* USB host 2 */
  112. IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
  113. IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
  114. IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
  115. IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
  116. IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
  117. IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
  118. IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
  119. IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
  120. IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
  121. IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
  122. IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
  123. IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
  124. };
  125. /* USB */
  126. #define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
  127. #define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
  128. #define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
  129. #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
  130. PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
  131. static int usbotg_init(struct platform_device *pdev)
  132. {
  133. int err;
  134. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
  135. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
  136. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
  137. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
  138. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
  139. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
  140. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
  141. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
  142. mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
  143. mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
  144. mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
  145. mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
  146. /* Chip already enabled by hardware */
  147. /* OTG phy reset*/
  148. err = gpio_request(OTG_RESET, "USB-OTG-RESET");
  149. if (err) {
  150. pr_err("Failed to request the usb otg reset gpio\n");
  151. return err;
  152. }
  153. err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
  154. if (err) {
  155. pr_err("Failed to reset the usb otg phy\n");
  156. goto otg_free_reset;
  157. }
  158. gpio_set_value(OTG_RESET, 0/*LOW*/);
  159. mdelay(5);
  160. gpio_set_value(OTG_RESET, 1/*HIGH*/);
  161. mdelay(10);
  162. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
  163. MXC_EHCI_INTERFACE_DIFF_UNI);
  164. otg_free_reset:
  165. gpio_free(OTG_RESET);
  166. return err;
  167. }
  168. static int usbh2_init(struct platform_device *pdev)
  169. {
  170. int err;
  171. mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
  172. mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
  173. mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
  174. mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
  175. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
  176. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
  177. mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
  178. mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
  179. mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
  180. mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
  181. mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
  182. mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
  183. mxc_iomux_set_gpr(MUX_PGP_UH2, true);
  184. /* Enable the chip */
  185. err = gpio_request(USBH2_CS, "USB-H2-CS");
  186. if (err) {
  187. pr_err("Failed to request the usb host 2 CS gpio\n");
  188. return err;
  189. }
  190. err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
  191. if (err) {
  192. pr_err("Failed to drive the usb host 2 CS gpio\n");
  193. goto h2_free_cs;
  194. }
  195. /* H2 phy reset*/
  196. err = gpio_request(USBH2_RESET, "USB-H2-RESET");
  197. if (err) {
  198. pr_err("Failed to request the usb host 2 reset gpio\n");
  199. goto h2_free_cs;
  200. }
  201. err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
  202. if (err) {
  203. pr_err("Failed to reset the usb host 2 phy\n");
  204. goto h2_free_reset;
  205. }
  206. gpio_set_value(USBH2_RESET, 0/*LOW*/);
  207. mdelay(5);
  208. gpio_set_value(USBH2_RESET, 1/*HIGH*/);
  209. mdelay(10);
  210. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
  211. MXC_EHCI_INTERFACE_DIFF_UNI);
  212. h2_free_reset:
  213. gpio_free(USBH2_RESET);
  214. h2_free_cs:
  215. gpio_free(USBH2_CS);
  216. return err;
  217. }
  218. static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
  219. .init = usbotg_init,
  220. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  221. };
  222. static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
  223. .init = usbh2_init,
  224. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  225. };
  226. /* RTC over I2C*/
  227. #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
  228. static struct i2c_board_info armadillo5x0_i2c_rtc = {
  229. I2C_BOARD_INFO("s35390a", 0x30),
  230. };
  231. /* GPIO BUTTONS */
  232. static struct gpio_keys_button armadillo5x0_buttons[] = {
  233. {
  234. .code = KEY_ENTER, /*28*/
  235. .gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
  236. .active_low = 1,
  237. .desc = "menu",
  238. .wakeup = 1,
  239. }, {
  240. .code = KEY_BACK, /*158*/
  241. .gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
  242. .active_low = 1,
  243. .desc = "back",
  244. .wakeup = 1,
  245. }
  246. };
  247. static const struct gpio_keys_platform_data
  248. armadillo5x0_button_data __initconst = {
  249. .buttons = armadillo5x0_buttons,
  250. .nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
  251. };
  252. /*
  253. * NAND Flash
  254. */
  255. static const struct mxc_nand_platform_data
  256. armadillo5x0_nand_board_info __initconst = {
  257. .width = 1,
  258. .hw_ecc = 1,
  259. };
  260. /*
  261. * MTD NOR Flash
  262. */
  263. static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
  264. {
  265. .name = "nor.bootloader",
  266. .offset = 0x00000000,
  267. .size = 4*32*1024,
  268. }, {
  269. .name = "nor.kernel",
  270. .offset = MTDPART_OFS_APPEND,
  271. .size = 16*128*1024,
  272. }, {
  273. .name = "nor.userland",
  274. .offset = MTDPART_OFS_APPEND,
  275. .size = 110*128*1024,
  276. }, {
  277. .name = "nor.config",
  278. .offset = MTDPART_OFS_APPEND,
  279. .size = 1*128*1024,
  280. },
  281. };
  282. static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
  283. .width = 2,
  284. .parts = armadillo5x0_nor_flash_partitions,
  285. .nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
  286. };
  287. static struct resource armadillo5x0_nor_flash_resource = {
  288. .flags = IORESOURCE_MEM,
  289. .start = MX31_CS0_BASE_ADDR,
  290. .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
  291. };
  292. static struct platform_device armadillo5x0_nor_flash = {
  293. .name = "physmap-flash",
  294. .id = -1,
  295. .num_resources = 1,
  296. .resource = &armadillo5x0_nor_flash_resource,
  297. };
  298. /*
  299. * FB support
  300. */
  301. static const struct fb_videomode fb_modedb[] = {
  302. { /* 640x480 @ 60 Hz */
  303. .name = "CRT-VGA",
  304. .refresh = 60,
  305. .xres = 640,
  306. .yres = 480,
  307. .pixclock = 39721,
  308. .left_margin = 35,
  309. .right_margin = 115,
  310. .upper_margin = 43,
  311. .lower_margin = 1,
  312. .hsync_len = 10,
  313. .vsync_len = 1,
  314. .sync = FB_SYNC_OE_ACT_HIGH,
  315. .vmode = FB_VMODE_NONINTERLACED,
  316. .flag = 0,
  317. }, {/* 800x600 @ 56 Hz */
  318. .name = "CRT-SVGA",
  319. .refresh = 56,
  320. .xres = 800,
  321. .yres = 600,
  322. .pixclock = 30000,
  323. .left_margin = 30,
  324. .right_margin = 108,
  325. .upper_margin = 13,
  326. .lower_margin = 10,
  327. .hsync_len = 10,
  328. .vsync_len = 1,
  329. .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
  330. FB_SYNC_VERT_HIGH_ACT,
  331. .vmode = FB_VMODE_NONINTERLACED,
  332. .flag = 0,
  333. },
  334. };
  335. static const struct ipu_platform_data mx3_ipu_data __initconst = {
  336. .irq_base = MXC_IPU_IRQ_START,
  337. };
  338. static struct mx3fb_platform_data mx3fb_pdata __initdata = {
  339. .name = "CRT-VGA",
  340. .mode = fb_modedb,
  341. .num_modes = ARRAY_SIZE(fb_modedb),
  342. };
  343. /*
  344. * SDHC 1
  345. * MMC support
  346. */
  347. static int armadillo5x0_sdhc1_get_ro(struct device *dev)
  348. {
  349. return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
  350. }
  351. static int armadillo5x0_sdhc1_init(struct device *dev,
  352. irq_handler_t detect_irq, void *data)
  353. {
  354. int ret;
  355. int gpio_det, gpio_wp;
  356. gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
  357. gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
  358. ret = gpio_request(gpio_det, "sdhc-card-detect");
  359. if (ret)
  360. return ret;
  361. gpio_direction_input(gpio_det);
  362. ret = gpio_request(gpio_wp, "sdhc-write-protect");
  363. if (ret)
  364. goto err_gpio_free;
  365. gpio_direction_input(gpio_wp);
  366. /* When supported the trigger type have to be BOTH */
  367. ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
  368. IRQF_DISABLED | IRQF_TRIGGER_FALLING,
  369. "sdhc-detect", data);
  370. if (ret)
  371. goto err_gpio_free_2;
  372. return 0;
  373. err_gpio_free_2:
  374. gpio_free(gpio_wp);
  375. err_gpio_free:
  376. gpio_free(gpio_det);
  377. return ret;
  378. }
  379. static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
  380. {
  381. free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
  382. gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
  383. gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
  384. }
  385. static const struct imxmmc_platform_data sdhc_pdata __initconst = {
  386. .get_ro = armadillo5x0_sdhc1_get_ro,
  387. .init = armadillo5x0_sdhc1_init,
  388. .exit = armadillo5x0_sdhc1_exit,
  389. };
  390. /*
  391. * SMSC 9118
  392. * Network support
  393. */
  394. static struct resource armadillo5x0_smc911x_resources[] = {
  395. {
  396. .start = MX31_CS3_BASE_ADDR,
  397. .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
  398. .flags = IORESOURCE_MEM,
  399. }, {
  400. .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  401. .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  402. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  403. },
  404. };
  405. static struct smsc911x_platform_config smsc911x_info = {
  406. .flags = SMSC911X_USE_16BIT,
  407. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  408. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  409. };
  410. static struct platform_device armadillo5x0_smc911x_device = {
  411. .name = "smsc911x",
  412. .id = -1,
  413. .num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
  414. .resource = armadillo5x0_smc911x_resources,
  415. .dev = {
  416. .platform_data = &smsc911x_info,
  417. },
  418. };
  419. /* UART device data */
  420. static const struct imxuart_platform_data uart_pdata __initconst = {
  421. .flags = IMXUART_HAVE_RTSCTS,
  422. };
  423. static struct platform_device *devices[] __initdata = {
  424. &armadillo5x0_smc911x_device,
  425. };
  426. /*
  427. * Perform board specific initializations
  428. */
  429. static void __init armadillo5x0_init(void)
  430. {
  431. imx31_soc_init();
  432. mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
  433. ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
  434. platform_add_devices(devices, ARRAY_SIZE(devices));
  435. imx_add_gpio_keys(&armadillo5x0_button_data);
  436. imx31_add_imx_i2c1(NULL);
  437. /* Register UART */
  438. imx31_add_imx_uart0(&uart_pdata);
  439. imx31_add_imx_uart1(&uart_pdata);
  440. /* SMSC9118 IRQ pin */
  441. gpio_direction_input(MX31_PIN_GPIO1_0);
  442. /* Register SDHC */
  443. imx31_add_mxc_mmc(0, &sdhc_pdata);
  444. /* Register FB */
  445. imx31_add_ipu_core(&mx3_ipu_data);
  446. imx31_add_mx3_sdc_fb(&mx3fb_pdata);
  447. /* Register NOR Flash */
  448. mxc_register_device(&armadillo5x0_nor_flash,
  449. &armadillo5x0_nor_flash_pdata);
  450. /* Register NAND Flash */
  451. imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
  452. /* set NAND page size to 2k if not configured via boot mode pins */
  453. __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
  454. /* RTC */
  455. /* Get RTC IRQ and register the chip */
  456. if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
  457. if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
  458. armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
  459. else
  460. gpio_free(ARMADILLO5X0_RTC_GPIO);
  461. }
  462. if (armadillo5x0_i2c_rtc.irq == 0)
  463. pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
  464. i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
  465. /* USB */
  466. usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  467. ULPI_OTG_DRVVBUS_EXT);
  468. if (usbotg_pdata.otg)
  469. imx31_add_mxc_ehci_otg(&usbotg_pdata);
  470. usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  471. ULPI_OTG_DRVVBUS_EXT);
  472. if (usbh2_pdata.otg)
  473. imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
  474. }
  475. static void __init armadillo5x0_timer_init(void)
  476. {
  477. mx31_clocks_init(26000000);
  478. }
  479. static struct sys_timer armadillo5x0_timer = {
  480. .init = armadillo5x0_timer_init,
  481. };
  482. MACHINE_START(ARMADILLO5X0, "Armadillo-500")
  483. /* Maintainer: Alberto Panizzo */
  484. .boot_params = MX3x_PHYS_OFFSET + 0x100,
  485. .map_io = mx31_map_io,
  486. .init_early = imx31_init_early,
  487. .init_irq = mx31_init_irq,
  488. .timer = &armadillo5x0_timer,
  489. .init_machine = armadillo5x0_init,
  490. MACHINE_END