mach-smdkc210.c 8.0 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-smdkc210.c
  2. *
  3. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/serial_core.h>
  11. #include <linux/delay.h>
  12. #include <linux/gpio.h>
  13. #include <linux/lcd.h>
  14. #include <linux/mmc/host.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/smsc911x.h>
  17. #include <linux/io.h>
  18. #include <linux/i2c.h>
  19. #include <linux/pwm_backlight.h>
  20. #include <asm/mach/arch.h>
  21. #include <asm/mach-types.h>
  22. #include <video/platform_lcd.h>
  23. #include <plat/regs-serial.h>
  24. #include <plat/regs-srom.h>
  25. #include <plat/regs-fb-v4.h>
  26. #include <plat/exynos4.h>
  27. #include <plat/cpu.h>
  28. #include <plat/devs.h>
  29. #include <plat/fb.h>
  30. #include <plat/sdhci.h>
  31. #include <plat/iic.h>
  32. #include <plat/pd.h>
  33. #include <plat/gpio-cfg.h>
  34. #include <plat/backlight.h>
  35. #include <mach/map.h>
  36. /* Following are default values for UCON, ULCON and UFCON UART registers */
  37. #define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  38. S3C2410_UCON_RXILEVEL | \
  39. S3C2410_UCON_TXIRQMODE | \
  40. S3C2410_UCON_RXIRQMODE | \
  41. S3C2410_UCON_RXFIFO_TOI | \
  42. S3C2443_UCON_RXERR_IRQEN)
  43. #define SMDKC210_ULCON_DEFAULT S3C2410_LCON_CS8
  44. #define SMDKC210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  45. S5PV210_UFCON_TXTRIG4 | \
  46. S5PV210_UFCON_RXTRIG4)
  47. static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = {
  48. [0] = {
  49. .hwport = 0,
  50. .flags = 0,
  51. .ucon = SMDKC210_UCON_DEFAULT,
  52. .ulcon = SMDKC210_ULCON_DEFAULT,
  53. .ufcon = SMDKC210_UFCON_DEFAULT,
  54. },
  55. [1] = {
  56. .hwport = 1,
  57. .flags = 0,
  58. .ucon = SMDKC210_UCON_DEFAULT,
  59. .ulcon = SMDKC210_ULCON_DEFAULT,
  60. .ufcon = SMDKC210_UFCON_DEFAULT,
  61. },
  62. [2] = {
  63. .hwport = 2,
  64. .flags = 0,
  65. .ucon = SMDKC210_UCON_DEFAULT,
  66. .ulcon = SMDKC210_ULCON_DEFAULT,
  67. .ufcon = SMDKC210_UFCON_DEFAULT,
  68. },
  69. [3] = {
  70. .hwport = 3,
  71. .flags = 0,
  72. .ucon = SMDKC210_UCON_DEFAULT,
  73. .ulcon = SMDKC210_ULCON_DEFAULT,
  74. .ufcon = SMDKC210_UFCON_DEFAULT,
  75. },
  76. };
  77. static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = {
  78. .cd_type = S3C_SDHCI_CD_GPIO,
  79. .ext_cd_gpio = EXYNOS4_GPK0(2),
  80. .ext_cd_gpio_invert = 1,
  81. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  82. #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  83. .max_width = 8,
  84. .host_caps = MMC_CAP_8_BIT_DATA,
  85. #endif
  86. };
  87. static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata __initdata = {
  88. .cd_type = S3C_SDHCI_CD_GPIO,
  89. .ext_cd_gpio = EXYNOS4_GPK0(2),
  90. .ext_cd_gpio_invert = 1,
  91. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  92. };
  93. static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = {
  94. .cd_type = S3C_SDHCI_CD_GPIO,
  95. .ext_cd_gpio = EXYNOS4_GPK2(2),
  96. .ext_cd_gpio_invert = 1,
  97. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  98. #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
  99. .max_width = 8,
  100. .host_caps = MMC_CAP_8_BIT_DATA,
  101. #endif
  102. };
  103. static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = {
  104. .cd_type = S3C_SDHCI_CD_GPIO,
  105. .ext_cd_gpio = EXYNOS4_GPK2(2),
  106. .ext_cd_gpio_invert = 1,
  107. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  108. };
  109. static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
  110. unsigned int power)
  111. {
  112. if (power) {
  113. #if !defined(CONFIG_BACKLIGHT_PWM)
  114. gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
  115. gpio_free(EXYNOS4_GPD0(1));
  116. #endif
  117. /* fire nRESET on power up */
  118. gpio_request(EXYNOS4_GPX0(6), "GPX0");
  119. gpio_direction_output(EXYNOS4_GPX0(6), 1);
  120. mdelay(100);
  121. gpio_set_value(EXYNOS4_GPX0(6), 0);
  122. mdelay(10);
  123. gpio_set_value(EXYNOS4_GPX0(6), 1);
  124. mdelay(10);
  125. gpio_free(EXYNOS4_GPX0(6));
  126. } else {
  127. #if !defined(CONFIG_BACKLIGHT_PWM)
  128. gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
  129. gpio_free(EXYNOS4_GPD0(1));
  130. #endif
  131. }
  132. }
  133. static struct plat_lcd_data smdkc210_lcd_lte480wv_data = {
  134. .set_power = lcd_lte480wv_set_power,
  135. };
  136. static struct platform_device smdkc210_lcd_lte480wv = {
  137. .name = "platform-lcd",
  138. .dev.parent = &s5p_device_fimd0.dev,
  139. .dev.platform_data = &smdkc210_lcd_lte480wv_data,
  140. };
  141. static struct s3c_fb_pd_win smdkc210_fb_win0 = {
  142. .win_mode = {
  143. .left_margin = 13,
  144. .right_margin = 8,
  145. .upper_margin = 7,
  146. .lower_margin = 5,
  147. .hsync_len = 3,
  148. .vsync_len = 1,
  149. .xres = 800,
  150. .yres = 480,
  151. },
  152. .max_bpp = 32,
  153. .default_bpp = 24,
  154. };
  155. static struct s3c_fb_platdata smdkc210_lcd0_pdata __initdata = {
  156. .win[0] = &smdkc210_fb_win0,
  157. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  158. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  159. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  160. };
  161. static struct resource smdkc210_smsc911x_resources[] = {
  162. [0] = {
  163. .start = EXYNOS4_PA_SROM_BANK(1),
  164. .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
  165. .flags = IORESOURCE_MEM,
  166. },
  167. [1] = {
  168. .start = IRQ_EINT(5),
  169. .end = IRQ_EINT(5),
  170. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  171. },
  172. };
  173. static struct smsc911x_platform_config smsc9215_config = {
  174. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  175. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  176. .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
  177. .phy_interface = PHY_INTERFACE_MODE_MII,
  178. .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
  179. };
  180. static struct platform_device smdkc210_smsc911x = {
  181. .name = "smsc911x",
  182. .id = -1,
  183. .num_resources = ARRAY_SIZE(smdkc210_smsc911x_resources),
  184. .resource = smdkc210_smsc911x_resources,
  185. .dev = {
  186. .platform_data = &smsc9215_config,
  187. },
  188. };
  189. static struct i2c_board_info i2c_devs1[] __initdata = {
  190. {I2C_BOARD_INFO("wm8994", 0x1a),},
  191. };
  192. static struct platform_device *smdkc210_devices[] __initdata = {
  193. &s3c_device_hsmmc0,
  194. &s3c_device_hsmmc1,
  195. &s3c_device_hsmmc2,
  196. &s3c_device_hsmmc3,
  197. &s3c_device_i2c1,
  198. &s3c_device_rtc,
  199. &s3c_device_wdt,
  200. &exynos4_device_ac97,
  201. &exynos4_device_i2s0,
  202. &exynos4_device_pd[PD_MFC],
  203. &exynos4_device_pd[PD_G3D],
  204. &exynos4_device_pd[PD_LCD0],
  205. &exynos4_device_pd[PD_LCD1],
  206. &exynos4_device_pd[PD_CAM],
  207. &exynos4_device_pd[PD_TV],
  208. &exynos4_device_pd[PD_GPS],
  209. &exynos4_device_sysmmu,
  210. &samsung_asoc_dma,
  211. &s5p_device_fimd0,
  212. &smdkc210_lcd_lte480wv,
  213. &smdkc210_smsc911x,
  214. };
  215. static void __init smdkc210_smsc911x_init(void)
  216. {
  217. u32 cs1;
  218. /* configure nCS1 width to 16 bits */
  219. cs1 = __raw_readl(S5P_SROM_BW) &
  220. ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
  221. cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
  222. (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
  223. (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
  224. S5P_SROM_BW__NCS1__SHIFT;
  225. __raw_writel(cs1, S5P_SROM_BW);
  226. /* set timing for nCS1 suitable for ethernet chip */
  227. __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
  228. (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
  229. (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
  230. (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
  231. (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
  232. (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
  233. (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
  234. }
  235. /* LCD Backlight data */
  236. static struct samsung_bl_gpio_info smdkc210_bl_gpio_info = {
  237. .no = EXYNOS4_GPD0(1),
  238. .func = S3C_GPIO_SFN(2),
  239. };
  240. static struct platform_pwm_backlight_data smdkc210_bl_data = {
  241. .pwm_id = 1,
  242. .pwm_period_ns = 1000,
  243. };
  244. static void __init smdkc210_map_io(void)
  245. {
  246. s5p_init_io(NULL, 0, S5P_VA_CHIPID);
  247. s3c24xx_init_clocks(24000000);
  248. s3c24xx_init_uarts(smdkc210_uartcfgs, ARRAY_SIZE(smdkc210_uartcfgs));
  249. }
  250. static void __init smdkc210_machine_init(void)
  251. {
  252. s3c_i2c1_set_platdata(NULL);
  253. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  254. smdkc210_smsc911x_init();
  255. s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata);
  256. s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata);
  257. s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
  258. s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
  259. samsung_bl_set(&smdkc210_bl_gpio_info, &smdkc210_bl_data);
  260. s5p_fimd0_set_platdata(&smdkc210_lcd0_pdata);
  261. platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
  262. }
  263. MACHINE_START(SMDKC210, "SMDKC210")
  264. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  265. .boot_params = S5P_PA_SDRAM + 0x100,
  266. .init_irq = exynos4_init_irq,
  267. .map_io = smdkc210_map_io,
  268. .init_machine = smdkc210_machine_init,
  269. .timer = &exynos4_timer,
  270. MACHINE_END