core.c 24 KB

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  1. /*
  2. * arch/arm/mach-ep93xx/core.c
  3. * Core routines for Cirrus EP93xx chips.
  4. *
  5. * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
  6. * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
  7. *
  8. * Thanks go to Michael Burian and Ray Lehtiniemi for their key
  9. * role in the ep93xx linux community.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. */
  16. #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/dma-mapping.h>
  22. #include <linux/timex.h>
  23. #include <linux/irq.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <linux/leds.h>
  27. #include <linux/termios.h>
  28. #include <linux/amba/bus.h>
  29. #include <linux/amba/serial.h>
  30. #include <linux/mtd/physmap.h>
  31. #include <linux/i2c.h>
  32. #include <linux/i2c-gpio.h>
  33. #include <linux/spi/spi.h>
  34. #include <mach/hardware.h>
  35. #include <mach/fb.h>
  36. #include <mach/ep93xx_keypad.h>
  37. #include <mach/ep93xx_spi.h>
  38. #include <asm/mach/map.h>
  39. #include <asm/mach/time.h>
  40. #include <asm/hardware/vic.h>
  41. /*************************************************************************
  42. * Static I/O mappings that are needed for all EP93xx platforms
  43. *************************************************************************/
  44. static struct map_desc ep93xx_io_desc[] __initdata = {
  45. {
  46. .virtual = EP93XX_AHB_VIRT_BASE,
  47. .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
  48. .length = EP93XX_AHB_SIZE,
  49. .type = MT_DEVICE,
  50. }, {
  51. .virtual = EP93XX_APB_VIRT_BASE,
  52. .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
  53. .length = EP93XX_APB_SIZE,
  54. .type = MT_DEVICE,
  55. },
  56. };
  57. void __init ep93xx_map_io(void)
  58. {
  59. iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
  60. }
  61. /*************************************************************************
  62. * Timer handling for EP93xx
  63. *************************************************************************
  64. * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
  65. * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
  66. * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
  67. * is free-running, and can't generate interrupts.
  68. *
  69. * The 508 kHz timers are ideal for use for the timer interrupt, as the
  70. * most common values of HZ divide 508 kHz nicely. We pick one of the 16
  71. * bit timers (timer 1) since we don't need more than 16 bits of reload
  72. * value as long as HZ >= 8.
  73. *
  74. * The higher clock rate of timer 4 makes it a better choice than the
  75. * other timers for use in gettimeoffset(), while the fact that it can't
  76. * generate interrupts means we don't have to worry about not being able
  77. * to use this timer for something else. We also use timer 4 for keeping
  78. * track of lost jiffies.
  79. */
  80. #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
  81. #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
  82. #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
  83. #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
  84. #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
  85. #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
  86. #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
  87. #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
  88. #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
  89. #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
  90. #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
  91. #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
  92. #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
  93. #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
  94. #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
  95. #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
  96. #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
  97. #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
  98. #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
  99. #define EP93XX_TIMER123_CLOCK 508469
  100. #define EP93XX_TIMER4_CLOCK 983040
  101. #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
  102. #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
  103. static unsigned int last_jiffy_time;
  104. static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
  105. {
  106. /* Writing any value clears the timer interrupt */
  107. __raw_writel(1, EP93XX_TIMER1_CLEAR);
  108. /* Recover lost jiffies */
  109. while ((signed long)
  110. (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
  111. >= TIMER4_TICKS_PER_JIFFY) {
  112. last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
  113. timer_tick();
  114. }
  115. return IRQ_HANDLED;
  116. }
  117. static struct irqaction ep93xx_timer_irq = {
  118. .name = "ep93xx timer",
  119. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  120. .handler = ep93xx_timer_interrupt,
  121. };
  122. static void __init ep93xx_timer_init(void)
  123. {
  124. u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
  125. EP93XX_TIMER123_CONTROL_CLKSEL;
  126. /* Enable periodic HZ timer. */
  127. __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
  128. __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
  129. __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
  130. EP93XX_TIMER1_CONTROL);
  131. /* Enable lost jiffy timer. */
  132. __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
  133. EP93XX_TIMER4_VALUE_HIGH);
  134. setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
  135. }
  136. static unsigned long ep93xx_gettimeoffset(void)
  137. {
  138. int offset;
  139. offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
  140. /* Calculate (1000000 / 983040) * offset. */
  141. return offset + (53 * offset / 3072);
  142. }
  143. struct sys_timer ep93xx_timer = {
  144. .init = ep93xx_timer_init,
  145. .offset = ep93xx_gettimeoffset,
  146. };
  147. /*************************************************************************
  148. * EP93xx IRQ handling
  149. *************************************************************************/
  150. void __init ep93xx_init_irq(void)
  151. {
  152. vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
  153. vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
  154. }
  155. /*************************************************************************
  156. * EP93xx System Controller Software Locked register handling
  157. *************************************************************************/
  158. /*
  159. * syscon_swlock prevents anything else from writing to the syscon
  160. * block while a software locked register is being written.
  161. */
  162. static DEFINE_SPINLOCK(syscon_swlock);
  163. void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
  164. {
  165. unsigned long flags;
  166. spin_lock_irqsave(&syscon_swlock, flags);
  167. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  168. __raw_writel(val, reg);
  169. spin_unlock_irqrestore(&syscon_swlock, flags);
  170. }
  171. EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
  172. void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
  173. {
  174. unsigned long flags;
  175. unsigned int val;
  176. spin_lock_irqsave(&syscon_swlock, flags);
  177. val = __raw_readl(EP93XX_SYSCON_DEVCFG);
  178. val &= ~clear_bits;
  179. val |= set_bits;
  180. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  181. __raw_writel(val, EP93XX_SYSCON_DEVCFG);
  182. spin_unlock_irqrestore(&syscon_swlock, flags);
  183. }
  184. EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
  185. /**
  186. * ep93xx_chip_revision() - returns the EP93xx chip revision
  187. *
  188. * See <mach/platform.h> for more information.
  189. */
  190. unsigned int ep93xx_chip_revision(void)
  191. {
  192. unsigned int v;
  193. v = __raw_readl(EP93XX_SYSCON_SYSCFG);
  194. v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
  195. v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
  196. return v;
  197. }
  198. /*************************************************************************
  199. * EP93xx GPIO
  200. *************************************************************************/
  201. static struct resource ep93xx_gpio_resource[] = {
  202. {
  203. .start = EP93XX_GPIO_PHYS_BASE,
  204. .end = EP93XX_GPIO_PHYS_BASE + 0xcc - 1,
  205. .flags = IORESOURCE_MEM,
  206. },
  207. };
  208. static struct platform_device ep93xx_gpio_device = {
  209. .name = "gpio-ep93xx",
  210. .id = -1,
  211. .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
  212. .resource = ep93xx_gpio_resource,
  213. };
  214. /*************************************************************************
  215. * EP93xx peripheral handling
  216. *************************************************************************/
  217. #define EP93XX_UART_MCR_OFFSET (0x0100)
  218. static void ep93xx_uart_set_mctrl(struct amba_device *dev,
  219. void __iomem *base, unsigned int mctrl)
  220. {
  221. unsigned int mcr;
  222. mcr = 0;
  223. if (mctrl & TIOCM_RTS)
  224. mcr |= 2;
  225. if (mctrl & TIOCM_DTR)
  226. mcr |= 1;
  227. __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
  228. }
  229. static struct amba_pl010_data ep93xx_uart_data = {
  230. .set_mctrl = ep93xx_uart_set_mctrl,
  231. };
  232. static struct amba_device uart1_device = {
  233. .dev = {
  234. .init_name = "apb:uart1",
  235. .platform_data = &ep93xx_uart_data,
  236. },
  237. .res = {
  238. .start = EP93XX_UART1_PHYS_BASE,
  239. .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
  240. .flags = IORESOURCE_MEM,
  241. },
  242. .irq = { IRQ_EP93XX_UART1, NO_IRQ },
  243. .periphid = 0x00041010,
  244. };
  245. static struct amba_device uart2_device = {
  246. .dev = {
  247. .init_name = "apb:uart2",
  248. .platform_data = &ep93xx_uart_data,
  249. },
  250. .res = {
  251. .start = EP93XX_UART2_PHYS_BASE,
  252. .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
  253. .flags = IORESOURCE_MEM,
  254. },
  255. .irq = { IRQ_EP93XX_UART2, NO_IRQ },
  256. .periphid = 0x00041010,
  257. };
  258. static struct amba_device uart3_device = {
  259. .dev = {
  260. .init_name = "apb:uart3",
  261. .platform_data = &ep93xx_uart_data,
  262. },
  263. .res = {
  264. .start = EP93XX_UART3_PHYS_BASE,
  265. .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
  266. .flags = IORESOURCE_MEM,
  267. },
  268. .irq = { IRQ_EP93XX_UART3, NO_IRQ },
  269. .periphid = 0x00041010,
  270. };
  271. static struct resource ep93xx_rtc_resource[] = {
  272. {
  273. .start = EP93XX_RTC_PHYS_BASE,
  274. .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
  275. .flags = IORESOURCE_MEM,
  276. },
  277. };
  278. static struct platform_device ep93xx_rtc_device = {
  279. .name = "ep93xx-rtc",
  280. .id = -1,
  281. .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
  282. .resource = ep93xx_rtc_resource,
  283. };
  284. static struct resource ep93xx_ohci_resources[] = {
  285. [0] = {
  286. .start = EP93XX_USB_PHYS_BASE,
  287. .end = EP93XX_USB_PHYS_BASE + 0x0fff,
  288. .flags = IORESOURCE_MEM,
  289. },
  290. [1] = {
  291. .start = IRQ_EP93XX_USB,
  292. .end = IRQ_EP93XX_USB,
  293. .flags = IORESOURCE_IRQ,
  294. },
  295. };
  296. static struct platform_device ep93xx_ohci_device = {
  297. .name = "ep93xx-ohci",
  298. .id = -1,
  299. .dev = {
  300. .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
  301. .coherent_dma_mask = DMA_BIT_MASK(32),
  302. },
  303. .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
  304. .resource = ep93xx_ohci_resources,
  305. };
  306. /*************************************************************************
  307. * EP93xx physmap'ed flash
  308. *************************************************************************/
  309. static struct physmap_flash_data ep93xx_flash_data;
  310. static struct resource ep93xx_flash_resource = {
  311. .flags = IORESOURCE_MEM,
  312. };
  313. static struct platform_device ep93xx_flash = {
  314. .name = "physmap-flash",
  315. .id = 0,
  316. .dev = {
  317. .platform_data = &ep93xx_flash_data,
  318. },
  319. .num_resources = 1,
  320. .resource = &ep93xx_flash_resource,
  321. };
  322. /**
  323. * ep93xx_register_flash() - Register the external flash device.
  324. * @width: bank width in octets
  325. * @start: resource start address
  326. * @size: resource size
  327. */
  328. void __init ep93xx_register_flash(unsigned int width,
  329. resource_size_t start, resource_size_t size)
  330. {
  331. ep93xx_flash_data.width = width;
  332. ep93xx_flash_resource.start = start;
  333. ep93xx_flash_resource.end = start + size - 1;
  334. platform_device_register(&ep93xx_flash);
  335. }
  336. /*************************************************************************
  337. * EP93xx ethernet peripheral handling
  338. *************************************************************************/
  339. static struct ep93xx_eth_data ep93xx_eth_data;
  340. static struct resource ep93xx_eth_resource[] = {
  341. {
  342. .start = EP93XX_ETHERNET_PHYS_BASE,
  343. .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
  344. .flags = IORESOURCE_MEM,
  345. }, {
  346. .start = IRQ_EP93XX_ETHERNET,
  347. .end = IRQ_EP93XX_ETHERNET,
  348. .flags = IORESOURCE_IRQ,
  349. }
  350. };
  351. static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
  352. static struct platform_device ep93xx_eth_device = {
  353. .name = "ep93xx-eth",
  354. .id = -1,
  355. .dev = {
  356. .platform_data = &ep93xx_eth_data,
  357. .coherent_dma_mask = DMA_BIT_MASK(32),
  358. .dma_mask = &ep93xx_eth_dma_mask,
  359. },
  360. .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
  361. .resource = ep93xx_eth_resource,
  362. };
  363. /**
  364. * ep93xx_register_eth - Register the built-in ethernet platform device.
  365. * @data: platform specific ethernet configuration (__initdata)
  366. * @copy_addr: flag indicating that the MAC address should be copied
  367. * from the IndAd registers (as programmed by the bootloader)
  368. */
  369. void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
  370. {
  371. if (copy_addr)
  372. memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
  373. ep93xx_eth_data = *data;
  374. platform_device_register(&ep93xx_eth_device);
  375. }
  376. /*************************************************************************
  377. * EP93xx i2c peripheral handling
  378. *************************************************************************/
  379. static struct i2c_gpio_platform_data ep93xx_i2c_data;
  380. static struct platform_device ep93xx_i2c_device = {
  381. .name = "i2c-gpio",
  382. .id = 0,
  383. .dev = {
  384. .platform_data = &ep93xx_i2c_data,
  385. },
  386. };
  387. /**
  388. * ep93xx_register_i2c - Register the i2c platform device.
  389. * @data: platform specific i2c-gpio configuration (__initdata)
  390. * @devices: platform specific i2c bus device information (__initdata)
  391. * @num: the number of devices on the i2c bus
  392. */
  393. void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
  394. struct i2c_board_info *devices, int num)
  395. {
  396. /*
  397. * Set the EEPROM interface pin drive type control.
  398. * Defines the driver type for the EECLK and EEDAT pins as either
  399. * open drain, which will require an external pull-up, or a normal
  400. * CMOS driver.
  401. */
  402. if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
  403. pr_warning("sda != EEDAT, open drain has no effect\n");
  404. if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
  405. pr_warning("scl != EECLK, open drain has no effect\n");
  406. __raw_writel((data->sda_is_open_drain << 1) |
  407. (data->scl_is_open_drain << 0),
  408. EP93XX_GPIO_EEDRIVE);
  409. ep93xx_i2c_data = *data;
  410. i2c_register_board_info(0, devices, num);
  411. platform_device_register(&ep93xx_i2c_device);
  412. }
  413. /*************************************************************************
  414. * EP93xx SPI peripheral handling
  415. *************************************************************************/
  416. static struct ep93xx_spi_info ep93xx_spi_master_data;
  417. static struct resource ep93xx_spi_resources[] = {
  418. {
  419. .start = EP93XX_SPI_PHYS_BASE,
  420. .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
  421. .flags = IORESOURCE_MEM,
  422. },
  423. {
  424. .start = IRQ_EP93XX_SSP,
  425. .end = IRQ_EP93XX_SSP,
  426. .flags = IORESOURCE_IRQ,
  427. },
  428. };
  429. static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
  430. static struct platform_device ep93xx_spi_device = {
  431. .name = "ep93xx-spi",
  432. .id = 0,
  433. .dev = {
  434. .platform_data = &ep93xx_spi_master_data,
  435. .coherent_dma_mask = DMA_BIT_MASK(32),
  436. .dma_mask = &ep93xx_spi_dma_mask,
  437. },
  438. .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
  439. .resource = ep93xx_spi_resources,
  440. };
  441. /**
  442. * ep93xx_register_spi() - registers spi platform device
  443. * @info: ep93xx board specific spi master info (__initdata)
  444. * @devices: SPI devices to register (__initdata)
  445. * @num: number of SPI devices to register
  446. *
  447. * This function registers platform device for the EP93xx SPI controller and
  448. * also makes sure that SPI pins are muxed so that I2S is not using those pins.
  449. */
  450. void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
  451. struct spi_board_info *devices, int num)
  452. {
  453. /*
  454. * When SPI is used, we need to make sure that I2S is muxed off from
  455. * SPI pins.
  456. */
  457. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
  458. ep93xx_spi_master_data = *info;
  459. spi_register_board_info(devices, num);
  460. platform_device_register(&ep93xx_spi_device);
  461. }
  462. /*************************************************************************
  463. * EP93xx LEDs
  464. *************************************************************************/
  465. static struct gpio_led ep93xx_led_pins[] = {
  466. {
  467. .name = "platform:grled",
  468. .gpio = EP93XX_GPIO_LINE_GRLED,
  469. }, {
  470. .name = "platform:rdled",
  471. .gpio = EP93XX_GPIO_LINE_RDLED,
  472. },
  473. };
  474. static struct gpio_led_platform_data ep93xx_led_data = {
  475. .num_leds = ARRAY_SIZE(ep93xx_led_pins),
  476. .leds = ep93xx_led_pins,
  477. };
  478. static struct platform_device ep93xx_leds = {
  479. .name = "leds-gpio",
  480. .id = -1,
  481. .dev = {
  482. .platform_data = &ep93xx_led_data,
  483. },
  484. };
  485. /*************************************************************************
  486. * EP93xx pwm peripheral handling
  487. *************************************************************************/
  488. static struct resource ep93xx_pwm0_resource[] = {
  489. {
  490. .start = EP93XX_PWM_PHYS_BASE,
  491. .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
  492. .flags = IORESOURCE_MEM,
  493. },
  494. };
  495. static struct platform_device ep93xx_pwm0_device = {
  496. .name = "ep93xx-pwm",
  497. .id = 0,
  498. .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
  499. .resource = ep93xx_pwm0_resource,
  500. };
  501. static struct resource ep93xx_pwm1_resource[] = {
  502. {
  503. .start = EP93XX_PWM_PHYS_BASE + 0x20,
  504. .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
  505. .flags = IORESOURCE_MEM,
  506. },
  507. };
  508. static struct platform_device ep93xx_pwm1_device = {
  509. .name = "ep93xx-pwm",
  510. .id = 1,
  511. .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
  512. .resource = ep93xx_pwm1_resource,
  513. };
  514. void __init ep93xx_register_pwm(int pwm0, int pwm1)
  515. {
  516. if (pwm0)
  517. platform_device_register(&ep93xx_pwm0_device);
  518. /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
  519. if (pwm1)
  520. platform_device_register(&ep93xx_pwm1_device);
  521. }
  522. int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
  523. {
  524. int err;
  525. if (pdev->id == 0) {
  526. err = 0;
  527. } else if (pdev->id == 1) {
  528. err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
  529. dev_name(&pdev->dev));
  530. if (err)
  531. return err;
  532. err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
  533. if (err)
  534. goto fail;
  535. /* PWM 1 output on EGPIO[14] */
  536. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
  537. } else {
  538. err = -ENODEV;
  539. }
  540. return err;
  541. fail:
  542. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  543. return err;
  544. }
  545. EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
  546. void ep93xx_pwm_release_gpio(struct platform_device *pdev)
  547. {
  548. if (pdev->id == 1) {
  549. gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
  550. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  551. /* EGPIO[14] used for GPIO */
  552. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
  553. }
  554. }
  555. EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
  556. /*************************************************************************
  557. * EP93xx video peripheral handling
  558. *************************************************************************/
  559. static struct ep93xxfb_mach_info ep93xxfb_data;
  560. static struct resource ep93xx_fb_resource[] = {
  561. {
  562. .start = EP93XX_RASTER_PHYS_BASE,
  563. .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
  564. .flags = IORESOURCE_MEM,
  565. },
  566. };
  567. static struct platform_device ep93xx_fb_device = {
  568. .name = "ep93xx-fb",
  569. .id = -1,
  570. .dev = {
  571. .platform_data = &ep93xxfb_data,
  572. .coherent_dma_mask = DMA_BIT_MASK(32),
  573. .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
  574. },
  575. .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
  576. .resource = ep93xx_fb_resource,
  577. };
  578. static struct platform_device ep93xx_bl_device = {
  579. .name = "ep93xx-bl",
  580. .id = -1,
  581. };
  582. /**
  583. * ep93xx_register_fb - Register the framebuffer platform device.
  584. * @data: platform specific framebuffer configuration (__initdata)
  585. */
  586. void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
  587. {
  588. ep93xxfb_data = *data;
  589. platform_device_register(&ep93xx_fb_device);
  590. platform_device_register(&ep93xx_bl_device);
  591. }
  592. /*************************************************************************
  593. * EP93xx matrix keypad peripheral handling
  594. *************************************************************************/
  595. static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
  596. static struct resource ep93xx_keypad_resource[] = {
  597. {
  598. .start = EP93XX_KEY_MATRIX_PHYS_BASE,
  599. .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
  600. .flags = IORESOURCE_MEM,
  601. }, {
  602. .start = IRQ_EP93XX_KEY,
  603. .end = IRQ_EP93XX_KEY,
  604. .flags = IORESOURCE_IRQ,
  605. },
  606. };
  607. static struct platform_device ep93xx_keypad_device = {
  608. .name = "ep93xx-keypad",
  609. .id = -1,
  610. .dev = {
  611. .platform_data = &ep93xx_keypad_data,
  612. },
  613. .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
  614. .resource = ep93xx_keypad_resource,
  615. };
  616. /**
  617. * ep93xx_register_keypad - Register the keypad platform device.
  618. * @data: platform specific keypad configuration (__initdata)
  619. */
  620. void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
  621. {
  622. ep93xx_keypad_data = *data;
  623. platform_device_register(&ep93xx_keypad_device);
  624. }
  625. int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
  626. {
  627. int err;
  628. int i;
  629. for (i = 0; i < 8; i++) {
  630. err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
  631. if (err)
  632. goto fail_gpio_c;
  633. err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
  634. if (err)
  635. goto fail_gpio_d;
  636. }
  637. /* Enable the keypad controller; GPIO ports C and D used for keypad */
  638. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  639. EP93XX_SYSCON_DEVCFG_GONK);
  640. return 0;
  641. fail_gpio_d:
  642. gpio_free(EP93XX_GPIO_LINE_C(i));
  643. fail_gpio_c:
  644. for ( ; i >= 0; --i) {
  645. gpio_free(EP93XX_GPIO_LINE_C(i));
  646. gpio_free(EP93XX_GPIO_LINE_D(i));
  647. }
  648. return err;
  649. }
  650. EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
  651. void ep93xx_keypad_release_gpio(struct platform_device *pdev)
  652. {
  653. int i;
  654. for (i = 0; i < 8; i++) {
  655. gpio_free(EP93XX_GPIO_LINE_C(i));
  656. gpio_free(EP93XX_GPIO_LINE_D(i));
  657. }
  658. /* Disable the keypad controller; GPIO ports C and D used for GPIO */
  659. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  660. EP93XX_SYSCON_DEVCFG_GONK);
  661. }
  662. EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
  663. /*************************************************************************
  664. * EP93xx I2S audio peripheral handling
  665. *************************************************************************/
  666. static struct resource ep93xx_i2s_resource[] = {
  667. {
  668. .start = EP93XX_I2S_PHYS_BASE,
  669. .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
  670. .flags = IORESOURCE_MEM,
  671. },
  672. };
  673. static struct platform_device ep93xx_i2s_device = {
  674. .name = "ep93xx-i2s",
  675. .id = -1,
  676. .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
  677. .resource = ep93xx_i2s_resource,
  678. };
  679. static struct platform_device ep93xx_pcm_device = {
  680. .name = "ep93xx-pcm-audio",
  681. .id = -1,
  682. };
  683. void __init ep93xx_register_i2s(void)
  684. {
  685. platform_device_register(&ep93xx_i2s_device);
  686. platform_device_register(&ep93xx_pcm_device);
  687. }
  688. #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
  689. EP93XX_SYSCON_DEVCFG_I2SONAC97)
  690. #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
  691. EP93XX_SYSCON_I2SCLKDIV_SPOL)
  692. int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
  693. {
  694. unsigned val;
  695. /* Sanity check */
  696. if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
  697. return -EINVAL;
  698. if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
  699. return -EINVAL;
  700. /* Must have only one of I2SONSSP/I2SONAC97 set */
  701. if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
  702. (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
  703. return -EINVAL;
  704. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
  705. ep93xx_devcfg_set_bits(i2s_pins);
  706. /*
  707. * This is potentially racy with the clock api for i2s_mclk, sclk and
  708. * lrclk. Since the i2s driver is the only user of those clocks we
  709. * rely on it to prevent parallel use of this function and the
  710. * clock api for the i2s clocks.
  711. */
  712. val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
  713. val &= ~EP93XX_I2SCLKDIV_MASK;
  714. val |= i2s_config;
  715. ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
  716. return 0;
  717. }
  718. EXPORT_SYMBOL(ep93xx_i2s_acquire);
  719. void ep93xx_i2s_release(void)
  720. {
  721. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
  722. }
  723. EXPORT_SYMBOL(ep93xx_i2s_release);
  724. /*************************************************************************
  725. * EP93xx AC97 audio peripheral handling
  726. *************************************************************************/
  727. static struct resource ep93xx_ac97_resources[] = {
  728. {
  729. .start = EP93XX_AAC_PHYS_BASE,
  730. .end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
  731. .flags = IORESOURCE_MEM,
  732. },
  733. {
  734. .start = IRQ_EP93XX_AACINTR,
  735. .end = IRQ_EP93XX_AACINTR,
  736. .flags = IORESOURCE_IRQ,
  737. },
  738. };
  739. static struct platform_device ep93xx_ac97_device = {
  740. .name = "ep93xx-ac97",
  741. .id = -1,
  742. .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
  743. .resource = ep93xx_ac97_resources,
  744. };
  745. void __init ep93xx_register_ac97(void)
  746. {
  747. /*
  748. * Make sure that the AC97 pins are not used by I2S.
  749. */
  750. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
  751. platform_device_register(&ep93xx_ac97_device);
  752. platform_device_register(&ep93xx_pcm_device);
  753. }
  754. void __init ep93xx_init_devices(void)
  755. {
  756. /* Disallow access to MaverickCrunch initially */
  757. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
  758. /* Get the GPIO working early, other devices need it */
  759. platform_device_register(&ep93xx_gpio_device);
  760. amba_device_register(&uart1_device, &iomem_resource);
  761. amba_device_register(&uart2_device, &iomem_resource);
  762. amba_device_register(&uart3_device, &iomem_resource);
  763. platform_device_register(&ep93xx_rtc_device);
  764. platform_device_register(&ep93xx_ohci_device);
  765. platform_device_register(&ep93xx_leds);
  766. }