common.c 7.9 KB

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  1. /*
  2. * arch/arm/mach-dove/common.c
  3. *
  4. * Core functions for Marvell Dove 88AP510 System On Chip
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pci.h>
  15. #include <linux/clk.h>
  16. #include <linux/mbus.h>
  17. #include <linux/ata_platform.h>
  18. #include <linux/gpio.h>
  19. #include <asm/page.h>
  20. #include <asm/setup.h>
  21. #include <asm/timex.h>
  22. #include <asm/hardware/cache-tauros2.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/mach/time.h>
  25. #include <asm/mach/pci.h>
  26. #include <mach/dove.h>
  27. #include <mach/bridge-regs.h>
  28. #include <asm/mach/arch.h>
  29. #include <linux/irq.h>
  30. #include <plat/time.h>
  31. #include <plat/common.h>
  32. #include "common.h"
  33. static int get_tclk(void);
  34. /*****************************************************************************
  35. * I/O Address Mapping
  36. ****************************************************************************/
  37. static struct map_desc dove_io_desc[] __initdata = {
  38. {
  39. .virtual = DOVE_SB_REGS_VIRT_BASE,
  40. .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
  41. .length = DOVE_SB_REGS_SIZE,
  42. .type = MT_DEVICE,
  43. }, {
  44. .virtual = DOVE_NB_REGS_VIRT_BASE,
  45. .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
  46. .length = DOVE_NB_REGS_SIZE,
  47. .type = MT_DEVICE,
  48. }, {
  49. .virtual = DOVE_PCIE0_IO_VIRT_BASE,
  50. .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
  51. .length = DOVE_PCIE0_IO_SIZE,
  52. .type = MT_DEVICE,
  53. }, {
  54. .virtual = DOVE_PCIE1_IO_VIRT_BASE,
  55. .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
  56. .length = DOVE_PCIE1_IO_SIZE,
  57. .type = MT_DEVICE,
  58. },
  59. };
  60. void __init dove_map_io(void)
  61. {
  62. iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
  63. }
  64. /*****************************************************************************
  65. * EHCI0
  66. ****************************************************************************/
  67. void __init dove_ehci0_init(void)
  68. {
  69. orion_ehci_init(&dove_mbus_dram_info,
  70. DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
  71. }
  72. /*****************************************************************************
  73. * EHCI1
  74. ****************************************************************************/
  75. void __init dove_ehci1_init(void)
  76. {
  77. orion_ehci_1_init(&dove_mbus_dram_info,
  78. DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
  79. }
  80. /*****************************************************************************
  81. * GE00
  82. ****************************************************************************/
  83. void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
  84. {
  85. orion_ge00_init(eth_data, &dove_mbus_dram_info,
  86. DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
  87. 0, get_tclk());
  88. }
  89. /*****************************************************************************
  90. * SoC RTC
  91. ****************************************************************************/
  92. void __init dove_rtc_init(void)
  93. {
  94. orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
  95. }
  96. /*****************************************************************************
  97. * SATA
  98. ****************************************************************************/
  99. void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
  100. {
  101. orion_sata_init(sata_data, &dove_mbus_dram_info,
  102. DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
  103. }
  104. /*****************************************************************************
  105. * UART0
  106. ****************************************************************************/
  107. void __init dove_uart0_init(void)
  108. {
  109. orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
  110. IRQ_DOVE_UART_0, get_tclk());
  111. }
  112. /*****************************************************************************
  113. * UART1
  114. ****************************************************************************/
  115. void __init dove_uart1_init(void)
  116. {
  117. orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
  118. IRQ_DOVE_UART_1, get_tclk());
  119. }
  120. /*****************************************************************************
  121. * UART2
  122. ****************************************************************************/
  123. void __init dove_uart2_init(void)
  124. {
  125. orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
  126. IRQ_DOVE_UART_2, get_tclk());
  127. }
  128. /*****************************************************************************
  129. * UART3
  130. ****************************************************************************/
  131. void __init dove_uart3_init(void)
  132. {
  133. orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
  134. IRQ_DOVE_UART_3, get_tclk());
  135. }
  136. /*****************************************************************************
  137. * SPI
  138. ****************************************************************************/
  139. void __init dove_spi0_init(void)
  140. {
  141. orion_spi_init(DOVE_SPI0_PHYS_BASE, get_tclk());
  142. }
  143. void __init dove_spi1_init(void)
  144. {
  145. orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk());
  146. }
  147. /*****************************************************************************
  148. * I2C
  149. ****************************************************************************/
  150. void __init dove_i2c_init(void)
  151. {
  152. orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
  153. }
  154. /*****************************************************************************
  155. * Time handling
  156. ****************************************************************************/
  157. void __init dove_init_early(void)
  158. {
  159. orion_time_set_base(TIMER_VIRT_BASE);
  160. }
  161. static int get_tclk(void)
  162. {
  163. /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
  164. return 166666667;
  165. }
  166. static void dove_timer_init(void)
  167. {
  168. orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
  169. IRQ_DOVE_BRIDGE, get_tclk());
  170. }
  171. struct sys_timer dove_timer = {
  172. .init = dove_timer_init,
  173. };
  174. /*****************************************************************************
  175. * XOR 0
  176. ****************************************************************************/
  177. void __init dove_xor0_init(void)
  178. {
  179. orion_xor0_init(&dove_mbus_dram_info,
  180. DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
  181. IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
  182. }
  183. /*****************************************************************************
  184. * XOR 1
  185. ****************************************************************************/
  186. void __init dove_xor1_init(void)
  187. {
  188. orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
  189. IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
  190. }
  191. /*****************************************************************************
  192. * SDIO
  193. ****************************************************************************/
  194. static u64 sdio_dmamask = DMA_BIT_MASK(32);
  195. static struct resource dove_sdio0_resources[] = {
  196. {
  197. .start = DOVE_SDIO0_PHYS_BASE,
  198. .end = DOVE_SDIO0_PHYS_BASE + 0xff,
  199. .flags = IORESOURCE_MEM,
  200. }, {
  201. .start = IRQ_DOVE_SDIO0,
  202. .end = IRQ_DOVE_SDIO0,
  203. .flags = IORESOURCE_IRQ,
  204. },
  205. };
  206. static struct platform_device dove_sdio0 = {
  207. .name = "sdhci-dove",
  208. .id = 0,
  209. .dev = {
  210. .dma_mask = &sdio_dmamask,
  211. .coherent_dma_mask = DMA_BIT_MASK(32),
  212. },
  213. .resource = dove_sdio0_resources,
  214. .num_resources = ARRAY_SIZE(dove_sdio0_resources),
  215. };
  216. void __init dove_sdio0_init(void)
  217. {
  218. platform_device_register(&dove_sdio0);
  219. }
  220. static struct resource dove_sdio1_resources[] = {
  221. {
  222. .start = DOVE_SDIO1_PHYS_BASE,
  223. .end = DOVE_SDIO1_PHYS_BASE + 0xff,
  224. .flags = IORESOURCE_MEM,
  225. }, {
  226. .start = IRQ_DOVE_SDIO1,
  227. .end = IRQ_DOVE_SDIO1,
  228. .flags = IORESOURCE_IRQ,
  229. },
  230. };
  231. static struct platform_device dove_sdio1 = {
  232. .name = "sdhci-dove",
  233. .id = 1,
  234. .dev = {
  235. .dma_mask = &sdio_dmamask,
  236. .coherent_dma_mask = DMA_BIT_MASK(32),
  237. },
  238. .resource = dove_sdio1_resources,
  239. .num_resources = ARRAY_SIZE(dove_sdio1_resources),
  240. };
  241. void __init dove_sdio1_init(void)
  242. {
  243. platform_device_register(&dove_sdio1);
  244. }
  245. void __init dove_init(void)
  246. {
  247. int tclk;
  248. tclk = get_tclk();
  249. printk(KERN_INFO "Dove 88AP510 SoC, ");
  250. printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);
  251. #ifdef CONFIG_CACHE_TAUROS2
  252. tauros2_init();
  253. #endif
  254. dove_setup_cpu_mbus();
  255. /* internal devices that every board has */
  256. dove_rtc_init();
  257. dove_xor0_init();
  258. dove_xor1_init();
  259. }