smp_twd.c 3.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144
  1. /*
  2. * linux/arch/arm/kernel/smp_twd.c
  3. *
  4. * Copyright (C) 2002 ARM Ltd.
  5. * All Rights Reserved
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/delay.h>
  14. #include <linux/device.h>
  15. #include <linux/smp.h>
  16. #include <linux/jiffies.h>
  17. #include <linux/clockchips.h>
  18. #include <linux/irq.h>
  19. #include <linux/io.h>
  20. #include <asm/smp_twd.h>
  21. #include <asm/hardware/gic.h>
  22. /* set up by the platform code */
  23. void __iomem *twd_base;
  24. static unsigned long twd_timer_rate;
  25. static void twd_set_mode(enum clock_event_mode mode,
  26. struct clock_event_device *clk)
  27. {
  28. unsigned long ctrl;
  29. switch (mode) {
  30. case CLOCK_EVT_MODE_PERIODIC:
  31. /* timer load already set up */
  32. ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
  33. | TWD_TIMER_CONTROL_PERIODIC;
  34. __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD);
  35. break;
  36. case CLOCK_EVT_MODE_ONESHOT:
  37. /* period set, and timer enabled in 'next_event' hook */
  38. ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT;
  39. break;
  40. case CLOCK_EVT_MODE_UNUSED:
  41. case CLOCK_EVT_MODE_SHUTDOWN:
  42. default:
  43. ctrl = 0;
  44. }
  45. __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
  46. }
  47. static int twd_set_next_event(unsigned long evt,
  48. struct clock_event_device *unused)
  49. {
  50. unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
  51. ctrl |= TWD_TIMER_CONTROL_ENABLE;
  52. __raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
  53. __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
  54. return 0;
  55. }
  56. /*
  57. * local_timer_ack: checks for a local timer interrupt.
  58. *
  59. * If a local timer interrupt has occurred, acknowledge and return 1.
  60. * Otherwise, return 0.
  61. */
  62. int twd_timer_ack(void)
  63. {
  64. if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
  65. __raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
  66. return 1;
  67. }
  68. return 0;
  69. }
  70. static void __cpuinit twd_calibrate_rate(void)
  71. {
  72. unsigned long count;
  73. u64 waitjiffies;
  74. /*
  75. * If this is the first time round, we need to work out how fast
  76. * the timer ticks
  77. */
  78. if (twd_timer_rate == 0) {
  79. printk(KERN_INFO "Calibrating local timer... ");
  80. /* Wait for a tick to start */
  81. waitjiffies = get_jiffies_64() + 1;
  82. while (get_jiffies_64() < waitjiffies)
  83. udelay(10);
  84. /* OK, now the tick has started, let's get the timer going */
  85. waitjiffies += 5;
  86. /* enable, no interrupt or reload */
  87. __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
  88. /* maximum value */
  89. __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
  90. while (get_jiffies_64() < waitjiffies)
  91. udelay(10);
  92. count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
  93. twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
  94. printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
  95. (twd_timer_rate / 10000) % 100);
  96. }
  97. }
  98. /*
  99. * Setup the local clock events for a CPU.
  100. */
  101. void __cpuinit twd_timer_setup(struct clock_event_device *clk)
  102. {
  103. twd_calibrate_rate();
  104. clk->name = "local_timer";
  105. clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
  106. CLOCK_EVT_FEAT_C3STOP;
  107. clk->rating = 350;
  108. clk->set_mode = twd_set_mode;
  109. clk->set_next_event = twd_set_next_event;
  110. clk->shift = 20;
  111. clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift);
  112. clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);
  113. clk->min_delta_ns = clockevent_delta2ns(0xf, clk);
  114. /* Make sure our local interrupt controller has this enabled */
  115. gic_enable_ppi(clk->irq);
  116. clockevents_register_device(clk);
  117. }