processor_idle.c 35 KB

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  1. /*
  2. * processor_idle - idle state submodule to the ACPI processor driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  8. * - Added processor hotplug support
  9. * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10. * - Added support for C3 on SMP
  11. *
  12. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or (at
  17. * your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  22. * General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27. *
  28. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/cpufreq.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/acpi.h>
  37. #include <linux/dmi.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/sched.h> /* need_resched() */
  40. #include <linux/latency.h>
  41. #include <linux/clockchips.h>
  42. /*
  43. * Include the apic definitions for x86 to have the APIC timer related defines
  44. * available also for UP (on SMP it gets magically included via linux/smp.h).
  45. * asm/acpi.h is not an option, as it would require more include magic. Also
  46. * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  47. */
  48. #ifdef CONFIG_X86
  49. #include <asm/apic.h>
  50. #endif
  51. #include <asm/io.h>
  52. #include <asm/uaccess.h>
  53. #include <acpi/acpi_bus.h>
  54. #include <acpi/processor.h>
  55. #define ACPI_PROCESSOR_COMPONENT 0x01000000
  56. #define ACPI_PROCESSOR_CLASS "processor"
  57. #define _COMPONENT ACPI_PROCESSOR_COMPONENT
  58. ACPI_MODULE_NAME("processor_idle");
  59. #define ACPI_PROCESSOR_FILE_POWER "power"
  60. #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
  61. #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
  62. #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
  63. static void (*pm_idle_save) (void) __read_mostly;
  64. module_param(max_cstate, uint, 0644);
  65. static unsigned int nocst __read_mostly;
  66. module_param(nocst, uint, 0000);
  67. /*
  68. * bm_history -- bit-mask with a bit per jiffy of bus-master activity
  69. * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
  70. * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
  71. * 100 HZ: 0x0000000F: 4 jiffies = 40ms
  72. * reduce history for more aggressive entry into C3
  73. */
  74. static unsigned int bm_history __read_mostly =
  75. (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
  76. module_param(bm_history, uint, 0644);
  77. /* --------------------------------------------------------------------------
  78. Power Management
  79. -------------------------------------------------------------------------- */
  80. /*
  81. * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  82. * For now disable this. Probably a bug somewhere else.
  83. *
  84. * To skip this limit, boot/load with a large max_cstate limit.
  85. */
  86. static int set_max_cstate(struct dmi_system_id *id)
  87. {
  88. if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  89. return 0;
  90. printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
  91. " Override with \"processor.max_cstate=%d\"\n", id->ident,
  92. (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  93. max_cstate = (long)id->driver_data;
  94. return 0;
  95. }
  96. /* Actually this shouldn't be __cpuinitdata, would be better to fix the
  97. callers to only run once -AK */
  98. static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
  99. { set_max_cstate, "IBM ThinkPad R40e", {
  100. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  101. DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
  102. { set_max_cstate, "IBM ThinkPad R40e", {
  103. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  104. DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
  105. { set_max_cstate, "IBM ThinkPad R40e", {
  106. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  107. DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
  108. { set_max_cstate, "IBM ThinkPad R40e", {
  109. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  110. DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
  111. { set_max_cstate, "IBM ThinkPad R40e", {
  112. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  113. DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
  114. { set_max_cstate, "IBM ThinkPad R40e", {
  115. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  116. DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
  117. { set_max_cstate, "IBM ThinkPad R40e", {
  118. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  119. DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
  120. { set_max_cstate, "IBM ThinkPad R40e", {
  121. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  122. DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
  123. { set_max_cstate, "IBM ThinkPad R40e", {
  124. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  125. DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
  126. { set_max_cstate, "IBM ThinkPad R40e", {
  127. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  128. DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
  129. { set_max_cstate, "IBM ThinkPad R40e", {
  130. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  131. DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
  132. { set_max_cstate, "IBM ThinkPad R40e", {
  133. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  134. DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
  135. { set_max_cstate, "IBM ThinkPad R40e", {
  136. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  137. DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
  138. { set_max_cstate, "IBM ThinkPad R40e", {
  139. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  140. DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
  141. { set_max_cstate, "IBM ThinkPad R40e", {
  142. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  143. DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
  144. { set_max_cstate, "IBM ThinkPad R40e", {
  145. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  146. DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
  147. { set_max_cstate, "Medion 41700", {
  148. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  149. DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
  150. { set_max_cstate, "Clevo 5600D", {
  151. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  152. DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  153. (void *)2},
  154. {},
  155. };
  156. static inline u32 ticks_elapsed(u32 t1, u32 t2)
  157. {
  158. if (t2 >= t1)
  159. return (t2 - t1);
  160. else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
  161. return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
  162. else
  163. return ((0xFFFFFFFF - t1) + t2);
  164. }
  165. static void
  166. acpi_processor_power_activate(struct acpi_processor *pr,
  167. struct acpi_processor_cx *new)
  168. {
  169. struct acpi_processor_cx *old;
  170. if (!pr || !new)
  171. return;
  172. old = pr->power.state;
  173. if (old)
  174. old->promotion.count = 0;
  175. new->demotion.count = 0;
  176. /* Cleanup from old state. */
  177. if (old) {
  178. switch (old->type) {
  179. case ACPI_STATE_C3:
  180. /* Disable bus master reload */
  181. if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
  182. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
  183. break;
  184. }
  185. }
  186. /* Prepare to use new state. */
  187. switch (new->type) {
  188. case ACPI_STATE_C3:
  189. /* Enable bus master reload */
  190. if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
  191. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
  192. break;
  193. }
  194. pr->power.state = new;
  195. return;
  196. }
  197. static void acpi_safe_halt(void)
  198. {
  199. current_thread_info()->status &= ~TS_POLLING;
  200. /*
  201. * TS_POLLING-cleared state must be visible before we
  202. * test NEED_RESCHED:
  203. */
  204. smp_mb();
  205. if (!need_resched())
  206. safe_halt();
  207. current_thread_info()->status |= TS_POLLING;
  208. }
  209. static atomic_t c3_cpu_count;
  210. /* Common C-state entry for C2, C3, .. */
  211. static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
  212. {
  213. if (cstate->space_id == ACPI_CSTATE_FFH) {
  214. /* Call into architectural FFH based C-state */
  215. acpi_processor_ffh_cstate_enter(cstate);
  216. } else {
  217. int unused;
  218. /* IO port based C-state */
  219. inb(cstate->address);
  220. /* Dummy wait op - must do something useless after P_LVL2 read
  221. because chipsets cannot guarantee that STPCLK# signal
  222. gets asserted in time to freeze execution properly. */
  223. unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
  224. }
  225. }
  226. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  227. /*
  228. * Some BIOS implementations switch to C3 in the published C2 state.
  229. * This seems to be a common problem on AMD boxen, but other vendors
  230. * are affected too. We pick the most conservative approach: we assume
  231. * that the local APIC stops in both C2 and C3.
  232. */
  233. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  234. struct acpi_processor_cx *cx)
  235. {
  236. struct acpi_processor_power *pwr = &pr->power;
  237. u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
  238. /*
  239. * Check, if one of the previous states already marked the lapic
  240. * unstable
  241. */
  242. if (pwr->timer_broadcast_on_state < state)
  243. return;
  244. if (cx->type >= type)
  245. pr->power.timer_broadcast_on_state = state;
  246. }
  247. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
  248. {
  249. #ifdef CONFIG_GENERIC_CLOCKEVENTS
  250. unsigned long reason;
  251. reason = pr->power.timer_broadcast_on_state < INT_MAX ?
  252. CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
  253. clockevents_notify(reason, &pr->id);
  254. #else
  255. cpumask_t mask = cpumask_of_cpu(pr->id);
  256. if (pr->power.timer_broadcast_on_state < INT_MAX)
  257. on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
  258. else
  259. on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
  260. #endif
  261. }
  262. /* Power(C) State timer broadcast control */
  263. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  264. struct acpi_processor_cx *cx,
  265. int broadcast)
  266. {
  267. #ifdef CONFIG_GENERIC_CLOCKEVENTS
  268. int state = cx - pr->power.states;
  269. if (state >= pr->power.timer_broadcast_on_state) {
  270. unsigned long reason;
  271. reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
  272. CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
  273. clockevents_notify(reason, &pr->id);
  274. }
  275. #endif
  276. }
  277. #else
  278. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  279. struct acpi_processor_cx *cstate) { }
  280. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
  281. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  282. struct acpi_processor_cx *cx,
  283. int broadcast)
  284. {
  285. }
  286. #endif
  287. static void acpi_processor_idle(void)
  288. {
  289. struct acpi_processor *pr = NULL;
  290. struct acpi_processor_cx *cx = NULL;
  291. struct acpi_processor_cx *next_state = NULL;
  292. int sleep_ticks = 0;
  293. u32 t1, t2 = 0;
  294. /*
  295. * Interrupts must be disabled during bus mastering calculations and
  296. * for C2/C3 transitions.
  297. */
  298. local_irq_disable();
  299. pr = processors[smp_processor_id()];
  300. if (!pr) {
  301. local_irq_enable();
  302. return;
  303. }
  304. /*
  305. * Check whether we truly need to go idle, or should
  306. * reschedule:
  307. */
  308. if (unlikely(need_resched())) {
  309. local_irq_enable();
  310. return;
  311. }
  312. cx = pr->power.state;
  313. if (!cx) {
  314. if (pm_idle_save)
  315. pm_idle_save();
  316. else
  317. acpi_safe_halt();
  318. return;
  319. }
  320. /*
  321. * Check BM Activity
  322. * -----------------
  323. * Check for bus mastering activity (if required), record, and check
  324. * for demotion.
  325. */
  326. if (pr->flags.bm_check) {
  327. u32 bm_status = 0;
  328. unsigned long diff = jiffies - pr->power.bm_check_timestamp;
  329. if (diff > 31)
  330. diff = 31;
  331. pr->power.bm_activity <<= diff;
  332. acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
  333. if (bm_status) {
  334. pr->power.bm_activity |= 0x1;
  335. acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
  336. }
  337. /*
  338. * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
  339. * the true state of bus mastering activity; forcing us to
  340. * manually check the BMIDEA bit of each IDE channel.
  341. */
  342. else if (errata.piix4.bmisx) {
  343. if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
  344. || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
  345. pr->power.bm_activity |= 0x1;
  346. }
  347. pr->power.bm_check_timestamp = jiffies;
  348. /*
  349. * If bus mastering is or was active this jiffy, demote
  350. * to avoid a faulty transition. Note that the processor
  351. * won't enter a low-power state during this call (to this
  352. * function) but should upon the next.
  353. *
  354. * TBD: A better policy might be to fallback to the demotion
  355. * state (use it for this quantum only) istead of
  356. * demoting -- and rely on duration as our sole demotion
  357. * qualification. This may, however, introduce DMA
  358. * issues (e.g. floppy DMA transfer overrun/underrun).
  359. */
  360. if ((pr->power.bm_activity & 0x1) &&
  361. cx->demotion.threshold.bm) {
  362. local_irq_enable();
  363. next_state = cx->demotion.state;
  364. goto end;
  365. }
  366. }
  367. #ifdef CONFIG_HOTPLUG_CPU
  368. /*
  369. * Check for P_LVL2_UP flag before entering C2 and above on
  370. * an SMP system. We do it here instead of doing it at _CST/P_LVL
  371. * detection phase, to work cleanly with logical CPU hotplug.
  372. */
  373. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  374. !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  375. cx = &pr->power.states[ACPI_STATE_C1];
  376. #endif
  377. /*
  378. * Sleep:
  379. * ------
  380. * Invoke the current Cx state to put the processor to sleep.
  381. */
  382. if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
  383. current_thread_info()->status &= ~TS_POLLING;
  384. /*
  385. * TS_POLLING-cleared state must be visible before we
  386. * test NEED_RESCHED:
  387. */
  388. smp_mb();
  389. if (need_resched()) {
  390. current_thread_info()->status |= TS_POLLING;
  391. local_irq_enable();
  392. return;
  393. }
  394. }
  395. switch (cx->type) {
  396. case ACPI_STATE_C1:
  397. /*
  398. * Invoke C1.
  399. * Use the appropriate idle routine, the one that would
  400. * be used without acpi C-states.
  401. */
  402. if (pm_idle_save)
  403. pm_idle_save();
  404. else
  405. acpi_safe_halt();
  406. /*
  407. * TBD: Can't get time duration while in C1, as resumes
  408. * go to an ISR rather than here. Need to instrument
  409. * base interrupt handler.
  410. */
  411. sleep_ticks = 0xFFFFFFFF;
  412. break;
  413. case ACPI_STATE_C2:
  414. /* Get start time (ticks) */
  415. t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  416. /* Invoke C2 */
  417. acpi_state_timer_broadcast(pr, cx, 1);
  418. acpi_cstate_enter(cx);
  419. /* Get end time (ticks) */
  420. t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  421. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
  422. /* TSC halts in C2, so notify users */
  423. mark_tsc_unstable("possible TSC halt in C2");
  424. #endif
  425. /* Re-enable interrupts */
  426. local_irq_enable();
  427. current_thread_info()->status |= TS_POLLING;
  428. /* Compute time (ticks) that we were actually asleep */
  429. sleep_ticks =
  430. ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
  431. acpi_state_timer_broadcast(pr, cx, 0);
  432. break;
  433. case ACPI_STATE_C3:
  434. /*
  435. * disable bus master
  436. * bm_check implies we need ARB_DIS
  437. * !bm_check implies we need cache flush
  438. * bm_control implies whether we can do ARB_DIS
  439. *
  440. * That leaves a case where bm_check is set and bm_control is
  441. * not set. In that case we cannot do much, we enter C3
  442. * without doing anything.
  443. */
  444. if (pr->flags.bm_check && pr->flags.bm_control) {
  445. if (atomic_inc_return(&c3_cpu_count) ==
  446. num_online_cpus()) {
  447. /*
  448. * All CPUs are trying to go to C3
  449. * Disable bus master arbitration
  450. */
  451. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
  452. }
  453. } else if (!pr->flags.bm_check) {
  454. /* SMP with no shared cache... Invalidate cache */
  455. ACPI_FLUSH_CPU_CACHE();
  456. }
  457. /* Get start time (ticks) */
  458. t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  459. /* Invoke C3 */
  460. acpi_state_timer_broadcast(pr, cx, 1);
  461. acpi_cstate_enter(cx);
  462. /* Get end time (ticks) */
  463. t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  464. if (pr->flags.bm_check && pr->flags.bm_control) {
  465. /* Enable bus master arbitration */
  466. atomic_dec(&c3_cpu_count);
  467. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
  468. }
  469. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
  470. /* TSC halts in C3, so notify users */
  471. mark_tsc_unstable("TSC halts in C3");
  472. #endif
  473. /* Re-enable interrupts */
  474. local_irq_enable();
  475. current_thread_info()->status |= TS_POLLING;
  476. /* Compute time (ticks) that we were actually asleep */
  477. sleep_ticks =
  478. ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
  479. acpi_state_timer_broadcast(pr, cx, 0);
  480. break;
  481. default:
  482. local_irq_enable();
  483. return;
  484. }
  485. cx->usage++;
  486. if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
  487. cx->time += sleep_ticks;
  488. next_state = pr->power.state;
  489. #ifdef CONFIG_HOTPLUG_CPU
  490. /* Don't do promotion/demotion */
  491. if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  492. !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
  493. next_state = cx;
  494. goto end;
  495. }
  496. #endif
  497. /*
  498. * Promotion?
  499. * ----------
  500. * Track the number of longs (time asleep is greater than threshold)
  501. * and promote when the count threshold is reached. Note that bus
  502. * mastering activity may prevent promotions.
  503. * Do not promote above max_cstate.
  504. */
  505. if (cx->promotion.state &&
  506. ((cx->promotion.state - pr->power.states) <= max_cstate)) {
  507. if (sleep_ticks > cx->promotion.threshold.ticks &&
  508. cx->promotion.state->latency <= system_latency_constraint()) {
  509. cx->promotion.count++;
  510. cx->demotion.count = 0;
  511. if (cx->promotion.count >=
  512. cx->promotion.threshold.count) {
  513. if (pr->flags.bm_check) {
  514. if (!
  515. (pr->power.bm_activity & cx->
  516. promotion.threshold.bm)) {
  517. next_state =
  518. cx->promotion.state;
  519. goto end;
  520. }
  521. } else {
  522. next_state = cx->promotion.state;
  523. goto end;
  524. }
  525. }
  526. }
  527. }
  528. /*
  529. * Demotion?
  530. * ---------
  531. * Track the number of shorts (time asleep is less than time threshold)
  532. * and demote when the usage threshold is reached.
  533. */
  534. if (cx->demotion.state) {
  535. if (sleep_ticks < cx->demotion.threshold.ticks) {
  536. cx->demotion.count++;
  537. cx->promotion.count = 0;
  538. if (cx->demotion.count >= cx->demotion.threshold.count) {
  539. next_state = cx->demotion.state;
  540. goto end;
  541. }
  542. }
  543. }
  544. end:
  545. /*
  546. * Demote if current state exceeds max_cstate
  547. * or if the latency of the current state is unacceptable
  548. */
  549. if ((pr->power.state - pr->power.states) > max_cstate ||
  550. pr->power.state->latency > system_latency_constraint()) {
  551. if (cx->demotion.state)
  552. next_state = cx->demotion.state;
  553. }
  554. /*
  555. * New Cx State?
  556. * -------------
  557. * If we're going to start using a new Cx state we must clean up
  558. * from the previous and prepare to use the new.
  559. */
  560. if (next_state != pr->power.state)
  561. acpi_processor_power_activate(pr, next_state);
  562. }
  563. static int acpi_processor_set_power_policy(struct acpi_processor *pr)
  564. {
  565. unsigned int i;
  566. unsigned int state_is_set = 0;
  567. struct acpi_processor_cx *lower = NULL;
  568. struct acpi_processor_cx *higher = NULL;
  569. struct acpi_processor_cx *cx;
  570. if (!pr)
  571. return -EINVAL;
  572. /*
  573. * This function sets the default Cx state policy (OS idle handler).
  574. * Our scheme is to promote quickly to C2 but more conservatively
  575. * to C3. We're favoring C2 for its characteristics of low latency
  576. * (quick response), good power savings, and ability to allow bus
  577. * mastering activity. Note that the Cx state policy is completely
  578. * customizable and can be altered dynamically.
  579. */
  580. /* startup state */
  581. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  582. cx = &pr->power.states[i];
  583. if (!cx->valid)
  584. continue;
  585. if (!state_is_set)
  586. pr->power.state = cx;
  587. state_is_set++;
  588. break;
  589. }
  590. if (!state_is_set)
  591. return -ENODEV;
  592. /* demotion */
  593. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  594. cx = &pr->power.states[i];
  595. if (!cx->valid)
  596. continue;
  597. if (lower) {
  598. cx->demotion.state = lower;
  599. cx->demotion.threshold.ticks = cx->latency_ticks;
  600. cx->demotion.threshold.count = 1;
  601. if (cx->type == ACPI_STATE_C3)
  602. cx->demotion.threshold.bm = bm_history;
  603. }
  604. lower = cx;
  605. }
  606. /* promotion */
  607. for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
  608. cx = &pr->power.states[i];
  609. if (!cx->valid)
  610. continue;
  611. if (higher) {
  612. cx->promotion.state = higher;
  613. cx->promotion.threshold.ticks = cx->latency_ticks;
  614. if (cx->type >= ACPI_STATE_C2)
  615. cx->promotion.threshold.count = 4;
  616. else
  617. cx->promotion.threshold.count = 10;
  618. if (higher->type == ACPI_STATE_C3)
  619. cx->promotion.threshold.bm = bm_history;
  620. }
  621. higher = cx;
  622. }
  623. return 0;
  624. }
  625. static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
  626. {
  627. if (!pr)
  628. return -EINVAL;
  629. if (!pr->pblk)
  630. return -ENODEV;
  631. /* if info is obtained from pblk/fadt, type equals state */
  632. pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
  633. pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
  634. #ifndef CONFIG_HOTPLUG_CPU
  635. /*
  636. * Check for P_LVL2_UP flag before entering C2 and above on
  637. * an SMP system.
  638. */
  639. if ((num_online_cpus() > 1) &&
  640. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  641. return -ENODEV;
  642. #endif
  643. /* determine C2 and C3 address from pblk */
  644. pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
  645. pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
  646. /* determine latencies from FADT */
  647. pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
  648. pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
  649. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  650. "lvl2[0x%08x] lvl3[0x%08x]\n",
  651. pr->power.states[ACPI_STATE_C2].address,
  652. pr->power.states[ACPI_STATE_C3].address));
  653. return 0;
  654. }
  655. static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
  656. {
  657. if (!pr->power.states[ACPI_STATE_C1].valid) {
  658. /* set the first C-State to C1 */
  659. /* all processors need to support C1 */
  660. pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
  661. pr->power.states[ACPI_STATE_C1].valid = 1;
  662. }
  663. /* the C0 state only exists as a filler in our array */
  664. pr->power.states[ACPI_STATE_C0].valid = 1;
  665. return 0;
  666. }
  667. static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
  668. {
  669. acpi_status status = 0;
  670. acpi_integer count;
  671. int current_count;
  672. int i;
  673. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  674. union acpi_object *cst;
  675. if (nocst)
  676. return -ENODEV;
  677. current_count = 0;
  678. status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
  679. if (ACPI_FAILURE(status)) {
  680. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
  681. return -ENODEV;
  682. }
  683. cst = buffer.pointer;
  684. /* There must be at least 2 elements */
  685. if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
  686. printk(KERN_ERR PREFIX "not enough elements in _CST\n");
  687. status = -EFAULT;
  688. goto end;
  689. }
  690. count = cst->package.elements[0].integer.value;
  691. /* Validate number of power states. */
  692. if (count < 1 || count != cst->package.count - 1) {
  693. printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
  694. status = -EFAULT;
  695. goto end;
  696. }
  697. /* Tell driver that at least _CST is supported. */
  698. pr->flags.has_cst = 1;
  699. for (i = 1; i <= count; i++) {
  700. union acpi_object *element;
  701. union acpi_object *obj;
  702. struct acpi_power_register *reg;
  703. struct acpi_processor_cx cx;
  704. memset(&cx, 0, sizeof(cx));
  705. element = &(cst->package.elements[i]);
  706. if (element->type != ACPI_TYPE_PACKAGE)
  707. continue;
  708. if (element->package.count != 4)
  709. continue;
  710. obj = &(element->package.elements[0]);
  711. if (obj->type != ACPI_TYPE_BUFFER)
  712. continue;
  713. reg = (struct acpi_power_register *)obj->buffer.pointer;
  714. if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
  715. (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
  716. continue;
  717. /* There should be an easy way to extract an integer... */
  718. obj = &(element->package.elements[1]);
  719. if (obj->type != ACPI_TYPE_INTEGER)
  720. continue;
  721. cx.type = obj->integer.value;
  722. /*
  723. * Some buggy BIOSes won't list C1 in _CST -
  724. * Let acpi_processor_get_power_info_default() handle them later
  725. */
  726. if (i == 1 && cx.type != ACPI_STATE_C1)
  727. current_count++;
  728. cx.address = reg->address;
  729. cx.index = current_count + 1;
  730. cx.space_id = ACPI_CSTATE_SYSTEMIO;
  731. if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
  732. if (acpi_processor_ffh_cstate_probe
  733. (pr->id, &cx, reg) == 0) {
  734. cx.space_id = ACPI_CSTATE_FFH;
  735. } else if (cx.type != ACPI_STATE_C1) {
  736. /*
  737. * C1 is a special case where FIXED_HARDWARE
  738. * can be handled in non-MWAIT way as well.
  739. * In that case, save this _CST entry info.
  740. * That is, we retain space_id of SYSTEM_IO for
  741. * halt based C1.
  742. * Otherwise, ignore this info and continue.
  743. */
  744. continue;
  745. }
  746. }
  747. obj = &(element->package.elements[2]);
  748. if (obj->type != ACPI_TYPE_INTEGER)
  749. continue;
  750. cx.latency = obj->integer.value;
  751. obj = &(element->package.elements[3]);
  752. if (obj->type != ACPI_TYPE_INTEGER)
  753. continue;
  754. cx.power = obj->integer.value;
  755. current_count++;
  756. memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
  757. /*
  758. * We support total ACPI_PROCESSOR_MAX_POWER - 1
  759. * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
  760. */
  761. if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
  762. printk(KERN_WARNING
  763. "Limiting number of power states to max (%d)\n",
  764. ACPI_PROCESSOR_MAX_POWER);
  765. printk(KERN_WARNING
  766. "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
  767. break;
  768. }
  769. }
  770. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
  771. current_count));
  772. /* Validate number of power states discovered */
  773. if (current_count < 2)
  774. status = -EFAULT;
  775. end:
  776. kfree(buffer.pointer);
  777. return status;
  778. }
  779. static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
  780. {
  781. if (!cx->address)
  782. return;
  783. /*
  784. * C2 latency must be less than or equal to 100
  785. * microseconds.
  786. */
  787. else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
  788. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  789. "latency too large [%d]\n", cx->latency));
  790. return;
  791. }
  792. /*
  793. * Otherwise we've met all of our C2 requirements.
  794. * Normalize the C2 latency to expidite policy
  795. */
  796. cx->valid = 1;
  797. cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
  798. return;
  799. }
  800. static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
  801. struct acpi_processor_cx *cx)
  802. {
  803. static int bm_check_flag;
  804. if (!cx->address)
  805. return;
  806. /*
  807. * C3 latency must be less than or equal to 1000
  808. * microseconds.
  809. */
  810. else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
  811. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  812. "latency too large [%d]\n", cx->latency));
  813. return;
  814. }
  815. /*
  816. * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
  817. * DMA transfers are used by any ISA device to avoid livelock.
  818. * Note that we could disable Type-F DMA (as recommended by
  819. * the erratum), but this is known to disrupt certain ISA
  820. * devices thus we take the conservative approach.
  821. */
  822. else if (errata.piix4.fdma) {
  823. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  824. "C3 not supported on PIIX4 with Type-F DMA\n"));
  825. return;
  826. }
  827. /* All the logic here assumes flags.bm_check is same across all CPUs */
  828. if (!bm_check_flag) {
  829. /* Determine whether bm_check is needed based on CPU */
  830. acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
  831. bm_check_flag = pr->flags.bm_check;
  832. } else {
  833. pr->flags.bm_check = bm_check_flag;
  834. }
  835. if (pr->flags.bm_check) {
  836. /* bus mastering control is necessary */
  837. if (!pr->flags.bm_control) {
  838. /* In this case we enter C3 without bus mastering */
  839. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  840. "C3 support without bus mastering control\n"));
  841. }
  842. } else {
  843. /*
  844. * WBINVD should be set in fadt, for C3 state to be
  845. * supported on when bm_check is not required.
  846. */
  847. if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
  848. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  849. "Cache invalidation should work properly"
  850. " for C3 to be enabled on SMP systems\n"));
  851. return;
  852. }
  853. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
  854. }
  855. /*
  856. * Otherwise we've met all of our C3 requirements.
  857. * Normalize the C3 latency to expidite policy. Enable
  858. * checking of bus mastering status (bm_check) so we can
  859. * use this in our C3 policy
  860. */
  861. cx->valid = 1;
  862. cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
  863. return;
  864. }
  865. static int acpi_processor_power_verify(struct acpi_processor *pr)
  866. {
  867. unsigned int i;
  868. unsigned int working = 0;
  869. pr->power.timer_broadcast_on_state = INT_MAX;
  870. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  871. struct acpi_processor_cx *cx = &pr->power.states[i];
  872. switch (cx->type) {
  873. case ACPI_STATE_C1:
  874. cx->valid = 1;
  875. break;
  876. case ACPI_STATE_C2:
  877. acpi_processor_power_verify_c2(cx);
  878. if (cx->valid)
  879. acpi_timer_check_state(i, pr, cx);
  880. break;
  881. case ACPI_STATE_C3:
  882. acpi_processor_power_verify_c3(pr, cx);
  883. if (cx->valid)
  884. acpi_timer_check_state(i, pr, cx);
  885. break;
  886. }
  887. if (cx->valid)
  888. working++;
  889. }
  890. acpi_propagate_timer_broadcast(pr);
  891. return (working);
  892. }
  893. static int acpi_processor_get_power_info(struct acpi_processor *pr)
  894. {
  895. unsigned int i;
  896. int result;
  897. /* NOTE: the idle thread may not be running while calling
  898. * this function */
  899. /* Zero initialize all the C-states info. */
  900. memset(pr->power.states, 0, sizeof(pr->power.states));
  901. result = acpi_processor_get_power_info_cst(pr);
  902. if (result == -ENODEV)
  903. result = acpi_processor_get_power_info_fadt(pr);
  904. if (result)
  905. return result;
  906. acpi_processor_get_power_info_default(pr);
  907. pr->power.count = acpi_processor_power_verify(pr);
  908. /*
  909. * Set Default Policy
  910. * ------------------
  911. * Now that we know which states are supported, set the default
  912. * policy. Note that this policy can be changed dynamically
  913. * (e.g. encourage deeper sleeps to conserve battery life when
  914. * not on AC).
  915. */
  916. result = acpi_processor_set_power_policy(pr);
  917. if (result)
  918. return result;
  919. /*
  920. * if one state of type C2 or C3 is available, mark this
  921. * CPU as being "idle manageable"
  922. */
  923. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  924. if (pr->power.states[i].valid) {
  925. pr->power.count = i;
  926. if (pr->power.states[i].type >= ACPI_STATE_C2)
  927. pr->flags.power = 1;
  928. }
  929. }
  930. return 0;
  931. }
  932. int acpi_processor_cst_has_changed(struct acpi_processor *pr)
  933. {
  934. int result = 0;
  935. if (!pr)
  936. return -EINVAL;
  937. if (nocst) {
  938. return -ENODEV;
  939. }
  940. if (!pr->flags.power_setup_done)
  941. return -ENODEV;
  942. /* Fall back to the default idle loop */
  943. pm_idle = pm_idle_save;
  944. synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
  945. pr->flags.power = 0;
  946. result = acpi_processor_get_power_info(pr);
  947. if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
  948. pm_idle = acpi_processor_idle;
  949. return result;
  950. }
  951. /* proc interface */
  952. static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
  953. {
  954. struct acpi_processor *pr = seq->private;
  955. unsigned int i;
  956. if (!pr)
  957. goto end;
  958. seq_printf(seq, "active state: C%zd\n"
  959. "max_cstate: C%d\n"
  960. "bus master activity: %08x\n"
  961. "maximum allowed latency: %d usec\n",
  962. pr->power.state ? pr->power.state - pr->power.states : 0,
  963. max_cstate, (unsigned)pr->power.bm_activity,
  964. system_latency_constraint());
  965. seq_puts(seq, "states:\n");
  966. for (i = 1; i <= pr->power.count; i++) {
  967. seq_printf(seq, " %cC%d: ",
  968. (&pr->power.states[i] ==
  969. pr->power.state ? '*' : ' '), i);
  970. if (!pr->power.states[i].valid) {
  971. seq_puts(seq, "<not supported>\n");
  972. continue;
  973. }
  974. switch (pr->power.states[i].type) {
  975. case ACPI_STATE_C1:
  976. seq_printf(seq, "type[C1] ");
  977. break;
  978. case ACPI_STATE_C2:
  979. seq_printf(seq, "type[C2] ");
  980. break;
  981. case ACPI_STATE_C3:
  982. seq_printf(seq, "type[C3] ");
  983. break;
  984. default:
  985. seq_printf(seq, "type[--] ");
  986. break;
  987. }
  988. if (pr->power.states[i].promotion.state)
  989. seq_printf(seq, "promotion[C%zd] ",
  990. (pr->power.states[i].promotion.state -
  991. pr->power.states));
  992. else
  993. seq_puts(seq, "promotion[--] ");
  994. if (pr->power.states[i].demotion.state)
  995. seq_printf(seq, "demotion[C%zd] ",
  996. (pr->power.states[i].demotion.state -
  997. pr->power.states));
  998. else
  999. seq_puts(seq, "demotion[--] ");
  1000. seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
  1001. pr->power.states[i].latency,
  1002. pr->power.states[i].usage,
  1003. (unsigned long long)pr->power.states[i].time);
  1004. }
  1005. end:
  1006. return 0;
  1007. }
  1008. static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
  1009. {
  1010. return single_open(file, acpi_processor_power_seq_show,
  1011. PDE(inode)->data);
  1012. }
  1013. static const struct file_operations acpi_processor_power_fops = {
  1014. .open = acpi_processor_power_open_fs,
  1015. .read = seq_read,
  1016. .llseek = seq_lseek,
  1017. .release = single_release,
  1018. };
  1019. #ifdef CONFIG_SMP
  1020. static void smp_callback(void *v)
  1021. {
  1022. /* we already woke the CPU up, nothing more to do */
  1023. }
  1024. /*
  1025. * This function gets called when a part of the kernel has a new latency
  1026. * requirement. This means we need to get all processors out of their C-state,
  1027. * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
  1028. * wakes them all right up.
  1029. */
  1030. static int acpi_processor_latency_notify(struct notifier_block *b,
  1031. unsigned long l, void *v)
  1032. {
  1033. smp_call_function(smp_callback, NULL, 0, 1);
  1034. return NOTIFY_OK;
  1035. }
  1036. static struct notifier_block acpi_processor_latency_notifier = {
  1037. .notifier_call = acpi_processor_latency_notify,
  1038. };
  1039. #endif
  1040. int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
  1041. struct acpi_device *device)
  1042. {
  1043. acpi_status status = 0;
  1044. static int first_run;
  1045. struct proc_dir_entry *entry = NULL;
  1046. unsigned int i;
  1047. if (!first_run) {
  1048. dmi_check_system(processor_power_dmi_table);
  1049. if (max_cstate < ACPI_C_STATES_MAX)
  1050. printk(KERN_NOTICE
  1051. "ACPI: processor limited to max C-state %d\n",
  1052. max_cstate);
  1053. first_run++;
  1054. #ifdef CONFIG_SMP
  1055. register_latency_notifier(&acpi_processor_latency_notifier);
  1056. #endif
  1057. }
  1058. if (!pr)
  1059. return -EINVAL;
  1060. if (acpi_gbl_FADT.cst_control && !nocst) {
  1061. status =
  1062. acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
  1063. if (ACPI_FAILURE(status)) {
  1064. ACPI_EXCEPTION((AE_INFO, status,
  1065. "Notifying BIOS of _CST ability failed"));
  1066. }
  1067. }
  1068. acpi_processor_get_power_info(pr);
  1069. /*
  1070. * Install the idle handler if processor power management is supported.
  1071. * Note that we use previously set idle handler will be used on
  1072. * platforms that only support C1.
  1073. */
  1074. if ((pr->flags.power) && (!boot_option_idle_override)) {
  1075. printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
  1076. for (i = 1; i <= pr->power.count; i++)
  1077. if (pr->power.states[i].valid)
  1078. printk(" C%d[C%d]", i,
  1079. pr->power.states[i].type);
  1080. printk(")\n");
  1081. if (pr->id == 0) {
  1082. pm_idle_save = pm_idle;
  1083. pm_idle = acpi_processor_idle;
  1084. }
  1085. }
  1086. /* 'power' [R] */
  1087. entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1088. S_IRUGO, acpi_device_dir(device));
  1089. if (!entry)
  1090. return -EIO;
  1091. else {
  1092. entry->proc_fops = &acpi_processor_power_fops;
  1093. entry->data = acpi_driver_data(device);
  1094. entry->owner = THIS_MODULE;
  1095. }
  1096. pr->flags.power_setup_done = 1;
  1097. return 0;
  1098. }
  1099. int acpi_processor_power_exit(struct acpi_processor *pr,
  1100. struct acpi_device *device)
  1101. {
  1102. pr->flags.power_setup_done = 0;
  1103. if (acpi_device_dir(device))
  1104. remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1105. acpi_device_dir(device));
  1106. /* Unregister the idle handler when processor #0 is removed. */
  1107. if (pr->id == 0) {
  1108. pm_idle = pm_idle_save;
  1109. /*
  1110. * We are about to unload the current idle thread pm callback
  1111. * (pm_idle), Wait for all processors to update cached/local
  1112. * copies of pm_idle before proceeding.
  1113. */
  1114. cpu_idle_wait();
  1115. #ifdef CONFIG_SMP
  1116. unregister_latency_notifier(&acpi_processor_latency_notifier);
  1117. #endif
  1118. }
  1119. return 0;
  1120. }