apply.c 29 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475
  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. };
  84. static struct {
  85. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  86. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  87. bool irq_enabled;
  88. } dss_data;
  89. /* protects dss_data */
  90. static spinlock_t data_lock;
  91. /* lock for blocking functions */
  92. static DEFINE_MUTEX(apply_lock);
  93. static DECLARE_COMPLETION(extra_updated_completion);
  94. static void dss_register_vsync_isr(void);
  95. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  96. {
  97. return &dss_data.ovl_priv_data_array[ovl->id];
  98. }
  99. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  100. {
  101. return &dss_data.mgr_priv_data_array[mgr->id];
  102. }
  103. void dss_apply_init(void)
  104. {
  105. const int num_ovls = dss_feat_get_num_ovls();
  106. int i;
  107. spin_lock_init(&data_lock);
  108. for (i = 0; i < num_ovls; ++i) {
  109. struct ovl_priv_data *op;
  110. op = &dss_data.ovl_priv_data_array[i];
  111. op->info.global_alpha = 255;
  112. switch (i) {
  113. case 0:
  114. op->info.zorder = 0;
  115. break;
  116. case 1:
  117. op->info.zorder =
  118. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  119. break;
  120. case 2:
  121. op->info.zorder =
  122. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  123. break;
  124. case 3:
  125. op->info.zorder =
  126. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  127. break;
  128. }
  129. op->user_info = op->info;
  130. }
  131. }
  132. static bool ovl_manual_update(struct omap_overlay *ovl)
  133. {
  134. return ovl->manager->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  135. }
  136. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  137. {
  138. return mgr->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  139. }
  140. /* Check if overlay parameters are compatible with display */
  141. static int dss_ovl_check(struct omap_overlay *ovl,
  142. struct omap_overlay_info *info, struct omap_dss_device *dssdev)
  143. {
  144. u16 outw, outh;
  145. u16 dw, dh;
  146. if (dssdev == NULL)
  147. return 0;
  148. dssdev->driver->get_resolution(dssdev, &dw, &dh);
  149. if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) {
  150. outw = info->width;
  151. outh = info->height;
  152. } else {
  153. if (info->out_width == 0)
  154. outw = info->width;
  155. else
  156. outw = info->out_width;
  157. if (info->out_height == 0)
  158. outh = info->height;
  159. else
  160. outh = info->out_height;
  161. }
  162. if (dw < info->pos_x + outw) {
  163. DSSERR("overlay %d horizontally not inside the display area "
  164. "(%d + %d >= %d)\n",
  165. ovl->id, info->pos_x, outw, dw);
  166. return -EINVAL;
  167. }
  168. if (dh < info->pos_y + outh) {
  169. DSSERR("overlay %d vertically not inside the display area "
  170. "(%d + %d >= %d)\n",
  171. ovl->id, info->pos_y, outh, dh);
  172. return -EINVAL;
  173. }
  174. return 0;
  175. }
  176. static int dss_mgr_check_zorder(struct omap_overlay_manager *mgr,
  177. struct omap_overlay_info **overlay_infos)
  178. {
  179. struct omap_overlay *ovl1, *ovl2;
  180. struct ovl_priv_data *op1, *op2;
  181. struct omap_overlay_info *info1, *info2;
  182. list_for_each_entry(ovl1, &mgr->overlays, list) {
  183. op1 = get_ovl_priv(ovl1);
  184. info1 = overlay_infos[ovl1->id];
  185. if (info1 == NULL)
  186. continue;
  187. list_for_each_entry(ovl2, &mgr->overlays, list) {
  188. if (ovl1 == ovl2)
  189. continue;
  190. op2 = get_ovl_priv(ovl2);
  191. info2 = overlay_infos[ovl2->id];
  192. if (info2 == NULL)
  193. continue;
  194. if (info1->zorder == info2->zorder) {
  195. DSSERR("overlays %d and %d have the same "
  196. "zorder %d\n",
  197. ovl1->id, ovl2->id, info1->zorder);
  198. return -EINVAL;
  199. }
  200. }
  201. }
  202. return 0;
  203. }
  204. static int dss_mgr_check(struct omap_overlay_manager *mgr,
  205. struct omap_dss_device *dssdev,
  206. struct omap_overlay_manager_info *info,
  207. struct omap_overlay_info **overlay_infos)
  208. {
  209. struct omap_overlay *ovl;
  210. int r;
  211. if (dss_has_feature(FEAT_ALPHA_FREE_ZORDER)) {
  212. r = dss_mgr_check_zorder(mgr, overlay_infos);
  213. if (r)
  214. return r;
  215. }
  216. list_for_each_entry(ovl, &mgr->overlays, list) {
  217. struct omap_overlay_info *oi;
  218. int r;
  219. oi = overlay_infos[ovl->id];
  220. if (oi == NULL)
  221. continue;
  222. r = dss_ovl_check(ovl, oi, dssdev);
  223. if (r)
  224. return r;
  225. }
  226. return 0;
  227. }
  228. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  229. struct omap_dss_device *dssdev, bool applying)
  230. {
  231. struct omap_overlay_info *oi;
  232. struct omap_overlay_manager_info *mi;
  233. struct omap_overlay *ovl;
  234. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  235. struct ovl_priv_data *op;
  236. struct mgr_priv_data *mp;
  237. mp = get_mgr_priv(mgr);
  238. if (applying && mp->user_info_dirty)
  239. mi = &mp->user_info;
  240. else
  241. mi = &mp->info;
  242. /* collect the infos to be tested into the array */
  243. list_for_each_entry(ovl, &mgr->overlays, list) {
  244. op = get_ovl_priv(ovl);
  245. if (!op->enabled && !op->enabling)
  246. oi = NULL;
  247. else if (applying && op->user_info_dirty)
  248. oi = &op->user_info;
  249. else
  250. oi = &op->info;
  251. ois[ovl->id] = oi;
  252. }
  253. return dss_mgr_check(mgr, dssdev, mi, ois);
  254. }
  255. /*
  256. * check manager and overlay settings using overlay_info from data->info
  257. */
  258. static int dss_check_settings(struct omap_overlay_manager *mgr,
  259. struct omap_dss_device *dssdev)
  260. {
  261. return dss_check_settings_low(mgr, dssdev, false);
  262. }
  263. /*
  264. * check manager and overlay settings using overlay_info from ovl->info if
  265. * dirty and from data->info otherwise
  266. */
  267. static int dss_check_settings_apply(struct omap_overlay_manager *mgr,
  268. struct omap_dss_device *dssdev)
  269. {
  270. return dss_check_settings_low(mgr, dssdev, true);
  271. }
  272. static bool need_isr(void)
  273. {
  274. const int num_mgrs = dss_feat_get_num_mgrs();
  275. int i;
  276. for (i = 0; i < num_mgrs; ++i) {
  277. struct omap_overlay_manager *mgr;
  278. struct mgr_priv_data *mp;
  279. struct omap_overlay *ovl;
  280. mgr = omap_dss_get_overlay_manager(i);
  281. mp = get_mgr_priv(mgr);
  282. if (!mp->enabled)
  283. continue;
  284. if (mgr_manual_update(mgr)) {
  285. /* to catch FRAMEDONE */
  286. if (mp->updating)
  287. return true;
  288. } else {
  289. /* to catch GO bit going down */
  290. if (mp->busy)
  291. return true;
  292. /* to write new values to registers */
  293. if (mp->info_dirty)
  294. return true;
  295. /* to set GO bit */
  296. if (mp->shadow_info_dirty)
  297. return true;
  298. list_for_each_entry(ovl, &mgr->overlays, list) {
  299. struct ovl_priv_data *op;
  300. op = get_ovl_priv(ovl);
  301. /*
  302. * NOTE: we check extra_info flags even for
  303. * disabled overlays, as extra_infos need to be
  304. * always written.
  305. */
  306. /* to write new values to registers */
  307. if (op->extra_info_dirty)
  308. return true;
  309. /* to set GO bit */
  310. if (op->shadow_extra_info_dirty)
  311. return true;
  312. if (!op->enabled)
  313. continue;
  314. /* to write new values to registers */
  315. if (op->info_dirty)
  316. return true;
  317. /* to set GO bit */
  318. if (op->shadow_info_dirty)
  319. return true;
  320. }
  321. }
  322. }
  323. return false;
  324. }
  325. static bool need_go(struct omap_overlay_manager *mgr)
  326. {
  327. struct omap_overlay *ovl;
  328. struct mgr_priv_data *mp;
  329. struct ovl_priv_data *op;
  330. mp = get_mgr_priv(mgr);
  331. if (mp->shadow_info_dirty)
  332. return true;
  333. list_for_each_entry(ovl, &mgr->overlays, list) {
  334. op = get_ovl_priv(ovl);
  335. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  336. return true;
  337. }
  338. return false;
  339. }
  340. /* returns true if an extra_info field is currently being updated */
  341. static bool extra_info_update_ongoing(void)
  342. {
  343. const int num_ovls = omap_dss_get_num_overlays();
  344. struct ovl_priv_data *op;
  345. struct omap_overlay *ovl;
  346. struct mgr_priv_data *mp;
  347. int i;
  348. for (i = 0; i < num_ovls; ++i) {
  349. ovl = omap_dss_get_overlay(i);
  350. op = get_ovl_priv(ovl);
  351. mp = get_mgr_priv(ovl->manager);
  352. if (!mp->enabled)
  353. continue;
  354. if (!mp->updating)
  355. continue;
  356. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  357. return true;
  358. }
  359. return false;
  360. }
  361. /* wait until no extra_info updates are pending */
  362. static void wait_pending_extra_info_updates(void)
  363. {
  364. bool updating;
  365. unsigned long flags;
  366. unsigned long t;
  367. spin_lock_irqsave(&data_lock, flags);
  368. updating = extra_info_update_ongoing();
  369. if (!updating) {
  370. spin_unlock_irqrestore(&data_lock, flags);
  371. return;
  372. }
  373. init_completion(&extra_updated_completion);
  374. spin_unlock_irqrestore(&data_lock, flags);
  375. t = msecs_to_jiffies(500);
  376. wait_for_completion_timeout(&extra_updated_completion, t);
  377. updating = extra_info_update_ongoing();
  378. WARN_ON(updating);
  379. }
  380. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  381. {
  382. unsigned long timeout = msecs_to_jiffies(500);
  383. struct mgr_priv_data *mp;
  384. u32 irq;
  385. int r;
  386. int i;
  387. struct omap_dss_device *dssdev = mgr->device;
  388. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  389. return 0;
  390. if (mgr_manual_update(mgr))
  391. return 0;
  392. irq = dispc_mgr_get_vsync_irq(mgr->id);
  393. mp = get_mgr_priv(mgr);
  394. i = 0;
  395. while (1) {
  396. unsigned long flags;
  397. bool shadow_dirty, dirty;
  398. spin_lock_irqsave(&data_lock, flags);
  399. dirty = mp->info_dirty;
  400. shadow_dirty = mp->shadow_info_dirty;
  401. spin_unlock_irqrestore(&data_lock, flags);
  402. if (!dirty && !shadow_dirty) {
  403. r = 0;
  404. break;
  405. }
  406. /* 4 iterations is the worst case:
  407. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  408. * 2 - first VSYNC, dirty = true
  409. * 3 - dirty = false, shadow_dirty = true
  410. * 4 - shadow_dirty = false */
  411. if (i++ == 3) {
  412. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  413. mgr->id);
  414. r = 0;
  415. break;
  416. }
  417. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  418. if (r == -ERESTARTSYS)
  419. break;
  420. if (r) {
  421. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  422. break;
  423. }
  424. }
  425. return r;
  426. }
  427. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  428. {
  429. unsigned long timeout = msecs_to_jiffies(500);
  430. struct ovl_priv_data *op;
  431. struct omap_dss_device *dssdev;
  432. u32 irq;
  433. int r;
  434. int i;
  435. if (!ovl->manager)
  436. return 0;
  437. dssdev = ovl->manager->device;
  438. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  439. return 0;
  440. if (ovl_manual_update(ovl))
  441. return 0;
  442. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  443. op = get_ovl_priv(ovl);
  444. i = 0;
  445. while (1) {
  446. unsigned long flags;
  447. bool shadow_dirty, dirty;
  448. spin_lock_irqsave(&data_lock, flags);
  449. dirty = op->info_dirty;
  450. shadow_dirty = op->shadow_info_dirty;
  451. spin_unlock_irqrestore(&data_lock, flags);
  452. if (!dirty && !shadow_dirty) {
  453. r = 0;
  454. break;
  455. }
  456. /* 4 iterations is the worst case:
  457. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  458. * 2 - first VSYNC, dirty = true
  459. * 3 - dirty = false, shadow_dirty = true
  460. * 4 - shadow_dirty = false */
  461. if (i++ == 3) {
  462. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  463. ovl->id);
  464. r = 0;
  465. break;
  466. }
  467. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  468. if (r == -ERESTARTSYS)
  469. break;
  470. if (r) {
  471. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  472. break;
  473. }
  474. }
  475. return r;
  476. }
  477. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  478. {
  479. struct ovl_priv_data *op = get_ovl_priv(ovl);
  480. struct omap_overlay_info *oi;
  481. bool ilace, replication;
  482. struct mgr_priv_data *mp;
  483. int r;
  484. DSSDBGF("%d", ovl->id);
  485. if (!op->enabled || !op->info_dirty)
  486. return;
  487. oi = &op->info;
  488. replication = dss_use_replication(ovl->manager->device, oi->color_mode);
  489. ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC;
  490. r = dispc_ovl_setup(ovl->id, oi, ilace, replication);
  491. if (r) {
  492. /*
  493. * We can't do much here, as this function can be called from
  494. * vsync interrupt.
  495. */
  496. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  497. /* This will leave fifo configurations in a nonoptimal state */
  498. op->enabled = false;
  499. dispc_ovl_enable(ovl->id, false);
  500. return;
  501. }
  502. mp = get_mgr_priv(ovl->manager);
  503. op->info_dirty = false;
  504. if (mp->updating)
  505. op->shadow_info_dirty = true;
  506. }
  507. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  508. {
  509. struct ovl_priv_data *op = get_ovl_priv(ovl);
  510. struct mgr_priv_data *mp;
  511. DSSDBGF("%d", ovl->id);
  512. if (!op->extra_info_dirty)
  513. return;
  514. /* note: write also when op->enabled == false, so that the ovl gets
  515. * disabled */
  516. dispc_ovl_enable(ovl->id, op->enabled);
  517. dispc_ovl_set_channel_out(ovl->id, op->channel);
  518. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  519. mp = get_mgr_priv(ovl->manager);
  520. op->extra_info_dirty = false;
  521. if (mp->updating)
  522. op->shadow_extra_info_dirty = true;
  523. }
  524. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  525. {
  526. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  527. struct omap_overlay *ovl;
  528. DSSDBGF("%d", mgr->id);
  529. if (!mp->enabled)
  530. return;
  531. WARN_ON(mp->busy);
  532. /* Commit overlay settings */
  533. list_for_each_entry(ovl, &mgr->overlays, list) {
  534. dss_ovl_write_regs(ovl);
  535. dss_ovl_write_regs_extra(ovl);
  536. }
  537. if (mp->info_dirty) {
  538. dispc_mgr_setup(mgr->id, &mp->info);
  539. mp->info_dirty = false;
  540. if (mp->updating)
  541. mp->shadow_info_dirty = true;
  542. }
  543. }
  544. static void dss_write_regs(void)
  545. {
  546. const int num_mgrs = omap_dss_get_num_overlay_managers();
  547. int i;
  548. for (i = 0; i < num_mgrs; ++i) {
  549. struct omap_overlay_manager *mgr;
  550. struct mgr_priv_data *mp;
  551. int r;
  552. mgr = omap_dss_get_overlay_manager(i);
  553. mp = get_mgr_priv(mgr);
  554. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  555. continue;
  556. r = dss_check_settings(mgr, mgr->device);
  557. if (r) {
  558. DSSERR("cannot write registers for manager %s: "
  559. "illegal configuration\n", mgr->name);
  560. continue;
  561. }
  562. dss_mgr_write_regs(mgr);
  563. }
  564. }
  565. static void dss_set_go_bits(void)
  566. {
  567. const int num_mgrs = omap_dss_get_num_overlay_managers();
  568. int i;
  569. for (i = 0; i < num_mgrs; ++i) {
  570. struct omap_overlay_manager *mgr;
  571. struct mgr_priv_data *mp;
  572. mgr = omap_dss_get_overlay_manager(i);
  573. mp = get_mgr_priv(mgr);
  574. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  575. continue;
  576. if (!need_go(mgr))
  577. continue;
  578. mp->busy = true;
  579. if (!dss_data.irq_enabled && need_isr())
  580. dss_register_vsync_isr();
  581. dispc_mgr_go(mgr->id);
  582. }
  583. }
  584. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  585. {
  586. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  587. unsigned long flags;
  588. int r;
  589. spin_lock_irqsave(&data_lock, flags);
  590. WARN_ON(mp->updating);
  591. r = dss_check_settings(mgr, mgr->device);
  592. if (r) {
  593. DSSERR("cannot start manual update: illegal configuration\n");
  594. spin_unlock_irqrestore(&data_lock, flags);
  595. return;
  596. }
  597. dss_mgr_write_regs(mgr);
  598. mp->updating = true;
  599. if (!dss_data.irq_enabled && need_isr())
  600. dss_register_vsync_isr();
  601. dispc_mgr_enable(mgr->id, true);
  602. spin_unlock_irqrestore(&data_lock, flags);
  603. }
  604. static void dss_apply_irq_handler(void *data, u32 mask);
  605. static void dss_register_vsync_isr(void)
  606. {
  607. const int num_mgrs = dss_feat_get_num_mgrs();
  608. u32 mask;
  609. int r, i;
  610. mask = 0;
  611. for (i = 0; i < num_mgrs; ++i)
  612. mask |= dispc_mgr_get_vsync_irq(i);
  613. for (i = 0; i < num_mgrs; ++i)
  614. mask |= dispc_mgr_get_framedone_irq(i);
  615. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  616. WARN_ON(r);
  617. dss_data.irq_enabled = true;
  618. }
  619. static void dss_unregister_vsync_isr(void)
  620. {
  621. const int num_mgrs = dss_feat_get_num_mgrs();
  622. u32 mask;
  623. int r, i;
  624. mask = 0;
  625. for (i = 0; i < num_mgrs; ++i)
  626. mask |= dispc_mgr_get_vsync_irq(i);
  627. for (i = 0; i < num_mgrs; ++i)
  628. mask |= dispc_mgr_get_framedone_irq(i);
  629. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  630. WARN_ON(r);
  631. dss_data.irq_enabled = false;
  632. }
  633. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  634. {
  635. struct omap_overlay *ovl;
  636. struct mgr_priv_data *mp;
  637. struct ovl_priv_data *op;
  638. mp = get_mgr_priv(mgr);
  639. mp->shadow_info_dirty = false;
  640. list_for_each_entry(ovl, &mgr->overlays, list) {
  641. op = get_ovl_priv(ovl);
  642. op->shadow_info_dirty = false;
  643. op->shadow_extra_info_dirty = false;
  644. }
  645. }
  646. static void dss_apply_irq_handler(void *data, u32 mask)
  647. {
  648. const int num_mgrs = dss_feat_get_num_mgrs();
  649. int i;
  650. bool extra_updating;
  651. spin_lock(&data_lock);
  652. /* clear busy, updating flags, shadow_dirty flags */
  653. for (i = 0; i < num_mgrs; i++) {
  654. struct omap_overlay_manager *mgr;
  655. struct mgr_priv_data *mp;
  656. bool was_updating;
  657. mgr = omap_dss_get_overlay_manager(i);
  658. mp = get_mgr_priv(mgr);
  659. if (!mp->enabled)
  660. continue;
  661. was_updating = mp->updating;
  662. mp->updating = dispc_mgr_is_enabled(i);
  663. if (!mgr_manual_update(mgr)) {
  664. bool was_busy = mp->busy;
  665. mp->busy = dispc_mgr_go_busy(i);
  666. if (was_busy && !mp->busy)
  667. mgr_clear_shadow_dirty(mgr);
  668. } else {
  669. if (was_updating && !mp->updating)
  670. mgr_clear_shadow_dirty(mgr);
  671. }
  672. }
  673. dss_write_regs();
  674. dss_set_go_bits();
  675. extra_updating = extra_info_update_ongoing();
  676. if (!extra_updating)
  677. complete_all(&extra_updated_completion);
  678. if (!need_isr())
  679. dss_unregister_vsync_isr();
  680. spin_unlock(&data_lock);
  681. }
  682. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  683. {
  684. struct ovl_priv_data *op;
  685. op = get_ovl_priv(ovl);
  686. if (!op->user_info_dirty)
  687. return;
  688. op->user_info_dirty = false;
  689. op->info_dirty = true;
  690. op->info = op->user_info;
  691. }
  692. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  693. {
  694. struct mgr_priv_data *mp;
  695. mp = get_mgr_priv(mgr);
  696. if (!mp->user_info_dirty)
  697. return;
  698. mp->user_info_dirty = false;
  699. mp->info_dirty = true;
  700. mp->info = mp->user_info;
  701. }
  702. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  703. {
  704. unsigned long flags;
  705. struct omap_overlay *ovl;
  706. int r;
  707. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  708. spin_lock_irqsave(&data_lock, flags);
  709. r = dss_check_settings_apply(mgr, mgr->device);
  710. if (r) {
  711. spin_unlock_irqrestore(&data_lock, flags);
  712. DSSERR("failed to apply settings: illegal configuration.\n");
  713. return r;
  714. }
  715. /* Configure overlays */
  716. list_for_each_entry(ovl, &mgr->overlays, list)
  717. omap_dss_mgr_apply_ovl(ovl);
  718. /* Configure manager */
  719. omap_dss_mgr_apply_mgr(mgr);
  720. dss_write_regs();
  721. dss_set_go_bits();
  722. spin_unlock_irqrestore(&data_lock, flags);
  723. return 0;
  724. }
  725. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  726. {
  727. struct ovl_priv_data *op;
  728. op = get_ovl_priv(ovl);
  729. if (op->enabled == enable)
  730. return;
  731. op->enabled = enable;
  732. op->extra_info_dirty = true;
  733. }
  734. static void dss_ovl_setup_fifo(struct omap_overlay *ovl)
  735. {
  736. struct ovl_priv_data *op = get_ovl_priv(ovl);
  737. struct omap_dss_device *dssdev;
  738. u32 size, burst_size;
  739. u32 fifo_low, fifo_high;
  740. if (!op->enabled && !op->enabling)
  741. return;
  742. dssdev = ovl->manager->device;
  743. size = dispc_ovl_get_fifo_size(ovl->id);
  744. burst_size = dispc_ovl_get_burst_size(ovl->id);
  745. switch (dssdev->type) {
  746. case OMAP_DISPLAY_TYPE_DPI:
  747. case OMAP_DISPLAY_TYPE_DBI:
  748. case OMAP_DISPLAY_TYPE_SDI:
  749. case OMAP_DISPLAY_TYPE_VENC:
  750. case OMAP_DISPLAY_TYPE_HDMI:
  751. default_get_overlay_fifo_thresholds(ovl->id, size,
  752. burst_size, &fifo_low, &fifo_high);
  753. break;
  754. #ifdef CONFIG_OMAP2_DSS_DSI
  755. case OMAP_DISPLAY_TYPE_DSI:
  756. dsi_get_overlay_fifo_thresholds(ovl->id, size,
  757. burst_size, &fifo_low, &fifo_high);
  758. break;
  759. #endif
  760. default:
  761. BUG();
  762. }
  763. op->fifo_low = fifo_low;
  764. op->fifo_high = fifo_high;
  765. op->extra_info_dirty = true;
  766. }
  767. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr)
  768. {
  769. struct omap_overlay *ovl;
  770. struct mgr_priv_data *mp;
  771. mp = get_mgr_priv(mgr);
  772. if (!mp->enabled)
  773. return;
  774. list_for_each_entry(ovl, &mgr->overlays, list)
  775. dss_ovl_setup_fifo(ovl);
  776. }
  777. static void dss_setup_fifos(void)
  778. {
  779. const int num_mgrs = omap_dss_get_num_overlay_managers();
  780. struct omap_overlay_manager *mgr;
  781. int i;
  782. for (i = 0; i < num_mgrs; ++i) {
  783. mgr = omap_dss_get_overlay_manager(i);
  784. dss_mgr_setup_fifos(mgr);
  785. }
  786. }
  787. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  788. {
  789. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  790. unsigned long flags;
  791. int r;
  792. mutex_lock(&apply_lock);
  793. if (mp->enabled)
  794. goto out;
  795. spin_lock_irqsave(&data_lock, flags);
  796. mp->enabled = true;
  797. r = dss_check_settings(mgr, mgr->device);
  798. if (r) {
  799. DSSERR("failed to enable manager %d: check_settings failed\n",
  800. mgr->id);
  801. goto err;
  802. }
  803. dss_setup_fifos();
  804. dss_write_regs();
  805. dss_set_go_bits();
  806. if (!mgr_manual_update(mgr))
  807. mp->updating = true;
  808. spin_unlock_irqrestore(&data_lock, flags);
  809. if (!mgr_manual_update(mgr))
  810. dispc_mgr_enable(mgr->id, true);
  811. out:
  812. mutex_unlock(&apply_lock);
  813. return 0;
  814. err:
  815. mp->enabled = false;
  816. spin_unlock_irqrestore(&data_lock, flags);
  817. mutex_unlock(&apply_lock);
  818. return r;
  819. }
  820. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  821. {
  822. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  823. unsigned long flags;
  824. mutex_lock(&apply_lock);
  825. if (!mp->enabled)
  826. goto out;
  827. if (!mgr_manual_update(mgr))
  828. dispc_mgr_enable(mgr->id, false);
  829. spin_lock_irqsave(&data_lock, flags);
  830. mp->updating = false;
  831. mp->enabled = false;
  832. spin_unlock_irqrestore(&data_lock, flags);
  833. out:
  834. mutex_unlock(&apply_lock);
  835. }
  836. static int dss_mgr_simple_check(struct omap_overlay_manager *mgr,
  837. const struct omap_overlay_manager_info *info)
  838. {
  839. if (dss_has_feature(FEAT_ALPHA_FIXED_ZORDER)) {
  840. /*
  841. * OMAP3 supports only graphics source transparency color key
  842. * and alpha blending simultaneously. See TRM 15.4.2.4.2.2
  843. * Alpha Mode.
  844. */
  845. if (info->partial_alpha_enabled && info->trans_enabled
  846. && info->trans_key_type != OMAP_DSS_COLOR_KEY_GFX_DST) {
  847. DSSERR("check_manager: illegal transparency key\n");
  848. return -EINVAL;
  849. }
  850. }
  851. return 0;
  852. }
  853. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  854. struct omap_overlay_manager_info *info)
  855. {
  856. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  857. unsigned long flags;
  858. int r;
  859. r = dss_mgr_simple_check(mgr, info);
  860. if (r)
  861. return r;
  862. spin_lock_irqsave(&data_lock, flags);
  863. mp->user_info = *info;
  864. mp->user_info_dirty = true;
  865. spin_unlock_irqrestore(&data_lock, flags);
  866. return 0;
  867. }
  868. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  869. struct omap_overlay_manager_info *info)
  870. {
  871. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  872. unsigned long flags;
  873. spin_lock_irqsave(&data_lock, flags);
  874. *info = mp->user_info;
  875. spin_unlock_irqrestore(&data_lock, flags);
  876. }
  877. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  878. struct omap_dss_device *dssdev)
  879. {
  880. int r;
  881. mutex_lock(&apply_lock);
  882. if (dssdev->manager) {
  883. DSSERR("display '%s' already has a manager '%s'\n",
  884. dssdev->name, dssdev->manager->name);
  885. r = -EINVAL;
  886. goto err;
  887. }
  888. if ((mgr->supported_displays & dssdev->type) == 0) {
  889. DSSERR("display '%s' does not support manager '%s'\n",
  890. dssdev->name, mgr->name);
  891. r = -EINVAL;
  892. goto err;
  893. }
  894. dssdev->manager = mgr;
  895. mgr->device = dssdev;
  896. mutex_unlock(&apply_lock);
  897. return 0;
  898. err:
  899. mutex_unlock(&apply_lock);
  900. return r;
  901. }
  902. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  903. {
  904. int r;
  905. mutex_lock(&apply_lock);
  906. if (!mgr->device) {
  907. DSSERR("failed to unset display, display not set.\n");
  908. r = -EINVAL;
  909. goto err;
  910. }
  911. /*
  912. * Don't allow currently enabled displays to have the overlay manager
  913. * pulled out from underneath them
  914. */
  915. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  916. r = -EINVAL;
  917. goto err;
  918. }
  919. mgr->device->manager = NULL;
  920. mgr->device = NULL;
  921. mutex_unlock(&apply_lock);
  922. return 0;
  923. err:
  924. mutex_unlock(&apply_lock);
  925. return r;
  926. }
  927. static int dss_ovl_simple_check(struct omap_overlay *ovl,
  928. const struct omap_overlay_info *info)
  929. {
  930. if (info->paddr == 0) {
  931. DSSERR("check_overlay: paddr cannot be 0\n");
  932. return -EINVAL;
  933. }
  934. if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) {
  935. if (info->out_width != 0 && info->width != info->out_width) {
  936. DSSERR("check_overlay: overlay %d doesn't support "
  937. "scaling\n", ovl->id);
  938. return -EINVAL;
  939. }
  940. if (info->out_height != 0 && info->height != info->out_height) {
  941. DSSERR("check_overlay: overlay %d doesn't support "
  942. "scaling\n", ovl->id);
  943. return -EINVAL;
  944. }
  945. }
  946. if ((ovl->supported_modes & info->color_mode) == 0) {
  947. DSSERR("check_overlay: overlay %d doesn't support mode %d\n",
  948. ovl->id, info->color_mode);
  949. return -EINVAL;
  950. }
  951. if (info->zorder >= omap_dss_get_num_overlays()) {
  952. DSSERR("check_overlay: zorder %d too high\n", info->zorder);
  953. return -EINVAL;
  954. }
  955. return 0;
  956. }
  957. int dss_ovl_set_info(struct omap_overlay *ovl,
  958. struct omap_overlay_info *info)
  959. {
  960. struct ovl_priv_data *op = get_ovl_priv(ovl);
  961. unsigned long flags;
  962. int r;
  963. r = dss_ovl_simple_check(ovl, info);
  964. if (r)
  965. return r;
  966. spin_lock_irqsave(&data_lock, flags);
  967. op->user_info = *info;
  968. op->user_info_dirty = true;
  969. spin_unlock_irqrestore(&data_lock, flags);
  970. return 0;
  971. }
  972. void dss_ovl_get_info(struct omap_overlay *ovl,
  973. struct omap_overlay_info *info)
  974. {
  975. struct ovl_priv_data *op = get_ovl_priv(ovl);
  976. unsigned long flags;
  977. spin_lock_irqsave(&data_lock, flags);
  978. *info = op->user_info;
  979. spin_unlock_irqrestore(&data_lock, flags);
  980. }
  981. int dss_ovl_set_manager(struct omap_overlay *ovl,
  982. struct omap_overlay_manager *mgr)
  983. {
  984. struct ovl_priv_data *op = get_ovl_priv(ovl);
  985. unsigned long flags;
  986. int r;
  987. if (!mgr)
  988. return -EINVAL;
  989. mutex_lock(&apply_lock);
  990. if (ovl->manager) {
  991. DSSERR("overlay '%s' already has a manager '%s'\n",
  992. ovl->name, ovl->manager->name);
  993. r = -EINVAL;
  994. goto err;
  995. }
  996. spin_lock_irqsave(&data_lock, flags);
  997. if (op->enabled) {
  998. spin_unlock_irqrestore(&data_lock, flags);
  999. DSSERR("overlay has to be disabled to change the manager\n");
  1000. r = -EINVAL;
  1001. goto err;
  1002. }
  1003. op->channel = mgr->id;
  1004. op->extra_info_dirty = true;
  1005. ovl->manager = mgr;
  1006. list_add_tail(&ovl->list, &mgr->overlays);
  1007. spin_unlock_irqrestore(&data_lock, flags);
  1008. /* XXX: When there is an overlay on a DSI manual update display, and
  1009. * the overlay is first disabled, then moved to tv, and enabled, we
  1010. * seem to get SYNC_LOST_DIGIT error.
  1011. *
  1012. * Waiting doesn't seem to help, but updating the manual update display
  1013. * after disabling the overlay seems to fix this. This hints that the
  1014. * overlay is perhaps somehow tied to the LCD output until the output
  1015. * is updated.
  1016. *
  1017. * Userspace workaround for this is to update the LCD after disabling
  1018. * the overlay, but before moving the overlay to TV.
  1019. */
  1020. mutex_unlock(&apply_lock);
  1021. return 0;
  1022. err:
  1023. mutex_unlock(&apply_lock);
  1024. return r;
  1025. }
  1026. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  1027. {
  1028. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1029. unsigned long flags;
  1030. int r;
  1031. mutex_lock(&apply_lock);
  1032. if (!ovl->manager) {
  1033. DSSERR("failed to detach overlay: manager not set\n");
  1034. r = -EINVAL;
  1035. goto err;
  1036. }
  1037. spin_lock_irqsave(&data_lock, flags);
  1038. if (op->enabled) {
  1039. spin_unlock_irqrestore(&data_lock, flags);
  1040. DSSERR("overlay has to be disabled to unset the manager\n");
  1041. r = -EINVAL;
  1042. goto err;
  1043. }
  1044. op->channel = -1;
  1045. ovl->manager = NULL;
  1046. list_del(&ovl->list);
  1047. spin_unlock_irqrestore(&data_lock, flags);
  1048. mutex_unlock(&apply_lock);
  1049. return 0;
  1050. err:
  1051. mutex_unlock(&apply_lock);
  1052. return r;
  1053. }
  1054. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1055. {
  1056. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1057. unsigned long flags;
  1058. bool e;
  1059. spin_lock_irqsave(&data_lock, flags);
  1060. e = op->enabled;
  1061. spin_unlock_irqrestore(&data_lock, flags);
  1062. return e;
  1063. }
  1064. int dss_ovl_enable(struct omap_overlay *ovl)
  1065. {
  1066. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1067. unsigned long flags;
  1068. int r;
  1069. mutex_lock(&apply_lock);
  1070. if (op->enabled) {
  1071. r = 0;
  1072. goto err1;
  1073. }
  1074. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1075. r = -EINVAL;
  1076. goto err1;
  1077. }
  1078. spin_lock_irqsave(&data_lock, flags);
  1079. op->enabling = true;
  1080. r = dss_check_settings(ovl->manager, ovl->manager->device);
  1081. if (r) {
  1082. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1083. ovl->id);
  1084. goto err2;
  1085. }
  1086. dss_setup_fifos();
  1087. op->enabling = false;
  1088. dss_apply_ovl_enable(ovl, true);
  1089. dss_write_regs();
  1090. dss_set_go_bits();
  1091. spin_unlock_irqrestore(&data_lock, flags);
  1092. mutex_unlock(&apply_lock);
  1093. return 0;
  1094. err2:
  1095. op->enabling = false;
  1096. spin_unlock_irqrestore(&data_lock, flags);
  1097. err1:
  1098. mutex_unlock(&apply_lock);
  1099. return r;
  1100. }
  1101. int dss_ovl_disable(struct omap_overlay *ovl)
  1102. {
  1103. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1104. unsigned long flags;
  1105. int r;
  1106. mutex_lock(&apply_lock);
  1107. if (!op->enabled) {
  1108. r = 0;
  1109. goto err;
  1110. }
  1111. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1112. r = -EINVAL;
  1113. goto err;
  1114. }
  1115. spin_lock_irqsave(&data_lock, flags);
  1116. dss_apply_ovl_enable(ovl, false);
  1117. dss_write_regs();
  1118. dss_set_go_bits();
  1119. spin_unlock_irqrestore(&data_lock, flags);
  1120. mutex_unlock(&apply_lock);
  1121. return 0;
  1122. err:
  1123. mutex_unlock(&apply_lock);
  1124. return r;
  1125. }