ezkit.c 30 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/i2c.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <linux/leds.h>
  20. #include <linux/input.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. #ifdef CONFIG_BFIN527_EZKIT_V2
  32. const char bfin_board_name[] = "ADI BF527-EZKIT V2";
  33. #else
  34. const char bfin_board_name[] = "ADI BF527-EZKIT";
  35. #endif
  36. /*
  37. * Driver needs to know address, irq and flag pin.
  38. */
  39. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  40. #include <linux/usb/isp1760.h>
  41. static struct resource bfin_isp1760_resources[] = {
  42. [0] = {
  43. .start = 0x203C0000,
  44. .end = 0x203C0000 + 0x000fffff,
  45. .flags = IORESOURCE_MEM,
  46. },
  47. [1] = {
  48. .start = IRQ_PF7,
  49. .end = IRQ_PF7,
  50. .flags = IORESOURCE_IRQ,
  51. },
  52. };
  53. static struct isp1760_platform_data isp1760_priv = {
  54. .is_isp1761 = 0,
  55. .bus_width_16 = 1,
  56. .port1_otg = 0,
  57. .analog_oc = 0,
  58. .dack_polarity_high = 0,
  59. .dreq_polarity_high = 0,
  60. };
  61. static struct platform_device bfin_isp1760_device = {
  62. .name = "isp1760",
  63. .id = 0,
  64. .dev = {
  65. .platform_data = &isp1760_priv,
  66. },
  67. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  68. .resource = bfin_isp1760_resources,
  69. };
  70. #endif
  71. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  72. static struct resource musb_resources[] = {
  73. [0] = {
  74. .start = 0xffc03800,
  75. .end = 0xffc03cff,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. [1] = { /* general IRQ */
  79. .start = IRQ_USB_INT0,
  80. .end = IRQ_USB_INT0,
  81. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  82. .name = "mc"
  83. },
  84. [2] = { /* DMA IRQ */
  85. .start = IRQ_USB_DMA,
  86. .end = IRQ_USB_DMA,
  87. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  88. .name = "dma"
  89. },
  90. };
  91. static struct musb_hdrc_config musb_config = {
  92. .multipoint = 0,
  93. .dyn_fifo = 0,
  94. .soft_con = 1,
  95. .dma = 1,
  96. .num_eps = 8,
  97. .dma_channels = 8,
  98. .gpio_vrsel = GPIO_PG13,
  99. /* Some custom boards need to be active low, just set it to "0"
  100. * if it is the case.
  101. */
  102. .gpio_vrsel_active = 1,
  103. .clkin = 24, /* musb CLKIN in MHZ */
  104. };
  105. static struct musb_hdrc_platform_data musb_plat = {
  106. #if defined(CONFIG_USB_MUSB_OTG)
  107. .mode = MUSB_OTG,
  108. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  109. .mode = MUSB_HOST,
  110. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  111. .mode = MUSB_PERIPHERAL,
  112. #endif
  113. .config = &musb_config,
  114. };
  115. static u64 musb_dmamask = ~(u32)0;
  116. static struct platform_device musb_device = {
  117. .name = "musb-blackfin",
  118. .id = 0,
  119. .dev = {
  120. .dma_mask = &musb_dmamask,
  121. .coherent_dma_mask = 0xffffffff,
  122. .platform_data = &musb_plat,
  123. },
  124. .num_resources = ARRAY_SIZE(musb_resources),
  125. .resource = musb_resources,
  126. };
  127. #endif
  128. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  129. static struct resource bf52x_t350mcqb_resources[] = {
  130. {
  131. .start = IRQ_PPI_ERROR,
  132. .end = IRQ_PPI_ERROR,
  133. .flags = IORESOURCE_IRQ,
  134. },
  135. };
  136. static struct platform_device bf52x_t350mcqb_device = {
  137. .name = "bfin-t350mcqb",
  138. .id = -1,
  139. .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
  140. .resource = bf52x_t350mcqb_resources,
  141. };
  142. #endif
  143. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  144. #include <asm/bfin-lq035q1.h>
  145. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  146. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  147. .ppi_mode = USE_RGB565_8_BIT_PPI,
  148. };
  149. static struct resource bfin_lq035q1_resources[] = {
  150. {
  151. .start = IRQ_PPI_ERROR,
  152. .end = IRQ_PPI_ERROR,
  153. .flags = IORESOURCE_IRQ,
  154. },
  155. };
  156. static struct platform_device bfin_lq035q1_device = {
  157. .name = "bfin-lq035q1",
  158. .id = -1,
  159. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  160. .resource = bfin_lq035q1_resources,
  161. .dev = {
  162. .platform_data = &bfin_lq035q1_data,
  163. },
  164. };
  165. #endif
  166. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  167. static struct mtd_partition ezkit_partitions[] = {
  168. {
  169. .name = "bootloader(nor)",
  170. .size = 0x40000,
  171. .offset = 0,
  172. }, {
  173. .name = "linux kernel(nor)",
  174. .size = 0x1C0000,
  175. .offset = MTDPART_OFS_APPEND,
  176. }, {
  177. .name = "file system(nor)",
  178. .size = MTDPART_SIZ_FULL,
  179. .offset = MTDPART_OFS_APPEND,
  180. }
  181. };
  182. static struct physmap_flash_data ezkit_flash_data = {
  183. .width = 2,
  184. .parts = ezkit_partitions,
  185. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  186. };
  187. static struct resource ezkit_flash_resource = {
  188. .start = 0x20000000,
  189. .end = 0x203fffff,
  190. .flags = IORESOURCE_MEM,
  191. };
  192. static struct platform_device ezkit_flash_device = {
  193. .name = "physmap-flash",
  194. .id = 0,
  195. .dev = {
  196. .platform_data = &ezkit_flash_data,
  197. },
  198. .num_resources = 1,
  199. .resource = &ezkit_flash_resource,
  200. };
  201. #endif
  202. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  203. static struct mtd_partition partition_info[] = {
  204. {
  205. .name = "bootloader(nand)",
  206. .offset = 0,
  207. .size = 0x40000,
  208. }, {
  209. .name = "linux kernel(nand)",
  210. .offset = MTDPART_OFS_APPEND,
  211. .size = 4 * 1024 * 1024,
  212. },
  213. {
  214. .name = "file system(nand)",
  215. .offset = MTDPART_OFS_APPEND,
  216. .size = MTDPART_SIZ_FULL,
  217. },
  218. };
  219. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  220. .data_width = NFC_NWIDTH_8,
  221. .partitions = partition_info,
  222. .nr_partitions = ARRAY_SIZE(partition_info),
  223. .rd_dly = 3,
  224. .wr_dly = 3,
  225. };
  226. static struct resource bf5xx_nand_resources[] = {
  227. {
  228. .start = NFC_CTL,
  229. .end = NFC_DATA_RD + 2,
  230. .flags = IORESOURCE_MEM,
  231. },
  232. {
  233. .start = CH_NFC,
  234. .end = CH_NFC,
  235. .flags = IORESOURCE_IRQ,
  236. },
  237. };
  238. static struct platform_device bf5xx_nand_device = {
  239. .name = "bf5xx-nand",
  240. .id = 0,
  241. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  242. .resource = bf5xx_nand_resources,
  243. .dev = {
  244. .platform_data = &bf5xx_nand_platform,
  245. },
  246. };
  247. #endif
  248. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  249. static struct resource bfin_pcmcia_cf_resources[] = {
  250. {
  251. .start = 0x20310000, /* IO PORT */
  252. .end = 0x20312000,
  253. .flags = IORESOURCE_MEM,
  254. }, {
  255. .start = 0x20311000, /* Attribute Memory */
  256. .end = 0x20311FFF,
  257. .flags = IORESOURCE_MEM,
  258. }, {
  259. .start = IRQ_PF4,
  260. .end = IRQ_PF4,
  261. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  262. }, {
  263. .start = 6, /* Card Detect PF6 */
  264. .end = 6,
  265. .flags = IORESOURCE_IRQ,
  266. },
  267. };
  268. static struct platform_device bfin_pcmcia_cf_device = {
  269. .name = "bfin_cf_pcmcia",
  270. .id = -1,
  271. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  272. .resource = bfin_pcmcia_cf_resources,
  273. };
  274. #endif
  275. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  276. static struct platform_device rtc_device = {
  277. .name = "rtc-bfin",
  278. .id = -1,
  279. };
  280. #endif
  281. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  282. #include <linux/smc91x.h>
  283. static struct smc91x_platdata smc91x_info = {
  284. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  285. .leda = RPC_LED_100_10,
  286. .ledb = RPC_LED_TX_RX,
  287. };
  288. static struct resource smc91x_resources[] = {
  289. {
  290. .name = "smc91x-regs",
  291. .start = 0x20300300,
  292. .end = 0x20300300 + 16,
  293. .flags = IORESOURCE_MEM,
  294. }, {
  295. .start = IRQ_PF7,
  296. .end = IRQ_PF7,
  297. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  298. },
  299. };
  300. static struct platform_device smc91x_device = {
  301. .name = "smc91x",
  302. .id = 0,
  303. .num_resources = ARRAY_SIZE(smc91x_resources),
  304. .resource = smc91x_resources,
  305. .dev = {
  306. .platform_data = &smc91x_info,
  307. },
  308. };
  309. #endif
  310. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  311. static struct resource dm9000_resources[] = {
  312. [0] = {
  313. .start = 0x203FB800,
  314. .end = 0x203FB800 + 1,
  315. .flags = IORESOURCE_MEM,
  316. },
  317. [1] = {
  318. .start = 0x203FB800 + 4,
  319. .end = 0x203FB800 + 5,
  320. .flags = IORESOURCE_MEM,
  321. },
  322. [2] = {
  323. .start = IRQ_PF9,
  324. .end = IRQ_PF9,
  325. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  326. },
  327. };
  328. static struct platform_device dm9000_device = {
  329. .name = "dm9000",
  330. .id = -1,
  331. .num_resources = ARRAY_SIZE(dm9000_resources),
  332. .resource = dm9000_resources,
  333. };
  334. #endif
  335. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  336. #include <linux/bfin_mac.h>
  337. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  338. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  339. {
  340. .addr = 1,
  341. .irq = IRQ_MAC_PHYINT,
  342. },
  343. };
  344. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  345. .phydev_number = 1,
  346. .phydev_data = bfin_phydev_data,
  347. .phy_mode = PHY_INTERFACE_MODE_RMII,
  348. .mac_peripherals = bfin_mac_peripherals,
  349. };
  350. static struct platform_device bfin_mii_bus = {
  351. .name = "bfin_mii_bus",
  352. .dev = {
  353. .platform_data = &bfin_mii_bus_data,
  354. }
  355. };
  356. static struct platform_device bfin_mac_device = {
  357. .name = "bfin_mac",
  358. .dev = {
  359. .platform_data = &bfin_mii_bus,
  360. }
  361. };
  362. #endif
  363. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  364. static struct resource net2272_bfin_resources[] = {
  365. {
  366. .start = 0x20300000,
  367. .end = 0x20300000 + 0x100,
  368. .flags = IORESOURCE_MEM,
  369. }, {
  370. .start = IRQ_PF7,
  371. .end = IRQ_PF7,
  372. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  373. },
  374. };
  375. static struct platform_device net2272_bfin_device = {
  376. .name = "net2272",
  377. .id = -1,
  378. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  379. .resource = net2272_bfin_resources,
  380. };
  381. #endif
  382. #if defined(CONFIG_MTD_M25P80) \
  383. || defined(CONFIG_MTD_M25P80_MODULE)
  384. static struct mtd_partition bfin_spi_flash_partitions[] = {
  385. {
  386. .name = "bootloader(spi)",
  387. .size = 0x00040000,
  388. .offset = 0,
  389. .mask_flags = MTD_CAP_ROM
  390. }, {
  391. .name = "linux kernel(spi)",
  392. .size = MTDPART_SIZ_FULL,
  393. .offset = MTDPART_OFS_APPEND,
  394. }
  395. };
  396. static struct flash_platform_data bfin_spi_flash_data = {
  397. .name = "m25p80",
  398. .parts = bfin_spi_flash_partitions,
  399. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  400. .type = "m25p16",
  401. };
  402. /* SPI flash chip (m25p64) */
  403. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  404. .enable_dma = 0, /* use dma transfer with this chip*/
  405. .bits_per_word = 8,
  406. };
  407. #endif
  408. #if defined(CONFIG_BFIN_SPI_ADC) \
  409. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  410. /* SPI ADC chip */
  411. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  412. .enable_dma = 1, /* use dma transfer with this chip*/
  413. .bits_per_word = 16,
  414. };
  415. #endif
  416. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  417. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  418. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  419. .enable_dma = 0,
  420. .bits_per_word = 16,
  421. };
  422. #endif
  423. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  424. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  425. .enable_dma = 0,
  426. .bits_per_word = 8,
  427. };
  428. #endif
  429. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  430. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  431. .enable_dma = 0,
  432. .bits_per_word = 16,
  433. };
  434. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  435. .model = 7877,
  436. .vref_delay_usecs = 50, /* internal, no capacitor */
  437. .x_plate_ohms = 419,
  438. .y_plate_ohms = 486,
  439. .pressure_max = 1000,
  440. .pressure_min = 0,
  441. .stopacq_polarity = 1,
  442. .first_conversion_delay = 3,
  443. .acquisition_time = 1,
  444. .averaging = 1,
  445. .pen_down_acc_interval = 1,
  446. };
  447. #endif
  448. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  449. #include <linux/spi/ad7879.h>
  450. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  451. .model = 7879, /* Model = AD7879 */
  452. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  453. .pressure_max = 10000,
  454. .pressure_min = 0,
  455. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  456. .acquisition_time = 1, /* 4us acquisition time per sample */
  457. .median = 2, /* do 8 measurements */
  458. .averaging = 1, /* take the average of 4 middle samples */
  459. .pen_down_acc_interval = 255, /* 9.4 ms */
  460. .gpio_export = 0, /* Export GPIO to gpiolib */
  461. };
  462. #endif
  463. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  464. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  465. .enable_dma = 0,
  466. .bits_per_word = 16,
  467. };
  468. #endif
  469. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  470. static struct bfin5xx_spi_chip spidev_chip_info = {
  471. .enable_dma = 0,
  472. .bits_per_word = 8,
  473. };
  474. #endif
  475. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  476. static struct platform_device bfin_i2s = {
  477. .name = "bfin-i2s",
  478. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  479. /* TODO: add platform data here */
  480. };
  481. #endif
  482. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  483. static struct platform_device bfin_tdm = {
  484. .name = "bfin-tdm",
  485. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  486. /* TODO: add platform data here */
  487. };
  488. #endif
  489. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  490. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  491. .enable_dma = 0,
  492. .bits_per_word = 8,
  493. };
  494. #endif
  495. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  496. #if defined(CONFIG_MTD_M25P80) \
  497. || defined(CONFIG_MTD_M25P80_MODULE)
  498. {
  499. /* the modalias must be the same as spi device driver name */
  500. .modalias = "m25p80", /* Name of spi_driver for this device */
  501. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  502. .bus_num = 0, /* Framework bus number */
  503. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  504. .platform_data = &bfin_spi_flash_data,
  505. .controller_data = &spi_flash_chip_info,
  506. .mode = SPI_MODE_3,
  507. },
  508. #endif
  509. #if defined(CONFIG_BFIN_SPI_ADC) \
  510. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  511. {
  512. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  513. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  514. .bus_num = 0, /* Framework bus number */
  515. .chip_select = 1, /* Framework chip select. */
  516. .platform_data = NULL, /* No spi_driver specific config */
  517. .controller_data = &spi_adc_chip_info,
  518. },
  519. #endif
  520. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  521. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  522. {
  523. .modalias = "ad183x",
  524. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  525. .bus_num = 0,
  526. .chip_select = 4,
  527. .controller_data = &ad1836_spi_chip_info,
  528. },
  529. #endif
  530. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  531. {
  532. .modalias = "mmc_spi",
  533. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  534. .bus_num = 0,
  535. .chip_select = 3,
  536. .controller_data = &mmc_spi_chip_info,
  537. .mode = SPI_MODE_0,
  538. },
  539. #endif
  540. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  541. {
  542. .modalias = "ad7877",
  543. .platform_data = &bfin_ad7877_ts_info,
  544. .irq = IRQ_PF8,
  545. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  546. .bus_num = 0,
  547. .chip_select = 2,
  548. .controller_data = &spi_ad7877_chip_info,
  549. },
  550. #endif
  551. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  552. {
  553. .modalias = "ad7879",
  554. .platform_data = &bfin_ad7879_ts_info,
  555. .irq = IRQ_PF8,
  556. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  557. .bus_num = 0,
  558. .chip_select = 3,
  559. .controller_data = &spi_ad7879_chip_info,
  560. .mode = SPI_CPHA | SPI_CPOL,
  561. },
  562. #endif
  563. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  564. {
  565. .modalias = "spidev",
  566. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  567. .bus_num = 0,
  568. .chip_select = 1,
  569. .controller_data = &spidev_chip_info,
  570. },
  571. #endif
  572. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  573. {
  574. .modalias = "bfin-lq035q1-spi",
  575. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  576. .bus_num = 0,
  577. .chip_select = 7,
  578. .controller_data = &lq035q1_spi_chip_info,
  579. .mode = SPI_CPHA | SPI_CPOL,
  580. },
  581. #endif
  582. };
  583. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  584. /* SPI controller data */
  585. static struct bfin5xx_spi_master bfin_spi0_info = {
  586. .num_chipselect = 8,
  587. .enable_dma = 1, /* master has the ability to do dma transfer */
  588. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  589. };
  590. /* SPI (0) */
  591. static struct resource bfin_spi0_resource[] = {
  592. [0] = {
  593. .start = SPI0_REGBASE,
  594. .end = SPI0_REGBASE + 0xFF,
  595. .flags = IORESOURCE_MEM,
  596. },
  597. [1] = {
  598. .start = CH_SPI,
  599. .end = CH_SPI,
  600. .flags = IORESOURCE_DMA,
  601. },
  602. [2] = {
  603. .start = IRQ_SPI,
  604. .end = IRQ_SPI,
  605. .flags = IORESOURCE_IRQ,
  606. },
  607. };
  608. static struct platform_device bfin_spi0_device = {
  609. .name = "bfin-spi",
  610. .id = 0, /* Bus number */
  611. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  612. .resource = bfin_spi0_resource,
  613. .dev = {
  614. .platform_data = &bfin_spi0_info, /* Passed to driver */
  615. },
  616. };
  617. #endif /* spi master and devices */
  618. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  619. #ifdef CONFIG_SERIAL_BFIN_UART0
  620. static struct resource bfin_uart0_resources[] = {
  621. {
  622. .start = UART0_THR,
  623. .end = UART0_GCTL+2,
  624. .flags = IORESOURCE_MEM,
  625. },
  626. {
  627. .start = IRQ_UART0_RX,
  628. .end = IRQ_UART0_RX+1,
  629. .flags = IORESOURCE_IRQ,
  630. },
  631. {
  632. .start = IRQ_UART0_ERROR,
  633. .end = IRQ_UART0_ERROR,
  634. .flags = IORESOURCE_IRQ,
  635. },
  636. {
  637. .start = CH_UART0_TX,
  638. .end = CH_UART0_TX,
  639. .flags = IORESOURCE_DMA,
  640. },
  641. {
  642. .start = CH_UART0_RX,
  643. .end = CH_UART0_RX,
  644. .flags = IORESOURCE_DMA,
  645. },
  646. };
  647. unsigned short bfin_uart0_peripherals[] = {
  648. P_UART0_TX, P_UART0_RX, 0
  649. };
  650. static struct platform_device bfin_uart0_device = {
  651. .name = "bfin-uart",
  652. .id = 0,
  653. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  654. .resource = bfin_uart0_resources,
  655. .dev = {
  656. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  657. },
  658. };
  659. #endif
  660. #ifdef CONFIG_SERIAL_BFIN_UART1
  661. static struct resource bfin_uart1_resources[] = {
  662. {
  663. .start = UART1_THR,
  664. .end = UART1_GCTL+2,
  665. .flags = IORESOURCE_MEM,
  666. },
  667. {
  668. .start = IRQ_UART1_RX,
  669. .end = IRQ_UART1_RX+1,
  670. .flags = IORESOURCE_IRQ,
  671. },
  672. {
  673. .start = IRQ_UART1_ERROR,
  674. .end = IRQ_UART1_ERROR,
  675. .flags = IORESOURCE_IRQ,
  676. },
  677. {
  678. .start = CH_UART1_TX,
  679. .end = CH_UART1_TX,
  680. .flags = IORESOURCE_DMA,
  681. },
  682. {
  683. .start = CH_UART1_RX,
  684. .end = CH_UART1_RX,
  685. .flags = IORESOURCE_DMA,
  686. },
  687. #ifdef CONFIG_BFIN_UART1_CTSRTS
  688. { /* CTS pin */
  689. .start = GPIO_PF9,
  690. .end = GPIO_PF9,
  691. .flags = IORESOURCE_IO,
  692. },
  693. { /* RTS pin */
  694. .start = GPIO_PF10,
  695. .end = GPIO_PF10,
  696. .flags = IORESOURCE_IO,
  697. },
  698. #endif
  699. };
  700. unsigned short bfin_uart1_peripherals[] = {
  701. P_UART1_TX, P_UART1_RX, 0
  702. };
  703. static struct platform_device bfin_uart1_device = {
  704. .name = "bfin-uart",
  705. .id = 1,
  706. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  707. .resource = bfin_uart1_resources,
  708. .dev = {
  709. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  710. },
  711. };
  712. #endif
  713. #endif
  714. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  715. #ifdef CONFIG_BFIN_SIR0
  716. static struct resource bfin_sir0_resources[] = {
  717. {
  718. .start = 0xFFC00400,
  719. .end = 0xFFC004FF,
  720. .flags = IORESOURCE_MEM,
  721. },
  722. {
  723. .start = IRQ_UART0_RX,
  724. .end = IRQ_UART0_RX+1,
  725. .flags = IORESOURCE_IRQ,
  726. },
  727. {
  728. .start = CH_UART0_RX,
  729. .end = CH_UART0_RX+1,
  730. .flags = IORESOURCE_DMA,
  731. },
  732. };
  733. static struct platform_device bfin_sir0_device = {
  734. .name = "bfin_sir",
  735. .id = 0,
  736. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  737. .resource = bfin_sir0_resources,
  738. };
  739. #endif
  740. #ifdef CONFIG_BFIN_SIR1
  741. static struct resource bfin_sir1_resources[] = {
  742. {
  743. .start = 0xFFC02000,
  744. .end = 0xFFC020FF,
  745. .flags = IORESOURCE_MEM,
  746. },
  747. {
  748. .start = IRQ_UART1_RX,
  749. .end = IRQ_UART1_RX+1,
  750. .flags = IORESOURCE_IRQ,
  751. },
  752. {
  753. .start = CH_UART1_RX,
  754. .end = CH_UART1_RX+1,
  755. .flags = IORESOURCE_DMA,
  756. },
  757. };
  758. static struct platform_device bfin_sir1_device = {
  759. .name = "bfin_sir",
  760. .id = 1,
  761. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  762. .resource = bfin_sir1_resources,
  763. };
  764. #endif
  765. #endif
  766. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  767. static struct resource bfin_twi0_resource[] = {
  768. [0] = {
  769. .start = TWI0_REGBASE,
  770. .end = TWI0_REGBASE,
  771. .flags = IORESOURCE_MEM,
  772. },
  773. [1] = {
  774. .start = IRQ_TWI,
  775. .end = IRQ_TWI,
  776. .flags = IORESOURCE_IRQ,
  777. },
  778. };
  779. static struct platform_device i2c_bfin_twi_device = {
  780. .name = "i2c-bfin-twi",
  781. .id = 0,
  782. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  783. .resource = bfin_twi0_resource,
  784. };
  785. #endif
  786. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  787. #include <linux/mfd/adp5520.h>
  788. /*
  789. * ADP5520/5501 LEDs Data
  790. */
  791. static struct led_info adp5520_leds[] = {
  792. {
  793. .name = "adp5520-led1",
  794. .default_trigger = "none",
  795. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  796. },
  797. };
  798. static struct adp5520_leds_platform_data adp5520_leds_data = {
  799. .num_leds = ARRAY_SIZE(adp5520_leds),
  800. .leds = adp5520_leds,
  801. .fade_in = ADP5520_FADE_T_600ms,
  802. .fade_out = ADP5520_FADE_T_600ms,
  803. .led_on_time = ADP5520_LED_ONT_600ms,
  804. };
  805. /*
  806. * ADP5520 Keypad Data
  807. */
  808. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  809. [ADP5520_KEY(3, 3)] = KEY_1,
  810. [ADP5520_KEY(2, 3)] = KEY_2,
  811. [ADP5520_KEY(1, 3)] = KEY_3,
  812. [ADP5520_KEY(0, 3)] = KEY_UP,
  813. [ADP5520_KEY(3, 2)] = KEY_4,
  814. [ADP5520_KEY(2, 2)] = KEY_5,
  815. [ADP5520_KEY(1, 2)] = KEY_6,
  816. [ADP5520_KEY(0, 2)] = KEY_DOWN,
  817. [ADP5520_KEY(3, 1)] = KEY_7,
  818. [ADP5520_KEY(2, 1)] = KEY_8,
  819. [ADP5520_KEY(1, 1)] = KEY_9,
  820. [ADP5520_KEY(0, 1)] = KEY_DOT,
  821. [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
  822. [ADP5520_KEY(2, 0)] = KEY_0,
  823. [ADP5520_KEY(1, 0)] = KEY_HELP,
  824. [ADP5520_KEY(0, 0)] = KEY_ENTER,
  825. };
  826. static struct adp5520_keys_platform_data adp5520_keys_data = {
  827. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  828. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  829. .keymap = adp5520_keymap,
  830. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  831. .repeat = 0,
  832. };
  833. /*
  834. * ADP5520/5501 Multifunction Device Init Data
  835. */
  836. static struct adp5520_platform_data adp5520_pdev_data = {
  837. .leds = &adp5520_leds_data,
  838. .keys = &adp5520_keys_data,
  839. };
  840. #endif
  841. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  842. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  843. {
  844. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  845. },
  846. #endif
  847. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  848. {
  849. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  850. .irq = IRQ_PF8,
  851. },
  852. #endif
  853. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  854. {
  855. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  856. },
  857. #endif
  858. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  859. {
  860. I2C_BOARD_INFO("ad7879", 0x2C),
  861. .irq = IRQ_PF8,
  862. .platform_data = (void *)&bfin_ad7879_ts_info,
  863. },
  864. #endif
  865. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  866. {
  867. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  868. .irq = IRQ_PF9,
  869. .platform_data = (void *)&adp5520_pdev_data,
  870. },
  871. #endif
  872. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  873. {
  874. I2C_BOARD_INFO("ssm2602", 0x1b),
  875. },
  876. #endif
  877. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  878. {
  879. I2C_BOARD_INFO("ad5252", 0x2f),
  880. },
  881. #endif
  882. };
  883. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  884. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  885. static struct resource bfin_sport0_uart_resources[] = {
  886. {
  887. .start = SPORT0_TCR1,
  888. .end = SPORT0_MRCS3+4,
  889. .flags = IORESOURCE_MEM,
  890. },
  891. {
  892. .start = IRQ_SPORT0_RX,
  893. .end = IRQ_SPORT0_RX+1,
  894. .flags = IORESOURCE_IRQ,
  895. },
  896. {
  897. .start = IRQ_SPORT0_ERROR,
  898. .end = IRQ_SPORT0_ERROR,
  899. .flags = IORESOURCE_IRQ,
  900. },
  901. };
  902. unsigned short bfin_sport0_peripherals[] = {
  903. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  904. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  905. };
  906. static struct platform_device bfin_sport0_uart_device = {
  907. .name = "bfin-sport-uart",
  908. .id = 0,
  909. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  910. .resource = bfin_sport0_uart_resources,
  911. .dev = {
  912. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  913. },
  914. };
  915. #endif
  916. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  917. static struct resource bfin_sport1_uart_resources[] = {
  918. {
  919. .start = SPORT1_TCR1,
  920. .end = SPORT1_MRCS3+4,
  921. .flags = IORESOURCE_MEM,
  922. },
  923. {
  924. .start = IRQ_SPORT1_RX,
  925. .end = IRQ_SPORT1_RX+1,
  926. .flags = IORESOURCE_IRQ,
  927. },
  928. {
  929. .start = IRQ_SPORT1_ERROR,
  930. .end = IRQ_SPORT1_ERROR,
  931. .flags = IORESOURCE_IRQ,
  932. },
  933. };
  934. unsigned short bfin_sport1_peripherals[] = {
  935. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  936. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  937. };
  938. static struct platform_device bfin_sport1_uart_device = {
  939. .name = "bfin-sport-uart",
  940. .id = 1,
  941. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  942. .resource = bfin_sport1_uart_resources,
  943. .dev = {
  944. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  945. },
  946. };
  947. #endif
  948. #endif
  949. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  950. #include <linux/gpio_keys.h>
  951. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  952. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  953. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  954. };
  955. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  956. .buttons = bfin_gpio_keys_table,
  957. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  958. };
  959. static struct platform_device bfin_device_gpiokeys = {
  960. .name = "gpio-keys",
  961. .dev = {
  962. .platform_data = &bfin_gpio_keys_data,
  963. },
  964. };
  965. #endif
  966. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  967. #include <asm/bfin_rotary.h>
  968. static struct bfin_rotary_platform_data bfin_rotary_data = {
  969. /*.rotary_up_key = KEY_UP,*/
  970. /*.rotary_down_key = KEY_DOWN,*/
  971. .rotary_rel_code = REL_WHEEL,
  972. .rotary_button_key = KEY_ENTER,
  973. .debounce = 10, /* 0..17 */
  974. .mode = ROT_QUAD_ENC | ROT_DEBE,
  975. };
  976. static struct resource bfin_rotary_resources[] = {
  977. {
  978. .start = IRQ_CNT,
  979. .end = IRQ_CNT,
  980. .flags = IORESOURCE_IRQ,
  981. },
  982. };
  983. static struct platform_device bfin_rotary_device = {
  984. .name = "bfin-rotary",
  985. .id = -1,
  986. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  987. .resource = bfin_rotary_resources,
  988. .dev = {
  989. .platform_data = &bfin_rotary_data,
  990. },
  991. };
  992. #endif
  993. static const unsigned int cclk_vlev_datasheet[] =
  994. {
  995. VRPAIR(VLEV_100, 400000000),
  996. VRPAIR(VLEV_105, 426000000),
  997. VRPAIR(VLEV_110, 500000000),
  998. VRPAIR(VLEV_115, 533000000),
  999. VRPAIR(VLEV_120, 600000000),
  1000. };
  1001. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1002. .tuple_tab = cclk_vlev_datasheet,
  1003. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1004. .vr_settling_time = 25 /* us */,
  1005. };
  1006. static struct platform_device bfin_dpmc = {
  1007. .name = "bfin dpmc",
  1008. .dev = {
  1009. .platform_data = &bfin_dmpc_vreg_data,
  1010. },
  1011. };
  1012. static struct platform_device *stamp_devices[] __initdata = {
  1013. &bfin_dpmc,
  1014. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  1015. &bf5xx_nand_device,
  1016. #endif
  1017. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  1018. &bfin_pcmcia_cf_device,
  1019. #endif
  1020. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  1021. &rtc_device,
  1022. #endif
  1023. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  1024. &bfin_isp1760_device,
  1025. #endif
  1026. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  1027. &musb_device,
  1028. #endif
  1029. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  1030. &smc91x_device,
  1031. #endif
  1032. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  1033. &dm9000_device,
  1034. #endif
  1035. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  1036. &bfin_mii_bus,
  1037. &bfin_mac_device,
  1038. #endif
  1039. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  1040. &net2272_bfin_device,
  1041. #endif
  1042. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1043. &bfin_spi0_device,
  1044. #endif
  1045. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  1046. &bf52x_t350mcqb_device,
  1047. #endif
  1048. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1049. &bfin_lq035q1_device,
  1050. #endif
  1051. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1052. #ifdef CONFIG_SERIAL_BFIN_UART0
  1053. &bfin_uart0_device,
  1054. #endif
  1055. #ifdef CONFIG_SERIAL_BFIN_UART1
  1056. &bfin_uart1_device,
  1057. #endif
  1058. #endif
  1059. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1060. #ifdef CONFIG_BFIN_SIR0
  1061. &bfin_sir0_device,
  1062. #endif
  1063. #ifdef CONFIG_BFIN_SIR1
  1064. &bfin_sir1_device,
  1065. #endif
  1066. #endif
  1067. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1068. &i2c_bfin_twi_device,
  1069. #endif
  1070. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1071. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1072. &bfin_sport0_uart_device,
  1073. #endif
  1074. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1075. &bfin_sport1_uart_device,
  1076. #endif
  1077. #endif
  1078. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1079. &bfin_device_gpiokeys,
  1080. #endif
  1081. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  1082. &bfin_rotary_device,
  1083. #endif
  1084. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1085. &ezkit_flash_device,
  1086. #endif
  1087. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1088. &bfin_i2s,
  1089. #endif
  1090. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1091. &bfin_tdm,
  1092. #endif
  1093. };
  1094. static int __init ezkit_init(void)
  1095. {
  1096. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1097. i2c_register_board_info(0, bfin_i2c_board_info,
  1098. ARRAY_SIZE(bfin_i2c_board_info));
  1099. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  1100. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1101. return 0;
  1102. }
  1103. arch_initcall(ezkit_init);
  1104. static struct platform_device *ezkit_early_devices[] __initdata = {
  1105. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1106. #ifdef CONFIG_SERIAL_BFIN_UART0
  1107. &bfin_uart0_device,
  1108. #endif
  1109. #ifdef CONFIG_SERIAL_BFIN_UART1
  1110. &bfin_uart1_device,
  1111. #endif
  1112. #endif
  1113. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1114. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1115. &bfin_sport0_uart_device,
  1116. #endif
  1117. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1118. &bfin_sport1_uart_device,
  1119. #endif
  1120. #endif
  1121. };
  1122. void __init native_machine_early_platform_add_devices(void)
  1123. {
  1124. printk(KERN_INFO "register early platform devices\n");
  1125. early_platform_add_devices(ezkit_early_devices,
  1126. ARRAY_SIZE(ezkit_early_devices));
  1127. }
  1128. void native_machine_restart(char *cmd)
  1129. {
  1130. /* workaround reboot hang when booting from SPI */
  1131. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  1132. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  1133. }
  1134. void bfin_get_ether_addr(char *addr)
  1135. {
  1136. /* the MAC is stored in OTP memory page 0xDF */
  1137. u32 ret;
  1138. u64 otp_mac;
  1139. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  1140. ret = otp_read(0xDF, 0x00, &otp_mac);
  1141. if (!(ret & 0x1)) {
  1142. char *otp_mac_p = (char *)&otp_mac;
  1143. for (ret = 0; ret < 6; ++ret)
  1144. addr[ret] = otp_mac_p[5 - ret];
  1145. }
  1146. }
  1147. EXPORT_SYMBOL(bfin_get_ether_addr);