fimc-lite.c 43 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/of.h>
  20. #include <linux/types.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/slab.h>
  24. #include <linux/videodev2.h>
  25. #include <media/v4l2-device.h>
  26. #include <media/v4l2-ioctl.h>
  27. #include <media/v4l2-mem2mem.h>
  28. #include <media/videobuf2-core.h>
  29. #include <media/videobuf2-dma-contig.h>
  30. #include <media/s5p_fimc.h>
  31. #include "media-dev.h"
  32. #include "fimc-lite.h"
  33. #include "fimc-lite-reg.h"
  34. static int debug;
  35. module_param(debug, int, 0644);
  36. static const struct fimc_fmt fimc_lite_formats[] = {
  37. {
  38. .name = "YUV 4:2:2 packed, YCbYCr",
  39. .fourcc = V4L2_PIX_FMT_YUYV,
  40. .depth = { 16 },
  41. .color = FIMC_FMT_YCBYCR422,
  42. .memplanes = 1,
  43. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  44. .flags = FMT_FLAGS_YUV,
  45. }, {
  46. .name = "YUV 4:2:2 packed, CbYCrY",
  47. .fourcc = V4L2_PIX_FMT_UYVY,
  48. .depth = { 16 },
  49. .color = FIMC_FMT_CBYCRY422,
  50. .memplanes = 1,
  51. .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
  52. .flags = FMT_FLAGS_YUV,
  53. }, {
  54. .name = "YUV 4:2:2 packed, CrYCbY",
  55. .fourcc = V4L2_PIX_FMT_VYUY,
  56. .depth = { 16 },
  57. .color = FIMC_FMT_CRYCBY422,
  58. .memplanes = 1,
  59. .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
  60. .flags = FMT_FLAGS_YUV,
  61. }, {
  62. .name = "YUV 4:2:2 packed, YCrYCb",
  63. .fourcc = V4L2_PIX_FMT_YVYU,
  64. .depth = { 16 },
  65. .color = FIMC_FMT_YCRYCB422,
  66. .memplanes = 1,
  67. .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
  68. .flags = FMT_FLAGS_YUV,
  69. }, {
  70. .name = "RAW8 (GRBG)",
  71. .fourcc = V4L2_PIX_FMT_SGRBG8,
  72. .depth = { 8 },
  73. .color = FIMC_FMT_RAW8,
  74. .memplanes = 1,
  75. .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
  76. .flags = FMT_FLAGS_RAW_BAYER,
  77. }, {
  78. .name = "RAW10 (GRBG)",
  79. .fourcc = V4L2_PIX_FMT_SGRBG10,
  80. .depth = { 10 },
  81. .color = FIMC_FMT_RAW10,
  82. .memplanes = 1,
  83. .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
  84. .flags = FMT_FLAGS_RAW_BAYER,
  85. }, {
  86. .name = "RAW12 (GRBG)",
  87. .fourcc = V4L2_PIX_FMT_SGRBG12,
  88. .depth = { 12 },
  89. .color = FIMC_FMT_RAW12,
  90. .memplanes = 1,
  91. .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
  92. .flags = FMT_FLAGS_RAW_BAYER,
  93. },
  94. };
  95. /**
  96. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  97. * @pixelformat: fourcc to match, ignored if null
  98. * @mbus_code: media bus code to match, ignored if null
  99. * @mask: the color format flags to match
  100. * @index: index to the fimc_lite_formats array, ignored if negative
  101. */
  102. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  103. const u32 *mbus_code, unsigned int mask, int index)
  104. {
  105. const struct fimc_fmt *fmt, *def_fmt = NULL;
  106. unsigned int i;
  107. int id = 0;
  108. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  109. return NULL;
  110. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  111. fmt = &fimc_lite_formats[i];
  112. if (mask && !(fmt->flags & mask))
  113. continue;
  114. if (pixelformat && fmt->fourcc == *pixelformat)
  115. return fmt;
  116. if (mbus_code && fmt->mbus_code == *mbus_code)
  117. return fmt;
  118. if (index == id)
  119. def_fmt = fmt;
  120. id++;
  121. }
  122. return def_fmt;
  123. }
  124. /* Called with the media graph mutex held or @me stream_count > 0. */
  125. static struct v4l2_subdev *__find_remote_sensor(struct media_entity *me)
  126. {
  127. struct media_pad *pad = &me->pads[0];
  128. struct v4l2_subdev *sd;
  129. while (pad->flags & MEDIA_PAD_FL_SINK) {
  130. /* source pad */
  131. pad = media_entity_remote_source(pad);
  132. if (pad == NULL ||
  133. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  134. break;
  135. sd = media_entity_to_v4l2_subdev(pad->entity);
  136. if (sd->grp_id == GRP_ID_FIMC_IS_SENSOR ||
  137. sd->grp_id == GRP_ID_SENSOR)
  138. return sd;
  139. /* sink pad */
  140. pad = &sd->entity.pads[0];
  141. }
  142. return NULL;
  143. }
  144. static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
  145. {
  146. struct fimc_sensor_info *si;
  147. unsigned long flags;
  148. if (fimc->sensor == NULL)
  149. return -ENXIO;
  150. if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
  151. return -EINVAL;
  152. /* Get sensor configuration data from the sensor subdev */
  153. si = v4l2_get_subdev_hostdata(fimc->sensor);
  154. spin_lock_irqsave(&fimc->slock, flags);
  155. flite_hw_set_camera_bus(fimc, &si->pdata);
  156. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  157. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  158. flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
  159. flite_hw_set_interrupt_mask(fimc);
  160. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  161. if (debug > 0)
  162. flite_hw_dump_regs(fimc, __func__);
  163. spin_unlock_irqrestore(&fimc->slock, flags);
  164. return 0;
  165. }
  166. /*
  167. * Reinitialize the driver so it is ready to start the streaming again.
  168. * Set fimc->state to indicate stream off and the hardware shut down state.
  169. * If not suspending (@suspend is false), return any buffers to videobuf2.
  170. * Otherwise put any owned buffers onto the pending buffers queue, so they
  171. * can be re-spun when the device is being resumed. Also perform FIMC
  172. * software reset and disable streaming on the whole pipeline if required.
  173. */
  174. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  175. {
  176. struct flite_buffer *buf;
  177. unsigned long flags;
  178. bool streaming;
  179. spin_lock_irqsave(&fimc->slock, flags);
  180. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  181. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  182. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  183. if (suspend)
  184. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  185. else
  186. fimc->state &= ~(1 << ST_FLITE_PENDING |
  187. 1 << ST_FLITE_SUSPENDED);
  188. /* Release unused buffers */
  189. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  190. buf = fimc_lite_pending_queue_pop(fimc);
  191. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  192. }
  193. /* If suspending put unused buffers onto pending queue */
  194. while (!list_empty(&fimc->active_buf_q)) {
  195. buf = fimc_lite_active_queue_pop(fimc);
  196. if (suspend)
  197. fimc_lite_pending_queue_add(fimc, buf);
  198. else
  199. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  200. }
  201. spin_unlock_irqrestore(&fimc->slock, flags);
  202. flite_hw_reset(fimc);
  203. if (!streaming)
  204. return 0;
  205. return fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 0);
  206. }
  207. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  208. {
  209. unsigned long flags;
  210. if (!fimc_lite_active(fimc))
  211. return 0;
  212. spin_lock_irqsave(&fimc->slock, flags);
  213. set_bit(ST_FLITE_OFF, &fimc->state);
  214. flite_hw_capture_stop(fimc);
  215. spin_unlock_irqrestore(&fimc->slock, flags);
  216. wait_event_timeout(fimc->irq_queue,
  217. !test_bit(ST_FLITE_OFF, &fimc->state),
  218. (2*HZ/10)); /* 200 ms */
  219. return fimc_lite_reinit(fimc, suspend);
  220. }
  221. /* Must be called with fimc.slock spinlock held. */
  222. static void fimc_lite_config_update(struct fimc_lite *fimc)
  223. {
  224. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  225. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  226. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  227. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  228. }
  229. static irqreturn_t flite_irq_handler(int irq, void *priv)
  230. {
  231. struct fimc_lite *fimc = priv;
  232. struct flite_buffer *vbuf;
  233. unsigned long flags;
  234. struct timeval *tv;
  235. struct timespec ts;
  236. u32 intsrc;
  237. spin_lock_irqsave(&fimc->slock, flags);
  238. intsrc = flite_hw_get_interrupt_source(fimc);
  239. flite_hw_clear_pending_irq(fimc);
  240. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  241. wake_up(&fimc->irq_queue);
  242. goto done;
  243. }
  244. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  245. clear_bit(ST_FLITE_RUN, &fimc->state);
  246. fimc->events.data_overflow++;
  247. }
  248. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  249. flite_hw_clear_last_capture_end(fimc);
  250. clear_bit(ST_FLITE_STREAM, &fimc->state);
  251. wake_up(&fimc->irq_queue);
  252. }
  253. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  254. goto done;
  255. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  256. test_bit(ST_FLITE_RUN, &fimc->state) &&
  257. !list_empty(&fimc->active_buf_q) &&
  258. !list_empty(&fimc->pending_buf_q)) {
  259. vbuf = fimc_lite_active_queue_pop(fimc);
  260. ktime_get_ts(&ts);
  261. tv = &vbuf->vb.v4l2_buf.timestamp;
  262. tv->tv_sec = ts.tv_sec;
  263. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  264. vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
  265. vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
  266. vbuf = fimc_lite_pending_queue_pop(fimc);
  267. flite_hw_set_output_addr(fimc, vbuf->paddr);
  268. fimc_lite_active_queue_add(fimc, vbuf);
  269. }
  270. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  271. fimc_lite_config_update(fimc);
  272. if (list_empty(&fimc->pending_buf_q)) {
  273. flite_hw_capture_stop(fimc);
  274. clear_bit(ST_FLITE_STREAM, &fimc->state);
  275. }
  276. done:
  277. set_bit(ST_FLITE_RUN, &fimc->state);
  278. spin_unlock_irqrestore(&fimc->slock, flags);
  279. return IRQ_HANDLED;
  280. }
  281. static int start_streaming(struct vb2_queue *q, unsigned int count)
  282. {
  283. struct fimc_lite *fimc = q->drv_priv;
  284. int ret;
  285. fimc->frame_count = 0;
  286. ret = fimc_lite_hw_init(fimc, false);
  287. if (ret) {
  288. fimc_lite_reinit(fimc, false);
  289. return ret;
  290. }
  291. set_bit(ST_FLITE_PENDING, &fimc->state);
  292. if (!list_empty(&fimc->active_buf_q) &&
  293. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  294. flite_hw_capture_start(fimc);
  295. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  296. fimc_pipeline_call(fimc, set_stream,
  297. &fimc->pipeline, 1);
  298. }
  299. if (debug > 0)
  300. flite_hw_dump_regs(fimc, __func__);
  301. return 0;
  302. }
  303. static int stop_streaming(struct vb2_queue *q)
  304. {
  305. struct fimc_lite *fimc = q->drv_priv;
  306. if (!fimc_lite_active(fimc))
  307. return -EINVAL;
  308. return fimc_lite_stop_capture(fimc, false);
  309. }
  310. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  311. unsigned int *num_buffers, unsigned int *num_planes,
  312. unsigned int sizes[], void *allocators[])
  313. {
  314. const struct v4l2_pix_format_mplane *pixm = NULL;
  315. struct fimc_lite *fimc = vq->drv_priv;
  316. struct flite_frame *frame = &fimc->out_frame;
  317. const struct fimc_fmt *fmt = frame->fmt;
  318. unsigned long wh;
  319. int i;
  320. if (pfmt) {
  321. pixm = &pfmt->fmt.pix_mp;
  322. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0, -1);
  323. wh = pixm->width * pixm->height;
  324. } else {
  325. wh = frame->f_width * frame->f_height;
  326. }
  327. if (fmt == NULL)
  328. return -EINVAL;
  329. *num_planes = fmt->memplanes;
  330. for (i = 0; i < fmt->memplanes; i++) {
  331. unsigned int size = (wh * fmt->depth[i]) / 8;
  332. if (pixm)
  333. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  334. else
  335. sizes[i] = size;
  336. allocators[i] = fimc->alloc_ctx;
  337. }
  338. return 0;
  339. }
  340. static int buffer_prepare(struct vb2_buffer *vb)
  341. {
  342. struct vb2_queue *vq = vb->vb2_queue;
  343. struct fimc_lite *fimc = vq->drv_priv;
  344. int i;
  345. if (fimc->out_frame.fmt == NULL)
  346. return -EINVAL;
  347. for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
  348. unsigned long size = fimc->payload[i];
  349. if (vb2_plane_size(vb, i) < size) {
  350. v4l2_err(&fimc->vfd,
  351. "User buffer too small (%ld < %ld)\n",
  352. vb2_plane_size(vb, i), size);
  353. return -EINVAL;
  354. }
  355. vb2_set_plane_payload(vb, i, size);
  356. }
  357. return 0;
  358. }
  359. static void buffer_queue(struct vb2_buffer *vb)
  360. {
  361. struct flite_buffer *buf
  362. = container_of(vb, struct flite_buffer, vb);
  363. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  364. unsigned long flags;
  365. spin_lock_irqsave(&fimc->slock, flags);
  366. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  367. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  368. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  369. list_empty(&fimc->active_buf_q)) {
  370. flite_hw_set_output_addr(fimc, buf->paddr);
  371. fimc_lite_active_queue_add(fimc, buf);
  372. } else {
  373. fimc_lite_pending_queue_add(fimc, buf);
  374. }
  375. if (vb2_is_streaming(&fimc->vb_queue) &&
  376. !list_empty(&fimc->pending_buf_q) &&
  377. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  378. flite_hw_capture_start(fimc);
  379. spin_unlock_irqrestore(&fimc->slock, flags);
  380. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  381. fimc_pipeline_call(fimc, set_stream,
  382. &fimc->pipeline, 1);
  383. return;
  384. }
  385. spin_unlock_irqrestore(&fimc->slock, flags);
  386. }
  387. static const struct vb2_ops fimc_lite_qops = {
  388. .queue_setup = queue_setup,
  389. .buf_prepare = buffer_prepare,
  390. .buf_queue = buffer_queue,
  391. .wait_prepare = vb2_ops_wait_prepare,
  392. .wait_finish = vb2_ops_wait_finish,
  393. .start_streaming = start_streaming,
  394. .stop_streaming = stop_streaming,
  395. };
  396. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  397. {
  398. unsigned long flags;
  399. spin_lock_irqsave(&fimc->slock, flags);
  400. memset(&fimc->events, 0, sizeof(fimc->events));
  401. spin_unlock_irqrestore(&fimc->slock, flags);
  402. }
  403. static int fimc_lite_open(struct file *file)
  404. {
  405. struct fimc_lite *fimc = video_drvdata(file);
  406. struct media_entity *me = &fimc->vfd.entity;
  407. int ret;
  408. mutex_lock(&me->parent->graph_mutex);
  409. mutex_lock(&fimc->lock);
  410. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
  411. ret = -EBUSY;
  412. goto unlock;
  413. }
  414. set_bit(ST_FLITE_IN_USE, &fimc->state);
  415. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  416. if (ret < 0)
  417. goto unlock;
  418. ret = v4l2_fh_open(file);
  419. if (ret < 0)
  420. goto err_pm;
  421. if (!v4l2_fh_is_singular_file(file) ||
  422. atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  423. goto unlock;
  424. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  425. me, true);
  426. if (!ret) {
  427. fimc_lite_clear_event_counters(fimc);
  428. fimc->ref_count++;
  429. goto unlock;
  430. }
  431. v4l2_fh_release(file);
  432. err_pm:
  433. pm_runtime_put_sync(&fimc->pdev->dev);
  434. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  435. unlock:
  436. mutex_unlock(&fimc->lock);
  437. mutex_unlock(&me->parent->graph_mutex);
  438. return ret;
  439. }
  440. static int fimc_lite_release(struct file *file)
  441. {
  442. struct fimc_lite *fimc = video_drvdata(file);
  443. mutex_lock(&fimc->lock);
  444. if (v4l2_fh_is_singular_file(file) &&
  445. atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
  446. if (fimc->streaming) {
  447. media_entity_pipeline_stop(&fimc->vfd.entity);
  448. fimc->streaming = false;
  449. }
  450. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  451. fimc_lite_stop_capture(fimc, false);
  452. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  453. fimc->ref_count--;
  454. }
  455. vb2_fop_release(file);
  456. pm_runtime_put(&fimc->pdev->dev);
  457. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  458. mutex_unlock(&fimc->lock);
  459. return 0;
  460. }
  461. static const struct v4l2_file_operations fimc_lite_fops = {
  462. .owner = THIS_MODULE,
  463. .open = fimc_lite_open,
  464. .release = fimc_lite_release,
  465. .poll = vb2_fop_poll,
  466. .unlocked_ioctl = video_ioctl2,
  467. .mmap = vb2_fop_mmap,
  468. };
  469. /*
  470. * Format and crop negotiation helpers
  471. */
  472. static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
  473. u32 *width, u32 *height,
  474. u32 *code, u32 *fourcc, int pad)
  475. {
  476. struct flite_drvdata *dd = fimc->dd;
  477. const struct fimc_fmt *fmt;
  478. unsigned int flags = 0;
  479. if (pad == FLITE_SD_PAD_SINK) {
  480. v4l_bound_align_image(width, 8, dd->max_width,
  481. ffs(dd->out_width_align) - 1,
  482. height, 0, dd->max_height, 0, 0);
  483. } else {
  484. v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
  485. ffs(dd->out_width_align) - 1,
  486. height, 0, fimc->inp_frame.rect.height,
  487. 0, 0);
  488. flags = fimc->inp_frame.fmt->flags;
  489. }
  490. fmt = fimc_lite_find_format(fourcc, code, flags, 0);
  491. if (WARN_ON(!fmt))
  492. return NULL;
  493. if (code)
  494. *code = fmt->mbus_code;
  495. if (fourcc)
  496. *fourcc = fmt->fourcc;
  497. v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
  498. code ? *code : 0, *width, *height);
  499. return fmt;
  500. }
  501. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  502. {
  503. struct flite_frame *frame = &fimc->inp_frame;
  504. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  505. &r->height, 0, frame->f_height, 0, 0);
  506. /* Adjust left/top if cropping rectangle got out of bounds */
  507. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  508. r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
  509. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  510. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
  511. r->left, r->top, r->width, r->height,
  512. frame->f_width, frame->f_height);
  513. }
  514. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  515. {
  516. struct flite_frame *frame = &fimc->out_frame;
  517. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  518. /* Scaling is not supported so we enforce compose rectangle size
  519. same as size of the sink crop rectangle. */
  520. r->width = crop_rect->width;
  521. r->height = crop_rect->height;
  522. /* Adjust left/top if the composing rectangle got out of bounds */
  523. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  524. r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
  525. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  526. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
  527. r->left, r->top, r->width, r->height,
  528. frame->f_width, frame->f_height);
  529. }
  530. /*
  531. * Video node ioctl operations
  532. */
  533. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  534. struct v4l2_capability *cap)
  535. {
  536. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  537. cap->bus_info[0] = 0;
  538. cap->card[0] = 0;
  539. cap->capabilities = V4L2_CAP_STREAMING;
  540. return 0;
  541. }
  542. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  543. struct v4l2_fmtdesc *f)
  544. {
  545. const struct fimc_fmt *fmt;
  546. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  547. return -EINVAL;
  548. fmt = &fimc_lite_formats[f->index];
  549. strlcpy(f->description, fmt->name, sizeof(f->description));
  550. f->pixelformat = fmt->fourcc;
  551. return 0;
  552. }
  553. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  554. struct v4l2_format *f)
  555. {
  556. struct fimc_lite *fimc = video_drvdata(file);
  557. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  558. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  559. struct flite_frame *frame = &fimc->out_frame;
  560. const struct fimc_fmt *fmt = frame->fmt;
  561. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  562. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  563. pixm->num_planes = fmt->memplanes;
  564. pixm->pixelformat = fmt->fourcc;
  565. pixm->width = frame->f_width;
  566. pixm->height = frame->f_height;
  567. pixm->field = V4L2_FIELD_NONE;
  568. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  569. return 0;
  570. }
  571. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  572. struct v4l2_pix_format_mplane *pixm,
  573. const struct fimc_fmt **ffmt)
  574. {
  575. u32 bpl = pixm->plane_fmt[0].bytesperline;
  576. struct flite_drvdata *dd = fimc->dd;
  577. const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
  578. const struct fimc_fmt *fmt;
  579. if (WARN_ON(inp_fmt == NULL))
  580. return -EINVAL;
  581. /*
  582. * We allow some flexibility only for YUV formats. In case of raw
  583. * raw Bayer the FIMC-LITE's output format must match its camera
  584. * interface input format.
  585. */
  586. if (inp_fmt->flags & FMT_FLAGS_YUV)
  587. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
  588. inp_fmt->flags, 0);
  589. else
  590. fmt = inp_fmt;
  591. if (WARN_ON(fmt == NULL))
  592. return -EINVAL;
  593. if (ffmt)
  594. *ffmt = fmt;
  595. v4l_bound_align_image(&pixm->width, 8, dd->max_width,
  596. ffs(dd->out_width_align) - 1,
  597. &pixm->height, 0, dd->max_height, 0, 0);
  598. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  599. pixm->plane_fmt[0].bytesperline = (pixm->width *
  600. fmt->depth[0]) / 8;
  601. if (pixm->plane_fmt[0].sizeimage == 0)
  602. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  603. fmt->depth[0]) / 8;
  604. pixm->num_planes = fmt->memplanes;
  605. pixm->pixelformat = fmt->fourcc;
  606. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  607. pixm->field = V4L2_FIELD_NONE;
  608. return 0;
  609. }
  610. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  611. struct v4l2_format *f)
  612. {
  613. struct fimc_lite *fimc = video_drvdata(file);
  614. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  615. }
  616. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  617. struct v4l2_format *f)
  618. {
  619. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  620. struct fimc_lite *fimc = video_drvdata(file);
  621. struct flite_frame *frame = &fimc->out_frame;
  622. const struct fimc_fmt *fmt = NULL;
  623. int ret;
  624. if (vb2_is_busy(&fimc->vb_queue))
  625. return -EBUSY;
  626. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  627. if (ret < 0)
  628. return ret;
  629. frame->fmt = fmt;
  630. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  631. pixm->plane_fmt[0].sizeimage);
  632. frame->f_width = pixm->width;
  633. frame->f_height = pixm->height;
  634. return 0;
  635. }
  636. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  637. {
  638. struct v4l2_subdev *sd = &fimc->subdev;
  639. struct v4l2_subdev_format sink_fmt, src_fmt;
  640. struct media_pad *pad;
  641. int ret;
  642. while (1) {
  643. /* Retrieve format at the sink pad */
  644. pad = &sd->entity.pads[0];
  645. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  646. break;
  647. /* Don't call FIMC subdev operation to avoid nested locking */
  648. if (sd == &fimc->subdev) {
  649. struct flite_frame *ff = &fimc->out_frame;
  650. sink_fmt.format.width = ff->f_width;
  651. sink_fmt.format.height = ff->f_height;
  652. sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
  653. } else {
  654. sink_fmt.pad = pad->index;
  655. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  656. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  657. &sink_fmt);
  658. if (ret < 0 && ret != -ENOIOCTLCMD)
  659. return -EPIPE;
  660. }
  661. /* Retrieve format at the source pad */
  662. pad = media_entity_remote_source(pad);
  663. if (pad == NULL ||
  664. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  665. break;
  666. sd = media_entity_to_v4l2_subdev(pad->entity);
  667. src_fmt.pad = pad->index;
  668. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  669. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  670. if (ret < 0 && ret != -ENOIOCTLCMD)
  671. return -EPIPE;
  672. if (src_fmt.format.width != sink_fmt.format.width ||
  673. src_fmt.format.height != sink_fmt.format.height ||
  674. src_fmt.format.code != sink_fmt.format.code)
  675. return -EPIPE;
  676. }
  677. return 0;
  678. }
  679. static int fimc_lite_streamon(struct file *file, void *priv,
  680. enum v4l2_buf_type type)
  681. {
  682. struct fimc_lite *fimc = video_drvdata(file);
  683. struct media_entity *entity = &fimc->vfd.entity;
  684. struct fimc_pipeline *p = &fimc->pipeline;
  685. int ret;
  686. if (fimc_lite_active(fimc))
  687. return -EBUSY;
  688. ret = media_entity_pipeline_start(entity, p->m_pipeline);
  689. if (ret < 0)
  690. return ret;
  691. ret = fimc_pipeline_validate(fimc);
  692. if (ret < 0)
  693. goto err_p_stop;
  694. fimc->sensor = __find_remote_sensor(&fimc->subdev.entity);
  695. ret = vb2_ioctl_streamon(file, priv, type);
  696. if (!ret) {
  697. fimc->streaming = true;
  698. return ret;
  699. }
  700. err_p_stop:
  701. media_entity_pipeline_stop(entity);
  702. return 0;
  703. }
  704. static int fimc_lite_streamoff(struct file *file, void *priv,
  705. enum v4l2_buf_type type)
  706. {
  707. struct fimc_lite *fimc = video_drvdata(file);
  708. int ret;
  709. ret = vb2_ioctl_streamoff(file, priv, type);
  710. if (ret < 0)
  711. return ret;
  712. media_entity_pipeline_stop(&fimc->vfd.entity);
  713. fimc->streaming = false;
  714. return 0;
  715. }
  716. static int fimc_lite_reqbufs(struct file *file, void *priv,
  717. struct v4l2_requestbuffers *reqbufs)
  718. {
  719. struct fimc_lite *fimc = video_drvdata(file);
  720. int ret;
  721. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  722. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  723. if (!ret)
  724. fimc->reqbufs_count = reqbufs->count;
  725. return ret;
  726. }
  727. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  728. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  729. {
  730. if (a->left < b->left || a->top < b->top)
  731. return 0;
  732. if (a->left + a->width > b->left + b->width)
  733. return 0;
  734. if (a->top + a->height > b->top + b->height)
  735. return 0;
  736. return 1;
  737. }
  738. static int fimc_lite_g_selection(struct file *file, void *fh,
  739. struct v4l2_selection *sel)
  740. {
  741. struct fimc_lite *fimc = video_drvdata(file);
  742. struct flite_frame *f = &fimc->out_frame;
  743. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  744. return -EINVAL;
  745. switch (sel->target) {
  746. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  747. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  748. sel->r.left = 0;
  749. sel->r.top = 0;
  750. sel->r.width = f->f_width;
  751. sel->r.height = f->f_height;
  752. return 0;
  753. case V4L2_SEL_TGT_COMPOSE:
  754. sel->r = f->rect;
  755. return 0;
  756. }
  757. return -EINVAL;
  758. }
  759. static int fimc_lite_s_selection(struct file *file, void *fh,
  760. struct v4l2_selection *sel)
  761. {
  762. struct fimc_lite *fimc = video_drvdata(file);
  763. struct flite_frame *f = &fimc->out_frame;
  764. struct v4l2_rect rect = sel->r;
  765. unsigned long flags;
  766. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
  767. sel->target != V4L2_SEL_TGT_COMPOSE)
  768. return -EINVAL;
  769. fimc_lite_try_compose(fimc, &rect);
  770. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  771. !enclosed_rectangle(&rect, &sel->r))
  772. return -ERANGE;
  773. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  774. !enclosed_rectangle(&sel->r, &rect))
  775. return -ERANGE;
  776. sel->r = rect;
  777. spin_lock_irqsave(&fimc->slock, flags);
  778. f->rect = rect;
  779. set_bit(ST_FLITE_CONFIG, &fimc->state);
  780. spin_unlock_irqrestore(&fimc->slock, flags);
  781. return 0;
  782. }
  783. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  784. .vidioc_querycap = fimc_vidioc_querycap_capture,
  785. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  786. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  787. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  788. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  789. .vidioc_g_selection = fimc_lite_g_selection,
  790. .vidioc_s_selection = fimc_lite_s_selection,
  791. .vidioc_reqbufs = fimc_lite_reqbufs,
  792. .vidioc_querybuf = vb2_ioctl_querybuf,
  793. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  794. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  795. .vidioc_qbuf = vb2_ioctl_qbuf,
  796. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  797. .vidioc_streamon = fimc_lite_streamon,
  798. .vidioc_streamoff = fimc_lite_streamoff,
  799. };
  800. /* Capture subdev media entity operations */
  801. static int fimc_lite_link_setup(struct media_entity *entity,
  802. const struct media_pad *local,
  803. const struct media_pad *remote, u32 flags)
  804. {
  805. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  806. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  807. unsigned int remote_ent_type = media_entity_type(remote->entity);
  808. int ret = 0;
  809. if (WARN_ON(fimc == NULL))
  810. return 0;
  811. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
  812. __func__, remote->entity->name, local->entity->name,
  813. flags, fimc->source_subdev_grp_id);
  814. mutex_lock(&fimc->lock);
  815. switch (local->index) {
  816. case FLITE_SD_PAD_SINK:
  817. if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV) {
  818. ret = -EINVAL;
  819. break;
  820. }
  821. if (flags & MEDIA_LNK_FL_ENABLED) {
  822. if (fimc->source_subdev_grp_id == 0)
  823. fimc->source_subdev_grp_id = sd->grp_id;
  824. else
  825. ret = -EBUSY;
  826. } else {
  827. fimc->source_subdev_grp_id = 0;
  828. fimc->sensor = NULL;
  829. }
  830. break;
  831. case FLITE_SD_PAD_SOURCE_DMA:
  832. if (!(flags & MEDIA_LNK_FL_ENABLED))
  833. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  834. else if (remote_ent_type == MEDIA_ENT_T_DEVNODE)
  835. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  836. else
  837. ret = -EINVAL;
  838. break;
  839. case FLITE_SD_PAD_SOURCE_ISP:
  840. if (!(flags & MEDIA_LNK_FL_ENABLED))
  841. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  842. else if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
  843. atomic_set(&fimc->out_path, FIMC_IO_ISP);
  844. else
  845. ret = -EINVAL;
  846. break;
  847. default:
  848. v4l2_err(sd, "Invalid pad index\n");
  849. ret = -EINVAL;
  850. }
  851. mb();
  852. mutex_unlock(&fimc->lock);
  853. return ret;
  854. }
  855. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  856. .link_setup = fimc_lite_link_setup,
  857. };
  858. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  859. struct v4l2_subdev_fh *fh,
  860. struct v4l2_subdev_mbus_code_enum *code)
  861. {
  862. const struct fimc_fmt *fmt;
  863. fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
  864. if (!fmt)
  865. return -EINVAL;
  866. code->code = fmt->mbus_code;
  867. return 0;
  868. }
  869. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  870. struct v4l2_subdev_fh *fh,
  871. struct v4l2_subdev_format *fmt)
  872. {
  873. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  874. struct v4l2_mbus_framefmt *mf = &fmt->format;
  875. struct flite_frame *f = &fimc->inp_frame;
  876. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  877. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  878. fmt->format = *mf;
  879. return 0;
  880. }
  881. mf->colorspace = V4L2_COLORSPACE_JPEG;
  882. mutex_lock(&fimc->lock);
  883. mf->code = f->fmt->mbus_code;
  884. if (fmt->pad == FLITE_SD_PAD_SINK) {
  885. /* full camera input frame size */
  886. mf->width = f->f_width;
  887. mf->height = f->f_height;
  888. } else {
  889. /* crop size */
  890. mf->width = f->rect.width;
  891. mf->height = f->rect.height;
  892. }
  893. mutex_unlock(&fimc->lock);
  894. return 0;
  895. }
  896. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  897. struct v4l2_subdev_fh *fh,
  898. struct v4l2_subdev_format *fmt)
  899. {
  900. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  901. struct v4l2_mbus_framefmt *mf = &fmt->format;
  902. struct flite_frame *sink = &fimc->inp_frame;
  903. struct flite_frame *source = &fimc->out_frame;
  904. const struct fimc_fmt *ffmt;
  905. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
  906. fmt->pad, mf->code, mf->width, mf->height);
  907. mf->colorspace = V4L2_COLORSPACE_JPEG;
  908. mutex_lock(&fimc->lock);
  909. if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
  910. sd->entity.stream_count > 0) ||
  911. (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
  912. vb2_is_busy(&fimc->vb_queue))) {
  913. mutex_unlock(&fimc->lock);
  914. return -EBUSY;
  915. }
  916. ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
  917. &mf->code, NULL, fmt->pad);
  918. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  919. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  920. *mf = fmt->format;
  921. mutex_unlock(&fimc->lock);
  922. return 0;
  923. }
  924. if (fmt->pad == FLITE_SD_PAD_SINK) {
  925. sink->f_width = mf->width;
  926. sink->f_height = mf->height;
  927. sink->fmt = ffmt;
  928. /* Set sink crop rectangle */
  929. sink->rect.width = mf->width;
  930. sink->rect.height = mf->height;
  931. sink->rect.left = 0;
  932. sink->rect.top = 0;
  933. /* Reset source format and crop rectangle */
  934. source->rect = sink->rect;
  935. source->f_width = mf->width;
  936. source->f_height = mf->height;
  937. } else {
  938. /* Allow changing format only on sink pad */
  939. mf->code = sink->fmt->mbus_code;
  940. mf->width = sink->rect.width;
  941. mf->height = sink->rect.height;
  942. }
  943. mutex_unlock(&fimc->lock);
  944. return 0;
  945. }
  946. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  947. struct v4l2_subdev_fh *fh,
  948. struct v4l2_subdev_selection *sel)
  949. {
  950. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  951. struct flite_frame *f = &fimc->inp_frame;
  952. if ((sel->target != V4L2_SEL_TGT_CROP &&
  953. sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
  954. sel->pad != FLITE_SD_PAD_SINK)
  955. return -EINVAL;
  956. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  957. sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
  958. return 0;
  959. }
  960. mutex_lock(&fimc->lock);
  961. if (sel->target == V4L2_SEL_TGT_CROP) {
  962. sel->r = f->rect;
  963. } else {
  964. sel->r.left = 0;
  965. sel->r.top = 0;
  966. sel->r.width = f->f_width;
  967. sel->r.height = f->f_height;
  968. }
  969. mutex_unlock(&fimc->lock);
  970. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  971. __func__, f->rect.left, f->rect.top, f->rect.width,
  972. f->rect.height, f->f_width, f->f_height);
  973. return 0;
  974. }
  975. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  976. struct v4l2_subdev_fh *fh,
  977. struct v4l2_subdev_selection *sel)
  978. {
  979. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  980. struct flite_frame *f = &fimc->inp_frame;
  981. int ret = 0;
  982. if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
  983. return -EINVAL;
  984. mutex_lock(&fimc->lock);
  985. fimc_lite_try_crop(fimc, &sel->r);
  986. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  987. *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
  988. } else {
  989. unsigned long flags;
  990. spin_lock_irqsave(&fimc->slock, flags);
  991. f->rect = sel->r;
  992. /* Same crop rectangle on the source pad */
  993. fimc->out_frame.rect = sel->r;
  994. set_bit(ST_FLITE_CONFIG, &fimc->state);
  995. spin_unlock_irqrestore(&fimc->slock, flags);
  996. }
  997. mutex_unlock(&fimc->lock);
  998. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  999. __func__, f->rect.left, f->rect.top, f->rect.width,
  1000. f->rect.height, f->f_width, f->f_height);
  1001. return ret;
  1002. }
  1003. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  1004. {
  1005. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1006. unsigned long flags;
  1007. int ret;
  1008. /*
  1009. * Find sensor subdev linked to FIMC-LITE directly or through
  1010. * MIPI-CSIS. This is required for configuration where FIMC-LITE
  1011. * is used as a subdev only and feeds data internally to FIMC-IS.
  1012. * The pipeline links are protected through entity.stream_count
  1013. * so there is no need to take the media graph mutex here.
  1014. */
  1015. fimc->sensor = __find_remote_sensor(&sd->entity);
  1016. if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
  1017. return -ENOIOCTLCMD;
  1018. mutex_lock(&fimc->lock);
  1019. if (on) {
  1020. flite_hw_reset(fimc);
  1021. ret = fimc_lite_hw_init(fimc, true);
  1022. if (!ret) {
  1023. spin_lock_irqsave(&fimc->slock, flags);
  1024. flite_hw_capture_start(fimc);
  1025. spin_unlock_irqrestore(&fimc->slock, flags);
  1026. }
  1027. } else {
  1028. set_bit(ST_FLITE_OFF, &fimc->state);
  1029. spin_lock_irqsave(&fimc->slock, flags);
  1030. flite_hw_capture_stop(fimc);
  1031. spin_unlock_irqrestore(&fimc->slock, flags);
  1032. ret = wait_event_timeout(fimc->irq_queue,
  1033. !test_bit(ST_FLITE_OFF, &fimc->state),
  1034. msecs_to_jiffies(200));
  1035. if (ret == 0)
  1036. v4l2_err(sd, "s_stream(0) timeout\n");
  1037. clear_bit(ST_FLITE_RUN, &fimc->state);
  1038. }
  1039. mutex_unlock(&fimc->lock);
  1040. return ret;
  1041. }
  1042. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  1043. {
  1044. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1045. flite_hw_dump_regs(fimc, __func__);
  1046. return 0;
  1047. }
  1048. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  1049. {
  1050. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1051. struct vb2_queue *q = &fimc->vb_queue;
  1052. struct video_device *vfd = &fimc->vfd;
  1053. int ret;
  1054. memset(vfd, 0, sizeof(*vfd));
  1055. fimc->inp_frame.fmt = &fimc_lite_formats[0];
  1056. fimc->out_frame.fmt = &fimc_lite_formats[0];
  1057. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  1058. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  1059. fimc->index);
  1060. vfd->fops = &fimc_lite_fops;
  1061. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  1062. vfd->v4l2_dev = sd->v4l2_dev;
  1063. vfd->minor = -1;
  1064. vfd->release = video_device_release_empty;
  1065. vfd->queue = q;
  1066. fimc->reqbufs_count = 0;
  1067. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1068. INIT_LIST_HEAD(&fimc->active_buf_q);
  1069. memset(q, 0, sizeof(*q));
  1070. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1071. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1072. q->ops = &fimc_lite_qops;
  1073. q->mem_ops = &vb2_dma_contig_memops;
  1074. q->buf_struct_size = sizeof(struct flite_buffer);
  1075. q->drv_priv = fimc;
  1076. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1077. q->lock = &fimc->lock;
  1078. ret = vb2_queue_init(q);
  1079. if (ret < 0)
  1080. return ret;
  1081. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1082. ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
  1083. if (ret < 0)
  1084. return ret;
  1085. video_set_drvdata(vfd, fimc);
  1086. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1087. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1088. if (ret < 0) {
  1089. media_entity_cleanup(&vfd->entity);
  1090. fimc->pipeline_ops = NULL;
  1091. return ret;
  1092. }
  1093. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1094. vfd->name, video_device_node_name(vfd));
  1095. return 0;
  1096. }
  1097. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1098. {
  1099. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1100. if (fimc == NULL)
  1101. return;
  1102. if (video_is_registered(&fimc->vfd)) {
  1103. video_unregister_device(&fimc->vfd);
  1104. media_entity_cleanup(&fimc->vfd.entity);
  1105. fimc->pipeline_ops = NULL;
  1106. }
  1107. }
  1108. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1109. .registered = fimc_lite_subdev_registered,
  1110. .unregistered = fimc_lite_subdev_unregistered,
  1111. };
  1112. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1113. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1114. .get_selection = fimc_lite_subdev_get_selection,
  1115. .set_selection = fimc_lite_subdev_set_selection,
  1116. .get_fmt = fimc_lite_subdev_get_fmt,
  1117. .set_fmt = fimc_lite_subdev_set_fmt,
  1118. };
  1119. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1120. .s_stream = fimc_lite_subdev_s_stream,
  1121. };
  1122. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1123. .log_status = fimc_lite_log_status,
  1124. };
  1125. static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1126. .core = &fimc_lite_core_ops,
  1127. .video = &fimc_lite_subdev_video_ops,
  1128. .pad = &fimc_lite_subdev_pad_ops,
  1129. };
  1130. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1131. {
  1132. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1133. ctrl_handler);
  1134. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1135. return 0;
  1136. }
  1137. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1138. .s_ctrl = fimc_lite_s_ctrl,
  1139. };
  1140. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1141. .ops = &fimc_lite_ctrl_ops,
  1142. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1143. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1144. .name = "Test Pattern 640x480",
  1145. .step = 1,
  1146. };
  1147. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1148. {
  1149. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1150. struct v4l2_subdev *sd = &fimc->subdev;
  1151. int ret;
  1152. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1153. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1154. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1155. fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1156. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
  1157. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
  1158. ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM,
  1159. fimc->subdev_pads, 0);
  1160. if (ret)
  1161. return ret;
  1162. v4l2_ctrl_handler_init(handler, 1);
  1163. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1164. NULL);
  1165. if (handler->error) {
  1166. media_entity_cleanup(&sd->entity);
  1167. return handler->error;
  1168. }
  1169. sd->ctrl_handler = handler;
  1170. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1171. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1172. v4l2_set_subdevdata(sd, fimc);
  1173. return 0;
  1174. }
  1175. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1176. {
  1177. struct v4l2_subdev *sd = &fimc->subdev;
  1178. v4l2_device_unregister_subdev(sd);
  1179. media_entity_cleanup(&sd->entity);
  1180. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1181. v4l2_set_subdevdata(sd, NULL);
  1182. }
  1183. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1184. {
  1185. if (IS_ERR_OR_NULL(fimc->clock))
  1186. return;
  1187. clk_unprepare(fimc->clock);
  1188. clk_put(fimc->clock);
  1189. fimc->clock = NULL;
  1190. }
  1191. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1192. {
  1193. int ret;
  1194. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1195. if (IS_ERR(fimc->clock))
  1196. return PTR_ERR(fimc->clock);
  1197. ret = clk_prepare(fimc->clock);
  1198. if (ret < 0) {
  1199. clk_put(fimc->clock);
  1200. fimc->clock = NULL;
  1201. }
  1202. return ret;
  1203. }
  1204. static const struct of_device_id flite_of_match[];
  1205. static int fimc_lite_probe(struct platform_device *pdev)
  1206. {
  1207. struct flite_drvdata *drv_data = NULL;
  1208. struct device *dev = &pdev->dev;
  1209. const struct of_device_id *of_id;
  1210. struct fimc_lite *fimc;
  1211. struct resource *res;
  1212. int ret;
  1213. fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
  1214. if (!fimc)
  1215. return -ENOMEM;
  1216. if (dev->of_node) {
  1217. of_id = of_match_node(flite_of_match, dev->of_node);
  1218. if (of_id)
  1219. drv_data = (struct flite_drvdata *)of_id->data;
  1220. fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
  1221. } else {
  1222. drv_data = fimc_lite_get_drvdata(pdev);
  1223. fimc->index = pdev->id;
  1224. }
  1225. if (!drv_data || fimc->index < 0 || fimc->index >= FIMC_LITE_MAX_DEVS)
  1226. return -EINVAL;
  1227. fimc->dd = drv_data;
  1228. fimc->pdev = pdev;
  1229. init_waitqueue_head(&fimc->irq_queue);
  1230. spin_lock_init(&fimc->slock);
  1231. mutex_init(&fimc->lock);
  1232. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1233. fimc->regs = devm_ioremap_resource(dev, res);
  1234. if (IS_ERR(fimc->regs))
  1235. return PTR_ERR(fimc->regs);
  1236. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1237. if (res == NULL) {
  1238. dev_err(dev, "Failed to get IRQ resource\n");
  1239. return -ENXIO;
  1240. }
  1241. ret = fimc_lite_clk_get(fimc);
  1242. if (ret)
  1243. return ret;
  1244. ret = devm_request_irq(dev, res->start, flite_irq_handler,
  1245. 0, dev_name(dev), fimc);
  1246. if (ret) {
  1247. dev_err(dev, "Failed to install irq (%d)\n", ret);
  1248. goto err_clk;
  1249. }
  1250. /* The video node will be created within the subdev's registered() op */
  1251. ret = fimc_lite_create_capture_subdev(fimc);
  1252. if (ret)
  1253. goto err_clk;
  1254. platform_set_drvdata(pdev, fimc);
  1255. pm_runtime_enable(dev);
  1256. ret = pm_runtime_get_sync(dev);
  1257. if (ret < 0)
  1258. goto err_sd;
  1259. fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
  1260. if (IS_ERR(fimc->alloc_ctx)) {
  1261. ret = PTR_ERR(fimc->alloc_ctx);
  1262. goto err_pm;
  1263. }
  1264. pm_runtime_put(dev);
  1265. dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
  1266. fimc->index);
  1267. return 0;
  1268. err_pm:
  1269. pm_runtime_put(dev);
  1270. err_sd:
  1271. fimc_lite_unregister_capture_subdev(fimc);
  1272. err_clk:
  1273. fimc_lite_clk_put(fimc);
  1274. return ret;
  1275. }
  1276. static int fimc_lite_runtime_resume(struct device *dev)
  1277. {
  1278. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1279. clk_enable(fimc->clock);
  1280. return 0;
  1281. }
  1282. static int fimc_lite_runtime_suspend(struct device *dev)
  1283. {
  1284. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1285. clk_disable(fimc->clock);
  1286. return 0;
  1287. }
  1288. #ifdef CONFIG_PM_SLEEP
  1289. static int fimc_lite_resume(struct device *dev)
  1290. {
  1291. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1292. struct flite_buffer *buf;
  1293. unsigned long flags;
  1294. int i;
  1295. spin_lock_irqsave(&fimc->slock, flags);
  1296. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1297. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1298. spin_unlock_irqrestore(&fimc->slock, flags);
  1299. return 0;
  1300. }
  1301. flite_hw_reset(fimc);
  1302. spin_unlock_irqrestore(&fimc->slock, flags);
  1303. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1304. return 0;
  1305. INIT_LIST_HEAD(&fimc->active_buf_q);
  1306. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  1307. &fimc->vfd.entity, false);
  1308. fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
  1309. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1310. for (i = 0; i < fimc->reqbufs_count; i++) {
  1311. if (list_empty(&fimc->pending_buf_q))
  1312. break;
  1313. buf = fimc_lite_pending_queue_pop(fimc);
  1314. buffer_queue(&buf->vb);
  1315. }
  1316. return 0;
  1317. }
  1318. static int fimc_lite_suspend(struct device *dev)
  1319. {
  1320. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1321. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1322. int ret;
  1323. if (test_and_set_bit(ST_LPM, &fimc->state))
  1324. return 0;
  1325. ret = fimc_lite_stop_capture(fimc, suspend);
  1326. if (ret < 0 || !fimc_lite_active(fimc))
  1327. return ret;
  1328. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  1329. }
  1330. #endif /* CONFIG_PM_SLEEP */
  1331. static int fimc_lite_remove(struct platform_device *pdev)
  1332. {
  1333. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1334. struct device *dev = &pdev->dev;
  1335. pm_runtime_disable(dev);
  1336. pm_runtime_set_suspended(dev);
  1337. fimc_lite_unregister_capture_subdev(fimc);
  1338. vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
  1339. fimc_lite_clk_put(fimc);
  1340. dev_info(dev, "Driver unloaded\n");
  1341. return 0;
  1342. }
  1343. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1344. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1345. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1346. NULL)
  1347. };
  1348. /* EXYNOS4212, EXYNOS4412 */
  1349. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1350. .max_width = 8192,
  1351. .max_height = 8192,
  1352. .out_width_align = 8,
  1353. .win_hor_offs_align = 2,
  1354. .out_hor_offs_align = 8,
  1355. };
  1356. static struct platform_device_id fimc_lite_driver_ids[] = {
  1357. {
  1358. .name = "exynos-fimc-lite",
  1359. .driver_data = (unsigned long)&fimc_lite_drvdata_exynos4,
  1360. },
  1361. { /* sentinel */ },
  1362. };
  1363. MODULE_DEVICE_TABLE(platform, fimc_lite_driver_ids);
  1364. static const struct of_device_id flite_of_match[] = {
  1365. {
  1366. .compatible = "samsung,exynos4212-fimc-lite",
  1367. .data = &fimc_lite_drvdata_exynos4,
  1368. },
  1369. { /* sentinel */ },
  1370. };
  1371. MODULE_DEVICE_TABLE(of, flite_of_match);
  1372. static struct platform_driver fimc_lite_driver = {
  1373. .probe = fimc_lite_probe,
  1374. .remove = fimc_lite_remove,
  1375. .id_table = fimc_lite_driver_ids,
  1376. .driver = {
  1377. .of_match_table = flite_of_match,
  1378. .name = FIMC_LITE_DRV_NAME,
  1379. .owner = THIS_MODULE,
  1380. .pm = &fimc_lite_pm_ops,
  1381. }
  1382. };
  1383. module_platform_driver(fimc_lite_driver);
  1384. MODULE_LICENSE("GPL");
  1385. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);