i2s.c 25 KB

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  1. /* sound/soc/samsung/i2s.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6. * Jaswinder Singh <jassi.brar@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/slab.h>
  14. #include <linux/clk.h>
  15. #include <linux/io.h>
  16. #include <sound/soc.h>
  17. #include <sound/pcm_params.h>
  18. #include <plat/audio.h>
  19. #include "dma.h"
  20. #include "idma.h"
  21. #include "i2s.h"
  22. #include "i2s-regs.h"
  23. #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  24. struct i2s_dai {
  25. /* Platform device for this DAI */
  26. struct platform_device *pdev;
  27. /* IOREMAP'd SFRs */
  28. void __iomem *addr;
  29. /* Physical base address of SFRs */
  30. u32 base;
  31. /* Rate of RCLK source clock */
  32. unsigned long rclk_srcrate;
  33. /* Frame Clock */
  34. unsigned frmclk;
  35. /*
  36. * Specifically requested RCLK,BCLK by MACHINE Driver.
  37. * 0 indicates CPU driver is free to choose any value.
  38. */
  39. unsigned rfs, bfs;
  40. /* I2S Controller's core clock */
  41. struct clk *clk;
  42. /* Clock for generating I2S signals */
  43. struct clk *op_clk;
  44. /* Array of clock names for op_clk */
  45. const char **src_clk;
  46. /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  47. struct i2s_dai *pri_dai;
  48. /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  49. struct i2s_dai *sec_dai;
  50. #define DAI_OPENED (1 << 0) /* Dai is opened */
  51. #define DAI_MANAGER (1 << 1) /* Dai is the manager */
  52. unsigned mode;
  53. /* Driver for this DAI */
  54. struct snd_soc_dai_driver i2s_dai_drv;
  55. /* DMA parameters */
  56. struct s3c_dma_params dma_playback;
  57. struct s3c_dma_params dma_capture;
  58. struct s3c_dma_params idma_playback;
  59. u32 quirks;
  60. u32 suspend_i2smod;
  61. u32 suspend_i2scon;
  62. u32 suspend_i2spsr;
  63. };
  64. /* Lock for cross i/f checks */
  65. static DEFINE_SPINLOCK(lock);
  66. /* If this is the 'overlay' stereo DAI */
  67. static inline bool is_secondary(struct i2s_dai *i2s)
  68. {
  69. return i2s->pri_dai ? true : false;
  70. }
  71. /* If operating in SoC-Slave mode */
  72. static inline bool is_slave(struct i2s_dai *i2s)
  73. {
  74. return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
  75. }
  76. /* If this interface of the controller is transmitting data */
  77. static inline bool tx_active(struct i2s_dai *i2s)
  78. {
  79. u32 active;
  80. if (!i2s)
  81. return false;
  82. active = readl(i2s->addr + I2SCON);
  83. if (is_secondary(i2s))
  84. active &= CON_TXSDMA_ACTIVE;
  85. else
  86. active &= CON_TXDMA_ACTIVE;
  87. return active ? true : false;
  88. }
  89. /* If the other interface of the controller is transmitting data */
  90. static inline bool other_tx_active(struct i2s_dai *i2s)
  91. {
  92. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  93. return tx_active(other);
  94. }
  95. /* If any interface of the controller is transmitting data */
  96. static inline bool any_tx_active(struct i2s_dai *i2s)
  97. {
  98. return tx_active(i2s) || other_tx_active(i2s);
  99. }
  100. /* If this interface of the controller is receiving data */
  101. static inline bool rx_active(struct i2s_dai *i2s)
  102. {
  103. u32 active;
  104. if (!i2s)
  105. return false;
  106. active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
  107. return active ? true : false;
  108. }
  109. /* If the other interface of the controller is receiving data */
  110. static inline bool other_rx_active(struct i2s_dai *i2s)
  111. {
  112. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  113. return rx_active(other);
  114. }
  115. /* If any interface of the controller is receiving data */
  116. static inline bool any_rx_active(struct i2s_dai *i2s)
  117. {
  118. return rx_active(i2s) || other_rx_active(i2s);
  119. }
  120. /* If the other DAI is transmitting or receiving data */
  121. static inline bool other_active(struct i2s_dai *i2s)
  122. {
  123. return other_rx_active(i2s) || other_tx_active(i2s);
  124. }
  125. /* If this DAI is transmitting or receiving data */
  126. static inline bool this_active(struct i2s_dai *i2s)
  127. {
  128. return tx_active(i2s) || rx_active(i2s);
  129. }
  130. /* If the controller is active anyway */
  131. static inline bool any_active(struct i2s_dai *i2s)
  132. {
  133. return this_active(i2s) || other_active(i2s);
  134. }
  135. static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
  136. {
  137. return snd_soc_dai_get_drvdata(dai);
  138. }
  139. static inline bool is_opened(struct i2s_dai *i2s)
  140. {
  141. if (i2s && (i2s->mode & DAI_OPENED))
  142. return true;
  143. else
  144. return false;
  145. }
  146. static inline bool is_manager(struct i2s_dai *i2s)
  147. {
  148. if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
  149. return true;
  150. else
  151. return false;
  152. }
  153. /* Read RCLK of I2S (in multiples of LRCLK) */
  154. static inline unsigned get_rfs(struct i2s_dai *i2s)
  155. {
  156. u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3;
  157. switch (rfs) {
  158. case 3: return 768;
  159. case 2: return 384;
  160. case 1: return 512;
  161. default: return 256;
  162. }
  163. }
  164. /* Write RCLK of I2S (in multiples of LRCLK) */
  165. static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
  166. {
  167. u32 mod = readl(i2s->addr + I2SMOD);
  168. mod &= ~MOD_RCLK_MASK;
  169. switch (rfs) {
  170. case 768:
  171. mod |= MOD_RCLK_768FS;
  172. break;
  173. case 512:
  174. mod |= MOD_RCLK_512FS;
  175. break;
  176. case 384:
  177. mod |= MOD_RCLK_384FS;
  178. break;
  179. default:
  180. mod |= MOD_RCLK_256FS;
  181. break;
  182. }
  183. writel(mod, i2s->addr + I2SMOD);
  184. }
  185. /* Read Bit-Clock of I2S (in multiples of LRCLK) */
  186. static inline unsigned get_bfs(struct i2s_dai *i2s)
  187. {
  188. u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3;
  189. switch (bfs) {
  190. case 3: return 24;
  191. case 2: return 16;
  192. case 1: return 48;
  193. default: return 32;
  194. }
  195. }
  196. /* Write Bit-Clock of I2S (in multiples of LRCLK) */
  197. static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
  198. {
  199. u32 mod = readl(i2s->addr + I2SMOD);
  200. mod &= ~MOD_BCLK_MASK;
  201. switch (bfs) {
  202. case 48:
  203. mod |= MOD_BCLK_48FS;
  204. break;
  205. case 32:
  206. mod |= MOD_BCLK_32FS;
  207. break;
  208. case 24:
  209. mod |= MOD_BCLK_24FS;
  210. break;
  211. case 16:
  212. mod |= MOD_BCLK_16FS;
  213. break;
  214. default:
  215. dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
  216. return;
  217. }
  218. writel(mod, i2s->addr + I2SMOD);
  219. }
  220. /* Sample-Size */
  221. static inline int get_blc(struct i2s_dai *i2s)
  222. {
  223. int blc = readl(i2s->addr + I2SMOD);
  224. blc = (blc >> 13) & 0x3;
  225. switch (blc) {
  226. case 2: return 24;
  227. case 1: return 8;
  228. default: return 16;
  229. }
  230. }
  231. /* TX Channel Control */
  232. static void i2s_txctrl(struct i2s_dai *i2s, int on)
  233. {
  234. void __iomem *addr = i2s->addr;
  235. u32 con = readl(addr + I2SCON);
  236. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  237. if (on) {
  238. con |= CON_ACTIVE;
  239. con &= ~CON_TXCH_PAUSE;
  240. if (is_secondary(i2s)) {
  241. con |= CON_TXSDMA_ACTIVE;
  242. con &= ~CON_TXSDMA_PAUSE;
  243. } else {
  244. con |= CON_TXDMA_ACTIVE;
  245. con &= ~CON_TXDMA_PAUSE;
  246. }
  247. if (any_rx_active(i2s))
  248. mod |= MOD_TXRX;
  249. else
  250. mod |= MOD_TXONLY;
  251. } else {
  252. if (is_secondary(i2s)) {
  253. con |= CON_TXSDMA_PAUSE;
  254. con &= ~CON_TXSDMA_ACTIVE;
  255. } else {
  256. con |= CON_TXDMA_PAUSE;
  257. con &= ~CON_TXDMA_ACTIVE;
  258. }
  259. if (other_tx_active(i2s)) {
  260. writel(con, addr + I2SCON);
  261. return;
  262. }
  263. con |= CON_TXCH_PAUSE;
  264. if (any_rx_active(i2s))
  265. mod |= MOD_RXONLY;
  266. else
  267. con &= ~CON_ACTIVE;
  268. }
  269. writel(mod, addr + I2SMOD);
  270. writel(con, addr + I2SCON);
  271. }
  272. /* RX Channel Control */
  273. static void i2s_rxctrl(struct i2s_dai *i2s, int on)
  274. {
  275. void __iomem *addr = i2s->addr;
  276. u32 con = readl(addr + I2SCON);
  277. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  278. if (on) {
  279. con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
  280. con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
  281. if (any_tx_active(i2s))
  282. mod |= MOD_TXRX;
  283. else
  284. mod |= MOD_RXONLY;
  285. } else {
  286. con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
  287. con &= ~CON_RXDMA_ACTIVE;
  288. if (any_tx_active(i2s))
  289. mod |= MOD_TXONLY;
  290. else
  291. con &= ~CON_ACTIVE;
  292. }
  293. writel(mod, addr + I2SMOD);
  294. writel(con, addr + I2SCON);
  295. }
  296. /* Flush FIFO of an interface */
  297. static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
  298. {
  299. void __iomem *fic;
  300. u32 val;
  301. if (!i2s)
  302. return;
  303. if (is_secondary(i2s))
  304. fic = i2s->addr + I2SFICS;
  305. else
  306. fic = i2s->addr + I2SFIC;
  307. /* Flush the FIFO */
  308. writel(readl(fic) | flush, fic);
  309. /* Be patient */
  310. val = msecs_to_loops(1) / 1000; /* 1 usec */
  311. while (--val)
  312. cpu_relax();
  313. writel(readl(fic) & ~flush, fic);
  314. }
  315. static int i2s_set_sysclk(struct snd_soc_dai *dai,
  316. int clk_id, unsigned int rfs, int dir)
  317. {
  318. struct i2s_dai *i2s = to_info(dai);
  319. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  320. u32 mod = readl(i2s->addr + I2SMOD);
  321. switch (clk_id) {
  322. case SAMSUNG_I2S_CDCLK:
  323. /* Shouldn't matter in GATING(CLOCK_IN) mode */
  324. if (dir == SND_SOC_CLOCK_IN)
  325. rfs = 0;
  326. if ((rfs && other->rfs && (other->rfs != rfs)) ||
  327. (any_active(i2s) &&
  328. (((dir == SND_SOC_CLOCK_IN)
  329. && !(mod & MOD_CDCLKCON)) ||
  330. ((dir == SND_SOC_CLOCK_OUT)
  331. && (mod & MOD_CDCLKCON))))) {
  332. dev_err(&i2s->pdev->dev,
  333. "%s:%d Other DAI busy\n", __func__, __LINE__);
  334. return -EAGAIN;
  335. }
  336. if (dir == SND_SOC_CLOCK_IN)
  337. mod |= MOD_CDCLKCON;
  338. else
  339. mod &= ~MOD_CDCLKCON;
  340. i2s->rfs = rfs;
  341. break;
  342. case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
  343. case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
  344. if ((i2s->quirks & QUIRK_NO_MUXPSR)
  345. || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
  346. clk_id = 0;
  347. else
  348. clk_id = 1;
  349. if (!any_active(i2s)) {
  350. if (i2s->op_clk) {
  351. if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
  352. (!clk_id && (mod & MOD_IMS_SYSMUX))) {
  353. clk_disable(i2s->op_clk);
  354. clk_put(i2s->op_clk);
  355. } else {
  356. i2s->rclk_srcrate =
  357. clk_get_rate(i2s->op_clk);
  358. return 0;
  359. }
  360. }
  361. i2s->op_clk = clk_get(&i2s->pdev->dev,
  362. i2s->src_clk[clk_id]);
  363. clk_enable(i2s->op_clk);
  364. i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
  365. /* Over-ride the other's */
  366. if (other) {
  367. other->op_clk = i2s->op_clk;
  368. other->rclk_srcrate = i2s->rclk_srcrate;
  369. }
  370. } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
  371. || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
  372. dev_err(&i2s->pdev->dev,
  373. "%s:%d Other DAI busy\n", __func__, __LINE__);
  374. return -EAGAIN;
  375. } else {
  376. /* Call can't be on the active DAI */
  377. i2s->op_clk = other->op_clk;
  378. i2s->rclk_srcrate = other->rclk_srcrate;
  379. return 0;
  380. }
  381. if (clk_id == 0)
  382. mod &= ~MOD_IMS_SYSMUX;
  383. else
  384. mod |= MOD_IMS_SYSMUX;
  385. break;
  386. default:
  387. dev_err(&i2s->pdev->dev, "We don't serve that!\n");
  388. return -EINVAL;
  389. }
  390. writel(mod, i2s->addr + I2SMOD);
  391. return 0;
  392. }
  393. static int i2s_set_fmt(struct snd_soc_dai *dai,
  394. unsigned int fmt)
  395. {
  396. struct i2s_dai *i2s = to_info(dai);
  397. u32 mod = readl(i2s->addr + I2SMOD);
  398. u32 tmp = 0;
  399. /* Format is priority */
  400. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  401. case SND_SOC_DAIFMT_RIGHT_J:
  402. tmp |= MOD_LR_RLOW;
  403. tmp |= MOD_SDF_MSB;
  404. break;
  405. case SND_SOC_DAIFMT_LEFT_J:
  406. tmp |= MOD_LR_RLOW;
  407. tmp |= MOD_SDF_LSB;
  408. break;
  409. case SND_SOC_DAIFMT_I2S:
  410. tmp |= MOD_SDF_IIS;
  411. break;
  412. default:
  413. dev_err(&i2s->pdev->dev, "Format not supported\n");
  414. return -EINVAL;
  415. }
  416. /*
  417. * INV flag is relative to the FORMAT flag - if set it simply
  418. * flips the polarity specified by the Standard
  419. */
  420. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  421. case SND_SOC_DAIFMT_NB_NF:
  422. break;
  423. case SND_SOC_DAIFMT_NB_IF:
  424. if (tmp & MOD_LR_RLOW)
  425. tmp &= ~MOD_LR_RLOW;
  426. else
  427. tmp |= MOD_LR_RLOW;
  428. break;
  429. default:
  430. dev_err(&i2s->pdev->dev, "Polarity not supported\n");
  431. return -EINVAL;
  432. }
  433. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  434. case SND_SOC_DAIFMT_CBM_CFM:
  435. tmp |= MOD_SLAVE;
  436. break;
  437. case SND_SOC_DAIFMT_CBS_CFS:
  438. /* Set default source clock in Master mode */
  439. if (i2s->rclk_srcrate == 0)
  440. i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
  441. 0, SND_SOC_CLOCK_IN);
  442. break;
  443. default:
  444. dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
  445. return -EINVAL;
  446. }
  447. if (any_active(i2s) &&
  448. ((mod & (MOD_SDF_MASK | MOD_LR_RLOW
  449. | MOD_SLAVE)) != tmp)) {
  450. dev_err(&i2s->pdev->dev,
  451. "%s:%d Other DAI busy\n", __func__, __LINE__);
  452. return -EAGAIN;
  453. }
  454. mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE);
  455. mod |= tmp;
  456. writel(mod, i2s->addr + I2SMOD);
  457. return 0;
  458. }
  459. static int i2s_hw_params(struct snd_pcm_substream *substream,
  460. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  461. {
  462. struct i2s_dai *i2s = to_info(dai);
  463. u32 mod = readl(i2s->addr + I2SMOD);
  464. if (!is_secondary(i2s))
  465. mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
  466. switch (params_channels(params)) {
  467. case 6:
  468. mod |= MOD_DC2_EN;
  469. case 4:
  470. mod |= MOD_DC1_EN;
  471. break;
  472. case 2:
  473. break;
  474. default:
  475. dev_err(&i2s->pdev->dev, "%d channels not supported\n",
  476. params_channels(params));
  477. return -EINVAL;
  478. }
  479. if (is_secondary(i2s))
  480. mod &= ~MOD_BLCS_MASK;
  481. else
  482. mod &= ~MOD_BLCP_MASK;
  483. if (is_manager(i2s))
  484. mod &= ~MOD_BLC_MASK;
  485. switch (params_format(params)) {
  486. case SNDRV_PCM_FORMAT_S8:
  487. if (is_secondary(i2s))
  488. mod |= MOD_BLCS_8BIT;
  489. else
  490. mod |= MOD_BLCP_8BIT;
  491. if (is_manager(i2s))
  492. mod |= MOD_BLC_8BIT;
  493. break;
  494. case SNDRV_PCM_FORMAT_S16_LE:
  495. if (is_secondary(i2s))
  496. mod |= MOD_BLCS_16BIT;
  497. else
  498. mod |= MOD_BLCP_16BIT;
  499. if (is_manager(i2s))
  500. mod |= MOD_BLC_16BIT;
  501. break;
  502. case SNDRV_PCM_FORMAT_S24_LE:
  503. if (is_secondary(i2s))
  504. mod |= MOD_BLCS_24BIT;
  505. else
  506. mod |= MOD_BLCP_24BIT;
  507. if (is_manager(i2s))
  508. mod |= MOD_BLC_24BIT;
  509. break;
  510. default:
  511. dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
  512. params_format(params));
  513. return -EINVAL;
  514. }
  515. writel(mod, i2s->addr + I2SMOD);
  516. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  517. snd_soc_dai_set_dma_data(dai, substream,
  518. (void *)&i2s->dma_playback);
  519. else
  520. snd_soc_dai_set_dma_data(dai, substream,
  521. (void *)&i2s->dma_capture);
  522. i2s->frmclk = params_rate(params);
  523. return 0;
  524. }
  525. /* We set constraints on the substream acc to the version of I2S */
  526. static int i2s_startup(struct snd_pcm_substream *substream,
  527. struct snd_soc_dai *dai)
  528. {
  529. struct i2s_dai *i2s = to_info(dai);
  530. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  531. unsigned long flags;
  532. spin_lock_irqsave(&lock, flags);
  533. i2s->mode |= DAI_OPENED;
  534. if (is_manager(other))
  535. i2s->mode &= ~DAI_MANAGER;
  536. else
  537. i2s->mode |= DAI_MANAGER;
  538. /* Enforce set_sysclk in Master mode */
  539. i2s->rclk_srcrate = 0;
  540. spin_unlock_irqrestore(&lock, flags);
  541. return 0;
  542. }
  543. static void i2s_shutdown(struct snd_pcm_substream *substream,
  544. struct snd_soc_dai *dai)
  545. {
  546. struct i2s_dai *i2s = to_info(dai);
  547. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  548. unsigned long flags;
  549. spin_lock_irqsave(&lock, flags);
  550. i2s->mode &= ~DAI_OPENED;
  551. i2s->mode &= ~DAI_MANAGER;
  552. if (is_opened(other))
  553. other->mode |= DAI_MANAGER;
  554. /* Reset any constraint on RFS and BFS */
  555. i2s->rfs = 0;
  556. i2s->bfs = 0;
  557. spin_unlock_irqrestore(&lock, flags);
  558. /* Gate CDCLK by default */
  559. if (!is_opened(other))
  560. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  561. 0, SND_SOC_CLOCK_IN);
  562. }
  563. static int config_setup(struct i2s_dai *i2s)
  564. {
  565. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  566. unsigned rfs, bfs, blc;
  567. u32 psr;
  568. blc = get_blc(i2s);
  569. bfs = i2s->bfs;
  570. if (!bfs && other)
  571. bfs = other->bfs;
  572. /* Select least possible multiple(2) if no constraint set */
  573. if (!bfs)
  574. bfs = blc * 2;
  575. rfs = i2s->rfs;
  576. if (!rfs && other)
  577. rfs = other->rfs;
  578. if ((rfs == 256 || rfs == 512) && (blc == 24)) {
  579. dev_err(&i2s->pdev->dev,
  580. "%d-RFS not supported for 24-blc\n", rfs);
  581. return -EINVAL;
  582. }
  583. if (!rfs) {
  584. if (bfs == 16 || bfs == 32)
  585. rfs = 256;
  586. else
  587. rfs = 384;
  588. }
  589. /* If already setup and running */
  590. if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
  591. dev_err(&i2s->pdev->dev,
  592. "%s:%d Other DAI busy\n", __func__, __LINE__);
  593. return -EAGAIN;
  594. }
  595. /* Don't bother RFS, BFS & PSR in Slave mode */
  596. if (is_slave(i2s))
  597. return 0;
  598. set_bfs(i2s, bfs);
  599. set_rfs(i2s, rfs);
  600. if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
  601. psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
  602. writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
  603. dev_dbg(&i2s->pdev->dev,
  604. "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
  605. i2s->rclk_srcrate, psr, rfs, bfs);
  606. }
  607. return 0;
  608. }
  609. static int i2s_trigger(struct snd_pcm_substream *substream,
  610. int cmd, struct snd_soc_dai *dai)
  611. {
  612. int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
  613. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  614. struct i2s_dai *i2s = to_info(rtd->cpu_dai);
  615. unsigned long flags;
  616. switch (cmd) {
  617. case SNDRV_PCM_TRIGGER_START:
  618. case SNDRV_PCM_TRIGGER_RESUME:
  619. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  620. local_irq_save(flags);
  621. if (config_setup(i2s)) {
  622. local_irq_restore(flags);
  623. return -EINVAL;
  624. }
  625. if (capture)
  626. i2s_rxctrl(i2s, 1);
  627. else
  628. i2s_txctrl(i2s, 1);
  629. local_irq_restore(flags);
  630. break;
  631. case SNDRV_PCM_TRIGGER_STOP:
  632. case SNDRV_PCM_TRIGGER_SUSPEND:
  633. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  634. local_irq_save(flags);
  635. if (capture)
  636. i2s_rxctrl(i2s, 0);
  637. else
  638. i2s_txctrl(i2s, 0);
  639. if (capture)
  640. i2s_fifo(i2s, FIC_RXFLUSH);
  641. else
  642. i2s_fifo(i2s, FIC_TXFLUSH);
  643. local_irq_restore(flags);
  644. break;
  645. }
  646. return 0;
  647. }
  648. static int i2s_set_clkdiv(struct snd_soc_dai *dai,
  649. int div_id, int div)
  650. {
  651. struct i2s_dai *i2s = to_info(dai);
  652. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  653. switch (div_id) {
  654. case SAMSUNG_I2S_DIV_BCLK:
  655. if ((any_active(i2s) && div && (get_bfs(i2s) != div))
  656. || (other && other->bfs && (other->bfs != div))) {
  657. dev_err(&i2s->pdev->dev,
  658. "%s:%d Other DAI busy\n", __func__, __LINE__);
  659. return -EAGAIN;
  660. }
  661. i2s->bfs = div;
  662. break;
  663. default:
  664. dev_err(&i2s->pdev->dev,
  665. "Invalid clock divider(%d)\n", div_id);
  666. return -EINVAL;
  667. }
  668. return 0;
  669. }
  670. static snd_pcm_sframes_t
  671. i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
  672. {
  673. struct i2s_dai *i2s = to_info(dai);
  674. u32 reg = readl(i2s->addr + I2SFIC);
  675. snd_pcm_sframes_t delay;
  676. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  677. delay = FIC_RXCOUNT(reg);
  678. else if (is_secondary(i2s))
  679. delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
  680. else
  681. delay = FIC_TXCOUNT(reg);
  682. return delay;
  683. }
  684. #ifdef CONFIG_PM
  685. static int i2s_suspend(struct snd_soc_dai *dai)
  686. {
  687. struct i2s_dai *i2s = to_info(dai);
  688. if (dai->active) {
  689. i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
  690. i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
  691. i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
  692. }
  693. return 0;
  694. }
  695. static int i2s_resume(struct snd_soc_dai *dai)
  696. {
  697. struct i2s_dai *i2s = to_info(dai);
  698. if (dai->active) {
  699. writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
  700. writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
  701. writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
  702. }
  703. return 0;
  704. }
  705. #else
  706. #define i2s_suspend NULL
  707. #define i2s_resume NULL
  708. #endif
  709. static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
  710. {
  711. struct i2s_dai *i2s = to_info(dai);
  712. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  713. if (other && other->clk) /* If this is probe on secondary */
  714. goto probe_exit;
  715. i2s->addr = ioremap(i2s->base, 0x100);
  716. if (i2s->addr == NULL) {
  717. dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
  718. return -ENXIO;
  719. }
  720. i2s->clk = clk_get(&i2s->pdev->dev, "iis");
  721. if (IS_ERR(i2s->clk)) {
  722. dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
  723. iounmap(i2s->addr);
  724. return -ENOENT;
  725. }
  726. clk_enable(i2s->clk);
  727. if (other) {
  728. other->addr = i2s->addr;
  729. other->clk = i2s->clk;
  730. }
  731. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  732. writel(CON_RSTCLR, i2s->addr + I2SCON);
  733. if (i2s->quirks & QUIRK_SEC_DAI)
  734. idma_reg_addr_init((void *)i2s->addr,
  735. i2s->sec_dai->idma_playback.dma_addr);
  736. probe_exit:
  737. /* Reset any constraint on RFS and BFS */
  738. i2s->rfs = 0;
  739. i2s->bfs = 0;
  740. i2s_txctrl(i2s, 0);
  741. i2s_rxctrl(i2s, 0);
  742. i2s_fifo(i2s, FIC_TXFLUSH);
  743. i2s_fifo(other, FIC_TXFLUSH);
  744. i2s_fifo(i2s, FIC_RXFLUSH);
  745. /* Gate CDCLK by default */
  746. if (!is_opened(other))
  747. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  748. 0, SND_SOC_CLOCK_IN);
  749. return 0;
  750. }
  751. static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
  752. {
  753. struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
  754. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  755. if (!other || !other->clk) {
  756. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  757. writel(0, i2s->addr + I2SCON);
  758. clk_disable(i2s->clk);
  759. clk_put(i2s->clk);
  760. iounmap(i2s->addr);
  761. }
  762. i2s->clk = NULL;
  763. return 0;
  764. }
  765. static struct snd_soc_dai_ops samsung_i2s_dai_ops = {
  766. .trigger = i2s_trigger,
  767. .hw_params = i2s_hw_params,
  768. .set_fmt = i2s_set_fmt,
  769. .set_clkdiv = i2s_set_clkdiv,
  770. .set_sysclk = i2s_set_sysclk,
  771. .startup = i2s_startup,
  772. .shutdown = i2s_shutdown,
  773. .delay = i2s_delay,
  774. };
  775. #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
  776. #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
  777. SNDRV_PCM_FMTBIT_S16_LE | \
  778. SNDRV_PCM_FMTBIT_S24_LE)
  779. static __devinit
  780. struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
  781. {
  782. struct i2s_dai *i2s;
  783. i2s = kzalloc(sizeof(struct i2s_dai), GFP_KERNEL);
  784. if (i2s == NULL)
  785. return NULL;
  786. i2s->pdev = pdev;
  787. i2s->pri_dai = NULL;
  788. i2s->sec_dai = NULL;
  789. i2s->i2s_dai_drv.symmetric_rates = 1;
  790. i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
  791. i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
  792. i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
  793. i2s->i2s_dai_drv.suspend = i2s_suspend;
  794. i2s->i2s_dai_drv.resume = i2s_resume;
  795. i2s->i2s_dai_drv.playback.channels_min = 2;
  796. i2s->i2s_dai_drv.playback.channels_max = 2;
  797. i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
  798. i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
  799. if (!sec) {
  800. i2s->i2s_dai_drv.capture.channels_min = 2;
  801. i2s->i2s_dai_drv.capture.channels_max = 2;
  802. i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
  803. i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
  804. } else { /* Create a new platform_device for Secondary */
  805. i2s->pdev = platform_device_register_resndata(NULL,
  806. pdev->name, pdev->id + SAMSUNG_I2S_SECOFF,
  807. NULL, 0, NULL, 0);
  808. if (IS_ERR(i2s->pdev)) {
  809. kfree(i2s);
  810. return NULL;
  811. }
  812. }
  813. /* Pre-assign snd_soc_dai_set_drvdata */
  814. dev_set_drvdata(&i2s->pdev->dev, i2s);
  815. return i2s;
  816. }
  817. static __devinit int samsung_i2s_probe(struct platform_device *pdev)
  818. {
  819. u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan;
  820. struct i2s_dai *pri_dai, *sec_dai = NULL;
  821. struct s3c_audio_pdata *i2s_pdata;
  822. struct samsung_i2s *i2s_cfg;
  823. struct resource *res;
  824. u32 regs_base, quirks;
  825. int ret = 0;
  826. /* Call during Seconday interface registration */
  827. if (pdev->id >= SAMSUNG_I2S_SECOFF) {
  828. sec_dai = dev_get_drvdata(&pdev->dev);
  829. snd_soc_register_dai(&sec_dai->pdev->dev,
  830. &sec_dai->i2s_dai_drv);
  831. return 0;
  832. }
  833. i2s_pdata = pdev->dev.platform_data;
  834. if (i2s_pdata == NULL) {
  835. dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
  836. return -EINVAL;
  837. }
  838. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  839. if (!res) {
  840. dev_err(&pdev->dev, "Unable to get I2S-TX dma resource\n");
  841. return -ENXIO;
  842. }
  843. dma_pl_chan = res->start;
  844. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  845. if (!res) {
  846. dev_err(&pdev->dev, "Unable to get I2S-RX dma resource\n");
  847. return -ENXIO;
  848. }
  849. dma_cp_chan = res->start;
  850. res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
  851. if (res)
  852. dma_pl_sec_chan = res->start;
  853. else
  854. dma_pl_sec_chan = 0;
  855. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  856. if (!res) {
  857. dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
  858. return -ENXIO;
  859. }
  860. if (!request_mem_region(res->start, resource_size(res),
  861. "samsung-i2s")) {
  862. dev_err(&pdev->dev, "Unable to request SFR region\n");
  863. return -EBUSY;
  864. }
  865. regs_base = res->start;
  866. i2s_cfg = &i2s_pdata->type.i2s;
  867. quirks = i2s_cfg->quirks;
  868. pri_dai = i2s_alloc_dai(pdev, false);
  869. if (!pri_dai) {
  870. dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
  871. ret = -ENOMEM;
  872. goto err1;
  873. }
  874. pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
  875. pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
  876. pri_dai->dma_playback.client =
  877. (struct s3c2410_dma_client *)&pri_dai->dma_playback;
  878. pri_dai->dma_capture.client =
  879. (struct s3c2410_dma_client *)&pri_dai->dma_capture;
  880. pri_dai->dma_playback.channel = dma_pl_chan;
  881. pri_dai->dma_capture.channel = dma_cp_chan;
  882. pri_dai->src_clk = i2s_cfg->src_clk;
  883. pri_dai->dma_playback.dma_size = 4;
  884. pri_dai->dma_capture.dma_size = 4;
  885. pri_dai->base = regs_base;
  886. pri_dai->quirks = quirks;
  887. if (quirks & QUIRK_PRI_6CHAN)
  888. pri_dai->i2s_dai_drv.playback.channels_max = 6;
  889. if (quirks & QUIRK_SEC_DAI) {
  890. sec_dai = i2s_alloc_dai(pdev, true);
  891. if (!sec_dai) {
  892. dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
  893. ret = -ENOMEM;
  894. goto err2;
  895. }
  896. sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
  897. sec_dai->dma_playback.client =
  898. (struct s3c2410_dma_client *)&sec_dai->dma_playback;
  899. /* Use iDMA always if SysDMA not provided */
  900. sec_dai->dma_playback.channel = dma_pl_sec_chan ? : -1;
  901. sec_dai->src_clk = i2s_cfg->src_clk;
  902. sec_dai->dma_playback.dma_size = 4;
  903. sec_dai->base = regs_base;
  904. sec_dai->quirks = quirks;
  905. sec_dai->idma_playback.dma_addr = i2s_cfg->idma_addr;
  906. sec_dai->pri_dai = pri_dai;
  907. pri_dai->sec_dai = sec_dai;
  908. }
  909. if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
  910. dev_err(&pdev->dev, "Unable to configure gpio\n");
  911. ret = -EINVAL;
  912. goto err3;
  913. }
  914. snd_soc_register_dai(&pri_dai->pdev->dev, &pri_dai->i2s_dai_drv);
  915. return 0;
  916. err3:
  917. kfree(sec_dai);
  918. err2:
  919. kfree(pri_dai);
  920. err1:
  921. release_mem_region(regs_base, resource_size(res));
  922. return ret;
  923. }
  924. static __devexit int samsung_i2s_remove(struct platform_device *pdev)
  925. {
  926. struct i2s_dai *i2s, *other;
  927. i2s = dev_get_drvdata(&pdev->dev);
  928. other = i2s->pri_dai ? : i2s->sec_dai;
  929. if (other) {
  930. other->pri_dai = NULL;
  931. other->sec_dai = NULL;
  932. } else {
  933. struct resource *res;
  934. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  935. if (res)
  936. release_mem_region(res->start, resource_size(res));
  937. }
  938. i2s->pri_dai = NULL;
  939. i2s->sec_dai = NULL;
  940. kfree(i2s);
  941. snd_soc_unregister_dai(&pdev->dev);
  942. return 0;
  943. }
  944. static struct platform_driver samsung_i2s_driver = {
  945. .probe = samsung_i2s_probe,
  946. .remove = samsung_i2s_remove,
  947. .driver = {
  948. .name = "samsung-i2s",
  949. .owner = THIS_MODULE,
  950. },
  951. };
  952. static int __init samsung_i2s_init(void)
  953. {
  954. return platform_driver_register(&samsung_i2s_driver);
  955. }
  956. module_init(samsung_i2s_init);
  957. static void __exit samsung_i2s_exit(void)
  958. {
  959. platform_driver_unregister(&samsung_i2s_driver);
  960. }
  961. module_exit(samsung_i2s_exit);
  962. /* Module information */
  963. MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>");
  964. MODULE_DESCRIPTION("Samsung I2S Interface");
  965. MODULE_ALIAS("platform:samsung-i2s");
  966. MODULE_LICENSE("GPL");