main.c 58 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. enum ath9k_power_mode mode;
  100. unsigned long flags;
  101. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  102. if (--sc->ps_usecount != 0)
  103. goto unlock;
  104. if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
  105. mode = ATH9K_PM_FULL_SLEEP;
  106. else if (sc->ps_enabled &&
  107. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  108. PS_WAIT_FOR_CAB |
  109. PS_WAIT_FOR_PSPOLL_DATA |
  110. PS_WAIT_FOR_TX_ACK)))
  111. mode = ATH9K_PM_NETWORK_SLEEP;
  112. else
  113. goto unlock;
  114. spin_lock(&common->cc_lock);
  115. ath_hw_cycle_counters_update(common);
  116. spin_unlock(&common->cc_lock);
  117. ath9k_hw_setpower(sc->sc_ah, mode);
  118. unlock:
  119. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  120. }
  121. void ath_start_ani(struct ath_common *common)
  122. {
  123. struct ath_hw *ah = common->ah;
  124. unsigned long timestamp = jiffies_to_msecs(jiffies);
  125. struct ath_softc *sc = (struct ath_softc *) common->priv;
  126. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  127. return;
  128. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  129. return;
  130. common->ani.longcal_timer = timestamp;
  131. common->ani.shortcal_timer = timestamp;
  132. common->ani.checkani_timer = timestamp;
  133. mod_timer(&common->ani.timer,
  134. jiffies +
  135. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  136. }
  137. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  138. {
  139. struct ath_hw *ah = sc->sc_ah;
  140. struct ath9k_channel *chan = &ah->channels[channel];
  141. struct survey_info *survey = &sc->survey[channel];
  142. if (chan->noisefloor) {
  143. survey->filled |= SURVEY_INFO_NOISE_DBM;
  144. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  145. }
  146. }
  147. /*
  148. * Updates the survey statistics and returns the busy time since last
  149. * update in %, if the measurement duration was long enough for the
  150. * result to be useful, -1 otherwise.
  151. */
  152. static int ath_update_survey_stats(struct ath_softc *sc)
  153. {
  154. struct ath_hw *ah = sc->sc_ah;
  155. struct ath_common *common = ath9k_hw_common(ah);
  156. int pos = ah->curchan - &ah->channels[0];
  157. struct survey_info *survey = &sc->survey[pos];
  158. struct ath_cycle_counters *cc = &common->cc_survey;
  159. unsigned int div = common->clockrate * 1000;
  160. int ret = 0;
  161. if (!ah->curchan)
  162. return -1;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. if (cc->cycles < div)
  176. return -1;
  177. if (cc->cycles > 0)
  178. ret = cc->rx_busy * 100 / cc->cycles;
  179. memset(cc, 0, sizeof(*cc));
  180. ath_update_survey_nf(sc, pos);
  181. return ret;
  182. }
  183. static void __ath_cancel_work(struct ath_softc *sc)
  184. {
  185. cancel_work_sync(&sc->paprd_work);
  186. cancel_work_sync(&sc->hw_check_work);
  187. cancel_delayed_work_sync(&sc->tx_complete_work);
  188. cancel_delayed_work_sync(&sc->hw_pll_work);
  189. }
  190. static void ath_cancel_work(struct ath_softc *sc)
  191. {
  192. __ath_cancel_work(sc);
  193. cancel_work_sync(&sc->hw_reset_work);
  194. }
  195. static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  196. {
  197. struct ath_hw *ah = sc->sc_ah;
  198. struct ath_common *common = ath9k_hw_common(ah);
  199. bool ret;
  200. ieee80211_stop_queues(sc->hw);
  201. sc->hw_busy_count = 0;
  202. del_timer_sync(&common->ani.timer);
  203. ath9k_debug_samp_bb_mac(sc);
  204. ath9k_hw_disable_interrupts(ah);
  205. ret = ath_drain_all_txq(sc, retry_tx);
  206. if (!ath_stoprecv(sc))
  207. ret = false;
  208. if (!flush) {
  209. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  210. ath_rx_tasklet(sc, 1, true);
  211. ath_rx_tasklet(sc, 1, false);
  212. } else {
  213. ath_flushrecv(sc);
  214. }
  215. return ret;
  216. }
  217. static bool ath_complete_reset(struct ath_softc *sc, bool start)
  218. {
  219. struct ath_hw *ah = sc->sc_ah;
  220. struct ath_common *common = ath9k_hw_common(ah);
  221. if (ath_startrecv(sc) != 0) {
  222. ath_err(common, "Unable to restart recv logic\n");
  223. return false;
  224. }
  225. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  226. sc->config.txpowlimit, &sc->curtxpow);
  227. ath9k_hw_set_interrupts(ah);
  228. ath9k_hw_enable_interrupts(ah);
  229. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
  230. if (sc->sc_flags & SC_OP_BEACONS)
  231. ath_set_beacon(sc);
  232. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  233. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  234. if (!common->disable_ani)
  235. ath_start_ani(common);
  236. }
  237. if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
  238. struct ath_hw_antcomb_conf div_ant_conf;
  239. u8 lna_conf;
  240. ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
  241. if (sc->ant_rx == 1)
  242. lna_conf = ATH_ANT_DIV_COMB_LNA1;
  243. else
  244. lna_conf = ATH_ANT_DIV_COMB_LNA2;
  245. div_ant_conf.main_lna_conf = lna_conf;
  246. div_ant_conf.alt_lna_conf = lna_conf;
  247. ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
  248. }
  249. ieee80211_wake_queues(sc->hw);
  250. return true;
  251. }
  252. static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
  253. bool retry_tx)
  254. {
  255. struct ath_hw *ah = sc->sc_ah;
  256. struct ath_common *common = ath9k_hw_common(ah);
  257. struct ath9k_hw_cal_data *caldata = NULL;
  258. bool fastcc = true;
  259. bool flush = false;
  260. int r;
  261. __ath_cancel_work(sc);
  262. spin_lock_bh(&sc->sc_pcu_lock);
  263. if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
  264. fastcc = false;
  265. caldata = &sc->caldata;
  266. }
  267. if (!hchan) {
  268. fastcc = false;
  269. flush = true;
  270. hchan = ah->curchan;
  271. }
  272. if (!ath_prepare_reset(sc, retry_tx, flush))
  273. fastcc = false;
  274. ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
  275. hchan->channel, IS_CHAN_HT40(hchan), fastcc);
  276. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  277. if (r) {
  278. ath_err(common,
  279. "Unable to reset channel, reset status %d\n", r);
  280. goto out;
  281. }
  282. if (!ath_complete_reset(sc, true))
  283. r = -EIO;
  284. out:
  285. spin_unlock_bh(&sc->sc_pcu_lock);
  286. return r;
  287. }
  288. /*
  289. * Set/change channels. If the channel is really being changed, it's done
  290. * by reseting the chip. To accomplish this we must first cleanup any pending
  291. * DMA, then restart stuff.
  292. */
  293. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  294. struct ath9k_channel *hchan)
  295. {
  296. int r;
  297. if (sc->sc_flags & SC_OP_INVALID)
  298. return -EIO;
  299. r = ath_reset_internal(sc, hchan, false);
  300. return r;
  301. }
  302. static void ath_paprd_activate(struct ath_softc *sc)
  303. {
  304. struct ath_hw *ah = sc->sc_ah;
  305. struct ath9k_hw_cal_data *caldata = ah->caldata;
  306. int chain;
  307. if (!caldata || !caldata->paprd_done)
  308. return;
  309. ath9k_ps_wakeup(sc);
  310. ar9003_paprd_enable(ah, false);
  311. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  312. if (!(ah->txchainmask & BIT(chain)))
  313. continue;
  314. ar9003_paprd_populate_single_table(ah, caldata, chain);
  315. }
  316. ar9003_paprd_enable(ah, true);
  317. ath9k_ps_restore(sc);
  318. }
  319. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  320. {
  321. struct ieee80211_hw *hw = sc->hw;
  322. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  323. struct ath_hw *ah = sc->sc_ah;
  324. struct ath_common *common = ath9k_hw_common(ah);
  325. struct ath_tx_control txctl;
  326. int time_left;
  327. memset(&txctl, 0, sizeof(txctl));
  328. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  329. memset(tx_info, 0, sizeof(*tx_info));
  330. tx_info->band = hw->conf.channel->band;
  331. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  332. tx_info->control.rates[0].idx = 0;
  333. tx_info->control.rates[0].count = 1;
  334. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  335. tx_info->control.rates[1].idx = -1;
  336. init_completion(&sc->paprd_complete);
  337. txctl.paprd = BIT(chain);
  338. if (ath_tx_start(hw, skb, &txctl) != 0) {
  339. ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
  340. dev_kfree_skb_any(skb);
  341. return false;
  342. }
  343. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  344. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  345. if (!time_left)
  346. ath_dbg(common, CALIBRATE,
  347. "Timeout waiting for paprd training on TX chain %d\n",
  348. chain);
  349. return !!time_left;
  350. }
  351. void ath_paprd_calibrate(struct work_struct *work)
  352. {
  353. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  354. struct ieee80211_hw *hw = sc->hw;
  355. struct ath_hw *ah = sc->sc_ah;
  356. struct ieee80211_hdr *hdr;
  357. struct sk_buff *skb = NULL;
  358. struct ath9k_hw_cal_data *caldata = ah->caldata;
  359. struct ath_common *common = ath9k_hw_common(ah);
  360. int ftype;
  361. int chain_ok = 0;
  362. int chain;
  363. int len = 1800;
  364. if (!caldata)
  365. return;
  366. ath9k_ps_wakeup(sc);
  367. if (ar9003_paprd_init_table(ah) < 0)
  368. goto fail_paprd;
  369. skb = alloc_skb(len, GFP_KERNEL);
  370. if (!skb)
  371. goto fail_paprd;
  372. skb_put(skb, len);
  373. memset(skb->data, 0, len);
  374. hdr = (struct ieee80211_hdr *)skb->data;
  375. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  376. hdr->frame_control = cpu_to_le16(ftype);
  377. hdr->duration_id = cpu_to_le16(10);
  378. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  379. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  380. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  381. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  382. if (!(ah->txchainmask & BIT(chain)))
  383. continue;
  384. chain_ok = 0;
  385. ath_dbg(common, CALIBRATE,
  386. "Sending PAPRD frame for thermal measurement on chain %d\n",
  387. chain);
  388. if (!ath_paprd_send_frame(sc, skb, chain))
  389. goto fail_paprd;
  390. ar9003_paprd_setup_gain_table(ah, chain);
  391. ath_dbg(common, CALIBRATE,
  392. "Sending PAPRD training frame on chain %d\n", chain);
  393. if (!ath_paprd_send_frame(sc, skb, chain))
  394. goto fail_paprd;
  395. if (!ar9003_paprd_is_done(ah)) {
  396. ath_dbg(common, CALIBRATE,
  397. "PAPRD not yet done on chain %d\n", chain);
  398. break;
  399. }
  400. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  401. ath_dbg(common, CALIBRATE,
  402. "PAPRD create curve failed on chain %d\n",
  403. chain);
  404. break;
  405. }
  406. chain_ok = 1;
  407. }
  408. kfree_skb(skb);
  409. if (chain_ok) {
  410. caldata->paprd_done = true;
  411. ath_paprd_activate(sc);
  412. }
  413. fail_paprd:
  414. ath9k_ps_restore(sc);
  415. }
  416. /*
  417. * This routine performs the periodic noise floor calibration function
  418. * that is used to adjust and optimize the chip performance. This
  419. * takes environmental changes (location, temperature) into account.
  420. * When the task is complete, it reschedules itself depending on the
  421. * appropriate interval that was calculated.
  422. */
  423. void ath_ani_calibrate(unsigned long data)
  424. {
  425. struct ath_softc *sc = (struct ath_softc *)data;
  426. struct ath_hw *ah = sc->sc_ah;
  427. struct ath_common *common = ath9k_hw_common(ah);
  428. bool longcal = false;
  429. bool shortcal = false;
  430. bool aniflag = false;
  431. unsigned int timestamp = jiffies_to_msecs(jiffies);
  432. u32 cal_interval, short_cal_interval, long_cal_interval;
  433. unsigned long flags;
  434. if (ah->caldata && ah->caldata->nfcal_interference)
  435. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  436. else
  437. long_cal_interval = ATH_LONG_CALINTERVAL;
  438. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  439. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  440. /* Only calibrate if awake */
  441. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  442. goto set_timer;
  443. ath9k_ps_wakeup(sc);
  444. /* Long calibration runs independently of short calibration. */
  445. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  446. longcal = true;
  447. common->ani.longcal_timer = timestamp;
  448. }
  449. /* Short calibration applies only while caldone is false */
  450. if (!common->ani.caldone) {
  451. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  452. shortcal = true;
  453. common->ani.shortcal_timer = timestamp;
  454. common->ani.resetcal_timer = timestamp;
  455. }
  456. } else {
  457. if ((timestamp - common->ani.resetcal_timer) >=
  458. ATH_RESTART_CALINTERVAL) {
  459. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  460. if (common->ani.caldone)
  461. common->ani.resetcal_timer = timestamp;
  462. }
  463. }
  464. /* Verify whether we must check ANI */
  465. if (sc->sc_ah->config.enable_ani
  466. && (timestamp - common->ani.checkani_timer) >=
  467. ah->config.ani_poll_interval) {
  468. aniflag = true;
  469. common->ani.checkani_timer = timestamp;
  470. }
  471. /* Call ANI routine if necessary */
  472. if (aniflag) {
  473. spin_lock_irqsave(&common->cc_lock, flags);
  474. ath9k_hw_ani_monitor(ah, ah->curchan);
  475. ath_update_survey_stats(sc);
  476. spin_unlock_irqrestore(&common->cc_lock, flags);
  477. }
  478. /* Perform calibration if necessary */
  479. if (longcal || shortcal) {
  480. common->ani.caldone =
  481. ath9k_hw_calibrate(ah, ah->curchan,
  482. ah->rxchainmask, longcal);
  483. }
  484. ath_dbg(common, ANI,
  485. "Calibration @%lu finished: %s %s %s, caldone: %s\n",
  486. jiffies,
  487. longcal ? "long" : "", shortcal ? "short" : "",
  488. aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
  489. ath9k_ps_restore(sc);
  490. set_timer:
  491. /*
  492. * Set timer interval based on previous results.
  493. * The interval must be the shortest necessary to satisfy ANI,
  494. * short calibration and long calibration.
  495. */
  496. ath9k_debug_samp_bb_mac(sc);
  497. cal_interval = ATH_LONG_CALINTERVAL;
  498. if (sc->sc_ah->config.enable_ani)
  499. cal_interval = min(cal_interval,
  500. (u32)ah->config.ani_poll_interval);
  501. if (!common->ani.caldone)
  502. cal_interval = min(cal_interval, (u32)short_cal_interval);
  503. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  504. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  505. if (!ah->caldata->paprd_done)
  506. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  507. else if (!ah->paprd_table_write_done)
  508. ath_paprd_activate(sc);
  509. }
  510. }
  511. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
  512. struct ieee80211_vif *vif)
  513. {
  514. struct ath_node *an;
  515. an = (struct ath_node *)sta->drv_priv;
  516. #ifdef CONFIG_ATH9K_DEBUGFS
  517. spin_lock(&sc->nodes_lock);
  518. list_add(&an->list, &sc->nodes);
  519. spin_unlock(&sc->nodes_lock);
  520. #endif
  521. an->sta = sta;
  522. an->vif = vif;
  523. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
  524. ath_tx_node_init(sc, an);
  525. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  526. sta->ht_cap.ampdu_factor);
  527. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  528. }
  529. }
  530. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  531. {
  532. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  533. #ifdef CONFIG_ATH9K_DEBUGFS
  534. spin_lock(&sc->nodes_lock);
  535. list_del(&an->list);
  536. spin_unlock(&sc->nodes_lock);
  537. an->sta = NULL;
  538. #endif
  539. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  540. ath_tx_node_cleanup(sc, an);
  541. }
  542. void ath9k_tasklet(unsigned long data)
  543. {
  544. struct ath_softc *sc = (struct ath_softc *)data;
  545. struct ath_hw *ah = sc->sc_ah;
  546. struct ath_common *common = ath9k_hw_common(ah);
  547. u32 status = sc->intrstatus;
  548. u32 rxmask;
  549. ath9k_ps_wakeup(sc);
  550. spin_lock(&sc->sc_pcu_lock);
  551. if ((status & ATH9K_INT_FATAL) ||
  552. (status & ATH9K_INT_BB_WATCHDOG)) {
  553. #ifdef CONFIG_ATH9K_DEBUGFS
  554. enum ath_reset_type type;
  555. if (status & ATH9K_INT_FATAL)
  556. type = RESET_TYPE_FATAL_INT;
  557. else
  558. type = RESET_TYPE_BB_WATCHDOG;
  559. RESET_STAT_INC(sc, type);
  560. #endif
  561. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  562. goto out;
  563. }
  564. /*
  565. * Only run the baseband hang check if beacons stop working in AP or
  566. * IBSS mode, because it has a high false positive rate. For station
  567. * mode it should not be necessary, since the upper layers will detect
  568. * this through a beacon miss automatically and the following channel
  569. * change will trigger a hardware reset anyway
  570. */
  571. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  572. !ath9k_hw_check_alive(ah))
  573. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  574. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  575. /*
  576. * TSF sync does not look correct; remain awake to sync with
  577. * the next Beacon.
  578. */
  579. ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
  580. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  581. }
  582. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  583. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  584. ATH9K_INT_RXORN);
  585. else
  586. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  587. if (status & rxmask) {
  588. /* Check for high priority Rx first */
  589. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  590. (status & ATH9K_INT_RXHP))
  591. ath_rx_tasklet(sc, 0, true);
  592. ath_rx_tasklet(sc, 0, false);
  593. }
  594. if (status & ATH9K_INT_TX) {
  595. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  596. ath_tx_edma_tasklet(sc);
  597. else
  598. ath_tx_tasklet(sc);
  599. }
  600. ath9k_btcoex_handle_interrupt(sc, status);
  601. out:
  602. /* re-enable hardware interrupt */
  603. ath9k_hw_enable_interrupts(ah);
  604. spin_unlock(&sc->sc_pcu_lock);
  605. ath9k_ps_restore(sc);
  606. }
  607. irqreturn_t ath_isr(int irq, void *dev)
  608. {
  609. #define SCHED_INTR ( \
  610. ATH9K_INT_FATAL | \
  611. ATH9K_INT_BB_WATCHDOG | \
  612. ATH9K_INT_RXORN | \
  613. ATH9K_INT_RXEOL | \
  614. ATH9K_INT_RX | \
  615. ATH9K_INT_RXLP | \
  616. ATH9K_INT_RXHP | \
  617. ATH9K_INT_TX | \
  618. ATH9K_INT_BMISS | \
  619. ATH9K_INT_CST | \
  620. ATH9K_INT_TSFOOR | \
  621. ATH9K_INT_GENTIMER | \
  622. ATH9K_INT_MCI)
  623. struct ath_softc *sc = dev;
  624. struct ath_hw *ah = sc->sc_ah;
  625. struct ath_common *common = ath9k_hw_common(ah);
  626. enum ath9k_int status;
  627. bool sched = false;
  628. /*
  629. * The hardware is not ready/present, don't
  630. * touch anything. Note this can happen early
  631. * on if the IRQ is shared.
  632. */
  633. if (sc->sc_flags & SC_OP_INVALID)
  634. return IRQ_NONE;
  635. /* shared irq, not for us */
  636. if (!ath9k_hw_intrpend(ah))
  637. return IRQ_NONE;
  638. /*
  639. * Figure out the reason(s) for the interrupt. Note
  640. * that the hal returns a pseudo-ISR that may include
  641. * bits we haven't explicitly enabled so we mask the
  642. * value to insure we only process bits we requested.
  643. */
  644. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  645. status &= ah->imask; /* discard unasked-for bits */
  646. /*
  647. * If there are no status bits set, then this interrupt was not
  648. * for me (should have been caught above).
  649. */
  650. if (!status)
  651. return IRQ_NONE;
  652. /* Cache the status */
  653. sc->intrstatus = status;
  654. if (status & SCHED_INTR)
  655. sched = true;
  656. /*
  657. * If a FATAL or RXORN interrupt is received, we have to reset the
  658. * chip immediately.
  659. */
  660. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  661. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  662. goto chip_reset;
  663. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  664. (status & ATH9K_INT_BB_WATCHDOG)) {
  665. spin_lock(&common->cc_lock);
  666. ath_hw_cycle_counters_update(common);
  667. ar9003_hw_bb_watchdog_dbg_info(ah);
  668. spin_unlock(&common->cc_lock);
  669. goto chip_reset;
  670. }
  671. if (status & ATH9K_INT_SWBA)
  672. tasklet_schedule(&sc->bcon_tasklet);
  673. if (status & ATH9K_INT_TXURN)
  674. ath9k_hw_updatetxtriglevel(ah, true);
  675. if (status & ATH9K_INT_RXEOL) {
  676. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  677. ath9k_hw_set_interrupts(ah);
  678. }
  679. if (status & ATH9K_INT_MIB) {
  680. /*
  681. * Disable interrupts until we service the MIB
  682. * interrupt; otherwise it will continue to
  683. * fire.
  684. */
  685. ath9k_hw_disable_interrupts(ah);
  686. /*
  687. * Let the hal handle the event. We assume
  688. * it will clear whatever condition caused
  689. * the interrupt.
  690. */
  691. spin_lock(&common->cc_lock);
  692. ath9k_hw_proc_mib_event(ah);
  693. spin_unlock(&common->cc_lock);
  694. ath9k_hw_enable_interrupts(ah);
  695. }
  696. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  697. if (status & ATH9K_INT_TIM_TIMER) {
  698. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  699. goto chip_reset;
  700. /* Clear RxAbort bit so that we can
  701. * receive frames */
  702. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  703. ath9k_hw_setrxabort(sc->sc_ah, 0);
  704. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  705. }
  706. chip_reset:
  707. ath_debug_stat_interrupt(sc, status);
  708. if (sched) {
  709. /* turn off every interrupt */
  710. ath9k_hw_disable_interrupts(ah);
  711. tasklet_schedule(&sc->intr_tq);
  712. }
  713. return IRQ_HANDLED;
  714. #undef SCHED_INTR
  715. }
  716. static int ath_reset(struct ath_softc *sc, bool retry_tx)
  717. {
  718. int r;
  719. ath9k_ps_wakeup(sc);
  720. r = ath_reset_internal(sc, NULL, retry_tx);
  721. if (retry_tx) {
  722. int i;
  723. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  724. if (ATH_TXQ_SETUP(sc, i)) {
  725. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  726. ath_txq_schedule(sc, &sc->tx.txq[i]);
  727. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  728. }
  729. }
  730. }
  731. ath9k_ps_restore(sc);
  732. return r;
  733. }
  734. void ath_reset_work(struct work_struct *work)
  735. {
  736. struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
  737. ath_reset(sc, true);
  738. }
  739. void ath_hw_check(struct work_struct *work)
  740. {
  741. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  742. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  743. unsigned long flags;
  744. int busy;
  745. ath9k_ps_wakeup(sc);
  746. if (ath9k_hw_check_alive(sc->sc_ah))
  747. goto out;
  748. spin_lock_irqsave(&common->cc_lock, flags);
  749. busy = ath_update_survey_stats(sc);
  750. spin_unlock_irqrestore(&common->cc_lock, flags);
  751. ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
  752. busy, sc->hw_busy_count + 1);
  753. if (busy >= 99) {
  754. if (++sc->hw_busy_count >= 3) {
  755. RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
  756. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  757. }
  758. } else if (busy >= 0)
  759. sc->hw_busy_count = 0;
  760. out:
  761. ath9k_ps_restore(sc);
  762. }
  763. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  764. {
  765. static int count;
  766. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  767. if (pll_sqsum >= 0x40000) {
  768. count++;
  769. if (count == 3) {
  770. /* Rx is hung for more than 500ms. Reset it */
  771. ath_dbg(common, RESET, "Possible RX hang, resetting\n");
  772. RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
  773. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  774. count = 0;
  775. }
  776. } else
  777. count = 0;
  778. }
  779. void ath_hw_pll_work(struct work_struct *work)
  780. {
  781. struct ath_softc *sc = container_of(work, struct ath_softc,
  782. hw_pll_work.work);
  783. u32 pll_sqsum;
  784. if (AR_SREV_9485(sc->sc_ah)) {
  785. ath9k_ps_wakeup(sc);
  786. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  787. ath9k_ps_restore(sc);
  788. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  789. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  790. }
  791. }
  792. /**********************/
  793. /* mac80211 callbacks */
  794. /**********************/
  795. static int ath9k_start(struct ieee80211_hw *hw)
  796. {
  797. struct ath_softc *sc = hw->priv;
  798. struct ath_hw *ah = sc->sc_ah;
  799. struct ath_common *common = ath9k_hw_common(ah);
  800. struct ieee80211_channel *curchan = hw->conf.channel;
  801. struct ath9k_channel *init_channel;
  802. int r;
  803. ath_dbg(common, CONFIG,
  804. "Starting driver with initial channel: %d MHz\n",
  805. curchan->center_freq);
  806. ath9k_ps_wakeup(sc);
  807. mutex_lock(&sc->mutex);
  808. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  809. /* Reset SERDES registers */
  810. ath9k_hw_configpcipowersave(ah, false);
  811. /*
  812. * The basic interface to setting the hardware in a good
  813. * state is ``reset''. On return the hardware is known to
  814. * be powered up and with interrupts disabled. This must
  815. * be followed by initialization of the appropriate bits
  816. * and then setup of the interrupt mask.
  817. */
  818. spin_lock_bh(&sc->sc_pcu_lock);
  819. atomic_set(&ah->intr_ref_cnt, -1);
  820. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  821. if (r) {
  822. ath_err(common,
  823. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  824. r, curchan->center_freq);
  825. spin_unlock_bh(&sc->sc_pcu_lock);
  826. goto mutex_unlock;
  827. }
  828. /* Setup our intr mask. */
  829. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  830. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  831. ATH9K_INT_GLOBAL;
  832. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  833. ah->imask |= ATH9K_INT_RXHP |
  834. ATH9K_INT_RXLP |
  835. ATH9K_INT_BB_WATCHDOG;
  836. else
  837. ah->imask |= ATH9K_INT_RX;
  838. ah->imask |= ATH9K_INT_GTT;
  839. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  840. ah->imask |= ATH9K_INT_CST;
  841. if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
  842. ah->imask |= ATH9K_INT_MCI;
  843. sc->sc_flags &= ~SC_OP_INVALID;
  844. sc->sc_ah->is_monitoring = false;
  845. if (!ath_complete_reset(sc, false)) {
  846. r = -EIO;
  847. spin_unlock_bh(&sc->sc_pcu_lock);
  848. goto mutex_unlock;
  849. }
  850. if (ah->led_pin >= 0) {
  851. ath9k_hw_cfg_output(ah, ah->led_pin,
  852. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  853. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  854. }
  855. /*
  856. * Reset key cache to sane defaults (all entries cleared) instead of
  857. * semi-random values after suspend/resume.
  858. */
  859. ath9k_cmn_init_crypto(sc->sc_ah);
  860. spin_unlock_bh(&sc->sc_pcu_lock);
  861. ath9k_start_btcoex(sc);
  862. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  863. common->bus_ops->extn_synch_en(common);
  864. mutex_unlock:
  865. mutex_unlock(&sc->mutex);
  866. ath9k_ps_restore(sc);
  867. return r;
  868. }
  869. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  870. {
  871. struct ath_softc *sc = hw->priv;
  872. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  873. struct ath_tx_control txctl;
  874. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  875. if (sc->ps_enabled) {
  876. /*
  877. * mac80211 does not set PM field for normal data frames, so we
  878. * need to update that based on the current PS mode.
  879. */
  880. if (ieee80211_is_data(hdr->frame_control) &&
  881. !ieee80211_is_nullfunc(hdr->frame_control) &&
  882. !ieee80211_has_pm(hdr->frame_control)) {
  883. ath_dbg(common, PS,
  884. "Add PM=1 for a TX frame while in PS mode\n");
  885. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  886. }
  887. }
  888. /*
  889. * Cannot tx while the hardware is in full sleep, it first needs a full
  890. * chip reset to recover from that
  891. */
  892. if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
  893. goto exit;
  894. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  895. /*
  896. * We are using PS-Poll and mac80211 can request TX while in
  897. * power save mode. Need to wake up hardware for the TX to be
  898. * completed and if needed, also for RX of buffered frames.
  899. */
  900. ath9k_ps_wakeup(sc);
  901. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  902. ath9k_hw_setrxabort(sc->sc_ah, 0);
  903. if (ieee80211_is_pspoll(hdr->frame_control)) {
  904. ath_dbg(common, PS,
  905. "Sending PS-Poll to pick a buffered frame\n");
  906. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  907. } else {
  908. ath_dbg(common, PS, "Wake up to complete TX\n");
  909. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  910. }
  911. /*
  912. * The actual restore operation will happen only after
  913. * the sc_flags bit is cleared. We are just dropping
  914. * the ps_usecount here.
  915. */
  916. ath9k_ps_restore(sc);
  917. }
  918. memset(&txctl, 0, sizeof(struct ath_tx_control));
  919. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  920. ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
  921. if (ath_tx_start(hw, skb, &txctl) != 0) {
  922. ath_dbg(common, XMIT, "TX failed\n");
  923. goto exit;
  924. }
  925. return;
  926. exit:
  927. dev_kfree_skb_any(skb);
  928. }
  929. static void ath9k_stop(struct ieee80211_hw *hw)
  930. {
  931. struct ath_softc *sc = hw->priv;
  932. struct ath_hw *ah = sc->sc_ah;
  933. struct ath_common *common = ath9k_hw_common(ah);
  934. bool prev_idle;
  935. mutex_lock(&sc->mutex);
  936. ath_cancel_work(sc);
  937. if (sc->sc_flags & SC_OP_INVALID) {
  938. ath_dbg(common, ANY, "Device not present\n");
  939. mutex_unlock(&sc->mutex);
  940. return;
  941. }
  942. /* Ensure HW is awake when we try to shut it down. */
  943. ath9k_ps_wakeup(sc);
  944. ath9k_stop_btcoex(sc);
  945. spin_lock_bh(&sc->sc_pcu_lock);
  946. /* prevent tasklets to enable interrupts once we disable them */
  947. ah->imask &= ~ATH9K_INT_GLOBAL;
  948. /* make sure h/w will not generate any interrupt
  949. * before setting the invalid flag. */
  950. ath9k_hw_disable_interrupts(ah);
  951. spin_unlock_bh(&sc->sc_pcu_lock);
  952. /* we can now sync irq and kill any running tasklets, since we already
  953. * disabled interrupts and not holding a spin lock */
  954. synchronize_irq(sc->irq);
  955. tasklet_kill(&sc->intr_tq);
  956. tasklet_kill(&sc->bcon_tasklet);
  957. prev_idle = sc->ps_idle;
  958. sc->ps_idle = true;
  959. spin_lock_bh(&sc->sc_pcu_lock);
  960. if (ah->led_pin >= 0) {
  961. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  962. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  963. }
  964. ath_prepare_reset(sc, false, true);
  965. if (sc->rx.frag) {
  966. dev_kfree_skb_any(sc->rx.frag);
  967. sc->rx.frag = NULL;
  968. }
  969. if (!ah->curchan)
  970. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  971. ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  972. ath9k_hw_phy_disable(ah);
  973. ath9k_hw_configpcipowersave(ah, true);
  974. spin_unlock_bh(&sc->sc_pcu_lock);
  975. ath9k_ps_restore(sc);
  976. sc->sc_flags |= SC_OP_INVALID;
  977. sc->ps_idle = prev_idle;
  978. mutex_unlock(&sc->mutex);
  979. ath_dbg(common, CONFIG, "Driver halt\n");
  980. }
  981. bool ath9k_uses_beacons(int type)
  982. {
  983. switch (type) {
  984. case NL80211_IFTYPE_AP:
  985. case NL80211_IFTYPE_ADHOC:
  986. case NL80211_IFTYPE_MESH_POINT:
  987. return true;
  988. default:
  989. return false;
  990. }
  991. }
  992. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  993. struct ieee80211_vif *vif)
  994. {
  995. struct ath_vif *avp = (void *)vif->drv_priv;
  996. ath9k_set_beaconing_status(sc, false);
  997. ath_beacon_return(sc, avp);
  998. ath9k_set_beaconing_status(sc, true);
  999. sc->sc_flags &= ~SC_OP_BEACONS;
  1000. }
  1001. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1002. {
  1003. struct ath9k_vif_iter_data *iter_data = data;
  1004. int i;
  1005. if (iter_data->hw_macaddr)
  1006. for (i = 0; i < ETH_ALEN; i++)
  1007. iter_data->mask[i] &=
  1008. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1009. switch (vif->type) {
  1010. case NL80211_IFTYPE_AP:
  1011. iter_data->naps++;
  1012. break;
  1013. case NL80211_IFTYPE_STATION:
  1014. iter_data->nstations++;
  1015. break;
  1016. case NL80211_IFTYPE_ADHOC:
  1017. iter_data->nadhocs++;
  1018. break;
  1019. case NL80211_IFTYPE_MESH_POINT:
  1020. iter_data->nmeshes++;
  1021. break;
  1022. case NL80211_IFTYPE_WDS:
  1023. iter_data->nwds++;
  1024. break;
  1025. default:
  1026. break;
  1027. }
  1028. }
  1029. /* Called with sc->mutex held. */
  1030. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1031. struct ieee80211_vif *vif,
  1032. struct ath9k_vif_iter_data *iter_data)
  1033. {
  1034. struct ath_softc *sc = hw->priv;
  1035. struct ath_hw *ah = sc->sc_ah;
  1036. struct ath_common *common = ath9k_hw_common(ah);
  1037. /*
  1038. * Use the hardware MAC address as reference, the hardware uses it
  1039. * together with the BSSID mask when matching addresses.
  1040. */
  1041. memset(iter_data, 0, sizeof(*iter_data));
  1042. iter_data->hw_macaddr = common->macaddr;
  1043. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1044. if (vif)
  1045. ath9k_vif_iter(iter_data, vif->addr, vif);
  1046. /* Get list of all active MAC addresses */
  1047. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1048. iter_data);
  1049. }
  1050. /* Called with sc->mutex held. */
  1051. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1052. struct ieee80211_vif *vif)
  1053. {
  1054. struct ath_softc *sc = hw->priv;
  1055. struct ath_hw *ah = sc->sc_ah;
  1056. struct ath_common *common = ath9k_hw_common(ah);
  1057. struct ath9k_vif_iter_data iter_data;
  1058. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1059. /* Set BSSID mask. */
  1060. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1061. ath_hw_setbssidmask(common);
  1062. /* Set op-mode & TSF */
  1063. if (iter_data.naps > 0) {
  1064. ath9k_hw_set_tsfadjust(ah, 1);
  1065. sc->sc_flags |= SC_OP_TSF_RESET;
  1066. ah->opmode = NL80211_IFTYPE_AP;
  1067. } else {
  1068. ath9k_hw_set_tsfadjust(ah, 0);
  1069. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1070. if (iter_data.nmeshes)
  1071. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1072. else if (iter_data.nwds)
  1073. ah->opmode = NL80211_IFTYPE_AP;
  1074. else if (iter_data.nadhocs)
  1075. ah->opmode = NL80211_IFTYPE_ADHOC;
  1076. else
  1077. ah->opmode = NL80211_IFTYPE_STATION;
  1078. }
  1079. /*
  1080. * Enable MIB interrupts when there are hardware phy counters.
  1081. */
  1082. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1083. if (ah->config.enable_ani)
  1084. ah->imask |= ATH9K_INT_MIB;
  1085. ah->imask |= ATH9K_INT_TSFOOR;
  1086. } else {
  1087. ah->imask &= ~ATH9K_INT_MIB;
  1088. ah->imask &= ~ATH9K_INT_TSFOOR;
  1089. }
  1090. ath9k_hw_set_interrupts(ah);
  1091. /* Set up ANI */
  1092. if (iter_data.naps > 0) {
  1093. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1094. if (!common->disable_ani) {
  1095. sc->sc_flags |= SC_OP_ANI_RUN;
  1096. ath_start_ani(common);
  1097. }
  1098. } else {
  1099. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1100. del_timer_sync(&common->ani.timer);
  1101. }
  1102. }
  1103. /* Called with sc->mutex held, vif counts set up properly. */
  1104. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1105. struct ieee80211_vif *vif)
  1106. {
  1107. struct ath_softc *sc = hw->priv;
  1108. ath9k_calculate_summary_state(hw, vif);
  1109. if (ath9k_uses_beacons(vif->type)) {
  1110. int error;
  1111. /* This may fail because upper levels do not have beacons
  1112. * properly configured yet. That's OK, we assume it
  1113. * will be properly configured and then we will be notified
  1114. * in the info_changed method and set up beacons properly
  1115. * there.
  1116. */
  1117. ath9k_set_beaconing_status(sc, false);
  1118. error = ath_beacon_alloc(sc, vif);
  1119. if (!error)
  1120. ath_beacon_config(sc, vif);
  1121. ath9k_set_beaconing_status(sc, true);
  1122. }
  1123. }
  1124. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1125. struct ieee80211_vif *vif)
  1126. {
  1127. struct ath_softc *sc = hw->priv;
  1128. struct ath_hw *ah = sc->sc_ah;
  1129. struct ath_common *common = ath9k_hw_common(ah);
  1130. int ret = 0;
  1131. ath9k_ps_wakeup(sc);
  1132. mutex_lock(&sc->mutex);
  1133. switch (vif->type) {
  1134. case NL80211_IFTYPE_STATION:
  1135. case NL80211_IFTYPE_WDS:
  1136. case NL80211_IFTYPE_ADHOC:
  1137. case NL80211_IFTYPE_AP:
  1138. case NL80211_IFTYPE_MESH_POINT:
  1139. break;
  1140. default:
  1141. ath_err(common, "Interface type %d not yet supported\n",
  1142. vif->type);
  1143. ret = -EOPNOTSUPP;
  1144. goto out;
  1145. }
  1146. if (ath9k_uses_beacons(vif->type)) {
  1147. if (sc->nbcnvifs >= ATH_BCBUF) {
  1148. ath_err(common, "Not enough beacon buffers when adding"
  1149. " new interface of type: %i\n",
  1150. vif->type);
  1151. ret = -ENOBUFS;
  1152. goto out;
  1153. }
  1154. }
  1155. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1156. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1157. sc->nvifs > 0)) {
  1158. ath_err(common, "Cannot create ADHOC interface when other"
  1159. " interfaces already exist.\n");
  1160. ret = -EINVAL;
  1161. goto out;
  1162. }
  1163. ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
  1164. sc->nvifs++;
  1165. ath9k_do_vif_add_setup(hw, vif);
  1166. out:
  1167. mutex_unlock(&sc->mutex);
  1168. ath9k_ps_restore(sc);
  1169. return ret;
  1170. }
  1171. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1172. struct ieee80211_vif *vif,
  1173. enum nl80211_iftype new_type,
  1174. bool p2p)
  1175. {
  1176. struct ath_softc *sc = hw->priv;
  1177. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1178. int ret = 0;
  1179. ath_dbg(common, CONFIG, "Change Interface\n");
  1180. mutex_lock(&sc->mutex);
  1181. ath9k_ps_wakeup(sc);
  1182. /* See if new interface type is valid. */
  1183. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1184. (sc->nvifs > 1)) {
  1185. ath_err(common, "When using ADHOC, it must be the only"
  1186. " interface.\n");
  1187. ret = -EINVAL;
  1188. goto out;
  1189. }
  1190. if (ath9k_uses_beacons(new_type) &&
  1191. !ath9k_uses_beacons(vif->type)) {
  1192. if (sc->nbcnvifs >= ATH_BCBUF) {
  1193. ath_err(common, "No beacon slot available\n");
  1194. ret = -ENOBUFS;
  1195. goto out;
  1196. }
  1197. }
  1198. /* Clean up old vif stuff */
  1199. if (ath9k_uses_beacons(vif->type))
  1200. ath9k_reclaim_beacon(sc, vif);
  1201. /* Add new settings */
  1202. vif->type = new_type;
  1203. vif->p2p = p2p;
  1204. ath9k_do_vif_add_setup(hw, vif);
  1205. out:
  1206. ath9k_ps_restore(sc);
  1207. mutex_unlock(&sc->mutex);
  1208. return ret;
  1209. }
  1210. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1211. struct ieee80211_vif *vif)
  1212. {
  1213. struct ath_softc *sc = hw->priv;
  1214. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1215. ath_dbg(common, CONFIG, "Detach Interface\n");
  1216. ath9k_ps_wakeup(sc);
  1217. mutex_lock(&sc->mutex);
  1218. sc->nvifs--;
  1219. /* Reclaim beacon resources */
  1220. if (ath9k_uses_beacons(vif->type))
  1221. ath9k_reclaim_beacon(sc, vif);
  1222. ath9k_calculate_summary_state(hw, NULL);
  1223. mutex_unlock(&sc->mutex);
  1224. ath9k_ps_restore(sc);
  1225. }
  1226. static void ath9k_enable_ps(struct ath_softc *sc)
  1227. {
  1228. struct ath_hw *ah = sc->sc_ah;
  1229. sc->ps_enabled = true;
  1230. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1231. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1232. ah->imask |= ATH9K_INT_TIM_TIMER;
  1233. ath9k_hw_set_interrupts(ah);
  1234. }
  1235. ath9k_hw_setrxabort(ah, 1);
  1236. }
  1237. }
  1238. static void ath9k_disable_ps(struct ath_softc *sc)
  1239. {
  1240. struct ath_hw *ah = sc->sc_ah;
  1241. sc->ps_enabled = false;
  1242. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1243. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1244. ath9k_hw_setrxabort(ah, 0);
  1245. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1246. PS_WAIT_FOR_CAB |
  1247. PS_WAIT_FOR_PSPOLL_DATA |
  1248. PS_WAIT_FOR_TX_ACK);
  1249. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1250. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1251. ath9k_hw_set_interrupts(ah);
  1252. }
  1253. }
  1254. }
  1255. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1256. {
  1257. struct ath_softc *sc = hw->priv;
  1258. struct ath_hw *ah = sc->sc_ah;
  1259. struct ath_common *common = ath9k_hw_common(ah);
  1260. struct ieee80211_conf *conf = &hw->conf;
  1261. bool reset_channel = false;
  1262. ath9k_ps_wakeup(sc);
  1263. mutex_lock(&sc->mutex);
  1264. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1265. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1266. if (sc->ps_idle)
  1267. ath_cancel_work(sc);
  1268. else
  1269. /*
  1270. * The chip needs a reset to properly wake up from
  1271. * full sleep
  1272. */
  1273. reset_channel = ah->chip_fullsleep;
  1274. }
  1275. /*
  1276. * We just prepare to enable PS. We have to wait until our AP has
  1277. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1278. * those ACKs and end up retransmitting the same null data frames.
  1279. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1280. */
  1281. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1282. unsigned long flags;
  1283. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1284. if (conf->flags & IEEE80211_CONF_PS)
  1285. ath9k_enable_ps(sc);
  1286. else
  1287. ath9k_disable_ps(sc);
  1288. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1289. }
  1290. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1291. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1292. ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
  1293. sc->sc_ah->is_monitoring = true;
  1294. } else {
  1295. ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
  1296. sc->sc_ah->is_monitoring = false;
  1297. }
  1298. }
  1299. if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
  1300. struct ieee80211_channel *curchan = hw->conf.channel;
  1301. int pos = curchan->hw_value;
  1302. int old_pos = -1;
  1303. unsigned long flags;
  1304. if (ah->curchan)
  1305. old_pos = ah->curchan - &ah->channels[0];
  1306. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1307. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1308. else
  1309. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1310. ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
  1311. curchan->center_freq, conf->channel_type);
  1312. /* update survey stats for the old channel before switching */
  1313. spin_lock_irqsave(&common->cc_lock, flags);
  1314. ath_update_survey_stats(sc);
  1315. spin_unlock_irqrestore(&common->cc_lock, flags);
  1316. /*
  1317. * Preserve the current channel values, before updating
  1318. * the same channel
  1319. */
  1320. if (ah->curchan && (old_pos == pos))
  1321. ath9k_hw_getnf(ah, ah->curchan);
  1322. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1323. curchan, conf->channel_type);
  1324. /*
  1325. * If the operating channel changes, change the survey in-use flags
  1326. * along with it.
  1327. * Reset the survey data for the new channel, unless we're switching
  1328. * back to the operating channel from an off-channel operation.
  1329. */
  1330. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1331. sc->cur_survey != &sc->survey[pos]) {
  1332. if (sc->cur_survey)
  1333. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1334. sc->cur_survey = &sc->survey[pos];
  1335. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1336. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1337. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1338. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1339. }
  1340. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1341. ath_err(common, "Unable to set channel\n");
  1342. mutex_unlock(&sc->mutex);
  1343. return -EINVAL;
  1344. }
  1345. /*
  1346. * The most recent snapshot of channel->noisefloor for the old
  1347. * channel is only available after the hardware reset. Copy it to
  1348. * the survey stats now.
  1349. */
  1350. if (old_pos >= 0)
  1351. ath_update_survey_nf(sc, old_pos);
  1352. }
  1353. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1354. ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
  1355. sc->config.txpowlimit = 2 * conf->power_level;
  1356. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1357. sc->config.txpowlimit, &sc->curtxpow);
  1358. }
  1359. mutex_unlock(&sc->mutex);
  1360. ath9k_ps_restore(sc);
  1361. return 0;
  1362. }
  1363. #define SUPPORTED_FILTERS \
  1364. (FIF_PROMISC_IN_BSS | \
  1365. FIF_ALLMULTI | \
  1366. FIF_CONTROL | \
  1367. FIF_PSPOLL | \
  1368. FIF_OTHER_BSS | \
  1369. FIF_BCN_PRBRESP_PROMISC | \
  1370. FIF_PROBE_REQ | \
  1371. FIF_FCSFAIL)
  1372. /* FIXME: sc->sc_full_reset ? */
  1373. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1374. unsigned int changed_flags,
  1375. unsigned int *total_flags,
  1376. u64 multicast)
  1377. {
  1378. struct ath_softc *sc = hw->priv;
  1379. u32 rfilt;
  1380. changed_flags &= SUPPORTED_FILTERS;
  1381. *total_flags &= SUPPORTED_FILTERS;
  1382. sc->rx.rxfilter = *total_flags;
  1383. ath9k_ps_wakeup(sc);
  1384. rfilt = ath_calcrxfilter(sc);
  1385. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1386. ath9k_ps_restore(sc);
  1387. ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
  1388. rfilt);
  1389. }
  1390. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1391. struct ieee80211_vif *vif,
  1392. struct ieee80211_sta *sta)
  1393. {
  1394. struct ath_softc *sc = hw->priv;
  1395. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1396. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1397. struct ieee80211_key_conf ps_key = { };
  1398. ath_node_attach(sc, sta, vif);
  1399. if (vif->type != NL80211_IFTYPE_AP &&
  1400. vif->type != NL80211_IFTYPE_AP_VLAN)
  1401. return 0;
  1402. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1403. return 0;
  1404. }
  1405. static void ath9k_del_ps_key(struct ath_softc *sc,
  1406. struct ieee80211_vif *vif,
  1407. struct ieee80211_sta *sta)
  1408. {
  1409. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1410. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1411. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1412. if (!an->ps_key)
  1413. return;
  1414. ath_key_delete(common, &ps_key);
  1415. }
  1416. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1417. struct ieee80211_vif *vif,
  1418. struct ieee80211_sta *sta)
  1419. {
  1420. struct ath_softc *sc = hw->priv;
  1421. ath9k_del_ps_key(sc, vif, sta);
  1422. ath_node_detach(sc, sta);
  1423. return 0;
  1424. }
  1425. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1426. struct ieee80211_vif *vif,
  1427. enum sta_notify_cmd cmd,
  1428. struct ieee80211_sta *sta)
  1429. {
  1430. struct ath_softc *sc = hw->priv;
  1431. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1432. if (!sta->ht_cap.ht_supported)
  1433. return;
  1434. switch (cmd) {
  1435. case STA_NOTIFY_SLEEP:
  1436. an->sleeping = true;
  1437. ath_tx_aggr_sleep(sta, sc, an);
  1438. break;
  1439. case STA_NOTIFY_AWAKE:
  1440. an->sleeping = false;
  1441. ath_tx_aggr_wakeup(sc, an);
  1442. break;
  1443. }
  1444. }
  1445. static int ath9k_conf_tx(struct ieee80211_hw *hw,
  1446. struct ieee80211_vif *vif, u16 queue,
  1447. const struct ieee80211_tx_queue_params *params)
  1448. {
  1449. struct ath_softc *sc = hw->priv;
  1450. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1451. struct ath_txq *txq;
  1452. struct ath9k_tx_queue_info qi;
  1453. int ret = 0;
  1454. if (queue >= WME_NUM_AC)
  1455. return 0;
  1456. txq = sc->tx.txq_map[queue];
  1457. ath9k_ps_wakeup(sc);
  1458. mutex_lock(&sc->mutex);
  1459. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1460. qi.tqi_aifs = params->aifs;
  1461. qi.tqi_cwmin = params->cw_min;
  1462. qi.tqi_cwmax = params->cw_max;
  1463. qi.tqi_burstTime = params->txop;
  1464. ath_dbg(common, CONFIG,
  1465. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1466. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1467. params->cw_max, params->txop);
  1468. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1469. if (ret)
  1470. ath_err(common, "TXQ Update failed\n");
  1471. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1472. if (queue == WME_AC_BE && !ret)
  1473. ath_beaconq_config(sc);
  1474. mutex_unlock(&sc->mutex);
  1475. ath9k_ps_restore(sc);
  1476. return ret;
  1477. }
  1478. static int ath9k_set_key(struct ieee80211_hw *hw,
  1479. enum set_key_cmd cmd,
  1480. struct ieee80211_vif *vif,
  1481. struct ieee80211_sta *sta,
  1482. struct ieee80211_key_conf *key)
  1483. {
  1484. struct ath_softc *sc = hw->priv;
  1485. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1486. int ret = 0;
  1487. if (ath9k_modparam_nohwcrypt)
  1488. return -ENOSPC;
  1489. if ((vif->type == NL80211_IFTYPE_ADHOC ||
  1490. vif->type == NL80211_IFTYPE_MESH_POINT) &&
  1491. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1492. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1493. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1494. /*
  1495. * For now, disable hw crypto for the RSN IBSS group keys. This
  1496. * could be optimized in the future to use a modified key cache
  1497. * design to support per-STA RX GTK, but until that gets
  1498. * implemented, use of software crypto for group addressed
  1499. * frames is a acceptable to allow RSN IBSS to be used.
  1500. */
  1501. return -EOPNOTSUPP;
  1502. }
  1503. mutex_lock(&sc->mutex);
  1504. ath9k_ps_wakeup(sc);
  1505. ath_dbg(common, CONFIG, "Set HW Key\n");
  1506. switch (cmd) {
  1507. case SET_KEY:
  1508. if (sta)
  1509. ath9k_del_ps_key(sc, vif, sta);
  1510. ret = ath_key_config(common, vif, sta, key);
  1511. if (ret >= 0) {
  1512. key->hw_key_idx = ret;
  1513. /* push IV and Michael MIC generation to stack */
  1514. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1515. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1516. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1517. if (sc->sc_ah->sw_mgmt_crypto &&
  1518. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1519. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1520. ret = 0;
  1521. }
  1522. break;
  1523. case DISABLE_KEY:
  1524. ath_key_delete(common, key);
  1525. break;
  1526. default:
  1527. ret = -EINVAL;
  1528. }
  1529. ath9k_ps_restore(sc);
  1530. mutex_unlock(&sc->mutex);
  1531. return ret;
  1532. }
  1533. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1534. {
  1535. struct ath_softc *sc = data;
  1536. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1537. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1538. struct ath_vif *avp = (void *)vif->drv_priv;
  1539. /*
  1540. * Skip iteration if primary station vif's bss info
  1541. * was not changed
  1542. */
  1543. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1544. return;
  1545. if (bss_conf->assoc) {
  1546. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1547. avp->primary_sta_vif = true;
  1548. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1549. common->curaid = bss_conf->aid;
  1550. ath9k_hw_write_associd(sc->sc_ah);
  1551. ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
  1552. bss_conf->aid, common->curbssid);
  1553. ath_beacon_config(sc, vif);
  1554. /*
  1555. * Request a re-configuration of Beacon related timers
  1556. * on the receipt of the first Beacon frame (i.e.,
  1557. * after time sync with the AP).
  1558. */
  1559. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1560. /* Reset rssi stats */
  1561. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1562. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1563. if (!common->disable_ani) {
  1564. sc->sc_flags |= SC_OP_ANI_RUN;
  1565. ath_start_ani(common);
  1566. }
  1567. }
  1568. }
  1569. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1570. {
  1571. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1572. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1573. struct ath_vif *avp = (void *)vif->drv_priv;
  1574. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1575. return;
  1576. /* Reconfigure bss info */
  1577. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1578. ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
  1579. common->curaid, common->curbssid);
  1580. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1581. avp->primary_sta_vif = false;
  1582. memset(common->curbssid, 0, ETH_ALEN);
  1583. common->curaid = 0;
  1584. }
  1585. ieee80211_iterate_active_interfaces_atomic(
  1586. sc->hw, ath9k_bss_iter, sc);
  1587. /*
  1588. * None of station vifs are associated.
  1589. * Clear bssid & aid
  1590. */
  1591. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1592. ath9k_hw_write_associd(sc->sc_ah);
  1593. /* Stop ANI */
  1594. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1595. del_timer_sync(&common->ani.timer);
  1596. memset(&sc->caldata, 0, sizeof(sc->caldata));
  1597. }
  1598. }
  1599. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1600. struct ieee80211_vif *vif,
  1601. struct ieee80211_bss_conf *bss_conf,
  1602. u32 changed)
  1603. {
  1604. struct ath_softc *sc = hw->priv;
  1605. struct ath_hw *ah = sc->sc_ah;
  1606. struct ath_common *common = ath9k_hw_common(ah);
  1607. struct ath_vif *avp = (void *)vif->drv_priv;
  1608. int slottime;
  1609. int error;
  1610. ath9k_ps_wakeup(sc);
  1611. mutex_lock(&sc->mutex);
  1612. if (changed & BSS_CHANGED_ASSOC) {
  1613. ath9k_config_bss(sc, vif);
  1614. ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
  1615. common->curbssid, common->curaid);
  1616. }
  1617. if (changed & BSS_CHANGED_IBSS) {
  1618. /* There can be only one vif available */
  1619. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1620. common->curaid = bss_conf->aid;
  1621. ath9k_hw_write_associd(sc->sc_ah);
  1622. if (bss_conf->ibss_joined) {
  1623. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1624. if (!common->disable_ani) {
  1625. sc->sc_flags |= SC_OP_ANI_RUN;
  1626. ath_start_ani(common);
  1627. }
  1628. } else {
  1629. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1630. del_timer_sync(&common->ani.timer);
  1631. }
  1632. }
  1633. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1634. if ((changed & BSS_CHANGED_BEACON) ||
  1635. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1636. ath9k_set_beaconing_status(sc, false);
  1637. error = ath_beacon_alloc(sc, vif);
  1638. if (!error)
  1639. ath_beacon_config(sc, vif);
  1640. ath9k_set_beaconing_status(sc, true);
  1641. }
  1642. if (changed & BSS_CHANGED_ERP_SLOT) {
  1643. if (bss_conf->use_short_slot)
  1644. slottime = 9;
  1645. else
  1646. slottime = 20;
  1647. if (vif->type == NL80211_IFTYPE_AP) {
  1648. /*
  1649. * Defer update, so that connected stations can adjust
  1650. * their settings at the same time.
  1651. * See beacon.c for more details
  1652. */
  1653. sc->beacon.slottime = slottime;
  1654. sc->beacon.updateslot = UPDATE;
  1655. } else {
  1656. ah->slottime = slottime;
  1657. ath9k_hw_init_global_settings(ah);
  1658. }
  1659. }
  1660. /* Disable transmission of beacons */
  1661. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1662. !bss_conf->enable_beacon) {
  1663. ath9k_set_beaconing_status(sc, false);
  1664. avp->is_bslot_active = false;
  1665. ath9k_set_beaconing_status(sc, true);
  1666. }
  1667. if (changed & BSS_CHANGED_BEACON_INT) {
  1668. /*
  1669. * In case of AP mode, the HW TSF has to be reset
  1670. * when the beacon interval changes.
  1671. */
  1672. if (vif->type == NL80211_IFTYPE_AP) {
  1673. sc->sc_flags |= SC_OP_TSF_RESET;
  1674. ath9k_set_beaconing_status(sc, false);
  1675. error = ath_beacon_alloc(sc, vif);
  1676. if (!error)
  1677. ath_beacon_config(sc, vif);
  1678. ath9k_set_beaconing_status(sc, true);
  1679. } else
  1680. ath_beacon_config(sc, vif);
  1681. }
  1682. mutex_unlock(&sc->mutex);
  1683. ath9k_ps_restore(sc);
  1684. }
  1685. static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1686. {
  1687. struct ath_softc *sc = hw->priv;
  1688. u64 tsf;
  1689. mutex_lock(&sc->mutex);
  1690. ath9k_ps_wakeup(sc);
  1691. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1692. ath9k_ps_restore(sc);
  1693. mutex_unlock(&sc->mutex);
  1694. return tsf;
  1695. }
  1696. static void ath9k_set_tsf(struct ieee80211_hw *hw,
  1697. struct ieee80211_vif *vif,
  1698. u64 tsf)
  1699. {
  1700. struct ath_softc *sc = hw->priv;
  1701. mutex_lock(&sc->mutex);
  1702. ath9k_ps_wakeup(sc);
  1703. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1704. ath9k_ps_restore(sc);
  1705. mutex_unlock(&sc->mutex);
  1706. }
  1707. static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1708. {
  1709. struct ath_softc *sc = hw->priv;
  1710. mutex_lock(&sc->mutex);
  1711. ath9k_ps_wakeup(sc);
  1712. ath9k_hw_reset_tsf(sc->sc_ah);
  1713. ath9k_ps_restore(sc);
  1714. mutex_unlock(&sc->mutex);
  1715. }
  1716. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1717. struct ieee80211_vif *vif,
  1718. enum ieee80211_ampdu_mlme_action action,
  1719. struct ieee80211_sta *sta,
  1720. u16 tid, u16 *ssn, u8 buf_size)
  1721. {
  1722. struct ath_softc *sc = hw->priv;
  1723. int ret = 0;
  1724. local_bh_disable();
  1725. switch (action) {
  1726. case IEEE80211_AMPDU_RX_START:
  1727. break;
  1728. case IEEE80211_AMPDU_RX_STOP:
  1729. break;
  1730. case IEEE80211_AMPDU_TX_START:
  1731. ath9k_ps_wakeup(sc);
  1732. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1733. if (!ret)
  1734. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1735. ath9k_ps_restore(sc);
  1736. break;
  1737. case IEEE80211_AMPDU_TX_STOP:
  1738. ath9k_ps_wakeup(sc);
  1739. ath_tx_aggr_stop(sc, sta, tid);
  1740. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1741. ath9k_ps_restore(sc);
  1742. break;
  1743. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1744. ath9k_ps_wakeup(sc);
  1745. ath_tx_aggr_resume(sc, sta, tid);
  1746. ath9k_ps_restore(sc);
  1747. break;
  1748. default:
  1749. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1750. }
  1751. local_bh_enable();
  1752. return ret;
  1753. }
  1754. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1755. struct survey_info *survey)
  1756. {
  1757. struct ath_softc *sc = hw->priv;
  1758. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1759. struct ieee80211_supported_band *sband;
  1760. struct ieee80211_channel *chan;
  1761. unsigned long flags;
  1762. int pos;
  1763. spin_lock_irqsave(&common->cc_lock, flags);
  1764. if (idx == 0)
  1765. ath_update_survey_stats(sc);
  1766. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1767. if (sband && idx >= sband->n_channels) {
  1768. idx -= sband->n_channels;
  1769. sband = NULL;
  1770. }
  1771. if (!sband)
  1772. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1773. if (!sband || idx >= sband->n_channels) {
  1774. spin_unlock_irqrestore(&common->cc_lock, flags);
  1775. return -ENOENT;
  1776. }
  1777. chan = &sband->channels[idx];
  1778. pos = chan->hw_value;
  1779. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1780. survey->channel = chan;
  1781. spin_unlock_irqrestore(&common->cc_lock, flags);
  1782. return 0;
  1783. }
  1784. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1785. {
  1786. struct ath_softc *sc = hw->priv;
  1787. struct ath_hw *ah = sc->sc_ah;
  1788. mutex_lock(&sc->mutex);
  1789. ah->coverage_class = coverage_class;
  1790. ath9k_ps_wakeup(sc);
  1791. ath9k_hw_init_global_settings(ah);
  1792. ath9k_ps_restore(sc);
  1793. mutex_unlock(&sc->mutex);
  1794. }
  1795. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1796. {
  1797. struct ath_softc *sc = hw->priv;
  1798. struct ath_hw *ah = sc->sc_ah;
  1799. struct ath_common *common = ath9k_hw_common(ah);
  1800. int timeout = 200; /* ms */
  1801. int i, j;
  1802. bool drain_txq;
  1803. mutex_lock(&sc->mutex);
  1804. cancel_delayed_work_sync(&sc->tx_complete_work);
  1805. if (ah->ah_flags & AH_UNPLUGGED) {
  1806. ath_dbg(common, ANY, "Device has been unplugged!\n");
  1807. mutex_unlock(&sc->mutex);
  1808. return;
  1809. }
  1810. if (sc->sc_flags & SC_OP_INVALID) {
  1811. ath_dbg(common, ANY, "Device not present\n");
  1812. mutex_unlock(&sc->mutex);
  1813. return;
  1814. }
  1815. for (j = 0; j < timeout; j++) {
  1816. bool npend = false;
  1817. if (j)
  1818. usleep_range(1000, 2000);
  1819. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1820. if (!ATH_TXQ_SETUP(sc, i))
  1821. continue;
  1822. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1823. if (npend)
  1824. break;
  1825. }
  1826. if (!npend)
  1827. break;
  1828. }
  1829. if (drop) {
  1830. ath9k_ps_wakeup(sc);
  1831. spin_lock_bh(&sc->sc_pcu_lock);
  1832. drain_txq = ath_drain_all_txq(sc, false);
  1833. spin_unlock_bh(&sc->sc_pcu_lock);
  1834. if (!drain_txq)
  1835. ath_reset(sc, false);
  1836. ath9k_ps_restore(sc);
  1837. ieee80211_wake_queues(hw);
  1838. }
  1839. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1840. mutex_unlock(&sc->mutex);
  1841. }
  1842. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1843. {
  1844. struct ath_softc *sc = hw->priv;
  1845. int i;
  1846. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1847. if (!ATH_TXQ_SETUP(sc, i))
  1848. continue;
  1849. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1850. return true;
  1851. }
  1852. return false;
  1853. }
  1854. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1855. {
  1856. struct ath_softc *sc = hw->priv;
  1857. struct ath_hw *ah = sc->sc_ah;
  1858. struct ieee80211_vif *vif;
  1859. struct ath_vif *avp;
  1860. struct ath_buf *bf;
  1861. struct ath_tx_status ts;
  1862. bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
  1863. int status;
  1864. vif = sc->beacon.bslot[0];
  1865. if (!vif)
  1866. return 0;
  1867. avp = (void *)vif->drv_priv;
  1868. if (!avp->is_bslot_active)
  1869. return 0;
  1870. if (!sc->beacon.tx_processed && !edma) {
  1871. tasklet_disable(&sc->bcon_tasklet);
  1872. bf = avp->av_bcbuf;
  1873. if (!bf || !bf->bf_mpdu)
  1874. goto skip;
  1875. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1876. if (status == -EINPROGRESS)
  1877. goto skip;
  1878. sc->beacon.tx_processed = true;
  1879. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1880. skip:
  1881. tasklet_enable(&sc->bcon_tasklet);
  1882. }
  1883. return sc->beacon.tx_last;
  1884. }
  1885. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1886. struct ieee80211_low_level_stats *stats)
  1887. {
  1888. struct ath_softc *sc = hw->priv;
  1889. struct ath_hw *ah = sc->sc_ah;
  1890. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1891. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1892. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1893. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1894. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1895. return 0;
  1896. }
  1897. static u32 fill_chainmask(u32 cap, u32 new)
  1898. {
  1899. u32 filled = 0;
  1900. int i;
  1901. for (i = 0; cap && new; i++, cap >>= 1) {
  1902. if (!(cap & BIT(0)))
  1903. continue;
  1904. if (new & BIT(0))
  1905. filled |= BIT(i);
  1906. new >>= 1;
  1907. }
  1908. return filled;
  1909. }
  1910. static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
  1911. {
  1912. struct ath_softc *sc = hw->priv;
  1913. struct ath_hw *ah = sc->sc_ah;
  1914. if (!rx_ant || !tx_ant)
  1915. return -EINVAL;
  1916. sc->ant_rx = rx_ant;
  1917. sc->ant_tx = tx_ant;
  1918. if (ah->caps.rx_chainmask == 1)
  1919. return 0;
  1920. /* AR9100 runs into calibration issues if not all rx chains are enabled */
  1921. if (AR_SREV_9100(ah))
  1922. ah->rxchainmask = 0x7;
  1923. else
  1924. ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
  1925. ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
  1926. ath9k_reload_chainmask_settings(sc);
  1927. return 0;
  1928. }
  1929. static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
  1930. {
  1931. struct ath_softc *sc = hw->priv;
  1932. *tx_ant = sc->ant_tx;
  1933. *rx_ant = sc->ant_rx;
  1934. return 0;
  1935. }
  1936. struct ieee80211_ops ath9k_ops = {
  1937. .tx = ath9k_tx,
  1938. .start = ath9k_start,
  1939. .stop = ath9k_stop,
  1940. .add_interface = ath9k_add_interface,
  1941. .change_interface = ath9k_change_interface,
  1942. .remove_interface = ath9k_remove_interface,
  1943. .config = ath9k_config,
  1944. .configure_filter = ath9k_configure_filter,
  1945. .sta_add = ath9k_sta_add,
  1946. .sta_remove = ath9k_sta_remove,
  1947. .sta_notify = ath9k_sta_notify,
  1948. .conf_tx = ath9k_conf_tx,
  1949. .bss_info_changed = ath9k_bss_info_changed,
  1950. .set_key = ath9k_set_key,
  1951. .get_tsf = ath9k_get_tsf,
  1952. .set_tsf = ath9k_set_tsf,
  1953. .reset_tsf = ath9k_reset_tsf,
  1954. .ampdu_action = ath9k_ampdu_action,
  1955. .get_survey = ath9k_get_survey,
  1956. .rfkill_poll = ath9k_rfkill_poll_state,
  1957. .set_coverage_class = ath9k_set_coverage_class,
  1958. .flush = ath9k_flush,
  1959. .tx_frames_pending = ath9k_tx_frames_pending,
  1960. .tx_last_beacon = ath9k_tx_last_beacon,
  1961. .get_stats = ath9k_get_stats,
  1962. .set_antenna = ath9k_set_antenna,
  1963. .get_antenna = ath9k_get_antenna,
  1964. };