soc-cache.c 36 KB

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  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <sound/soc.h>
  16. #include <linux/lzo.h>
  17. #include <linux/bitmap.h>
  18. #include <linux/rbtree.h>
  19. static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
  20. unsigned int reg)
  21. {
  22. int ret;
  23. unsigned int val;
  24. if (reg >= codec->driver->reg_cache_size ||
  25. snd_soc_codec_volatile_register(codec, reg)) {
  26. if (codec->cache_only)
  27. return -1;
  28. BUG_ON(!codec->hw_read);
  29. return codec->hw_read(codec, reg);
  30. }
  31. ret = snd_soc_cache_read(codec, reg, &val);
  32. if (ret < 0)
  33. return -1;
  34. return val;
  35. }
  36. static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
  37. unsigned int value)
  38. {
  39. u8 data[2];
  40. int ret;
  41. data[0] = (reg << 4) | ((value >> 8) & 0x000f);
  42. data[1] = value & 0x00ff;
  43. if (!snd_soc_codec_volatile_register(codec, reg) &&
  44. reg < codec->driver->reg_cache_size) {
  45. ret = snd_soc_cache_write(codec, reg, value);
  46. if (ret < 0)
  47. return -1;
  48. }
  49. if (codec->cache_only) {
  50. codec->cache_sync = 1;
  51. return 0;
  52. }
  53. ret = codec->hw_write(codec->control_data, data, 2);
  54. if (ret == 2)
  55. return 0;
  56. if (ret < 0)
  57. return ret;
  58. else
  59. return -EIO;
  60. }
  61. #if defined(CONFIG_SPI_MASTER)
  62. static int snd_soc_4_12_spi_write(void *control_data, const char *data,
  63. int len)
  64. {
  65. struct spi_device *spi = control_data;
  66. struct spi_transfer t;
  67. struct spi_message m;
  68. u8 msg[2];
  69. if (len <= 0)
  70. return 0;
  71. msg[0] = data[1];
  72. msg[1] = data[0];
  73. spi_message_init(&m);
  74. memset(&t, 0, sizeof t);
  75. t.tx_buf = &msg[0];
  76. t.len = len;
  77. spi_message_add_tail(&t, &m);
  78. spi_sync(spi, &m);
  79. return len;
  80. }
  81. #else
  82. #define snd_soc_4_12_spi_write NULL
  83. #endif
  84. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  85. unsigned int reg)
  86. {
  87. int ret;
  88. unsigned int val;
  89. if (reg >= codec->driver->reg_cache_size ||
  90. snd_soc_codec_volatile_register(codec, reg)) {
  91. if (codec->cache_only)
  92. return -1;
  93. BUG_ON(!codec->hw_read);
  94. return codec->hw_read(codec, reg);
  95. }
  96. ret = snd_soc_cache_read(codec, reg, &val);
  97. if (ret < 0)
  98. return -1;
  99. return val;
  100. }
  101. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  102. unsigned int value)
  103. {
  104. u8 data[2];
  105. int ret;
  106. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  107. data[1] = value & 0x00ff;
  108. if (!snd_soc_codec_volatile_register(codec, reg) &&
  109. reg < codec->driver->reg_cache_size) {
  110. ret = snd_soc_cache_write(codec, reg, value);
  111. if (ret < 0)
  112. return -1;
  113. }
  114. if (codec->cache_only) {
  115. codec->cache_sync = 1;
  116. return 0;
  117. }
  118. ret = codec->hw_write(codec->control_data, data, 2);
  119. if (ret == 2)
  120. return 0;
  121. if (ret < 0)
  122. return ret;
  123. else
  124. return -EIO;
  125. }
  126. #if defined(CONFIG_SPI_MASTER)
  127. static int snd_soc_7_9_spi_write(void *control_data, const char *data,
  128. int len)
  129. {
  130. struct spi_device *spi = control_data;
  131. struct spi_transfer t;
  132. struct spi_message m;
  133. u8 msg[2];
  134. if (len <= 0)
  135. return 0;
  136. msg[0] = data[0];
  137. msg[1] = data[1];
  138. spi_message_init(&m);
  139. memset(&t, 0, sizeof t);
  140. t.tx_buf = &msg[0];
  141. t.len = len;
  142. spi_message_add_tail(&t, &m);
  143. spi_sync(spi, &m);
  144. return len;
  145. }
  146. #else
  147. #define snd_soc_7_9_spi_write NULL
  148. #endif
  149. static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
  150. unsigned int value)
  151. {
  152. u8 data[2];
  153. int ret;
  154. reg &= 0xff;
  155. data[0] = reg;
  156. data[1] = value & 0xff;
  157. if (!snd_soc_codec_volatile_register(codec, reg) &&
  158. reg < codec->driver->reg_cache_size) {
  159. ret = snd_soc_cache_write(codec, reg, value);
  160. if (ret < 0)
  161. return -1;
  162. }
  163. if (codec->cache_only) {
  164. codec->cache_sync = 1;
  165. return 0;
  166. }
  167. if (codec->hw_write(codec->control_data, data, 2) == 2)
  168. return 0;
  169. else
  170. return -EIO;
  171. }
  172. static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
  173. unsigned int reg)
  174. {
  175. int ret;
  176. unsigned int val;
  177. reg &= 0xff;
  178. if (reg >= codec->driver->reg_cache_size ||
  179. snd_soc_codec_volatile_register(codec, reg)) {
  180. if (codec->cache_only)
  181. return -1;
  182. BUG_ON(!codec->hw_read);
  183. return codec->hw_read(codec, reg);
  184. }
  185. ret = snd_soc_cache_read(codec, reg, &val);
  186. if (ret < 0)
  187. return -1;
  188. return val;
  189. }
  190. #if defined(CONFIG_SPI_MASTER)
  191. static int snd_soc_8_8_spi_write(void *control_data, const char *data,
  192. int len)
  193. {
  194. struct spi_device *spi = control_data;
  195. struct spi_transfer t;
  196. struct spi_message m;
  197. u8 msg[2];
  198. if (len <= 0)
  199. return 0;
  200. msg[0] = data[0];
  201. msg[1] = data[1];
  202. spi_message_init(&m);
  203. memset(&t, 0, sizeof t);
  204. t.tx_buf = &msg[0];
  205. t.len = len;
  206. spi_message_add_tail(&t, &m);
  207. spi_sync(spi, &m);
  208. return len;
  209. }
  210. #else
  211. #define snd_soc_8_8_spi_write NULL
  212. #endif
  213. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  214. unsigned int value)
  215. {
  216. u8 data[3];
  217. int ret;
  218. data[0] = reg;
  219. data[1] = (value >> 8) & 0xff;
  220. data[2] = value & 0xff;
  221. if (!snd_soc_codec_volatile_register(codec, reg) &&
  222. reg < codec->driver->reg_cache_size) {
  223. ret = snd_soc_cache_write(codec, reg, value);
  224. if (ret < 0)
  225. return -1;
  226. }
  227. if (codec->cache_only) {
  228. codec->cache_sync = 1;
  229. return 0;
  230. }
  231. if (codec->hw_write(codec->control_data, data, 3) == 3)
  232. return 0;
  233. else
  234. return -EIO;
  235. }
  236. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  237. unsigned int reg)
  238. {
  239. int ret;
  240. unsigned int val;
  241. if (reg >= codec->driver->reg_cache_size ||
  242. snd_soc_codec_volatile_register(codec, reg)) {
  243. if (codec->cache_only)
  244. return -1;
  245. BUG_ON(!codec->hw_read);
  246. return codec->hw_read(codec, reg);
  247. }
  248. ret = snd_soc_cache_read(codec, reg, &val);
  249. if (ret < 0)
  250. return -1;
  251. return val;
  252. }
  253. #if defined(CONFIG_SPI_MASTER)
  254. static int snd_soc_8_16_spi_write(void *control_data, const char *data,
  255. int len)
  256. {
  257. struct spi_device *spi = control_data;
  258. struct spi_transfer t;
  259. struct spi_message m;
  260. u8 msg[3];
  261. if (len <= 0)
  262. return 0;
  263. msg[0] = data[0];
  264. msg[1] = data[1];
  265. msg[2] = data[2];
  266. spi_message_init(&m);
  267. memset(&t, 0, sizeof t);
  268. t.tx_buf = &msg[0];
  269. t.len = len;
  270. spi_message_add_tail(&t, &m);
  271. spi_sync(spi, &m);
  272. return len;
  273. }
  274. #else
  275. #define snd_soc_8_16_spi_write NULL
  276. #endif
  277. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  278. static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
  279. unsigned int r)
  280. {
  281. struct i2c_msg xfer[2];
  282. u8 reg = r;
  283. u8 data;
  284. int ret;
  285. struct i2c_client *client = codec->control_data;
  286. /* Write register */
  287. xfer[0].addr = client->addr;
  288. xfer[0].flags = 0;
  289. xfer[0].len = 1;
  290. xfer[0].buf = &reg;
  291. /* Read data */
  292. xfer[1].addr = client->addr;
  293. xfer[1].flags = I2C_M_RD;
  294. xfer[1].len = 1;
  295. xfer[1].buf = &data;
  296. ret = i2c_transfer(client->adapter, xfer, 2);
  297. if (ret != 2) {
  298. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  299. return 0;
  300. }
  301. return data;
  302. }
  303. #else
  304. #define snd_soc_8_8_read_i2c NULL
  305. #endif
  306. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  307. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  308. unsigned int r)
  309. {
  310. struct i2c_msg xfer[2];
  311. u8 reg = r;
  312. u16 data;
  313. int ret;
  314. struct i2c_client *client = codec->control_data;
  315. /* Write register */
  316. xfer[0].addr = client->addr;
  317. xfer[0].flags = 0;
  318. xfer[0].len = 1;
  319. xfer[0].buf = &reg;
  320. /* Read data */
  321. xfer[1].addr = client->addr;
  322. xfer[1].flags = I2C_M_RD;
  323. xfer[1].len = 2;
  324. xfer[1].buf = (u8 *)&data;
  325. ret = i2c_transfer(client->adapter, xfer, 2);
  326. if (ret != 2) {
  327. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  328. return 0;
  329. }
  330. return (data >> 8) | ((data & 0xff) << 8);
  331. }
  332. #else
  333. #define snd_soc_8_16_read_i2c NULL
  334. #endif
  335. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  336. static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
  337. unsigned int r)
  338. {
  339. struct i2c_msg xfer[2];
  340. u16 reg = r;
  341. u8 data;
  342. int ret;
  343. struct i2c_client *client = codec->control_data;
  344. /* Write register */
  345. xfer[0].addr = client->addr;
  346. xfer[0].flags = 0;
  347. xfer[0].len = 2;
  348. xfer[0].buf = (u8 *)&reg;
  349. /* Read data */
  350. xfer[1].addr = client->addr;
  351. xfer[1].flags = I2C_M_RD;
  352. xfer[1].len = 1;
  353. xfer[1].buf = &data;
  354. ret = i2c_transfer(client->adapter, xfer, 2);
  355. if (ret != 2) {
  356. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  357. return 0;
  358. }
  359. return data;
  360. }
  361. #else
  362. #define snd_soc_16_8_read_i2c NULL
  363. #endif
  364. static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
  365. unsigned int reg)
  366. {
  367. int ret;
  368. unsigned int val;
  369. reg &= 0xff;
  370. if (reg >= codec->driver->reg_cache_size ||
  371. snd_soc_codec_volatile_register(codec, reg)) {
  372. if (codec->cache_only)
  373. return -1;
  374. BUG_ON(!codec->hw_read);
  375. return codec->hw_read(codec, reg);
  376. }
  377. ret = snd_soc_cache_read(codec, reg, &val);
  378. if (ret < 0)
  379. return -1;
  380. return val;
  381. }
  382. static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
  383. unsigned int value)
  384. {
  385. u8 data[3];
  386. int ret;
  387. data[0] = (reg >> 8) & 0xff;
  388. data[1] = reg & 0xff;
  389. data[2] = value;
  390. reg &= 0xff;
  391. if (!snd_soc_codec_volatile_register(codec, reg) &&
  392. reg < codec->driver->reg_cache_size) {
  393. ret = snd_soc_cache_write(codec, reg, value);
  394. if (ret < 0)
  395. return -1;
  396. }
  397. if (codec->cache_only) {
  398. codec->cache_sync = 1;
  399. return 0;
  400. }
  401. ret = codec->hw_write(codec->control_data, data, 3);
  402. if (ret == 3)
  403. return 0;
  404. if (ret < 0)
  405. return ret;
  406. else
  407. return -EIO;
  408. }
  409. #if defined(CONFIG_SPI_MASTER)
  410. static int snd_soc_16_8_spi_write(void *control_data, const char *data,
  411. int len)
  412. {
  413. struct spi_device *spi = control_data;
  414. struct spi_transfer t;
  415. struct spi_message m;
  416. u8 msg[3];
  417. if (len <= 0)
  418. return 0;
  419. msg[0] = data[0];
  420. msg[1] = data[1];
  421. msg[2] = data[2];
  422. spi_message_init(&m);
  423. memset(&t, 0, sizeof t);
  424. t.tx_buf = &msg[0];
  425. t.len = len;
  426. spi_message_add_tail(&t, &m);
  427. spi_sync(spi, &m);
  428. return len;
  429. }
  430. #else
  431. #define snd_soc_16_8_spi_write NULL
  432. #endif
  433. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  434. static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
  435. unsigned int r)
  436. {
  437. struct i2c_msg xfer[2];
  438. u16 reg = cpu_to_be16(r);
  439. u16 data;
  440. int ret;
  441. struct i2c_client *client = codec->control_data;
  442. /* Write register */
  443. xfer[0].addr = client->addr;
  444. xfer[0].flags = 0;
  445. xfer[0].len = 2;
  446. xfer[0].buf = (u8 *)&reg;
  447. /* Read data */
  448. xfer[1].addr = client->addr;
  449. xfer[1].flags = I2C_M_RD;
  450. xfer[1].len = 2;
  451. xfer[1].buf = (u8 *)&data;
  452. ret = i2c_transfer(client->adapter, xfer, 2);
  453. if (ret != 2) {
  454. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  455. return 0;
  456. }
  457. return be16_to_cpu(data);
  458. }
  459. #else
  460. #define snd_soc_16_16_read_i2c NULL
  461. #endif
  462. static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
  463. unsigned int reg)
  464. {
  465. int ret;
  466. unsigned int val;
  467. if (reg >= codec->driver->reg_cache_size ||
  468. snd_soc_codec_volatile_register(codec, reg)) {
  469. if (codec->cache_only)
  470. return -1;
  471. BUG_ON(!codec->hw_read);
  472. return codec->hw_read(codec, reg);
  473. }
  474. ret = snd_soc_cache_read(codec, reg, &val);
  475. if (ret < 0)
  476. return -1;
  477. return val;
  478. }
  479. static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
  480. unsigned int value)
  481. {
  482. u8 data[4];
  483. int ret;
  484. data[0] = (reg >> 8) & 0xff;
  485. data[1] = reg & 0xff;
  486. data[2] = (value >> 8) & 0xff;
  487. data[3] = value & 0xff;
  488. if (!snd_soc_codec_volatile_register(codec, reg) &&
  489. reg < codec->driver->reg_cache_size) {
  490. ret = snd_soc_cache_write(codec, reg, value);
  491. if (ret < 0)
  492. return -1;
  493. }
  494. if (codec->cache_only) {
  495. codec->cache_sync = 1;
  496. return 0;
  497. }
  498. ret = codec->hw_write(codec->control_data, data, 4);
  499. if (ret == 4)
  500. return 0;
  501. if (ret < 0)
  502. return ret;
  503. else
  504. return -EIO;
  505. }
  506. #if defined(CONFIG_SPI_MASTER)
  507. static int snd_soc_16_16_spi_write(void *control_data, const char *data,
  508. int len)
  509. {
  510. struct spi_device *spi = control_data;
  511. struct spi_transfer t;
  512. struct spi_message m;
  513. u8 msg[4];
  514. if (len <= 0)
  515. return 0;
  516. msg[0] = data[0];
  517. msg[1] = data[1];
  518. msg[2] = data[2];
  519. msg[3] = data[3];
  520. spi_message_init(&m);
  521. memset(&t, 0, sizeof t);
  522. t.tx_buf = &msg[0];
  523. t.len = len;
  524. spi_message_add_tail(&t, &m);
  525. spi_sync(spi, &m);
  526. return len;
  527. }
  528. #else
  529. #define snd_soc_16_16_spi_write NULL
  530. #endif
  531. static struct {
  532. int addr_bits;
  533. int data_bits;
  534. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  535. int (*spi_write)(void *, const char *, int);
  536. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  537. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  538. } io_types[] = {
  539. {
  540. .addr_bits = 4, .data_bits = 12,
  541. .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
  542. .spi_write = snd_soc_4_12_spi_write,
  543. },
  544. {
  545. .addr_bits = 7, .data_bits = 9,
  546. .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
  547. .spi_write = snd_soc_7_9_spi_write,
  548. },
  549. {
  550. .addr_bits = 8, .data_bits = 8,
  551. .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
  552. .i2c_read = snd_soc_8_8_read_i2c,
  553. .spi_write = snd_soc_8_8_spi_write,
  554. },
  555. {
  556. .addr_bits = 8, .data_bits = 16,
  557. .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
  558. .i2c_read = snd_soc_8_16_read_i2c,
  559. .spi_write = snd_soc_8_16_spi_write,
  560. },
  561. {
  562. .addr_bits = 16, .data_bits = 8,
  563. .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
  564. .i2c_read = snd_soc_16_8_read_i2c,
  565. .spi_write = snd_soc_16_8_spi_write,
  566. },
  567. {
  568. .addr_bits = 16, .data_bits = 16,
  569. .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
  570. .i2c_read = snd_soc_16_16_read_i2c,
  571. .spi_write = snd_soc_16_16_spi_write,
  572. },
  573. };
  574. /**
  575. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  576. *
  577. * @codec: CODEC to configure.
  578. * @type: Type of cache.
  579. * @addr_bits: Number of bits of register address data.
  580. * @data_bits: Number of bits of data per register.
  581. * @control: Control bus used.
  582. *
  583. * Register formats are frequently shared between many I2C and SPI
  584. * devices. In order to promote code reuse the ASoC core provides
  585. * some standard implementations of CODEC read and write operations
  586. * which can be set up using this function.
  587. *
  588. * The caller is responsible for allocating and initialising the
  589. * actual cache.
  590. *
  591. * Note that at present this code cannot be used by CODECs with
  592. * volatile registers.
  593. */
  594. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  595. int addr_bits, int data_bits,
  596. enum snd_soc_control_type control)
  597. {
  598. int i;
  599. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  600. if (io_types[i].addr_bits == addr_bits &&
  601. io_types[i].data_bits == data_bits)
  602. break;
  603. if (i == ARRAY_SIZE(io_types)) {
  604. printk(KERN_ERR
  605. "No I/O functions for %d bit address %d bit data\n",
  606. addr_bits, data_bits);
  607. return -EINVAL;
  608. }
  609. codec->write = io_types[i].write;
  610. codec->read = io_types[i].read;
  611. switch (control) {
  612. case SND_SOC_CUSTOM:
  613. break;
  614. case SND_SOC_I2C:
  615. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  616. codec->hw_write = (hw_write_t)i2c_master_send;
  617. #endif
  618. if (io_types[i].i2c_read)
  619. codec->hw_read = io_types[i].i2c_read;
  620. codec->control_data = container_of(codec->dev,
  621. struct i2c_client,
  622. dev);
  623. break;
  624. case SND_SOC_SPI:
  625. if (io_types[i].spi_write)
  626. codec->hw_write = io_types[i].spi_write;
  627. codec->control_data = container_of(codec->dev,
  628. struct spi_device,
  629. dev);
  630. break;
  631. }
  632. return 0;
  633. }
  634. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
  635. struct snd_soc_rbtree_node {
  636. struct rb_node node;
  637. unsigned int reg;
  638. unsigned int value;
  639. unsigned int defval;
  640. } __attribute__ ((packed));
  641. struct snd_soc_rbtree_ctx {
  642. struct rb_root root;
  643. };
  644. static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
  645. struct rb_root *root, unsigned int reg)
  646. {
  647. struct rb_node *node;
  648. struct snd_soc_rbtree_node *rbnode;
  649. node = root->rb_node;
  650. while (node) {
  651. rbnode = container_of(node, struct snd_soc_rbtree_node, node);
  652. if (rbnode->reg < reg)
  653. node = node->rb_left;
  654. else if (rbnode->reg > reg)
  655. node = node->rb_right;
  656. else
  657. return rbnode;
  658. }
  659. return NULL;
  660. }
  661. static int snd_soc_rbtree_insert(struct rb_root *root,
  662. struct snd_soc_rbtree_node *rbnode)
  663. {
  664. struct rb_node **new, *parent;
  665. struct snd_soc_rbtree_node *rbnode_tmp;
  666. parent = NULL;
  667. new = &root->rb_node;
  668. while (*new) {
  669. rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
  670. node);
  671. parent = *new;
  672. if (rbnode_tmp->reg < rbnode->reg)
  673. new = &((*new)->rb_left);
  674. else if (rbnode_tmp->reg > rbnode->reg)
  675. new = &((*new)->rb_right);
  676. else
  677. return 0;
  678. }
  679. /* insert the node into the rbtree */
  680. rb_link_node(&rbnode->node, parent, new);
  681. rb_insert_color(&rbnode->node, root);
  682. return 1;
  683. }
  684. static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
  685. {
  686. struct snd_soc_rbtree_ctx *rbtree_ctx;
  687. struct rb_node *node;
  688. struct snd_soc_rbtree_node *rbnode;
  689. unsigned int val;
  690. int ret;
  691. rbtree_ctx = codec->reg_cache;
  692. for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
  693. rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
  694. if (rbnode->value == rbnode->defval)
  695. continue;
  696. ret = snd_soc_cache_read(codec, rbnode->reg, &val);
  697. if (ret)
  698. return ret;
  699. ret = snd_soc_write(codec, rbnode->reg, val);
  700. if (ret)
  701. return ret;
  702. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  703. rbnode->reg, val);
  704. }
  705. return 0;
  706. }
  707. static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
  708. unsigned int reg, unsigned int value)
  709. {
  710. struct snd_soc_rbtree_ctx *rbtree_ctx;
  711. struct snd_soc_rbtree_node *rbnode;
  712. rbtree_ctx = codec->reg_cache;
  713. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  714. if (rbnode) {
  715. if (rbnode->value == value)
  716. return 0;
  717. rbnode->value = value;
  718. } else {
  719. /* bail out early, no need to create the rbnode yet */
  720. if (!value)
  721. return 0;
  722. /*
  723. * for uninitialized registers whose value is changed
  724. * from the default zero, create an rbnode and insert
  725. * it into the tree.
  726. */
  727. rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
  728. if (!rbnode)
  729. return -ENOMEM;
  730. rbnode->reg = reg;
  731. rbnode->value = value;
  732. snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
  733. }
  734. return 0;
  735. }
  736. static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
  737. unsigned int reg, unsigned int *value)
  738. {
  739. struct snd_soc_rbtree_ctx *rbtree_ctx;
  740. struct snd_soc_rbtree_node *rbnode;
  741. rbtree_ctx = codec->reg_cache;
  742. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  743. if (rbnode) {
  744. *value = rbnode->value;
  745. } else {
  746. /* uninitialized registers default to 0 */
  747. *value = 0;
  748. }
  749. return 0;
  750. }
  751. static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
  752. {
  753. struct rb_node *next;
  754. struct snd_soc_rbtree_ctx *rbtree_ctx;
  755. struct snd_soc_rbtree_node *rbtree_node;
  756. /* if we've already been called then just return */
  757. rbtree_ctx = codec->reg_cache;
  758. if (!rbtree_ctx)
  759. return 0;
  760. /* free up the rbtree */
  761. next = rb_first(&rbtree_ctx->root);
  762. while (next) {
  763. rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
  764. next = rb_next(&rbtree_node->node);
  765. rb_erase(&rbtree_node->node, &rbtree_ctx->root);
  766. kfree(rbtree_node);
  767. }
  768. /* release the resources */
  769. kfree(codec->reg_cache);
  770. codec->reg_cache = NULL;
  771. return 0;
  772. }
  773. static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
  774. {
  775. struct snd_soc_rbtree_ctx *rbtree_ctx;
  776. codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
  777. if (!codec->reg_cache)
  778. return -ENOMEM;
  779. rbtree_ctx = codec->reg_cache;
  780. rbtree_ctx->root = RB_ROOT;
  781. if (!codec->reg_def_copy)
  782. return 0;
  783. /*
  784. * populate the rbtree with the initialized registers. All other
  785. * registers will be inserted into the tree when they are first written.
  786. *
  787. * The reasoning behind this, is that we need to step through and
  788. * dereference the cache in u8/u16 increments without sacrificing
  789. * portability. This could also be done using memcpy() but that would
  790. * be slightly more cryptic.
  791. */
  792. #define snd_soc_rbtree_populate(cache) \
  793. ({ \
  794. int ret, i; \
  795. struct snd_soc_rbtree_node *rbtree_node; \
  796. \
  797. ret = 0; \
  798. cache = codec->reg_def_copy; \
  799. for (i = 0; i < codec->driver->reg_cache_size; ++i) { \
  800. if (!cache[i]) \
  801. continue; \
  802. rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL); \
  803. if (!rbtree_node) { \
  804. ret = -ENOMEM; \
  805. snd_soc_cache_exit(codec); \
  806. break; \
  807. } \
  808. rbtree_node->reg = i; \
  809. rbtree_node->value = cache[i]; \
  810. rbtree_node->defval = cache[i]; \
  811. snd_soc_rbtree_insert(&rbtree_ctx->root, \
  812. rbtree_node); \
  813. } \
  814. ret; \
  815. })
  816. switch (codec->driver->reg_word_size) {
  817. case 1: {
  818. const u8 *cache;
  819. return snd_soc_rbtree_populate(cache);
  820. }
  821. case 2: {
  822. const u16 *cache;
  823. return snd_soc_rbtree_populate(cache);
  824. }
  825. default:
  826. BUG();
  827. }
  828. return 0;
  829. }
  830. #ifdef CONFIG_SND_SOC_CACHE_LZO
  831. struct snd_soc_lzo_ctx {
  832. void *wmem;
  833. void *dst;
  834. const void *src;
  835. size_t src_len;
  836. size_t dst_len;
  837. size_t decompressed_size;
  838. unsigned long *sync_bmp;
  839. int sync_bmp_nbits;
  840. };
  841. #define LZO_BLOCK_NUM 8
  842. static int snd_soc_lzo_block_count(void)
  843. {
  844. return LZO_BLOCK_NUM;
  845. }
  846. static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
  847. {
  848. lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
  849. if (!lzo_ctx->wmem)
  850. return -ENOMEM;
  851. return 0;
  852. }
  853. static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
  854. {
  855. size_t compress_size;
  856. int ret;
  857. ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
  858. lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
  859. if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
  860. return -EINVAL;
  861. lzo_ctx->dst_len = compress_size;
  862. return 0;
  863. }
  864. static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
  865. {
  866. size_t dst_len;
  867. int ret;
  868. dst_len = lzo_ctx->dst_len;
  869. ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
  870. lzo_ctx->dst, &dst_len);
  871. if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
  872. return -EINVAL;
  873. return 0;
  874. }
  875. static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
  876. struct snd_soc_lzo_ctx *lzo_ctx)
  877. {
  878. int ret;
  879. lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
  880. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  881. if (!lzo_ctx->dst) {
  882. lzo_ctx->dst_len = 0;
  883. return -ENOMEM;
  884. }
  885. ret = snd_soc_lzo_compress(lzo_ctx);
  886. if (ret < 0)
  887. return ret;
  888. return 0;
  889. }
  890. static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
  891. struct snd_soc_lzo_ctx *lzo_ctx)
  892. {
  893. int ret;
  894. lzo_ctx->dst_len = lzo_ctx->decompressed_size;
  895. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  896. if (!lzo_ctx->dst) {
  897. lzo_ctx->dst_len = 0;
  898. return -ENOMEM;
  899. }
  900. ret = snd_soc_lzo_decompress(lzo_ctx);
  901. if (ret < 0)
  902. return ret;
  903. return 0;
  904. }
  905. static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
  906. unsigned int reg)
  907. {
  908. const struct snd_soc_codec_driver *codec_drv;
  909. size_t reg_size;
  910. codec_drv = codec->driver;
  911. reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
  912. return (reg * codec_drv->reg_word_size) /
  913. DIV_ROUND_UP(reg_size, snd_soc_lzo_block_count());
  914. }
  915. static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
  916. unsigned int reg)
  917. {
  918. const struct snd_soc_codec_driver *codec_drv;
  919. size_t reg_size;
  920. codec_drv = codec->driver;
  921. reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
  922. return reg % (DIV_ROUND_UP(reg_size, snd_soc_lzo_block_count()) /
  923. codec_drv->reg_word_size);
  924. }
  925. static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
  926. {
  927. const struct snd_soc_codec_driver *codec_drv;
  928. size_t reg_size;
  929. codec_drv = codec->driver;
  930. reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
  931. return DIV_ROUND_UP(reg_size, snd_soc_lzo_block_count());
  932. }
  933. static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
  934. {
  935. struct snd_soc_lzo_ctx **lzo_blocks;
  936. unsigned int val;
  937. int i;
  938. int ret;
  939. lzo_blocks = codec->reg_cache;
  940. for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
  941. ret = snd_soc_cache_read(codec, i, &val);
  942. if (ret)
  943. return ret;
  944. ret = snd_soc_write(codec, i, val);
  945. if (ret)
  946. return ret;
  947. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  948. i, val);
  949. }
  950. return 0;
  951. }
  952. static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
  953. unsigned int reg, unsigned int value)
  954. {
  955. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  956. int ret, blkindex, blkpos;
  957. size_t blksize, tmp_dst_len;
  958. void *tmp_dst;
  959. /* index of the compressed lzo block */
  960. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  961. /* register index within the decompressed block */
  962. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  963. /* size of the compressed block */
  964. blksize = snd_soc_lzo_get_blksize(codec);
  965. lzo_blocks = codec->reg_cache;
  966. lzo_block = lzo_blocks[blkindex];
  967. /* save the pointer and length of the compressed block */
  968. tmp_dst = lzo_block->dst;
  969. tmp_dst_len = lzo_block->dst_len;
  970. /* prepare the source to be the compressed block */
  971. lzo_block->src = lzo_block->dst;
  972. lzo_block->src_len = lzo_block->dst_len;
  973. /* decompress the block */
  974. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  975. if (ret < 0) {
  976. kfree(lzo_block->dst);
  977. goto out;
  978. }
  979. /* write the new value to the cache */
  980. switch (codec->driver->reg_word_size) {
  981. case 1: {
  982. u8 *cache;
  983. cache = lzo_block->dst;
  984. if (cache[blkpos] == value) {
  985. kfree(lzo_block->dst);
  986. goto out;
  987. }
  988. cache[blkpos] = value;
  989. }
  990. break;
  991. case 2: {
  992. u16 *cache;
  993. cache = lzo_block->dst;
  994. if (cache[blkpos] == value) {
  995. kfree(lzo_block->dst);
  996. goto out;
  997. }
  998. cache[blkpos] = value;
  999. }
  1000. break;
  1001. default:
  1002. BUG();
  1003. }
  1004. /* prepare the source to be the decompressed block */
  1005. lzo_block->src = lzo_block->dst;
  1006. lzo_block->src_len = lzo_block->dst_len;
  1007. /* compress the block */
  1008. ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
  1009. if (ret < 0) {
  1010. kfree(lzo_block->dst);
  1011. kfree(lzo_block->src);
  1012. goto out;
  1013. }
  1014. /* set the bit so we know we have to sync this register */
  1015. set_bit(reg, lzo_block->sync_bmp);
  1016. kfree(tmp_dst);
  1017. kfree(lzo_block->src);
  1018. return 0;
  1019. out:
  1020. lzo_block->dst = tmp_dst;
  1021. lzo_block->dst_len = tmp_dst_len;
  1022. return ret;
  1023. }
  1024. static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
  1025. unsigned int reg, unsigned int *value)
  1026. {
  1027. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  1028. int ret, blkindex, blkpos;
  1029. size_t blksize, tmp_dst_len;
  1030. void *tmp_dst;
  1031. *value = 0;
  1032. /* index of the compressed lzo block */
  1033. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  1034. /* register index within the decompressed block */
  1035. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  1036. /* size of the compressed block */
  1037. blksize = snd_soc_lzo_get_blksize(codec);
  1038. lzo_blocks = codec->reg_cache;
  1039. lzo_block = lzo_blocks[blkindex];
  1040. /* save the pointer and length of the compressed block */
  1041. tmp_dst = lzo_block->dst;
  1042. tmp_dst_len = lzo_block->dst_len;
  1043. /* prepare the source to be the compressed block */
  1044. lzo_block->src = lzo_block->dst;
  1045. lzo_block->src_len = lzo_block->dst_len;
  1046. /* decompress the block */
  1047. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  1048. if (ret >= 0) {
  1049. /* fetch the value from the cache */
  1050. switch (codec->driver->reg_word_size) {
  1051. case 1: {
  1052. u8 *cache;
  1053. cache = lzo_block->dst;
  1054. *value = cache[blkpos];
  1055. }
  1056. break;
  1057. case 2: {
  1058. u16 *cache;
  1059. cache = lzo_block->dst;
  1060. *value = cache[blkpos];
  1061. }
  1062. break;
  1063. default:
  1064. BUG();
  1065. }
  1066. }
  1067. kfree(lzo_block->dst);
  1068. /* restore the pointer and length of the compressed block */
  1069. lzo_block->dst = tmp_dst;
  1070. lzo_block->dst_len = tmp_dst_len;
  1071. return 0;
  1072. }
  1073. static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
  1074. {
  1075. struct snd_soc_lzo_ctx **lzo_blocks;
  1076. int i, blkcount;
  1077. lzo_blocks = codec->reg_cache;
  1078. if (!lzo_blocks)
  1079. return 0;
  1080. blkcount = snd_soc_lzo_block_count();
  1081. /*
  1082. * the pointer to the bitmap used for syncing the cache
  1083. * is shared amongst all lzo_blocks. Ensure it is freed
  1084. * only once.
  1085. */
  1086. if (lzo_blocks[0])
  1087. kfree(lzo_blocks[0]->sync_bmp);
  1088. for (i = 0; i < blkcount; ++i) {
  1089. if (lzo_blocks[i]) {
  1090. kfree(lzo_blocks[i]->wmem);
  1091. kfree(lzo_blocks[i]->dst);
  1092. }
  1093. /* each lzo_block is a pointer returned by kmalloc or NULL */
  1094. kfree(lzo_blocks[i]);
  1095. }
  1096. kfree(lzo_blocks);
  1097. codec->reg_cache = NULL;
  1098. return 0;
  1099. }
  1100. static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
  1101. {
  1102. struct snd_soc_lzo_ctx **lzo_blocks;
  1103. size_t reg_size, bmp_size;
  1104. const struct snd_soc_codec_driver *codec_drv;
  1105. int ret, tofree, i, blksize, blkcount;
  1106. const char *p, *end;
  1107. unsigned long *sync_bmp;
  1108. ret = 0;
  1109. codec_drv = codec->driver;
  1110. reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
  1111. /*
  1112. * If we have not been given a default register cache
  1113. * then allocate a dummy zero-ed out region, compress it
  1114. * and remember to free it afterwards.
  1115. */
  1116. tofree = 0;
  1117. if (!codec->reg_def_copy)
  1118. tofree = 1;
  1119. if (!codec->reg_def_copy) {
  1120. codec->reg_def_copy = kzalloc(reg_size,
  1121. GFP_KERNEL);
  1122. if (!codec->reg_def_copy)
  1123. return -ENOMEM;
  1124. }
  1125. blkcount = snd_soc_lzo_block_count();
  1126. codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
  1127. GFP_KERNEL);
  1128. if (!codec->reg_cache) {
  1129. ret = -ENOMEM;
  1130. goto err_tofree;
  1131. }
  1132. lzo_blocks = codec->reg_cache;
  1133. /*
  1134. * allocate a bitmap to be used when syncing the cache with
  1135. * the hardware. Each time a register is modified, the corresponding
  1136. * bit is set in the bitmap, so we know that we have to sync
  1137. * that register.
  1138. */
  1139. bmp_size = codec_drv->reg_cache_size;
  1140. sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
  1141. GFP_KERNEL);
  1142. if (!sync_bmp) {
  1143. ret = -ENOMEM;
  1144. goto err;
  1145. }
  1146. bitmap_zero(sync_bmp, bmp_size);
  1147. /* allocate the lzo blocks and initialize them */
  1148. for (i = 0; i < blkcount; ++i) {
  1149. lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
  1150. GFP_KERNEL);
  1151. if (!lzo_blocks[i]) {
  1152. kfree(sync_bmp);
  1153. ret = -ENOMEM;
  1154. goto err;
  1155. }
  1156. lzo_blocks[i]->sync_bmp = sync_bmp;
  1157. lzo_blocks[i]->sync_bmp_nbits = bmp_size;
  1158. /* alloc the working space for the compressed block */
  1159. ret = snd_soc_lzo_prepare(lzo_blocks[i]);
  1160. if (ret < 0)
  1161. goto err;
  1162. }
  1163. blksize = snd_soc_lzo_get_blksize(codec);
  1164. p = codec->reg_def_copy;
  1165. end = codec->reg_def_copy + reg_size;
  1166. /* compress the register map and fill the lzo blocks */
  1167. for (i = 0; i < blkcount; ++i, p += blksize) {
  1168. lzo_blocks[i]->src = p;
  1169. if (p + blksize > end)
  1170. lzo_blocks[i]->src_len = end - p;
  1171. else
  1172. lzo_blocks[i]->src_len = blksize;
  1173. ret = snd_soc_lzo_compress_cache_block(codec,
  1174. lzo_blocks[i]);
  1175. if (ret < 0)
  1176. goto err;
  1177. lzo_blocks[i]->decompressed_size =
  1178. lzo_blocks[i]->src_len;
  1179. }
  1180. if (tofree) {
  1181. kfree(codec->reg_def_copy);
  1182. codec->reg_def_copy = NULL;
  1183. }
  1184. return 0;
  1185. err:
  1186. snd_soc_cache_exit(codec);
  1187. err_tofree:
  1188. if (tofree) {
  1189. kfree(codec->reg_def_copy);
  1190. codec->reg_def_copy = NULL;
  1191. }
  1192. return ret;
  1193. }
  1194. #endif
  1195. static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
  1196. {
  1197. int i;
  1198. int ret;
  1199. const struct snd_soc_codec_driver *codec_drv;
  1200. unsigned int val;
  1201. codec_drv = codec->driver;
  1202. for (i = 0; i < codec_drv->reg_cache_size; ++i) {
  1203. ret = snd_soc_cache_read(codec, i, &val);
  1204. if (ret)
  1205. return ret;
  1206. if (codec_drv->reg_cache_default) {
  1207. switch (codec_drv->reg_word_size) {
  1208. case 1: {
  1209. const u8 *cache;
  1210. cache = codec_drv->reg_cache_default;
  1211. if (cache[i] == val)
  1212. continue;
  1213. }
  1214. break;
  1215. case 2: {
  1216. const u16 *cache;
  1217. cache = codec_drv->reg_cache_default;
  1218. if (cache[i] == val)
  1219. continue;
  1220. }
  1221. break;
  1222. default:
  1223. BUG();
  1224. }
  1225. }
  1226. ret = snd_soc_write(codec, i, val);
  1227. if (ret)
  1228. return ret;
  1229. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  1230. i, val);
  1231. }
  1232. return 0;
  1233. }
  1234. static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
  1235. unsigned int reg, unsigned int value)
  1236. {
  1237. switch (codec->driver->reg_word_size) {
  1238. case 1: {
  1239. u8 *cache;
  1240. cache = codec->reg_cache;
  1241. cache[reg] = value;
  1242. }
  1243. break;
  1244. case 2: {
  1245. u16 *cache;
  1246. cache = codec->reg_cache;
  1247. cache[reg] = value;
  1248. }
  1249. break;
  1250. default:
  1251. BUG();
  1252. }
  1253. return 0;
  1254. }
  1255. static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
  1256. unsigned int reg, unsigned int *value)
  1257. {
  1258. switch (codec->driver->reg_word_size) {
  1259. case 1: {
  1260. u8 *cache;
  1261. cache = codec->reg_cache;
  1262. *value = cache[reg];
  1263. }
  1264. break;
  1265. case 2: {
  1266. u16 *cache;
  1267. cache = codec->reg_cache;
  1268. *value = cache[reg];
  1269. }
  1270. break;
  1271. default:
  1272. BUG();
  1273. }
  1274. return 0;
  1275. }
  1276. static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
  1277. {
  1278. if (!codec->reg_cache)
  1279. return 0;
  1280. kfree(codec->reg_cache);
  1281. codec->reg_cache = NULL;
  1282. return 0;
  1283. }
  1284. static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
  1285. {
  1286. const struct snd_soc_codec_driver *codec_drv;
  1287. size_t reg_size;
  1288. codec_drv = codec->driver;
  1289. reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size;
  1290. /*
  1291. * for flat compression, we don't need to keep a copy of the
  1292. * original defaults register cache as it will definitely not
  1293. * be marked as __devinitconst
  1294. */
  1295. kfree(codec->reg_def_copy);
  1296. codec->reg_def_copy = NULL;
  1297. if (codec_drv->reg_cache_default)
  1298. codec->reg_cache = kmemdup(codec_drv->reg_cache_default,
  1299. reg_size, GFP_KERNEL);
  1300. else
  1301. codec->reg_cache = kzalloc(reg_size, GFP_KERNEL);
  1302. if (!codec->reg_cache)
  1303. return -ENOMEM;
  1304. return 0;
  1305. }
  1306. /* an array of all supported compression types */
  1307. static const struct snd_soc_cache_ops cache_types[] = {
  1308. /* Flat *must* be the first entry for fallback */
  1309. {
  1310. .id = SND_SOC_FLAT_COMPRESSION,
  1311. .name = "flat",
  1312. .init = snd_soc_flat_cache_init,
  1313. .exit = snd_soc_flat_cache_exit,
  1314. .read = snd_soc_flat_cache_read,
  1315. .write = snd_soc_flat_cache_write,
  1316. .sync = snd_soc_flat_cache_sync
  1317. },
  1318. #ifdef CONFIG_SND_SOC_CACHE_LZO
  1319. {
  1320. .id = SND_SOC_LZO_COMPRESSION,
  1321. .name = "LZO",
  1322. .init = snd_soc_lzo_cache_init,
  1323. .exit = snd_soc_lzo_cache_exit,
  1324. .read = snd_soc_lzo_cache_read,
  1325. .write = snd_soc_lzo_cache_write,
  1326. .sync = snd_soc_lzo_cache_sync
  1327. },
  1328. #endif
  1329. {
  1330. .id = SND_SOC_RBTREE_COMPRESSION,
  1331. .name = "rbtree",
  1332. .init = snd_soc_rbtree_cache_init,
  1333. .exit = snd_soc_rbtree_cache_exit,
  1334. .read = snd_soc_rbtree_cache_read,
  1335. .write = snd_soc_rbtree_cache_write,
  1336. .sync = snd_soc_rbtree_cache_sync
  1337. }
  1338. };
  1339. int snd_soc_cache_init(struct snd_soc_codec *codec)
  1340. {
  1341. int i;
  1342. for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
  1343. if (cache_types[i].id == codec->compress_type)
  1344. break;
  1345. /* Fall back to flat compression */
  1346. if (i == ARRAY_SIZE(cache_types)) {
  1347. dev_warn(codec->dev, "Could not match compress type: %d\n",
  1348. codec->compress_type);
  1349. i = 0;
  1350. }
  1351. mutex_init(&codec->cache_rw_mutex);
  1352. codec->cache_ops = &cache_types[i];
  1353. if (codec->cache_ops->init) {
  1354. if (codec->cache_ops->name)
  1355. dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
  1356. codec->cache_ops->name, codec->name);
  1357. return codec->cache_ops->init(codec);
  1358. }
  1359. return -EINVAL;
  1360. }
  1361. /*
  1362. * NOTE: keep in mind that this function might be called
  1363. * multiple times.
  1364. */
  1365. int snd_soc_cache_exit(struct snd_soc_codec *codec)
  1366. {
  1367. if (codec->cache_ops && codec->cache_ops->exit) {
  1368. if (codec->cache_ops->name)
  1369. dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
  1370. codec->cache_ops->name, codec->name);
  1371. return codec->cache_ops->exit(codec);
  1372. }
  1373. return -EINVAL;
  1374. }
  1375. /**
  1376. * snd_soc_cache_read: Fetch the value of a given register from the cache.
  1377. *
  1378. * @codec: CODEC to configure.
  1379. * @reg: The register index.
  1380. * @value: The value to be returned.
  1381. */
  1382. int snd_soc_cache_read(struct snd_soc_codec *codec,
  1383. unsigned int reg, unsigned int *value)
  1384. {
  1385. int ret;
  1386. mutex_lock(&codec->cache_rw_mutex);
  1387. if (value && codec->cache_ops && codec->cache_ops->read) {
  1388. ret = codec->cache_ops->read(codec, reg, value);
  1389. mutex_unlock(&codec->cache_rw_mutex);
  1390. return ret;
  1391. }
  1392. mutex_unlock(&codec->cache_rw_mutex);
  1393. return -EINVAL;
  1394. }
  1395. EXPORT_SYMBOL_GPL(snd_soc_cache_read);
  1396. /**
  1397. * snd_soc_cache_write: Set the value of a given register in the cache.
  1398. *
  1399. * @codec: CODEC to configure.
  1400. * @reg: The register index.
  1401. * @value: The new register value.
  1402. */
  1403. int snd_soc_cache_write(struct snd_soc_codec *codec,
  1404. unsigned int reg, unsigned int value)
  1405. {
  1406. int ret;
  1407. mutex_lock(&codec->cache_rw_mutex);
  1408. if (codec->cache_ops && codec->cache_ops->write) {
  1409. ret = codec->cache_ops->write(codec, reg, value);
  1410. mutex_unlock(&codec->cache_rw_mutex);
  1411. return ret;
  1412. }
  1413. mutex_unlock(&codec->cache_rw_mutex);
  1414. return -EINVAL;
  1415. }
  1416. EXPORT_SYMBOL_GPL(snd_soc_cache_write);
  1417. /**
  1418. * snd_soc_cache_sync: Sync the register cache with the hardware.
  1419. *
  1420. * @codec: CODEC to configure.
  1421. *
  1422. * Any registers that should not be synced should be marked as
  1423. * volatile. In general drivers can choose not to use the provided
  1424. * syncing functionality if they so require.
  1425. */
  1426. int snd_soc_cache_sync(struct snd_soc_codec *codec)
  1427. {
  1428. int ret;
  1429. if (!codec->cache_sync) {
  1430. return 0;
  1431. }
  1432. if (codec->cache_ops && codec->cache_ops->sync) {
  1433. if (codec->cache_ops->name)
  1434. dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
  1435. codec->cache_ops->name, codec->name);
  1436. ret = codec->cache_ops->sync(codec);
  1437. if (!ret)
  1438. codec->cache_sync = 0;
  1439. return ret;
  1440. }
  1441. return -EINVAL;
  1442. }
  1443. EXPORT_SYMBOL_GPL(snd_soc_cache_sync);