wm831x-dcdc.c 26 KB

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  1. /*
  2. * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/bitops.h>
  17. #include <linux/err.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/gpio.h>
  23. #include <linux/slab.h>
  24. #include <linux/mfd/wm831x/core.h>
  25. #include <linux/mfd/wm831x/regulator.h>
  26. #include <linux/mfd/wm831x/pdata.h>
  27. #define WM831X_BUCKV_MAX_SELECTOR 0x68
  28. #define WM831X_BUCKP_MAX_SELECTOR 0x66
  29. #define WM831X_DCDC_MODE_FAST 0
  30. #define WM831X_DCDC_MODE_NORMAL 1
  31. #define WM831X_DCDC_MODE_IDLE 2
  32. #define WM831X_DCDC_MODE_STANDBY 3
  33. #define WM831X_DCDC_MAX_NAME 6
  34. /* Register offsets in control block */
  35. #define WM831X_DCDC_CONTROL_1 0
  36. #define WM831X_DCDC_CONTROL_2 1
  37. #define WM831X_DCDC_ON_CONFIG 2
  38. #define WM831X_DCDC_SLEEP_CONTROL 3
  39. #define WM831X_DCDC_DVS_CONTROL 4
  40. /*
  41. * Shared
  42. */
  43. struct wm831x_dcdc {
  44. char name[WM831X_DCDC_MAX_NAME];
  45. struct regulator_desc desc;
  46. int base;
  47. struct wm831x *wm831x;
  48. struct regulator_dev *regulator;
  49. int dvs_gpio;
  50. int dvs_gpio_state;
  51. int on_vsel;
  52. int dvs_vsel;
  53. };
  54. static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
  55. {
  56. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  57. struct wm831x *wm831x = dcdc->wm831x;
  58. int mask = 1 << rdev_get_id(rdev);
  59. int reg;
  60. reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);
  61. if (reg < 0)
  62. return reg;
  63. if (reg & mask)
  64. return 1;
  65. else
  66. return 0;
  67. }
  68. static int wm831x_dcdc_enable(struct regulator_dev *rdev)
  69. {
  70. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  71. struct wm831x *wm831x = dcdc->wm831x;
  72. int mask = 1 << rdev_get_id(rdev);
  73. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask);
  74. }
  75. static int wm831x_dcdc_disable(struct regulator_dev *rdev)
  76. {
  77. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  78. struct wm831x *wm831x = dcdc->wm831x;
  79. int mask = 1 << rdev_get_id(rdev);
  80. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);
  81. }
  82. static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
  83. {
  84. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  85. struct wm831x *wm831x = dcdc->wm831x;
  86. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  87. int val;
  88. val = wm831x_reg_read(wm831x, reg);
  89. if (val < 0)
  90. return val;
  91. val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
  92. switch (val) {
  93. case WM831X_DCDC_MODE_FAST:
  94. return REGULATOR_MODE_FAST;
  95. case WM831X_DCDC_MODE_NORMAL:
  96. return REGULATOR_MODE_NORMAL;
  97. case WM831X_DCDC_MODE_STANDBY:
  98. return REGULATOR_MODE_STANDBY;
  99. case WM831X_DCDC_MODE_IDLE:
  100. return REGULATOR_MODE_IDLE;
  101. default:
  102. BUG();
  103. }
  104. }
  105. static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
  106. unsigned int mode)
  107. {
  108. int val;
  109. switch (mode) {
  110. case REGULATOR_MODE_FAST:
  111. val = WM831X_DCDC_MODE_FAST;
  112. break;
  113. case REGULATOR_MODE_NORMAL:
  114. val = WM831X_DCDC_MODE_NORMAL;
  115. break;
  116. case REGULATOR_MODE_STANDBY:
  117. val = WM831X_DCDC_MODE_STANDBY;
  118. break;
  119. case REGULATOR_MODE_IDLE:
  120. val = WM831X_DCDC_MODE_IDLE;
  121. break;
  122. default:
  123. return -EINVAL;
  124. }
  125. return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
  126. val << WM831X_DC1_ON_MODE_SHIFT);
  127. }
  128. static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
  129. {
  130. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  131. struct wm831x *wm831x = dcdc->wm831x;
  132. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  133. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  134. }
  135. static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
  136. unsigned int mode)
  137. {
  138. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  139. struct wm831x *wm831x = dcdc->wm831x;
  140. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  141. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  142. }
  143. static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
  144. {
  145. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  146. struct wm831x *wm831x = dcdc->wm831x;
  147. int ret;
  148. /* First, check for errors */
  149. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  150. if (ret < 0)
  151. return ret;
  152. if (ret & (1 << rdev_get_id(rdev))) {
  153. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  154. rdev_get_id(rdev) + 1);
  155. return REGULATOR_STATUS_ERROR;
  156. }
  157. /* DCDC1 and DCDC2 can additionally detect high voltage/current */
  158. if (rdev_get_id(rdev) < 2) {
  159. if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
  160. dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
  161. rdev_get_id(rdev) + 1);
  162. return REGULATOR_STATUS_ERROR;
  163. }
  164. if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
  165. dev_dbg(wm831x->dev, "DCDC%d over current\n",
  166. rdev_get_id(rdev) + 1);
  167. return REGULATOR_STATUS_ERROR;
  168. }
  169. }
  170. /* Is the regulator on? */
  171. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  172. if (ret < 0)
  173. return ret;
  174. if (!(ret & (1 << rdev_get_id(rdev))))
  175. return REGULATOR_STATUS_OFF;
  176. /* TODO: When we handle hardware control modes so we can report the
  177. * current mode. */
  178. return REGULATOR_STATUS_ON;
  179. }
  180. static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
  181. {
  182. struct wm831x_dcdc *dcdc = data;
  183. regulator_notifier_call_chain(dcdc->regulator,
  184. REGULATOR_EVENT_UNDER_VOLTAGE,
  185. NULL);
  186. return IRQ_HANDLED;
  187. }
  188. static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
  189. {
  190. struct wm831x_dcdc *dcdc = data;
  191. regulator_notifier_call_chain(dcdc->regulator,
  192. REGULATOR_EVENT_OVER_CURRENT,
  193. NULL);
  194. return IRQ_HANDLED;
  195. }
  196. /*
  197. * BUCKV specifics
  198. */
  199. static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
  200. unsigned selector)
  201. {
  202. if (selector <= 0x8)
  203. return 600000;
  204. if (selector <= WM831X_BUCKV_MAX_SELECTOR)
  205. return 600000 + ((selector - 0x8) * 12500);
  206. return -EINVAL;
  207. }
  208. static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
  209. int min_uV, int max_uV)
  210. {
  211. u16 vsel;
  212. if (min_uV < 600000)
  213. vsel = 0;
  214. else if (min_uV <= 1800000)
  215. vsel = ((min_uV - 600000) / 12500) + 8;
  216. else
  217. return -EINVAL;
  218. if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
  219. return -EINVAL;
  220. return vsel;
  221. }
  222. static int wm831x_buckv_select_max_voltage(struct regulator_dev *rdev,
  223. int min_uV, int max_uV)
  224. {
  225. u16 vsel;
  226. if (max_uV < 600000 || max_uV > 1800000)
  227. return -EINVAL;
  228. vsel = ((max_uV - 600000) / 12500) + 8;
  229. if (wm831x_buckv_list_voltage(rdev, vsel) < min_uV ||
  230. wm831x_buckv_list_voltage(rdev, vsel) < max_uV)
  231. return -EINVAL;
  232. return vsel;
  233. }
  234. static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
  235. {
  236. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  237. if (state == dcdc->dvs_gpio_state)
  238. return 0;
  239. dcdc->dvs_gpio_state = state;
  240. gpio_set_value(dcdc->dvs_gpio, state);
  241. /* Should wait for DVS state change to be asserted if we have
  242. * a GPIO for it, for now assume the device is configured
  243. * for the fastest possible transition.
  244. */
  245. return 0;
  246. }
  247. static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
  248. int min_uV, int max_uV, unsigned *selector)
  249. {
  250. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  251. struct wm831x *wm831x = dcdc->wm831x;
  252. int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  253. int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
  254. int vsel, ret;
  255. vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
  256. if (vsel < 0)
  257. return vsel;
  258. *selector = vsel;
  259. /* If this value is already set then do a GPIO update if we can */
  260. if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
  261. return wm831x_buckv_set_dvs(rdev, 0);
  262. if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
  263. return wm831x_buckv_set_dvs(rdev, 1);
  264. /* Always set the ON status to the minimum voltage */
  265. ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
  266. if (ret < 0)
  267. return ret;
  268. dcdc->on_vsel = vsel;
  269. if (!dcdc->dvs_gpio)
  270. return ret;
  271. /* Kick the voltage transition now */
  272. ret = wm831x_buckv_set_dvs(rdev, 0);
  273. if (ret < 0)
  274. return ret;
  275. /* Set the high voltage as the DVS voltage. This is optimised
  276. * for CPUfreq usage, most processors will keep the maximum
  277. * voltage constant and lower the minimum with the frequency. */
  278. vsel = wm831x_buckv_select_max_voltage(rdev, min_uV, max_uV);
  279. if (vsel < 0) {
  280. /* This should never happen - at worst the same vsel
  281. * should be chosen */
  282. WARN_ON(vsel < 0);
  283. return 0;
  284. }
  285. /* Don't bother if it's the same VSEL we're already using */
  286. if (vsel == dcdc->on_vsel)
  287. return 0;
  288. ret = wm831x_set_bits(wm831x, dvs_reg, WM831X_DC1_DVS_VSEL_MASK, vsel);
  289. if (ret == 0)
  290. dcdc->dvs_vsel = vsel;
  291. else
  292. dev_warn(wm831x->dev, "Failed to set DCDC DVS VSEL: %d\n",
  293. ret);
  294. return 0;
  295. }
  296. static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
  297. int uV)
  298. {
  299. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  300. struct wm831x *wm831x = dcdc->wm831x;
  301. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  302. int vsel;
  303. vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
  304. if (vsel < 0)
  305. return vsel;
  306. return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
  307. }
  308. static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
  309. {
  310. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  311. if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
  312. return dcdc->dvs_vsel;
  313. else
  314. return dcdc->on_vsel;
  315. }
  316. /* Current limit options */
  317. static u16 wm831x_dcdc_ilim[] = {
  318. 125, 250, 375, 500, 625, 750, 875, 1000
  319. };
  320. static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
  321. int min_uA, int max_uA)
  322. {
  323. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  324. struct wm831x *wm831x = dcdc->wm831x;
  325. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  326. int i;
  327. for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
  328. if (max_uA <= wm831x_dcdc_ilim[i])
  329. break;
  330. }
  331. if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
  332. return -EINVAL;
  333. return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, i);
  334. }
  335. static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
  336. {
  337. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  338. struct wm831x *wm831x = dcdc->wm831x;
  339. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  340. int val;
  341. val = wm831x_reg_read(wm831x, reg);
  342. if (val < 0)
  343. return val;
  344. return wm831x_dcdc_ilim[val & WM831X_DC1_HC_THR_MASK];
  345. }
  346. static struct regulator_ops wm831x_buckv_ops = {
  347. .set_voltage = wm831x_buckv_set_voltage,
  348. .get_voltage_sel = wm831x_buckv_get_voltage_sel,
  349. .list_voltage = wm831x_buckv_list_voltage,
  350. .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
  351. .set_current_limit = wm831x_buckv_set_current_limit,
  352. .get_current_limit = wm831x_buckv_get_current_limit,
  353. .is_enabled = wm831x_dcdc_is_enabled,
  354. .enable = wm831x_dcdc_enable,
  355. .disable = wm831x_dcdc_disable,
  356. .get_status = wm831x_dcdc_get_status,
  357. .get_mode = wm831x_dcdc_get_mode,
  358. .set_mode = wm831x_dcdc_set_mode,
  359. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  360. };
  361. /*
  362. * Set up DVS control. We just log errors since we can still run
  363. * (with reduced performance) if we fail.
  364. */
  365. static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
  366. struct wm831x_buckv_pdata *pdata)
  367. {
  368. struct wm831x *wm831x = dcdc->wm831x;
  369. int ret;
  370. u16 ctrl;
  371. if (!pdata || !pdata->dvs_gpio)
  372. return;
  373. switch (pdata->dvs_control_src) {
  374. case 1:
  375. ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
  376. break;
  377. case 2:
  378. ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
  379. break;
  380. default:
  381. dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
  382. pdata->dvs_control_src, dcdc->name);
  383. return;
  384. }
  385. ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
  386. WM831X_DC1_DVS_SRC_MASK, ctrl);
  387. if (ret < 0) {
  388. dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
  389. dcdc->name, ret);
  390. return;
  391. }
  392. ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
  393. if (ret < 0) {
  394. dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
  395. dcdc->name, ret);
  396. return;
  397. }
  398. /* gpiolib won't let us read the GPIO status so pick the higher
  399. * of the two existing voltages so we take it as platform data.
  400. */
  401. dcdc->dvs_gpio_state = pdata->dvs_init_state;
  402. ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
  403. if (ret < 0) {
  404. dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
  405. dcdc->name, ret);
  406. gpio_free(pdata->dvs_gpio);
  407. return;
  408. }
  409. dcdc->dvs_gpio = pdata->dvs_gpio;
  410. }
  411. static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
  412. {
  413. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  414. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  415. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  416. struct wm831x_dcdc *dcdc;
  417. struct resource *res;
  418. int ret, irq;
  419. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  420. if (pdata == NULL || pdata->dcdc[id] == NULL)
  421. return -ENODEV;
  422. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  423. if (dcdc == NULL) {
  424. dev_err(&pdev->dev, "Unable to allocate private data\n");
  425. return -ENOMEM;
  426. }
  427. dcdc->wm831x = wm831x;
  428. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  429. if (res == NULL) {
  430. dev_err(&pdev->dev, "No I/O resource\n");
  431. ret = -EINVAL;
  432. goto err;
  433. }
  434. dcdc->base = res->start;
  435. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  436. dcdc->desc.name = dcdc->name;
  437. dcdc->desc.id = id;
  438. dcdc->desc.type = REGULATOR_VOLTAGE;
  439. dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
  440. dcdc->desc.ops = &wm831x_buckv_ops;
  441. dcdc->desc.owner = THIS_MODULE;
  442. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  443. if (ret < 0) {
  444. dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
  445. goto err;
  446. }
  447. dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
  448. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  449. if (ret < 0) {
  450. dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
  451. goto err;
  452. }
  453. dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
  454. if (pdata->dcdc[id])
  455. wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
  456. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  457. pdata->dcdc[id], dcdc);
  458. if (IS_ERR(dcdc->regulator)) {
  459. ret = PTR_ERR(dcdc->regulator);
  460. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  461. id + 1, ret);
  462. goto err;
  463. }
  464. irq = platform_get_irq_byname(pdev, "UV");
  465. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  466. IRQF_TRIGGER_RISING, dcdc->name,
  467. dcdc);
  468. if (ret != 0) {
  469. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  470. irq, ret);
  471. goto err_regulator;
  472. }
  473. irq = platform_get_irq_byname(pdev, "HC");
  474. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_oc_irq,
  475. IRQF_TRIGGER_RISING, dcdc->name,
  476. dcdc);
  477. if (ret != 0) {
  478. dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
  479. irq, ret);
  480. goto err_uv;
  481. }
  482. platform_set_drvdata(pdev, dcdc);
  483. return 0;
  484. err_uv:
  485. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  486. err_regulator:
  487. regulator_unregister(dcdc->regulator);
  488. err:
  489. if (dcdc->dvs_gpio)
  490. gpio_free(dcdc->dvs_gpio);
  491. kfree(dcdc);
  492. return ret;
  493. }
  494. static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
  495. {
  496. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  497. struct wm831x *wm831x = dcdc->wm831x;
  498. platform_set_drvdata(pdev, NULL);
  499. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc);
  500. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  501. regulator_unregister(dcdc->regulator);
  502. if (dcdc->dvs_gpio)
  503. gpio_free(dcdc->dvs_gpio);
  504. kfree(dcdc);
  505. return 0;
  506. }
  507. static struct platform_driver wm831x_buckv_driver = {
  508. .probe = wm831x_buckv_probe,
  509. .remove = __devexit_p(wm831x_buckv_remove),
  510. .driver = {
  511. .name = "wm831x-buckv",
  512. .owner = THIS_MODULE,
  513. },
  514. };
  515. /*
  516. * BUCKP specifics
  517. */
  518. static int wm831x_buckp_list_voltage(struct regulator_dev *rdev,
  519. unsigned selector)
  520. {
  521. if (selector <= WM831X_BUCKP_MAX_SELECTOR)
  522. return 850000 + (selector * 25000);
  523. else
  524. return -EINVAL;
  525. }
  526. static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg,
  527. int min_uV, int max_uV, int *selector)
  528. {
  529. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  530. struct wm831x *wm831x = dcdc->wm831x;
  531. u16 vsel;
  532. if (min_uV <= 34000000)
  533. vsel = (min_uV - 850000) / 25000;
  534. else
  535. return -EINVAL;
  536. if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV)
  537. return -EINVAL;
  538. *selector = vsel;
  539. return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel);
  540. }
  541. static int wm831x_buckp_set_voltage(struct regulator_dev *rdev,
  542. int min_uV, int max_uV,
  543. unsigned *selector)
  544. {
  545. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  546. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  547. return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV,
  548. selector);
  549. }
  550. static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev,
  551. int uV)
  552. {
  553. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  554. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  555. unsigned selector;
  556. return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV, &selector);
  557. }
  558. static int wm831x_buckp_get_voltage_sel(struct regulator_dev *rdev)
  559. {
  560. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  561. struct wm831x *wm831x = dcdc->wm831x;
  562. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  563. int val;
  564. val = wm831x_reg_read(wm831x, reg);
  565. if (val < 0)
  566. return val;
  567. return val & WM831X_DC3_ON_VSEL_MASK;
  568. }
  569. static struct regulator_ops wm831x_buckp_ops = {
  570. .set_voltage = wm831x_buckp_set_voltage,
  571. .get_voltage_sel = wm831x_buckp_get_voltage_sel,
  572. .list_voltage = wm831x_buckp_list_voltage,
  573. .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
  574. .is_enabled = wm831x_dcdc_is_enabled,
  575. .enable = wm831x_dcdc_enable,
  576. .disable = wm831x_dcdc_disable,
  577. .get_status = wm831x_dcdc_get_status,
  578. .get_mode = wm831x_dcdc_get_mode,
  579. .set_mode = wm831x_dcdc_set_mode,
  580. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  581. };
  582. static __devinit int wm831x_buckp_probe(struct platform_device *pdev)
  583. {
  584. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  585. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  586. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  587. struct wm831x_dcdc *dcdc;
  588. struct resource *res;
  589. int ret, irq;
  590. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  591. if (pdata == NULL || pdata->dcdc[id] == NULL)
  592. return -ENODEV;
  593. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  594. if (dcdc == NULL) {
  595. dev_err(&pdev->dev, "Unable to allocate private data\n");
  596. return -ENOMEM;
  597. }
  598. dcdc->wm831x = wm831x;
  599. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  600. if (res == NULL) {
  601. dev_err(&pdev->dev, "No I/O resource\n");
  602. ret = -EINVAL;
  603. goto err;
  604. }
  605. dcdc->base = res->start;
  606. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  607. dcdc->desc.name = dcdc->name;
  608. dcdc->desc.id = id;
  609. dcdc->desc.type = REGULATOR_VOLTAGE;
  610. dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
  611. dcdc->desc.ops = &wm831x_buckp_ops;
  612. dcdc->desc.owner = THIS_MODULE;
  613. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  614. pdata->dcdc[id], dcdc);
  615. if (IS_ERR(dcdc->regulator)) {
  616. ret = PTR_ERR(dcdc->regulator);
  617. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  618. id + 1, ret);
  619. goto err;
  620. }
  621. irq = platform_get_irq_byname(pdev, "UV");
  622. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  623. IRQF_TRIGGER_RISING, dcdc->name,
  624. dcdc);
  625. if (ret != 0) {
  626. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  627. irq, ret);
  628. goto err_regulator;
  629. }
  630. platform_set_drvdata(pdev, dcdc);
  631. return 0;
  632. err_regulator:
  633. regulator_unregister(dcdc->regulator);
  634. err:
  635. kfree(dcdc);
  636. return ret;
  637. }
  638. static __devexit int wm831x_buckp_remove(struct platform_device *pdev)
  639. {
  640. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  641. struct wm831x *wm831x = dcdc->wm831x;
  642. platform_set_drvdata(pdev, NULL);
  643. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  644. regulator_unregister(dcdc->regulator);
  645. kfree(dcdc);
  646. return 0;
  647. }
  648. static struct platform_driver wm831x_buckp_driver = {
  649. .probe = wm831x_buckp_probe,
  650. .remove = __devexit_p(wm831x_buckp_remove),
  651. .driver = {
  652. .name = "wm831x-buckp",
  653. .owner = THIS_MODULE,
  654. },
  655. };
  656. /*
  657. * DCDC boost convertors
  658. */
  659. static int wm831x_boostp_get_status(struct regulator_dev *rdev)
  660. {
  661. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  662. struct wm831x *wm831x = dcdc->wm831x;
  663. int ret;
  664. /* First, check for errors */
  665. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  666. if (ret < 0)
  667. return ret;
  668. if (ret & (1 << rdev_get_id(rdev))) {
  669. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  670. rdev_get_id(rdev) + 1);
  671. return REGULATOR_STATUS_ERROR;
  672. }
  673. /* Is the regulator on? */
  674. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  675. if (ret < 0)
  676. return ret;
  677. if (ret & (1 << rdev_get_id(rdev)))
  678. return REGULATOR_STATUS_ON;
  679. else
  680. return REGULATOR_STATUS_OFF;
  681. }
  682. static struct regulator_ops wm831x_boostp_ops = {
  683. .get_status = wm831x_boostp_get_status,
  684. .is_enabled = wm831x_dcdc_is_enabled,
  685. .enable = wm831x_dcdc_enable,
  686. .disable = wm831x_dcdc_disable,
  687. };
  688. static __devinit int wm831x_boostp_probe(struct platform_device *pdev)
  689. {
  690. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  691. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  692. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  693. struct wm831x_dcdc *dcdc;
  694. struct resource *res;
  695. int ret, irq;
  696. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  697. if (pdata == NULL || pdata->dcdc[id] == NULL)
  698. return -ENODEV;
  699. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  700. if (dcdc == NULL) {
  701. dev_err(&pdev->dev, "Unable to allocate private data\n");
  702. return -ENOMEM;
  703. }
  704. dcdc->wm831x = wm831x;
  705. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  706. if (res == NULL) {
  707. dev_err(&pdev->dev, "No I/O resource\n");
  708. ret = -EINVAL;
  709. goto err;
  710. }
  711. dcdc->base = res->start;
  712. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  713. dcdc->desc.name = dcdc->name;
  714. dcdc->desc.id = id;
  715. dcdc->desc.type = REGULATOR_VOLTAGE;
  716. dcdc->desc.ops = &wm831x_boostp_ops;
  717. dcdc->desc.owner = THIS_MODULE;
  718. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  719. pdata->dcdc[id], dcdc);
  720. if (IS_ERR(dcdc->regulator)) {
  721. ret = PTR_ERR(dcdc->regulator);
  722. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  723. id + 1, ret);
  724. goto err;
  725. }
  726. irq = platform_get_irq_byname(pdev, "UV");
  727. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  728. IRQF_TRIGGER_RISING, dcdc->name,
  729. dcdc);
  730. if (ret != 0) {
  731. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  732. irq, ret);
  733. goto err_regulator;
  734. }
  735. platform_set_drvdata(pdev, dcdc);
  736. return 0;
  737. err_regulator:
  738. regulator_unregister(dcdc->regulator);
  739. err:
  740. kfree(dcdc);
  741. return ret;
  742. }
  743. static __devexit int wm831x_boostp_remove(struct platform_device *pdev)
  744. {
  745. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  746. struct wm831x *wm831x = dcdc->wm831x;
  747. platform_set_drvdata(pdev, NULL);
  748. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  749. regulator_unregister(dcdc->regulator);
  750. kfree(dcdc);
  751. return 0;
  752. }
  753. static struct platform_driver wm831x_boostp_driver = {
  754. .probe = wm831x_boostp_probe,
  755. .remove = __devexit_p(wm831x_boostp_remove),
  756. .driver = {
  757. .name = "wm831x-boostp",
  758. .owner = THIS_MODULE,
  759. },
  760. };
  761. /*
  762. * External Power Enable
  763. *
  764. * These aren't actually DCDCs but look like them in hardware so share
  765. * code.
  766. */
  767. #define WM831X_EPE_BASE 6
  768. static struct regulator_ops wm831x_epe_ops = {
  769. .is_enabled = wm831x_dcdc_is_enabled,
  770. .enable = wm831x_dcdc_enable,
  771. .disable = wm831x_dcdc_disable,
  772. .get_status = wm831x_dcdc_get_status,
  773. };
  774. static __devinit int wm831x_epe_probe(struct platform_device *pdev)
  775. {
  776. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  777. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  778. int id = pdev->id % ARRAY_SIZE(pdata->epe);
  779. struct wm831x_dcdc *dcdc;
  780. int ret;
  781. dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
  782. if (pdata == NULL || pdata->epe[id] == NULL)
  783. return -ENODEV;
  784. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  785. if (dcdc == NULL) {
  786. dev_err(&pdev->dev, "Unable to allocate private data\n");
  787. return -ENOMEM;
  788. }
  789. dcdc->wm831x = wm831x;
  790. /* For current parts this is correct; probably need to revisit
  791. * in future.
  792. */
  793. snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
  794. dcdc->desc.name = dcdc->name;
  795. dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
  796. dcdc->desc.ops = &wm831x_epe_ops;
  797. dcdc->desc.type = REGULATOR_VOLTAGE;
  798. dcdc->desc.owner = THIS_MODULE;
  799. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  800. pdata->epe[id], dcdc);
  801. if (IS_ERR(dcdc->regulator)) {
  802. ret = PTR_ERR(dcdc->regulator);
  803. dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
  804. id + 1, ret);
  805. goto err;
  806. }
  807. platform_set_drvdata(pdev, dcdc);
  808. return 0;
  809. err:
  810. kfree(dcdc);
  811. return ret;
  812. }
  813. static __devexit int wm831x_epe_remove(struct platform_device *pdev)
  814. {
  815. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  816. platform_set_drvdata(pdev, NULL);
  817. regulator_unregister(dcdc->regulator);
  818. kfree(dcdc);
  819. return 0;
  820. }
  821. static struct platform_driver wm831x_epe_driver = {
  822. .probe = wm831x_epe_probe,
  823. .remove = __devexit_p(wm831x_epe_remove),
  824. .driver = {
  825. .name = "wm831x-epe",
  826. .owner = THIS_MODULE,
  827. },
  828. };
  829. static int __init wm831x_dcdc_init(void)
  830. {
  831. int ret;
  832. ret = platform_driver_register(&wm831x_buckv_driver);
  833. if (ret != 0)
  834. pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
  835. ret = platform_driver_register(&wm831x_buckp_driver);
  836. if (ret != 0)
  837. pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
  838. ret = platform_driver_register(&wm831x_boostp_driver);
  839. if (ret != 0)
  840. pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
  841. ret = platform_driver_register(&wm831x_epe_driver);
  842. if (ret != 0)
  843. pr_err("Failed to register WM831x EPE driver: %d\n", ret);
  844. return 0;
  845. }
  846. subsys_initcall(wm831x_dcdc_init);
  847. static void __exit wm831x_dcdc_exit(void)
  848. {
  849. platform_driver_unregister(&wm831x_epe_driver);
  850. platform_driver_unregister(&wm831x_boostp_driver);
  851. platform_driver_unregister(&wm831x_buckp_driver);
  852. platform_driver_unregister(&wm831x_buckv_driver);
  853. }
  854. module_exit(wm831x_dcdc_exit);
  855. /* Module information */
  856. MODULE_AUTHOR("Mark Brown");
  857. MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
  858. MODULE_LICENSE("GPL");
  859. MODULE_ALIAS("platform:wm831x-buckv");
  860. MODULE_ALIAS("platform:wm831x-buckp");