bnx2x_dcb.c 62 KB

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  1. /* bnx2x_dcb.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2010 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Dmitry Kravkov
  17. *
  18. */
  19. #include <linux/netdevice.h>
  20. #include <linux/types.h>
  21. #include <linux/errno.h>
  22. #include "bnx2x.h"
  23. #include "bnx2x_cmn.h"
  24. #include "bnx2x_dcb.h"
  25. /* forward declarations of dcbx related functions */
  26. static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
  27. static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
  28. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
  29. static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
  30. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  31. u32 *set_configuration_ets_pg,
  32. u32 *pri_pg_tbl);
  33. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  34. u32 *pg_pri_orginal_spread,
  35. struct pg_help_data *help_data);
  36. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  37. struct pg_help_data *help_data,
  38. struct dcbx_ets_feature *ets,
  39. u32 *pg_pri_orginal_spread);
  40. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  41. struct cos_help_data *cos_data,
  42. u32 *pg_pri_orginal_spread,
  43. struct dcbx_ets_feature *ets);
  44. static void bnx2x_pfc_fw_struct_e2(struct bnx2x *bp);
  45. static void bnx2x_pfc_set(struct bnx2x *bp)
  46. {
  47. struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
  48. u32 pri_bit, val = 0;
  49. u8 pri;
  50. /* Tx COS configuration */
  51. if (bp->dcbx_port_params.ets.cos_params[0].pauseable)
  52. pfc_params.rx_cos0_priority_mask =
  53. bp->dcbx_port_params.ets.cos_params[0].pri_bitmask;
  54. if (bp->dcbx_port_params.ets.cos_params[1].pauseable)
  55. pfc_params.rx_cos1_priority_mask =
  56. bp->dcbx_port_params.ets.cos_params[1].pri_bitmask;
  57. /**
  58. * Rx COS configuration
  59. * Changing PFC RX configuration .
  60. * In RX COS0 will always be configured to lossy and COS1 to lossless
  61. */
  62. for (pri = 0 ; pri < MAX_PFC_PRIORITIES ; pri++) {
  63. pri_bit = 1 << pri;
  64. if (pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))
  65. val |= 1 << (pri * 4);
  66. }
  67. pfc_params.pkt_priority_to_cos = val;
  68. /* RX COS0 */
  69. pfc_params.llfc_low_priority_classes = 0;
  70. /* RX COS1 */
  71. pfc_params.llfc_high_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
  72. /* BRB configuration */
  73. pfc_params.cos0_pauseable = false;
  74. pfc_params.cos1_pauseable = true;
  75. bnx2x_acquire_phy_lock(bp);
  76. bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
  77. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
  78. bnx2x_release_phy_lock(bp);
  79. }
  80. static void bnx2x_pfc_clear(struct bnx2x *bp)
  81. {
  82. struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
  83. nig_params.pause_enable = 1;
  84. #ifdef BNX2X_SAFC
  85. if (bp->flags & SAFC_TX_FLAG) {
  86. u32 high = 0, low = 0;
  87. int i;
  88. for (i = 0; i < BNX2X_MAX_PRIORITY; i++) {
  89. if (bp->pri_map[i] == 1)
  90. high |= (1 << i);
  91. if (bp->pri_map[i] == 0)
  92. low |= (1 << i);
  93. }
  94. nig_params.llfc_low_priority_classes = high;
  95. nig_params.llfc_low_priority_classes = low;
  96. nig_params.pause_enable = 0;
  97. nig_params.llfc_enable = 1;
  98. nig_params.llfc_out_en = 1;
  99. }
  100. #endif /* BNX2X_SAFC */
  101. bnx2x_acquire_phy_lock(bp);
  102. bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
  103. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
  104. bnx2x_release_phy_lock(bp);
  105. }
  106. static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
  107. struct dcbx_features *features,
  108. u32 error)
  109. {
  110. u8 i = 0;
  111. DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
  112. /* PG */
  113. DP(NETIF_MSG_LINK,
  114. "local_mib.features.ets.enabled %x\n", features->ets.enabled);
  115. for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
  116. DP(NETIF_MSG_LINK,
  117. "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
  118. DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
  119. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
  120. DP(NETIF_MSG_LINK,
  121. "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
  122. DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
  123. /* pfc */
  124. DP(NETIF_MSG_LINK, "dcbx_features.pfc.pri_en_bitmap %x\n",
  125. features->pfc.pri_en_bitmap);
  126. DP(NETIF_MSG_LINK, "dcbx_features.pfc.pfc_caps %x\n",
  127. features->pfc.pfc_caps);
  128. DP(NETIF_MSG_LINK, "dcbx_features.pfc.enabled %x\n",
  129. features->pfc.enabled);
  130. DP(NETIF_MSG_LINK, "dcbx_features.app.default_pri %x\n",
  131. features->app.default_pri);
  132. DP(NETIF_MSG_LINK, "dcbx_features.app.tc_supported %x\n",
  133. features->app.tc_supported);
  134. DP(NETIF_MSG_LINK, "dcbx_features.app.enabled %x\n",
  135. features->app.enabled);
  136. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  137. DP(NETIF_MSG_LINK,
  138. "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
  139. i, features->app.app_pri_tbl[i].app_id);
  140. DP(NETIF_MSG_LINK,
  141. "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
  142. i, features->app.app_pri_tbl[i].pri_bitmap);
  143. DP(NETIF_MSG_LINK,
  144. "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
  145. i, features->app.app_pri_tbl[i].appBitfield);
  146. }
  147. }
  148. static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
  149. u8 pri_bitmap,
  150. u8 llfc_traf_type)
  151. {
  152. u32 pri = MAX_PFC_PRIORITIES;
  153. u32 index = MAX_PFC_PRIORITIES - 1;
  154. u32 pri_mask;
  155. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  156. /* Choose the highest priority */
  157. while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
  158. pri_mask = 1 << index;
  159. if (GET_FLAGS(pri_bitmap, pri_mask))
  160. pri = index ;
  161. index--;
  162. }
  163. if (pri < MAX_PFC_PRIORITIES)
  164. ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
  165. }
  166. static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
  167. struct dcbx_app_priority_feature *app,
  168. u32 error) {
  169. u8 index;
  170. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  171. if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
  172. DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_ERROR\n");
  173. if (app->enabled && !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) {
  174. bp->dcbx_port_params.app.enabled = true;
  175. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  176. ttp[index] = 0;
  177. if (app->default_pri < MAX_PFC_PRIORITIES)
  178. ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
  179. for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
  180. struct dcbx_app_priority_entry *entry =
  181. app->app_pri_tbl;
  182. if (GET_FLAGS(entry[index].appBitfield,
  183. DCBX_APP_SF_ETH_TYPE) &&
  184. ETH_TYPE_FCOE == entry[index].app_id)
  185. bnx2x_dcbx_get_ap_priority(bp,
  186. entry[index].pri_bitmap,
  187. LLFC_TRAFFIC_TYPE_FCOE);
  188. if (GET_FLAGS(entry[index].appBitfield,
  189. DCBX_APP_SF_PORT) &&
  190. TCP_PORT_ISCSI == entry[index].app_id)
  191. bnx2x_dcbx_get_ap_priority(bp,
  192. entry[index].pri_bitmap,
  193. LLFC_TRAFFIC_TYPE_ISCSI);
  194. }
  195. } else {
  196. DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_DISABLED\n");
  197. bp->dcbx_port_params.app.enabled = false;
  198. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  199. ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
  200. }
  201. }
  202. static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
  203. struct dcbx_ets_feature *ets,
  204. u32 error) {
  205. int i = 0;
  206. u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
  207. struct pg_help_data pg_help_data;
  208. struct bnx2x_dcbx_cos_params *cos_params =
  209. bp->dcbx_port_params.ets.cos_params;
  210. memset(&pg_help_data, 0, sizeof(struct pg_help_data));
  211. if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
  212. DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ERROR\n");
  213. /* Clean up old settings of ets on COS */
  214. for (i = 0; i < E2_NUM_OF_COS ; i++) {
  215. cos_params[i].pauseable = false;
  216. cos_params[i].strict = BNX2X_DCBX_COS_NOT_STRICT;
  217. cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
  218. cos_params[i].pri_bitmask = DCBX_PFC_PRI_GET_NON_PAUSE(bp, 0);
  219. }
  220. if (bp->dcbx_port_params.app.enabled &&
  221. !GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR) &&
  222. ets->enabled) {
  223. DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ENABLE\n");
  224. bp->dcbx_port_params.ets.enabled = true;
  225. bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
  226. pg_pri_orginal_spread,
  227. ets->pri_pg_tbl);
  228. bnx2x_dcbx_get_num_pg_traf_type(bp,
  229. pg_pri_orginal_spread,
  230. &pg_help_data);
  231. bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
  232. ets, pg_pri_orginal_spread);
  233. } else {
  234. DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_DISABLED\n");
  235. bp->dcbx_port_params.ets.enabled = false;
  236. ets->pri_pg_tbl[0] = 0;
  237. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
  238. DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
  239. }
  240. }
  241. static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
  242. struct dcbx_pfc_feature *pfc, u32 error)
  243. {
  244. if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
  245. DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_ERROR\n");
  246. if (bp->dcbx_port_params.app.enabled &&
  247. !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR) &&
  248. pfc->enabled) {
  249. bp->dcbx_port_params.pfc.enabled = true;
  250. bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
  251. ~(pfc->pri_en_bitmap);
  252. } else {
  253. DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_DISABLED\n");
  254. bp->dcbx_port_params.pfc.enabled = false;
  255. bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
  256. }
  257. }
  258. static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
  259. struct dcbx_features *features,
  260. u32 error)
  261. {
  262. bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
  263. bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
  264. bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
  265. }
  266. #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
  267. static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
  268. u32 *base_mib_addr,
  269. u32 offset,
  270. int read_mib_type)
  271. {
  272. int max_try_read = 0, i;
  273. u32 *buff, mib_size, prefix_seq_num, suffix_seq_num;
  274. struct lldp_remote_mib *remote_mib ;
  275. struct lldp_local_mib *local_mib;
  276. switch (read_mib_type) {
  277. case DCBX_READ_LOCAL_MIB:
  278. mib_size = sizeof(struct lldp_local_mib);
  279. break;
  280. case DCBX_READ_REMOTE_MIB:
  281. mib_size = sizeof(struct lldp_remote_mib);
  282. break;
  283. default:
  284. return 1; /*error*/
  285. }
  286. offset += BP_PORT(bp) * mib_size;
  287. do {
  288. buff = base_mib_addr;
  289. for (i = 0; i < mib_size; i += 4, buff++)
  290. *buff = REG_RD(bp, offset + i);
  291. max_try_read++;
  292. switch (read_mib_type) {
  293. case DCBX_READ_LOCAL_MIB:
  294. local_mib = (struct lldp_local_mib *) base_mib_addr;
  295. prefix_seq_num = local_mib->prefix_seq_num;
  296. suffix_seq_num = local_mib->suffix_seq_num;
  297. break;
  298. case DCBX_READ_REMOTE_MIB:
  299. remote_mib = (struct lldp_remote_mib *) base_mib_addr;
  300. prefix_seq_num = remote_mib->prefix_seq_num;
  301. suffix_seq_num = remote_mib->suffix_seq_num;
  302. break;
  303. default:
  304. return 1; /*error*/
  305. }
  306. } while ((prefix_seq_num != suffix_seq_num) &&
  307. (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
  308. if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
  309. BNX2X_ERR("MIB could not be read\n");
  310. return 1;
  311. }
  312. return 0;
  313. }
  314. static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
  315. {
  316. if (CHIP_IS_E2(bp)) {
  317. if (BP_PORT(bp)) {
  318. BNX2X_ERR("4 port mode is not supported");
  319. return;
  320. }
  321. if (bp->dcbx_port_params.pfc.enabled)
  322. /* 1. Fills up common PFC structures if required.*/
  323. /* 2. Configure NIG, MAC and BRB via the elink:
  324. * elink must first check if BMAC is not in reset
  325. * and only then configures the BMAC
  326. * Or, configure EMAC.
  327. */
  328. bnx2x_pfc_set(bp);
  329. else
  330. bnx2x_pfc_clear(bp);
  331. }
  332. }
  333. static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
  334. {
  335. DP(NETIF_MSG_LINK, "sending STOP TRAFFIC\n");
  336. bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STOP_TRAFFIC,
  337. 0 /* connectionless */,
  338. 0 /* dataHi is zero */,
  339. 0 /* dataLo is zero */,
  340. 1 /* common */);
  341. }
  342. static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
  343. {
  344. bnx2x_pfc_fw_struct_e2(bp);
  345. DP(NETIF_MSG_LINK, "sending START TRAFFIC\n");
  346. bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_START_TRAFFIC,
  347. 0, /* connectionless */
  348. U64_HI(bnx2x_sp_mapping(bp, pfc_config)),
  349. U64_LO(bnx2x_sp_mapping(bp, pfc_config)),
  350. 1 /* commmon */);
  351. }
  352. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
  353. {
  354. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  355. u8 status = 0;
  356. bnx2x_ets_disabled(&bp->link_params);
  357. if (!ets->enabled)
  358. return;
  359. if ((ets->num_of_cos == 0) || (ets->num_of_cos > E2_NUM_OF_COS)) {
  360. BNX2X_ERR("illegal num of cos= %x", ets->num_of_cos);
  361. return;
  362. }
  363. /* valid COS entries */
  364. if (ets->num_of_cos == 1) /* no ETS */
  365. return;
  366. /* sanity */
  367. if (((BNX2X_DCBX_COS_NOT_STRICT == ets->cos_params[0].strict) &&
  368. (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
  369. ((BNX2X_DCBX_COS_NOT_STRICT == ets->cos_params[1].strict) &&
  370. (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
  371. BNX2X_ERR("all COS should have at least bw_limit or strict"
  372. "ets->cos_params[0].strict= %x"
  373. "ets->cos_params[0].bw_tbl= %x"
  374. "ets->cos_params[1].strict= %x"
  375. "ets->cos_params[1].bw_tbl= %x",
  376. ets->cos_params[0].strict,
  377. ets->cos_params[0].bw_tbl,
  378. ets->cos_params[1].strict,
  379. ets->cos_params[1].bw_tbl);
  380. return;
  381. }
  382. /* If we join a group and there is bw_tbl and strict then bw rules */
  383. if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
  384. (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
  385. u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
  386. u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
  387. /* Do not allow 0-100 configuration
  388. * since PBF does not support it
  389. * force 1-99 instead
  390. */
  391. if (bw_tbl_0 == 0) {
  392. bw_tbl_0 = 1;
  393. bw_tbl_1 = 99;
  394. } else if (bw_tbl_1 == 0) {
  395. bw_tbl_1 = 1;
  396. bw_tbl_0 = 99;
  397. }
  398. bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
  399. } else {
  400. if (ets->cos_params[0].strict == BNX2X_DCBX_COS_HIGH_STRICT)
  401. status = bnx2x_ets_strict(&bp->link_params, 0);
  402. else if (ets->cos_params[1].strict
  403. == BNX2X_DCBX_COS_HIGH_STRICT)
  404. status = bnx2x_ets_strict(&bp->link_params, 1);
  405. if (status)
  406. BNX2X_ERR("update_ets_params failed\n");
  407. }
  408. }
  409. static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
  410. {
  411. struct lldp_local_mib local_mib = {0};
  412. u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
  413. int rc;
  414. DP(NETIF_MSG_LINK, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
  415. if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
  416. BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
  417. return -EINVAL;
  418. }
  419. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
  420. DCBX_READ_LOCAL_MIB);
  421. if (rc) {
  422. BNX2X_ERR("Faild to read local mib from FW\n");
  423. return rc;
  424. }
  425. /* save features and error */
  426. bp->dcbx_local_feat = local_mib.features;
  427. bp->dcbx_error = local_mib.error;
  428. return 0;
  429. }
  430. void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
  431. {
  432. switch (state) {
  433. case BNX2X_DCBX_STATE_NEG_RECEIVED:
  434. {
  435. DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
  436. /* Read neg results if dcbx is in the FW */
  437. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  438. return;
  439. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  440. bp->dcbx_error);
  441. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  442. bp->dcbx_error);
  443. if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD) {
  444. bnx2x_dcbx_stop_hw_tx(bp);
  445. return;
  446. }
  447. /* fall through */
  448. }
  449. case BNX2X_DCBX_STATE_TX_PAUSED:
  450. DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_PAUSED\n");
  451. bnx2x_pfc_set_pfc(bp);
  452. bnx2x_dcbx_update_ets_params(bp);
  453. if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD) {
  454. bnx2x_dcbx_resume_hw_tx(bp);
  455. return;
  456. }
  457. /* fall through */
  458. case BNX2X_DCBX_STATE_TX_RELEASED:
  459. DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_RELEASED\n");
  460. if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD)
  461. bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
  462. return;
  463. default:
  464. BNX2X_ERR("Unknown DCBX_STATE\n");
  465. }
  466. }
  467. #define LLDP_STATS_OFFSET(bp) (BP_PORT(bp)*\
  468. sizeof(struct lldp_dcbx_stat))
  469. /* calculate struct offset in array according to chip information */
  470. #define LLDP_PARAMS_OFFSET(bp) (BP_PORT(bp)*sizeof(struct lldp_params))
  471. #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
  472. BP_PORT(bp)*sizeof(struct lldp_admin_mib))
  473. static void bnx2x_dcbx_lldp_updated_params(struct bnx2x *bp,
  474. u32 dcbx_lldp_params_offset)
  475. {
  476. struct lldp_params lldp_params = {0};
  477. u32 i = 0, *buff = NULL;
  478. u32 offset = dcbx_lldp_params_offset + LLDP_PARAMS_OFFSET(bp);
  479. DP(NETIF_MSG_LINK, "lldp_offset 0x%x\n", offset);
  480. if ((bp->lldp_config_params.overwrite_settings ==
  481. BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE)) {
  482. /* Read the data first */
  483. buff = (u32 *)&lldp_params;
  484. for (i = 0; i < sizeof(struct lldp_params); i += 4, buff++)
  485. *buff = REG_RD(bp, (offset + i));
  486. lldp_params.msg_tx_hold =
  487. (u8)bp->lldp_config_params.msg_tx_hold;
  488. lldp_params.msg_fast_tx_interval =
  489. (u8)bp->lldp_config_params.msg_fast_tx;
  490. lldp_params.tx_crd_max =
  491. (u8)bp->lldp_config_params.tx_credit_max;
  492. lldp_params.msg_tx_interval =
  493. (u8)bp->lldp_config_params.msg_tx_interval;
  494. lldp_params.tx_fast =
  495. (u8)bp->lldp_config_params.tx_fast;
  496. /* Write the data.*/
  497. buff = (u32 *)&lldp_params;
  498. for (i = 0; i < sizeof(struct lldp_params); i += 4, buff++)
  499. REG_WR(bp, (offset + i) , *buff);
  500. } else if (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
  501. bp->lldp_config_params.overwrite_settings)
  502. bp->lldp_config_params.overwrite_settings =
  503. BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID;
  504. }
  505. static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
  506. u32 dcbx_lldp_params_offset)
  507. {
  508. struct lldp_admin_mib admin_mib;
  509. u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
  510. u32 *buff;
  511. u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
  512. /*shortcuts*/
  513. struct dcbx_features *af = &admin_mib.features;
  514. struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
  515. memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
  516. buff = (u32 *)&admin_mib;
  517. /* Read the data first */
  518. for (i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++)
  519. *buff = REG_RD(bp, (offset + i));
  520. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON)
  521. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  522. else
  523. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  524. if ((BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
  525. dp->overwrite_settings)) {
  526. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
  527. admin_mib.ver_cfg_flags |=
  528. (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
  529. DCBX_CEE_VERSION_MASK;
  530. af->ets.enabled = (u8)dp->admin_ets_enable;
  531. af->pfc.enabled = (u8)dp->admin_pfc_enable;
  532. /* FOR IEEE dp->admin_tc_supported_tx_enable */
  533. if (dp->admin_ets_configuration_tx_enable)
  534. SET_FLAGS(admin_mib.ver_cfg_flags,
  535. DCBX_ETS_CONFIG_TX_ENABLED);
  536. else
  537. RESET_FLAGS(admin_mib.ver_cfg_flags,
  538. DCBX_ETS_CONFIG_TX_ENABLED);
  539. /* For IEEE admin_ets_recommendation_tx_enable */
  540. if (dp->admin_pfc_tx_enable)
  541. SET_FLAGS(admin_mib.ver_cfg_flags,
  542. DCBX_PFC_CONFIG_TX_ENABLED);
  543. else
  544. RESET_FLAGS(admin_mib.ver_cfg_flags,
  545. DCBX_PFC_CONFIG_TX_ENABLED);
  546. if (dp->admin_application_priority_tx_enable)
  547. SET_FLAGS(admin_mib.ver_cfg_flags,
  548. DCBX_APP_CONFIG_TX_ENABLED);
  549. else
  550. RESET_FLAGS(admin_mib.ver_cfg_flags,
  551. DCBX_APP_CONFIG_TX_ENABLED);
  552. if (dp->admin_ets_willing)
  553. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  554. else
  555. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  556. /* For IEEE admin_ets_reco_valid */
  557. if (dp->admin_pfc_willing)
  558. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  559. else
  560. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  561. if (dp->admin_app_priority_willing)
  562. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  563. else
  564. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  565. for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
  566. DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
  567. (u8)dp->admin_configuration_bw_precentage[i]);
  568. DP(NETIF_MSG_LINK, "pg_bw_tbl[%d] = %02x\n",
  569. i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
  570. }
  571. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  572. DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
  573. (u8)dp->admin_configuration_ets_pg[i]);
  574. DP(NETIF_MSG_LINK, "pri_pg_tbl[%d] = %02x\n",
  575. i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
  576. }
  577. /*For IEEE admin_recommendation_bw_precentage
  578. *For IEEE admin_recommendation_ets_pg */
  579. af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
  580. for (i = 0; i < 4; i++) {
  581. if (dp->admin_priority_app_table[i].valid) {
  582. struct bnx2x_admin_priority_app_table *table =
  583. dp->admin_priority_app_table;
  584. if ((ETH_TYPE_FCOE == table[i].app_id) &&
  585. (TRAFFIC_TYPE_ETH == table[i].traffic_type))
  586. traf_type = FCOE_APP_IDX;
  587. else if ((TCP_PORT_ISCSI == table[i].app_id) &&
  588. (TRAFFIC_TYPE_PORT == table[i].traffic_type))
  589. traf_type = ISCSI_APP_IDX;
  590. else
  591. traf_type = other_traf_type++;
  592. af->app.app_pri_tbl[traf_type].app_id =
  593. table[i].app_id;
  594. af->app.app_pri_tbl[traf_type].pri_bitmap =
  595. (u8)(1 << table[i].priority);
  596. af->app.app_pri_tbl[traf_type].appBitfield =
  597. (DCBX_APP_ENTRY_VALID);
  598. af->app.app_pri_tbl[traf_type].appBitfield |=
  599. (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
  600. DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
  601. }
  602. }
  603. af->app.default_pri = (u8)dp->admin_default_priority;
  604. } else if (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
  605. dp->overwrite_settings)
  606. dp->overwrite_settings = BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID;
  607. /* Write the data. */
  608. buff = (u32 *)&admin_mib;
  609. for (i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++)
  610. REG_WR(bp, (offset + i), *buff);
  611. }
  612. void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
  613. {
  614. if (CHIP_IS_E2(bp) && !CHIP_MODE_IS_4_PORT(bp)) {
  615. bp->dcb_state = dcb_on;
  616. bp->dcbx_enabled = dcbx_enabled;
  617. } else {
  618. bp->dcb_state = false;
  619. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID;
  620. }
  621. DP(NETIF_MSG_LINK, "DCB state [%s:%s]\n",
  622. dcb_on ? "ON" : "OFF",
  623. dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" :
  624. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" :
  625. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ?
  626. "on-chip with negotiation" : "invalid");
  627. }
  628. void bnx2x_dcbx_init_params(struct bnx2x *bp)
  629. {
  630. bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
  631. bp->dcbx_config_params.admin_ets_willing = 1;
  632. bp->dcbx_config_params.admin_pfc_willing = 1;
  633. bp->dcbx_config_params.overwrite_settings = 1;
  634. bp->dcbx_config_params.admin_ets_enable = 1;
  635. bp->dcbx_config_params.admin_pfc_enable = 1;
  636. bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
  637. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  638. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  639. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  640. bp->dcbx_config_params.admin_ets_reco_valid = 1;
  641. bp->dcbx_config_params.admin_app_priority_willing = 1;
  642. bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 00;
  643. bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 50;
  644. bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 50;
  645. bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
  646. bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
  647. bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
  648. bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
  649. bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
  650. bp->dcbx_config_params.admin_configuration_ets_pg[0] = 1;
  651. bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
  652. bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
  653. bp->dcbx_config_params.admin_configuration_ets_pg[3] = 2;
  654. bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
  655. bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
  656. bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
  657. bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
  658. bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 0;
  659. bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 1;
  660. bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 2;
  661. bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
  662. bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 7;
  663. bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 5;
  664. bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 6;
  665. bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 7;
  666. bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
  667. bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
  668. bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
  669. bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
  670. bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
  671. bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
  672. bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
  673. bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
  674. bp->dcbx_config_params.admin_pfc_bitmap = 0x8; /* FCoE(3) enable */
  675. bp->dcbx_config_params.admin_priority_app_table[0].valid = 1;
  676. bp->dcbx_config_params.admin_priority_app_table[1].valid = 1;
  677. bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
  678. bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
  679. bp->dcbx_config_params.admin_priority_app_table[0].priority = 3;
  680. bp->dcbx_config_params.admin_priority_app_table[1].priority = 0;
  681. bp->dcbx_config_params.admin_priority_app_table[2].priority = 0;
  682. bp->dcbx_config_params.admin_priority_app_table[3].priority = 0;
  683. bp->dcbx_config_params.admin_priority_app_table[0].traffic_type = 0;
  684. bp->dcbx_config_params.admin_priority_app_table[1].traffic_type = 1;
  685. bp->dcbx_config_params.admin_priority_app_table[2].traffic_type = 0;
  686. bp->dcbx_config_params.admin_priority_app_table[3].traffic_type = 0;
  687. bp->dcbx_config_params.admin_priority_app_table[0].app_id = 0x8906;
  688. bp->dcbx_config_params.admin_priority_app_table[1].app_id = 3260;
  689. bp->dcbx_config_params.admin_priority_app_table[2].app_id = 0;
  690. bp->dcbx_config_params.admin_priority_app_table[3].app_id = 0;
  691. bp->dcbx_config_params.admin_default_priority =
  692. bp->dcbx_config_params.admin_priority_app_table[1].priority;
  693. }
  694. void bnx2x_dcbx_init(struct bnx2x *bp)
  695. {
  696. u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
  697. if (bp->dcbx_enabled <= 0)
  698. return;
  699. /* validate:
  700. * chip of good for dcbx version,
  701. * dcb is wanted
  702. * the function is pmf
  703. * shmem2 contains DCBX support fields
  704. */
  705. DP(NETIF_MSG_LINK, "dcb_state %d bp->port.pmf %d\n",
  706. bp->dcb_state, bp->port.pmf);
  707. if (bp->dcb_state == BNX2X_DCB_STATE_ON && bp->port.pmf &&
  708. SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
  709. dcbx_lldp_params_offset =
  710. SHMEM2_RD(bp, dcbx_lldp_params_offset);
  711. DP(NETIF_MSG_LINK, "dcbx_lldp_params_offset 0x%x\n",
  712. dcbx_lldp_params_offset);
  713. if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
  714. bnx2x_dcbx_lldp_updated_params(bp,
  715. dcbx_lldp_params_offset);
  716. bnx2x_dcbx_admin_mib_updated_params(bp,
  717. dcbx_lldp_params_offset);
  718. /* set default configuration BC has */
  719. bnx2x_dcbx_set_params(bp,
  720. BNX2X_DCBX_STATE_NEG_RECEIVED);
  721. bnx2x_fw_command(bp,
  722. DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
  723. }
  724. }
  725. }
  726. void bnx2x_dcb_init_intmem_pfc(struct bnx2x *bp)
  727. {
  728. struct priority_cos pricos[MAX_PFC_TRAFFIC_TYPES];
  729. u32 i = 0, addr;
  730. memset(pricos, 0, sizeof(pricos));
  731. /* Default initialization */
  732. for (i = 0; i < MAX_PFC_TRAFFIC_TYPES; i++)
  733. pricos[i].priority = LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED;
  734. /* Store per port struct to internal memory */
  735. addr = BAR_XSTRORM_INTMEM +
  736. XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) +
  737. offsetof(struct cmng_struct_per_port,
  738. traffic_type_to_priority_cos);
  739. __storm_memset_struct(bp, addr, sizeof(pricos), (u32 *)pricos);
  740. /* LLFC disabled.*/
  741. REG_WR8(bp , BAR_XSTRORM_INTMEM +
  742. XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) +
  743. offsetof(struct cmng_struct_per_port, llfc_mode),
  744. LLFC_MODE_NONE);
  745. /* DCBX disabled.*/
  746. REG_WR8(bp , BAR_XSTRORM_INTMEM +
  747. XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) +
  748. offsetof(struct cmng_struct_per_port, dcb_enabled),
  749. DCB_DISABLED);
  750. }
  751. static void
  752. bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
  753. struct flow_control_configuration *pfc_fw_cfg)
  754. {
  755. u8 pri = 0;
  756. u8 cos = 0;
  757. DP(NETIF_MSG_LINK,
  758. "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
  759. DP(NETIF_MSG_LINK,
  760. "pdev->params.dcbx_port_params.pfc."
  761. "priority_non_pauseable_mask %x\n",
  762. bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
  763. for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
  764. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  765. "cos_params[%d].pri_bitmask %x\n", cos,
  766. bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
  767. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  768. "cos_params[%d].bw_tbl %x\n", cos,
  769. bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
  770. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  771. "cos_params[%d].strict %x\n", cos,
  772. bp->dcbx_port_params.ets.cos_params[cos].strict);
  773. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  774. "cos_params[%d].pauseable %x\n", cos,
  775. bp->dcbx_port_params.ets.cos_params[cos].pauseable);
  776. }
  777. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  778. DP(NETIF_MSG_LINK,
  779. "pfc_fw_cfg->traffic_type_to_priority_cos[%d]."
  780. "priority %x\n", pri,
  781. pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
  782. DP(NETIF_MSG_LINK,
  783. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
  784. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
  785. }
  786. }
  787. /* fills help_data according to pg_info */
  788. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  789. u32 *pg_pri_orginal_spread,
  790. struct pg_help_data *help_data)
  791. {
  792. bool pg_found = false;
  793. u32 i, traf_type, add_traf_type, add_pg;
  794. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  795. struct pg_entry_help_data *data = help_data->data; /*shotcut*/
  796. /* Set to invalid */
  797. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  798. data[i].pg = DCBX_ILLEGAL_PG;
  799. for (add_traf_type = 0;
  800. add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
  801. pg_found = false;
  802. if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
  803. add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
  804. for (traf_type = 0;
  805. traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  806. traf_type++) {
  807. if (data[traf_type].pg == add_pg) {
  808. if (!(data[traf_type].pg_priority &
  809. (1 << ttp[add_traf_type])))
  810. data[traf_type].
  811. num_of_dif_pri++;
  812. data[traf_type].pg_priority |=
  813. (1 << ttp[add_traf_type]);
  814. pg_found = true;
  815. break;
  816. }
  817. }
  818. if (false == pg_found) {
  819. data[help_data->num_of_pg].pg = add_pg;
  820. data[help_data->num_of_pg].pg_priority =
  821. (1 << ttp[add_traf_type]);
  822. data[help_data->num_of_pg].num_of_dif_pri = 1;
  823. help_data->num_of_pg++;
  824. }
  825. }
  826. DP(NETIF_MSG_LINK,
  827. "add_traf_type %d pg_found %s num_of_pg %d\n",
  828. add_traf_type, (false == pg_found) ? "NO" : "YES",
  829. help_data->num_of_pg);
  830. }
  831. }
  832. /*******************************************************************************
  833. * Description: single priority group
  834. *
  835. * Return:
  836. ******************************************************************************/
  837. static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
  838. struct cos_help_data *cos_data,
  839. u32 pri_join_mask)
  840. {
  841. /* Only one priority than only one COS */
  842. cos_data->data[0].pausable =
  843. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  844. cos_data->data[0].pri_join_mask = pri_join_mask;
  845. cos_data->data[0].cos_bw = 100;
  846. cos_data->num_of_cos = 1;
  847. }
  848. /*******************************************************************************
  849. * Description: updating the cos bw
  850. *
  851. * Return:
  852. ******************************************************************************/
  853. static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
  854. struct cos_entry_help_data *data,
  855. u8 pg_bw)
  856. {
  857. if (data->cos_bw == DCBX_INVALID_COS_BW)
  858. data->cos_bw = pg_bw;
  859. else
  860. data->cos_bw += pg_bw;
  861. }
  862. /*******************************************************************************
  863. * Description: single priority group
  864. *
  865. * Return:
  866. ******************************************************************************/
  867. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  868. struct cos_help_data *cos_data,
  869. u32 *pg_pri_orginal_spread,
  870. struct dcbx_ets_feature *ets)
  871. {
  872. u32 pri_tested = 0;
  873. u8 i = 0;
  874. u8 entry = 0;
  875. u8 pg_entry = 0;
  876. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  877. cos_data->data[0].pausable = true;
  878. cos_data->data[1].pausable = false;
  879. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  880. for (i = 0 ; i < num_of_pri ; i++) {
  881. pri_tested = 1 << bp->dcbx_port_params.
  882. app.traffic_type_priority[i];
  883. if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
  884. cos_data->data[1].pri_join_mask |= pri_tested;
  885. entry = 1;
  886. } else {
  887. cos_data->data[0].pri_join_mask |= pri_tested;
  888. entry = 0;
  889. }
  890. pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
  891. app.traffic_type_priority[i]];
  892. /* There can be only one strict pg */
  893. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
  894. bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
  895. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
  896. else
  897. /* If we join a group and one is strict
  898. * than the bw rulls */
  899. cos_data->data[entry].strict =
  900. BNX2X_DCBX_COS_HIGH_STRICT;
  901. }
  902. if ((0 == cos_data->data[0].pri_join_mask) &&
  903. (0 == cos_data->data[1].pri_join_mask))
  904. BNX2X_ERR("dcbx error: Both groups must have priorities\n");
  905. }
  906. #ifndef POWER_OF_2
  907. #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
  908. #endif
  909. static void bxn2x_dcbx_single_pg_to_cos_params(struct bnx2x *bp,
  910. struct pg_help_data *pg_help_data,
  911. struct cos_help_data *cos_data,
  912. u32 pri_join_mask,
  913. u8 num_of_dif_pri)
  914. {
  915. u8 i = 0;
  916. u32 pri_tested = 0;
  917. u32 pri_mask_without_pri = 0;
  918. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  919. /*debug*/
  920. if (num_of_dif_pri == 1) {
  921. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
  922. return;
  923. }
  924. /* single priority group */
  925. if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  926. /* If there are both pauseable and non-pauseable priorities,
  927. * the pauseable priorities go to the first queue and
  928. * the non-pauseable priorities go to the second queue.
  929. */
  930. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  931. /* Pauseable */
  932. cos_data->data[0].pausable = true;
  933. /* Non pauseable.*/
  934. cos_data->data[1].pausable = false;
  935. if (2 == num_of_dif_pri) {
  936. cos_data->data[0].cos_bw = 50;
  937. cos_data->data[1].cos_bw = 50;
  938. }
  939. if (3 == num_of_dif_pri) {
  940. if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
  941. pri_join_mask))) {
  942. cos_data->data[0].cos_bw = 33;
  943. cos_data->data[1].cos_bw = 67;
  944. } else {
  945. cos_data->data[0].cos_bw = 67;
  946. cos_data->data[1].cos_bw = 33;
  947. }
  948. }
  949. } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
  950. /* If there are only pauseable priorities,
  951. * then one/two priorities go to the first queue
  952. * and one priority goes to the second queue.
  953. */
  954. if (2 == num_of_dif_pri) {
  955. cos_data->data[0].cos_bw = 50;
  956. cos_data->data[1].cos_bw = 50;
  957. } else {
  958. cos_data->data[0].cos_bw = 67;
  959. cos_data->data[1].cos_bw = 33;
  960. }
  961. cos_data->data[1].pausable = true;
  962. cos_data->data[0].pausable = true;
  963. /* All priorities except FCOE */
  964. cos_data->data[0].pri_join_mask = (pri_join_mask &
  965. ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
  966. /* Only FCOE priority.*/
  967. cos_data->data[1].pri_join_mask =
  968. (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
  969. } else
  970. /* If there are only non-pauseable priorities,
  971. * they will all go to the same queue.
  972. */
  973. bnx2x_dcbx_ets_disabled_entry_data(bp,
  974. cos_data, pri_join_mask);
  975. } else {
  976. /* priority group which is not BW limited (PG#15):*/
  977. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  978. /* If there are both pauseable and non-pauseable
  979. * priorities, the pauseable priorities go to the first
  980. * queue and the non-pauseable priorities
  981. * go to the second queue.
  982. */
  983. if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
  984. DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
  985. cos_data->data[0].strict =
  986. BNX2X_DCBX_COS_HIGH_STRICT;
  987. cos_data->data[1].strict =
  988. BNX2X_DCBX_COS_LOW_STRICT;
  989. } else {
  990. cos_data->data[0].strict =
  991. BNX2X_DCBX_COS_LOW_STRICT;
  992. cos_data->data[1].strict =
  993. BNX2X_DCBX_COS_HIGH_STRICT;
  994. }
  995. /* Pauseable */
  996. cos_data->data[0].pausable = true;
  997. /* Non pause-able.*/
  998. cos_data->data[1].pausable = false;
  999. } else {
  1000. /* If there are only pauseable priorities or
  1001. * only non-pauseable,* the lower priorities go
  1002. * to the first queue and the higherpriorities go
  1003. * to the second queue.
  1004. */
  1005. cos_data->data[0].pausable =
  1006. cos_data->data[1].pausable =
  1007. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1008. for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
  1009. pri_tested = 1 << bp->dcbx_port_params.
  1010. app.traffic_type_priority[i];
  1011. /* Remove priority tested */
  1012. pri_mask_without_pri =
  1013. (pri_join_mask & ((u8)(~pri_tested)));
  1014. if (pri_mask_without_pri < pri_tested)
  1015. break;
  1016. }
  1017. if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
  1018. BNX2X_ERR("Invalid value for pri_join_mask -"
  1019. " could not find a priority\n");
  1020. cos_data->data[0].pri_join_mask = pri_mask_without_pri;
  1021. cos_data->data[1].pri_join_mask = pri_tested;
  1022. /* Both queues are strict priority,
  1023. * and that with the highest priority
  1024. * gets the highest strict priority in the arbiter.
  1025. */
  1026. cos_data->data[0].strict = BNX2X_DCBX_COS_LOW_STRICT;
  1027. cos_data->data[1].strict = BNX2X_DCBX_COS_HIGH_STRICT;
  1028. }
  1029. }
  1030. }
  1031. static void bnx2x_dcbx_two_pg_to_cos_params(
  1032. struct bnx2x *bp,
  1033. struct pg_help_data *pg_help_data,
  1034. struct dcbx_ets_feature *ets,
  1035. struct cos_help_data *cos_data,
  1036. u32 *pg_pri_orginal_spread,
  1037. u32 pri_join_mask,
  1038. u8 num_of_dif_pri)
  1039. {
  1040. u8 i = 0;
  1041. u8 pg[E2_NUM_OF_COS] = {0};
  1042. /* If there are both pauseable and non-pauseable priorities,
  1043. * the pauseable priorities go to the first queue and
  1044. * the non-pauseable priorities go to the second queue.
  1045. */
  1046. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1047. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1048. pg_help_data->data[0].pg_priority) ||
  1049. IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1050. pg_help_data->data[1].pg_priority)) {
  1051. /* If one PG contains both pauseable and
  1052. * non-pauseable priorities then ETS is disabled.
  1053. */
  1054. bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
  1055. pg_pri_orginal_spread, ets);
  1056. bp->dcbx_port_params.ets.enabled = false;
  1057. return;
  1058. }
  1059. /* Pauseable */
  1060. cos_data->data[0].pausable = true;
  1061. /* Non pauseable. */
  1062. cos_data->data[1].pausable = false;
  1063. if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
  1064. pg_help_data->data[0].pg_priority)) {
  1065. /* 0 is pauseable */
  1066. cos_data->data[0].pri_join_mask =
  1067. pg_help_data->data[0].pg_priority;
  1068. pg[0] = pg_help_data->data[0].pg;
  1069. cos_data->data[1].pri_join_mask =
  1070. pg_help_data->data[1].pg_priority;
  1071. pg[1] = pg_help_data->data[1].pg;
  1072. } else {/* 1 is pauseable */
  1073. cos_data->data[0].pri_join_mask =
  1074. pg_help_data->data[1].pg_priority;
  1075. pg[0] = pg_help_data->data[1].pg;
  1076. cos_data->data[1].pri_join_mask =
  1077. pg_help_data->data[0].pg_priority;
  1078. pg[1] = pg_help_data->data[0].pg;
  1079. }
  1080. } else {
  1081. /* If there are only pauseable priorities or
  1082. * only non-pauseable, each PG goes to a queue.
  1083. */
  1084. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1085. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1086. cos_data->data[0].pri_join_mask =
  1087. pg_help_data->data[0].pg_priority;
  1088. pg[0] = pg_help_data->data[0].pg;
  1089. cos_data->data[1].pri_join_mask =
  1090. pg_help_data->data[1].pg_priority;
  1091. pg[1] = pg_help_data->data[1].pg;
  1092. }
  1093. /* There can be only one strict pg */
  1094. for (i = 0 ; i < E2_NUM_OF_COS; i++) {
  1095. if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1096. cos_data->data[i].cos_bw =
  1097. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
  1098. else
  1099. cos_data->data[i].strict = BNX2X_DCBX_COS_HIGH_STRICT;
  1100. }
  1101. }
  1102. /*******************************************************************************
  1103. * Description: Still
  1104. *
  1105. * Return:
  1106. ******************************************************************************/
  1107. static void bnx2x_dcbx_three_pg_to_cos_params(
  1108. struct bnx2x *bp,
  1109. struct pg_help_data *pg_help_data,
  1110. struct dcbx_ets_feature *ets,
  1111. struct cos_help_data *cos_data,
  1112. u32 *pg_pri_orginal_spread,
  1113. u32 pri_join_mask,
  1114. u8 num_of_dif_pri)
  1115. {
  1116. u8 i = 0;
  1117. u32 pri_tested = 0;
  1118. u8 entry = 0;
  1119. u8 pg_entry = 0;
  1120. bool b_found_strict = false;
  1121. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  1122. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  1123. /* If there are both pauseable and non-pauseable priorities,
  1124. * the pauseable priorities go to the first queue and the
  1125. * non-pauseable priorities go to the second queue.
  1126. */
  1127. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
  1128. bnx2x_dcbx_separate_pauseable_from_non(bp,
  1129. cos_data, pg_pri_orginal_spread, ets);
  1130. else {
  1131. /* If two BW-limited PG-s were combined to one queue,
  1132. * the BW is their sum.
  1133. *
  1134. * If there are only pauseable priorities or only non-pauseable,
  1135. * and there are both BW-limited and non-BW-limited PG-s,
  1136. * the BW-limited PG/s go to one queue and the non-BW-limited
  1137. * PG/s go to the second queue.
  1138. *
  1139. * If there are only pauseable priorities or only non-pauseable
  1140. * and all are BW limited, then two priorities go to the first
  1141. * queue and one priority goes to the second queue.
  1142. *
  1143. * We will join this two cases:
  1144. * if one is BW limited it will go to the secoend queue
  1145. * otherwise the last priority will get it
  1146. */
  1147. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1148. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1149. for (i = 0 ; i < num_of_pri; i++) {
  1150. pri_tested = 1 << bp->dcbx_port_params.
  1151. app.traffic_type_priority[i];
  1152. pg_entry = (u8)pg_pri_orginal_spread[bp->
  1153. dcbx_port_params.app.traffic_type_priority[i]];
  1154. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1155. entry = 0;
  1156. if (i == (num_of_pri-1) &&
  1157. false == b_found_strict)
  1158. /* last entry will be handled separately
  1159. * If no priority is strict than last
  1160. * enty goes to last queue.*/
  1161. entry = 1;
  1162. cos_data->data[entry].pri_join_mask |=
  1163. pri_tested;
  1164. bnx2x_dcbx_add_to_cos_bw(bp,
  1165. &cos_data->data[entry],
  1166. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1167. pg_entry));
  1168. } else {
  1169. b_found_strict = true;
  1170. cos_data->data[1].pri_join_mask |= pri_tested;
  1171. /* If we join a group and one is strict
  1172. * than the bw rulls */
  1173. cos_data->data[1].strict =
  1174. BNX2X_DCBX_COS_HIGH_STRICT;
  1175. }
  1176. }
  1177. }
  1178. }
  1179. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  1180. struct pg_help_data *help_data,
  1181. struct dcbx_ets_feature *ets,
  1182. u32 *pg_pri_orginal_spread)
  1183. {
  1184. struct cos_help_data cos_data ;
  1185. u8 i = 0;
  1186. u32 pri_join_mask = 0;
  1187. u8 num_of_dif_pri = 0;
  1188. memset(&cos_data, 0, sizeof(cos_data));
  1189. /* Validate the pg value */
  1190. for (i = 0; i < help_data->num_of_pg ; i++) {
  1191. if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
  1192. DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
  1193. BNX2X_ERR("Invalid pg[%d] data %x\n", i,
  1194. help_data->data[i].pg);
  1195. pri_join_mask |= help_data->data[i].pg_priority;
  1196. num_of_dif_pri += help_data->data[i].num_of_dif_pri;
  1197. }
  1198. /* default settings */
  1199. cos_data.num_of_cos = 2;
  1200. for (i = 0; i < E2_NUM_OF_COS ; i++) {
  1201. cos_data.data[i].pri_join_mask = pri_join_mask;
  1202. cos_data.data[i].pausable = false;
  1203. cos_data.data[i].strict = BNX2X_DCBX_COS_NOT_STRICT;
  1204. cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
  1205. }
  1206. switch (help_data->num_of_pg) {
  1207. case 1:
  1208. bxn2x_dcbx_single_pg_to_cos_params(
  1209. bp,
  1210. help_data,
  1211. &cos_data,
  1212. pri_join_mask,
  1213. num_of_dif_pri);
  1214. break;
  1215. case 2:
  1216. bnx2x_dcbx_two_pg_to_cos_params(
  1217. bp,
  1218. help_data,
  1219. ets,
  1220. &cos_data,
  1221. pg_pri_orginal_spread,
  1222. pri_join_mask,
  1223. num_of_dif_pri);
  1224. break;
  1225. case 3:
  1226. bnx2x_dcbx_three_pg_to_cos_params(
  1227. bp,
  1228. help_data,
  1229. ets,
  1230. &cos_data,
  1231. pg_pri_orginal_spread,
  1232. pri_join_mask,
  1233. num_of_dif_pri);
  1234. break;
  1235. default:
  1236. BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
  1237. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1238. &cos_data, pri_join_mask);
  1239. }
  1240. for (i = 0; i < cos_data.num_of_cos ; i++) {
  1241. struct bnx2x_dcbx_cos_params *params =
  1242. &bp->dcbx_port_params.ets.cos_params[i];
  1243. params->pauseable = cos_data.data[i].pausable;
  1244. params->strict = cos_data.data[i].strict;
  1245. params->bw_tbl = cos_data.data[i].cos_bw;
  1246. if (params->pauseable) {
  1247. params->pri_bitmask =
  1248. DCBX_PFC_PRI_GET_PAUSE(bp,
  1249. cos_data.data[i].pri_join_mask);
  1250. DP(NETIF_MSG_LINK, "COS %d PAUSABLE prijoinmask 0x%x\n",
  1251. i, cos_data.data[i].pri_join_mask);
  1252. } else {
  1253. params->pri_bitmask =
  1254. DCBX_PFC_PRI_GET_NON_PAUSE(bp,
  1255. cos_data.data[i].pri_join_mask);
  1256. DP(NETIF_MSG_LINK, "COS %d NONPAUSABLE prijoinmask "
  1257. "0x%x\n",
  1258. i, cos_data.data[i].pri_join_mask);
  1259. }
  1260. }
  1261. bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
  1262. }
  1263. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  1264. u32 *set_configuration_ets_pg,
  1265. u32 *pri_pg_tbl)
  1266. {
  1267. int i;
  1268. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  1269. set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
  1270. DP(NETIF_MSG_LINK, "set_configuration_ets_pg[%d] = 0x%x\n",
  1271. i, set_configuration_ets_pg[i]);
  1272. }
  1273. }
  1274. /*******************************************************************************
  1275. * Description: Fill pfc_config struct that will be sent in DCBX start ramrod
  1276. *
  1277. * Return:
  1278. ******************************************************************************/
  1279. static void bnx2x_pfc_fw_struct_e2(struct bnx2x *bp)
  1280. {
  1281. struct flow_control_configuration *pfc_fw_cfg = NULL;
  1282. u16 pri_bit = 0;
  1283. u8 cos = 0, pri = 0;
  1284. struct priority_cos *tt2cos;
  1285. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1286. pfc_fw_cfg = (struct flow_control_configuration *)
  1287. bnx2x_sp(bp, pfc_config);
  1288. memset(pfc_fw_cfg, 0, sizeof(struct flow_control_configuration));
  1289. /*shortcut*/
  1290. tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
  1291. /* Fw version should be incremented each update */
  1292. pfc_fw_cfg->dcb_version = ++bp->dcb_version;
  1293. pfc_fw_cfg->dcb_enabled = DCB_ENABLED;
  1294. /* Default initialization */
  1295. for (pri = 0; pri < MAX_PFC_TRAFFIC_TYPES ; pri++) {
  1296. tt2cos[pri].priority = LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED;
  1297. tt2cos[pri].cos = 0;
  1298. }
  1299. /* Fill priority parameters */
  1300. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  1301. tt2cos[pri].priority = ttp[pri];
  1302. pri_bit = 1 << tt2cos[pri].priority;
  1303. /* Fill COS parameters based on COS calculated to
  1304. * make it more generally for future use */
  1305. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
  1306. if (bp->dcbx_port_params.ets.cos_params[cos].
  1307. pri_bitmask & pri_bit)
  1308. tt2cos[pri].cos = cos;
  1309. }
  1310. bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
  1311. }
  1312. /* DCB netlink */
  1313. #ifdef BCM_DCB
  1314. #include <linux/dcbnl.h>
  1315. #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \
  1316. DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC)
  1317. static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp)
  1318. {
  1319. /* validate dcbnl call that may change HW state:
  1320. * DCB is on and DCBX mode was SUCCESSFULLY set by the user.
  1321. */
  1322. return bp->dcb_state && bp->dcbx_mode_uset;
  1323. }
  1324. static u8 bnx2x_dcbnl_get_state(struct net_device *netdev)
  1325. {
  1326. struct bnx2x *bp = netdev_priv(netdev);
  1327. DP(NETIF_MSG_LINK, "state = %d\n", bp->dcb_state);
  1328. return bp->dcb_state;
  1329. }
  1330. static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state)
  1331. {
  1332. struct bnx2x *bp = netdev_priv(netdev);
  1333. DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
  1334. bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled);
  1335. return 0;
  1336. }
  1337. static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev,
  1338. u8 *perm_addr)
  1339. {
  1340. struct bnx2x *bp = netdev_priv(netdev);
  1341. DP(NETIF_MSG_LINK, "GET-PERM-ADDR\n");
  1342. /* first the HW mac address */
  1343. memcpy(perm_addr, netdev->dev_addr, netdev->addr_len);
  1344. #ifdef BCM_CNIC
  1345. /* second SAN address */
  1346. memcpy(perm_addr+netdev->addr_len, bp->fip_mac, netdev->addr_len);
  1347. #endif
  1348. }
  1349. static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio,
  1350. u8 prio_type, u8 pgid, u8 bw_pct,
  1351. u8 up_map)
  1352. {
  1353. struct bnx2x *bp = netdev_priv(netdev);
  1354. DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, pgid);
  1355. if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1356. return;
  1357. /**
  1358. * bw_pct ingnored - band-width percentage devision between user
  1359. * priorities within the same group is not
  1360. * standard and hence not supported
  1361. *
  1362. * prio_type igonred - priority levels within the same group are not
  1363. * standard and hence are not supported. According
  1364. * to the standard pgid 15 is dedicated to strict
  1365. * prioirty traffic (on the port level).
  1366. *
  1367. * up_map ignored
  1368. */
  1369. bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid;
  1370. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1371. }
  1372. static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev,
  1373. int pgid, u8 bw_pct)
  1374. {
  1375. struct bnx2x *bp = netdev_priv(netdev);
  1376. DP(NETIF_MSG_LINK, "pgid[%d] = %d\n", pgid, bw_pct);
  1377. if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1378. return;
  1379. bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct;
  1380. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1381. }
  1382. static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio,
  1383. u8 prio_type, u8 pgid, u8 bw_pct,
  1384. u8 up_map)
  1385. {
  1386. struct bnx2x *bp = netdev_priv(netdev);
  1387. DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
  1388. }
  1389. static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev,
  1390. int pgid, u8 bw_pct)
  1391. {
  1392. struct bnx2x *bp = netdev_priv(netdev);
  1393. DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
  1394. }
  1395. static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio,
  1396. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1397. u8 *up_map)
  1398. {
  1399. struct bnx2x *bp = netdev_priv(netdev);
  1400. DP(NETIF_MSG_LINK, "prio = %d\n", prio);
  1401. /**
  1402. * bw_pct ingnored - band-width percentage devision between user
  1403. * priorities within the same group is not
  1404. * standard and hence not supported
  1405. *
  1406. * prio_type igonred - priority levels within the same group are not
  1407. * standard and hence are not supported. According
  1408. * to the standard pgid 15 is dedicated to strict
  1409. * prioirty traffic (on the port level).
  1410. *
  1411. * up_map ignored
  1412. */
  1413. *up_map = *bw_pct = *prio_type = *pgid = 0;
  1414. if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1415. return;
  1416. *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio);
  1417. }
  1418. static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev,
  1419. int pgid, u8 *bw_pct)
  1420. {
  1421. struct bnx2x *bp = netdev_priv(netdev);
  1422. DP(NETIF_MSG_LINK, "pgid = %d\n", pgid);
  1423. *bw_pct = 0;
  1424. if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1425. return;
  1426. *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid);
  1427. }
  1428. static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio,
  1429. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1430. u8 *up_map)
  1431. {
  1432. struct bnx2x *bp = netdev_priv(netdev);
  1433. DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
  1434. *prio_type = *pgid = *bw_pct = *up_map = 0;
  1435. }
  1436. static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev,
  1437. int pgid, u8 *bw_pct)
  1438. {
  1439. struct bnx2x *bp = netdev_priv(netdev);
  1440. DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
  1441. *bw_pct = 0;
  1442. }
  1443. static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio,
  1444. u8 setting)
  1445. {
  1446. struct bnx2x *bp = netdev_priv(netdev);
  1447. DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, setting);
  1448. if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES)
  1449. return;
  1450. bp->dcbx_config_params.admin_pfc_bitmap |= ((setting ? 1 : 0) << prio);
  1451. if (setting)
  1452. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  1453. }
  1454. static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio,
  1455. u8 *setting)
  1456. {
  1457. struct bnx2x *bp = netdev_priv(netdev);
  1458. DP(NETIF_MSG_LINK, "prio = %d\n", prio);
  1459. *setting = 0;
  1460. if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES)
  1461. return;
  1462. *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1;
  1463. }
  1464. static u8 bnx2x_dcbnl_set_all(struct net_device *netdev)
  1465. {
  1466. struct bnx2x *bp = netdev_priv(netdev);
  1467. int rc = 0;
  1468. DP(NETIF_MSG_LINK, "SET-ALL\n");
  1469. if (!bnx2x_dcbnl_set_valid(bp))
  1470. return 1;
  1471. if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
  1472. netdev_err(bp->dev, "Handling parity error recovery. "
  1473. "Try again later\n");
  1474. return 1;
  1475. }
  1476. if (netif_running(bp->dev)) {
  1477. bnx2x_nic_unload(bp, UNLOAD_NORMAL);
  1478. rc = bnx2x_nic_load(bp, LOAD_NORMAL);
  1479. }
  1480. DP(NETIF_MSG_LINK, "set_dcbx_params done (%d)\n", rc);
  1481. if (rc)
  1482. return 1;
  1483. return 0;
  1484. }
  1485. static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
  1486. {
  1487. struct bnx2x *bp = netdev_priv(netdev);
  1488. u8 rval = 0;
  1489. if (bp->dcb_state) {
  1490. switch (capid) {
  1491. case DCB_CAP_ATTR_PG:
  1492. *cap = true;
  1493. break;
  1494. case DCB_CAP_ATTR_PFC:
  1495. *cap = true;
  1496. break;
  1497. case DCB_CAP_ATTR_UP2TC:
  1498. *cap = false;
  1499. break;
  1500. case DCB_CAP_ATTR_PG_TCS:
  1501. *cap = 0x80; /* 8 priorities for PGs */
  1502. break;
  1503. case DCB_CAP_ATTR_PFC_TCS:
  1504. *cap = 0x80; /* 8 priorities for PFC */
  1505. break;
  1506. case DCB_CAP_ATTR_GSP:
  1507. *cap = true;
  1508. break;
  1509. case DCB_CAP_ATTR_BCN:
  1510. *cap = false;
  1511. break;
  1512. case DCB_CAP_ATTR_DCBX:
  1513. *cap = BNX2X_DCBX_CAPS;
  1514. default:
  1515. rval = -EINVAL;
  1516. break;
  1517. }
  1518. } else
  1519. rval = -EINVAL;
  1520. DP(NETIF_MSG_LINK, "capid %d:%x\n", capid, *cap);
  1521. return rval;
  1522. }
  1523. static u8 bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num)
  1524. {
  1525. struct bnx2x *bp = netdev_priv(netdev);
  1526. u8 rval = 0;
  1527. DP(NETIF_MSG_LINK, "tcid %d\n", tcid);
  1528. if (bp->dcb_state) {
  1529. switch (tcid) {
  1530. case DCB_NUMTCS_ATTR_PG:
  1531. *num = E2_NUM_OF_COS;
  1532. break;
  1533. case DCB_NUMTCS_ATTR_PFC:
  1534. *num = E2_NUM_OF_COS;
  1535. break;
  1536. default:
  1537. rval = -EINVAL;
  1538. break;
  1539. }
  1540. } else
  1541. rval = -EINVAL;
  1542. return rval;
  1543. }
  1544. static u8 bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num)
  1545. {
  1546. struct bnx2x *bp = netdev_priv(netdev);
  1547. DP(NETIF_MSG_LINK, "num tcs = %d; Not supported\n", num);
  1548. return -EINVAL;
  1549. }
  1550. static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
  1551. {
  1552. struct bnx2x *bp = netdev_priv(netdev);
  1553. DP(NETIF_MSG_LINK, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
  1554. if (!bp->dcb_state)
  1555. return 0;
  1556. return bp->dcbx_local_feat.pfc.enabled;
  1557. }
  1558. static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state)
  1559. {
  1560. struct bnx2x *bp = netdev_priv(netdev);
  1561. DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
  1562. if (!bnx2x_dcbnl_set_valid(bp))
  1563. return;
  1564. bp->dcbx_config_params.admin_pfc_tx_enable =
  1565. bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0);
  1566. }
  1567. static bool bnx2x_app_is_equal(struct dcbx_app_priority_entry *app_ent,
  1568. u8 idtype, u16 idval)
  1569. {
  1570. if (!(app_ent->appBitfield & DCBX_APP_ENTRY_VALID))
  1571. return false;
  1572. switch (idtype) {
  1573. case DCB_APP_IDTYPE_ETHTYPE:
  1574. if ((app_ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) !=
  1575. DCBX_APP_SF_ETH_TYPE)
  1576. return false;
  1577. break;
  1578. case DCB_APP_IDTYPE_PORTNUM:
  1579. if ((app_ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) !=
  1580. DCBX_APP_SF_PORT)
  1581. return false;
  1582. break;
  1583. default:
  1584. return false;
  1585. }
  1586. if (app_ent->app_id != idval)
  1587. return false;
  1588. return true;
  1589. }
  1590. static void bnx2x_admin_app_set_ent(
  1591. struct bnx2x_admin_priority_app_table *app_ent,
  1592. u8 idtype, u16 idval, u8 up)
  1593. {
  1594. app_ent->valid = 1;
  1595. switch (idtype) {
  1596. case DCB_APP_IDTYPE_ETHTYPE:
  1597. app_ent->traffic_type = TRAFFIC_TYPE_ETH;
  1598. break;
  1599. case DCB_APP_IDTYPE_PORTNUM:
  1600. app_ent->traffic_type = TRAFFIC_TYPE_PORT;
  1601. break;
  1602. default:
  1603. break; /* never gets here */
  1604. }
  1605. app_ent->app_id = idval;
  1606. app_ent->priority = up;
  1607. }
  1608. static bool bnx2x_admin_app_is_equal(
  1609. struct bnx2x_admin_priority_app_table *app_ent,
  1610. u8 idtype, u16 idval)
  1611. {
  1612. if (!app_ent->valid)
  1613. return false;
  1614. switch (idtype) {
  1615. case DCB_APP_IDTYPE_ETHTYPE:
  1616. if (app_ent->traffic_type != TRAFFIC_TYPE_ETH)
  1617. return false;
  1618. break;
  1619. case DCB_APP_IDTYPE_PORTNUM:
  1620. if (app_ent->traffic_type != TRAFFIC_TYPE_PORT)
  1621. return false;
  1622. break;
  1623. default:
  1624. return false;
  1625. }
  1626. if (app_ent->app_id != idval)
  1627. return false;
  1628. return true;
  1629. }
  1630. static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up)
  1631. {
  1632. int i, ff;
  1633. /* iterate over the app entries looking for idtype and idval */
  1634. for (i = 0, ff = -1; i < 4; i++) {
  1635. struct bnx2x_admin_priority_app_table *app_ent =
  1636. &bp->dcbx_config_params.admin_priority_app_table[i];
  1637. if (bnx2x_admin_app_is_equal(app_ent, idtype, idval))
  1638. break;
  1639. if (ff < 0 && !app_ent->valid)
  1640. ff = i;
  1641. }
  1642. if (i < 4)
  1643. /* if found overwrite up */
  1644. bp->dcbx_config_params.
  1645. admin_priority_app_table[i].priority = up;
  1646. else if (ff >= 0)
  1647. /* not found use first-free */
  1648. bnx2x_admin_app_set_ent(
  1649. &bp->dcbx_config_params.admin_priority_app_table[ff],
  1650. idtype, idval, up);
  1651. else
  1652. /* app table is full */
  1653. return -EBUSY;
  1654. /* up configured, if not 0 make sure feature is enabled */
  1655. if (up)
  1656. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  1657. return 0;
  1658. }
  1659. static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype,
  1660. u16 idval, u8 up)
  1661. {
  1662. struct bnx2x *bp = netdev_priv(netdev);
  1663. DP(NETIF_MSG_LINK, "app_type %d, app_id %x, prio bitmap %d\n",
  1664. idtype, idval, up);
  1665. if (!bnx2x_dcbnl_set_valid(bp))
  1666. return -EINVAL;
  1667. /* verify idtype */
  1668. switch (idtype) {
  1669. case DCB_APP_IDTYPE_ETHTYPE:
  1670. case DCB_APP_IDTYPE_PORTNUM:
  1671. break;
  1672. default:
  1673. return -EINVAL;
  1674. }
  1675. return bnx2x_set_admin_app_up(bp, idtype, idval, up);
  1676. }
  1677. static u8 bnx2x_dcbnl_get_app_up(struct net_device *netdev, u8 idtype,
  1678. u16 idval)
  1679. {
  1680. int i;
  1681. u8 up = 0;
  1682. struct bnx2x *bp = netdev_priv(netdev);
  1683. DP(NETIF_MSG_LINK, "app_type %d, app_id 0x%x\n", idtype, idval);
  1684. /* iterate over the app entries looking for idtype and idval */
  1685. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
  1686. if (bnx2x_app_is_equal(&bp->dcbx_local_feat.app.app_pri_tbl[i],
  1687. idtype, idval))
  1688. break;
  1689. if (i < DCBX_MAX_APP_PROTOCOL)
  1690. /* if found return up */
  1691. up = bp->dcbx_local_feat.app.app_pri_tbl[i].pri_bitmap;
  1692. else
  1693. DP(NETIF_MSG_LINK, "app not found\n");
  1694. return up;
  1695. }
  1696. static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev)
  1697. {
  1698. struct bnx2x *bp = netdev_priv(netdev);
  1699. u8 state;
  1700. state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE;
  1701. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF)
  1702. state |= DCB_CAP_DCBX_STATIC;
  1703. return state;
  1704. }
  1705. static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state)
  1706. {
  1707. struct bnx2x *bp = netdev_priv(netdev);
  1708. DP(NETIF_MSG_LINK, "state = %02x\n", state);
  1709. /* set dcbx mode */
  1710. if ((state & BNX2X_DCBX_CAPS) != state) {
  1711. BNX2X_ERR("Requested DCBX mode %x is beyond advertised "
  1712. "capabilities\n", state);
  1713. return 1;
  1714. }
  1715. if (bp->dcb_state != BNX2X_DCB_STATE_ON) {
  1716. BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n");
  1717. return 1;
  1718. }
  1719. if (state & DCB_CAP_DCBX_STATIC)
  1720. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF;
  1721. else
  1722. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON;
  1723. bp->dcbx_mode_uset = true;
  1724. return 0;
  1725. }
  1726. static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
  1727. u8 *flags)
  1728. {
  1729. struct bnx2x *bp = netdev_priv(netdev);
  1730. u8 rval = 0;
  1731. DP(NETIF_MSG_LINK, "featid %d\n", featid);
  1732. if (bp->dcb_state) {
  1733. *flags = 0;
  1734. switch (featid) {
  1735. case DCB_FEATCFG_ATTR_PG:
  1736. if (bp->dcbx_local_feat.ets.enabled)
  1737. *flags |= DCB_FEATCFG_ENABLE;
  1738. if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR)
  1739. *flags |= DCB_FEATCFG_ERROR;
  1740. break;
  1741. case DCB_FEATCFG_ATTR_PFC:
  1742. if (bp->dcbx_local_feat.pfc.enabled)
  1743. *flags |= DCB_FEATCFG_ENABLE;
  1744. if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR |
  1745. DCBX_LOCAL_PFC_MISMATCH))
  1746. *flags |= DCB_FEATCFG_ERROR;
  1747. break;
  1748. case DCB_FEATCFG_ATTR_APP:
  1749. if (bp->dcbx_local_feat.app.enabled)
  1750. *flags |= DCB_FEATCFG_ENABLE;
  1751. if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR |
  1752. DCBX_LOCAL_APP_MISMATCH))
  1753. *flags |= DCB_FEATCFG_ERROR;
  1754. break;
  1755. default:
  1756. rval = -EINVAL;
  1757. break;
  1758. }
  1759. } else
  1760. rval = -EINVAL;
  1761. return rval;
  1762. }
  1763. static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
  1764. u8 flags)
  1765. {
  1766. struct bnx2x *bp = netdev_priv(netdev);
  1767. u8 rval = 0;
  1768. DP(NETIF_MSG_LINK, "featid = %d flags = %02x\n", featid, flags);
  1769. /* ignore the 'advertise' flag */
  1770. if (bnx2x_dcbnl_set_valid(bp)) {
  1771. switch (featid) {
  1772. case DCB_FEATCFG_ATTR_PG:
  1773. bp->dcbx_config_params.admin_ets_enable =
  1774. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  1775. bp->dcbx_config_params.admin_ets_willing =
  1776. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  1777. break;
  1778. case DCB_FEATCFG_ATTR_PFC:
  1779. bp->dcbx_config_params.admin_pfc_enable =
  1780. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  1781. bp->dcbx_config_params.admin_pfc_willing =
  1782. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  1783. break;
  1784. case DCB_FEATCFG_ATTR_APP:
  1785. /* ignore enable, always enabled */
  1786. bp->dcbx_config_params.admin_app_priority_willing =
  1787. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  1788. break;
  1789. default:
  1790. rval = -EINVAL;
  1791. break;
  1792. }
  1793. } else
  1794. rval = -EINVAL;
  1795. return rval;
  1796. }
  1797. const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = {
  1798. .getstate = bnx2x_dcbnl_get_state,
  1799. .setstate = bnx2x_dcbnl_set_state,
  1800. .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr,
  1801. .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx,
  1802. .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx,
  1803. .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx,
  1804. .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx,
  1805. .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx,
  1806. .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx,
  1807. .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx,
  1808. .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx,
  1809. .setpfccfg = bnx2x_dcbnl_set_pfc_cfg,
  1810. .getpfccfg = bnx2x_dcbnl_get_pfc_cfg,
  1811. .setall = bnx2x_dcbnl_set_all,
  1812. .getcap = bnx2x_dcbnl_get_cap,
  1813. .getnumtcs = bnx2x_dcbnl_get_numtcs,
  1814. .setnumtcs = bnx2x_dcbnl_set_numtcs,
  1815. .getpfcstate = bnx2x_dcbnl_get_pfc_state,
  1816. .setpfcstate = bnx2x_dcbnl_set_pfc_state,
  1817. .getapp = bnx2x_dcbnl_get_app_up,
  1818. .setapp = bnx2x_dcbnl_set_app_up,
  1819. .getdcbx = bnx2x_dcbnl_get_dcbx,
  1820. .setdcbx = bnx2x_dcbnl_set_dcbx,
  1821. .getfeatcfg = bnx2x_dcbnl_get_featcfg,
  1822. .setfeatcfg = bnx2x_dcbnl_set_featcfg,
  1823. };
  1824. #endif /* BCM_DCB */