system_no.h 4.1 KB

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  1. #ifndef _M68KNOMMU_SYSTEM_H
  2. #define _M68KNOMMU_SYSTEM_H
  3. #include <linux/linkage.h>
  4. #include <linux/irqflags.h>
  5. #include <asm/segment.h>
  6. #include <asm/entry.h>
  7. /*
  8. * switch_to(n) should switch tasks to task ptr, first checking that
  9. * ptr isn't the current task, in which case it does nothing. This
  10. * also clears the TS-flag if the task we switched to has used the
  11. * math co-processor latest.
  12. */
  13. /*
  14. * switch_to() saves the extra registers, that are not saved
  15. * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
  16. * a0-a1. Some of these are used by schedule() and its predecessors
  17. * and so we might get see unexpected behaviors when a task returns
  18. * with unexpected register values.
  19. *
  20. * syscall stores these registers itself and none of them are used
  21. * by syscall after the function in the syscall has been called.
  22. *
  23. * Beware that resume now expects *next to be in d1 and the offset of
  24. * tss to be in a1. This saves a few instructions as we no longer have
  25. * to push them onto the stack and read them back right after.
  26. *
  27. * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
  28. *
  29. * Changed 96/09/19 by Andreas Schwab
  30. * pass prev in a0, next in a1, offset of tss in d1, and whether
  31. * the mm structures are shared in d2 (to avoid atc flushing).
  32. */
  33. asmlinkage void resume(void);
  34. #define switch_to(prev,next,last) \
  35. { \
  36. void *_last; \
  37. __asm__ __volatile__( \
  38. "movel %1, %%a0\n\t" \
  39. "movel %2, %%a1\n\t" \
  40. "jbsr resume\n\t" \
  41. "movel %%d1, %0\n\t" \
  42. : "=d" (_last) \
  43. : "d" (prev), "d" (next) \
  44. : "cc", "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1"); \
  45. (last) = _last; \
  46. }
  47. #define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
  48. /*
  49. * Force strict CPU ordering.
  50. * Not really required on m68k...
  51. */
  52. #define nop() asm volatile ("nop"::)
  53. #define mb() asm volatile ("" : : :"memory")
  54. #define rmb() asm volatile ("" : : :"memory")
  55. #define wmb() asm volatile ("" : : :"memory")
  56. #define set_mb(var, value) ({ (var) = (value); wmb(); })
  57. #define smp_mb() barrier()
  58. #define smp_rmb() barrier()
  59. #define smp_wmb() barrier()
  60. #define smp_read_barrier_depends() do { } while(0)
  61. #define read_barrier_depends() ((void)0)
  62. #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
  63. struct __xchg_dummy { unsigned long a[100]; };
  64. #define __xg(x) ((volatile struct __xchg_dummy *)(x))
  65. #ifndef CONFIG_RMW_INSNS
  66. static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
  67. {
  68. unsigned long tmp, flags;
  69. local_irq_save(flags);
  70. switch (size) {
  71. case 1:
  72. __asm__ __volatile__
  73. ("moveb %2,%0\n\t"
  74. "moveb %1,%2"
  75. : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
  76. break;
  77. case 2:
  78. __asm__ __volatile__
  79. ("movew %2,%0\n\t"
  80. "movew %1,%2"
  81. : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
  82. break;
  83. case 4:
  84. __asm__ __volatile__
  85. ("movel %2,%0\n\t"
  86. "movel %1,%2"
  87. : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
  88. break;
  89. }
  90. local_irq_restore(flags);
  91. return tmp;
  92. }
  93. #else
  94. static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
  95. {
  96. switch (size) {
  97. case 1:
  98. __asm__ __volatile__
  99. ("moveb %2,%0\n\t"
  100. "1:\n\t"
  101. "casb %0,%1,%2\n\t"
  102. "jne 1b"
  103. : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
  104. break;
  105. case 2:
  106. __asm__ __volatile__
  107. ("movew %2,%0\n\t"
  108. "1:\n\t"
  109. "casw %0,%1,%2\n\t"
  110. "jne 1b"
  111. : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
  112. break;
  113. case 4:
  114. __asm__ __volatile__
  115. ("movel %2,%0\n\t"
  116. "1:\n\t"
  117. "casl %0,%1,%2\n\t"
  118. "jne 1b"
  119. : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
  120. break;
  121. }
  122. return x;
  123. }
  124. #endif
  125. #include <asm-generic/cmpxchg-local.h>
  126. /*
  127. * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
  128. * them available.
  129. */
  130. #define cmpxchg_local(ptr, o, n) \
  131. ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
  132. (unsigned long)(n), sizeof(*(ptr))))
  133. #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
  134. #include <asm-generic/cmpxchg.h>
  135. #define arch_align_stack(x) (x)
  136. #endif /* _M68KNOMMU_SYSTEM_H */