usb-ehci.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/usb-ehci.c
  3. *
  4. * This file will contain the board specific details for the
  5. * Synopsys EHCI host controller on OMAP3430
  6. *
  7. * Copyright (C) 2007 Texas Instruments
  8. * Author: Vikram Pandita <vikram.pandita@ti.com>
  9. *
  10. * Generalization by:
  11. * Felipe Balbi <felipe.balbi@nokia.com>
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. */
  17. #include <linux/types.h>
  18. #include <linux/errno.h>
  19. #include <linux/delay.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/clk.h>
  22. #include <linux/dma-mapping.h>
  23. #include <asm/io.h>
  24. #include <mach/hardware.h>
  25. #include <mach/irqs.h>
  26. #include <plat/usb.h>
  27. #include "mux.h"
  28. #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
  29. static struct resource ehci_resources[] = {
  30. {
  31. .flags = IORESOURCE_MEM,
  32. },
  33. {
  34. .flags = IORESOURCE_MEM,
  35. },
  36. {
  37. .flags = IORESOURCE_MEM,
  38. },
  39. { /* general IRQ */
  40. .flags = IORESOURCE_IRQ,
  41. }
  42. };
  43. static u64 ehci_dmamask = ~(u32)0;
  44. static struct platform_device ehci_device = {
  45. .name = "ehci-omap",
  46. .id = 0,
  47. .dev = {
  48. .dma_mask = &ehci_dmamask,
  49. .coherent_dma_mask = 0xffffffff,
  50. .platform_data = NULL,
  51. },
  52. .num_resources = ARRAY_SIZE(ehci_resources),
  53. .resource = ehci_resources,
  54. };
  55. /* MUX settings for EHCI pins */
  56. /*
  57. * setup_ehci_io_mux - initialize IO pad mux for USBHOST
  58. */
  59. static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
  60. {
  61. switch (port_mode[0]) {
  62. case EHCI_HCD_OMAP_MODE_PHY:
  63. omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT);
  64. omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT);
  65. omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN);
  66. omap_mux_init_signal("hsusb1_nxt", OMAP_PIN_INPUT_PULLDOWN);
  67. omap_mux_init_signal("hsusb1_data0", OMAP_PIN_INPUT_PULLDOWN);
  68. omap_mux_init_signal("hsusb1_data1", OMAP_PIN_INPUT_PULLDOWN);
  69. omap_mux_init_signal("hsusb1_data2", OMAP_PIN_INPUT_PULLDOWN);
  70. omap_mux_init_signal("hsusb1_data3", OMAP_PIN_INPUT_PULLDOWN);
  71. omap_mux_init_signal("hsusb1_data4", OMAP_PIN_INPUT_PULLDOWN);
  72. omap_mux_init_signal("hsusb1_data5", OMAP_PIN_INPUT_PULLDOWN);
  73. omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN);
  74. omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN);
  75. break;
  76. case EHCI_HCD_OMAP_MODE_TLL:
  77. omap_mux_init_signal("hsusb1_tll_stp",
  78. OMAP_PIN_INPUT_PULLUP);
  79. omap_mux_init_signal("hsusb1_tll_clk",
  80. OMAP_PIN_INPUT_PULLDOWN);
  81. omap_mux_init_signal("hsusb1_tll_dir",
  82. OMAP_PIN_INPUT_PULLDOWN);
  83. omap_mux_init_signal("hsusb1_tll_nxt",
  84. OMAP_PIN_INPUT_PULLDOWN);
  85. omap_mux_init_signal("hsusb1_tll_data0",
  86. OMAP_PIN_INPUT_PULLDOWN);
  87. omap_mux_init_signal("hsusb1_tll_data1",
  88. OMAP_PIN_INPUT_PULLDOWN);
  89. omap_mux_init_signal("hsusb1_tll_data2",
  90. OMAP_PIN_INPUT_PULLDOWN);
  91. omap_mux_init_signal("hsusb1_tll_data3",
  92. OMAP_PIN_INPUT_PULLDOWN);
  93. omap_mux_init_signal("hsusb1_tll_data4",
  94. OMAP_PIN_INPUT_PULLDOWN);
  95. omap_mux_init_signal("hsusb1_tll_data5",
  96. OMAP_PIN_INPUT_PULLDOWN);
  97. omap_mux_init_signal("hsusb1_tll_data6",
  98. OMAP_PIN_INPUT_PULLDOWN);
  99. omap_mux_init_signal("hsusb1_tll_data7",
  100. OMAP_PIN_INPUT_PULLDOWN);
  101. break;
  102. case EHCI_HCD_OMAP_MODE_UNKNOWN:
  103. /* FALLTHROUGH */
  104. default:
  105. break;
  106. }
  107. switch (port_mode[1]) {
  108. case EHCI_HCD_OMAP_MODE_PHY:
  109. omap_mux_init_signal("hsusb2_stp", OMAP_PIN_OUTPUT);
  110. omap_mux_init_signal("hsusb2_clk", OMAP_PIN_OUTPUT);
  111. omap_mux_init_signal("hsusb2_dir", OMAP_PIN_INPUT_PULLDOWN);
  112. omap_mux_init_signal("hsusb2_nxt", OMAP_PIN_INPUT_PULLDOWN);
  113. omap_mux_init_signal("hsusb2_data0",
  114. OMAP_PIN_INPUT_PULLDOWN);
  115. omap_mux_init_signal("hsusb2_data1",
  116. OMAP_PIN_INPUT_PULLDOWN);
  117. omap_mux_init_signal("hsusb2_data2",
  118. OMAP_PIN_INPUT_PULLDOWN);
  119. omap_mux_init_signal("hsusb2_data3",
  120. OMAP_PIN_INPUT_PULLDOWN);
  121. omap_mux_init_signal("hsusb2_data4",
  122. OMAP_PIN_INPUT_PULLDOWN);
  123. omap_mux_init_signal("hsusb2_data5",
  124. OMAP_PIN_INPUT_PULLDOWN);
  125. omap_mux_init_signal("hsusb2_data6",
  126. OMAP_PIN_INPUT_PULLDOWN);
  127. omap_mux_init_signal("hsusb2_data7",
  128. OMAP_PIN_INPUT_PULLDOWN);
  129. break;
  130. case EHCI_HCD_OMAP_MODE_TLL:
  131. omap_mux_init_signal("hsusb2_tll_stp",
  132. OMAP_PIN_INPUT_PULLUP);
  133. omap_mux_init_signal("hsusb2_tll_clk",
  134. OMAP_PIN_INPUT_PULLDOWN);
  135. omap_mux_init_signal("hsusb2_tll_dir",
  136. OMAP_PIN_INPUT_PULLDOWN);
  137. omap_mux_init_signal("hsusb2_tll_nxt",
  138. OMAP_PIN_INPUT_PULLDOWN);
  139. omap_mux_init_signal("hsusb2_tll_data0",
  140. OMAP_PIN_INPUT_PULLDOWN);
  141. omap_mux_init_signal("hsusb2_tll_data1",
  142. OMAP_PIN_INPUT_PULLDOWN);
  143. omap_mux_init_signal("hsusb2_tll_data2",
  144. OMAP_PIN_INPUT_PULLDOWN);
  145. omap_mux_init_signal("hsusb2_tll_data3",
  146. OMAP_PIN_INPUT_PULLDOWN);
  147. omap_mux_init_signal("hsusb2_tll_data4",
  148. OMAP_PIN_INPUT_PULLDOWN);
  149. omap_mux_init_signal("hsusb2_tll_data5",
  150. OMAP_PIN_INPUT_PULLDOWN);
  151. omap_mux_init_signal("hsusb2_tll_data6",
  152. OMAP_PIN_INPUT_PULLDOWN);
  153. omap_mux_init_signal("hsusb2_tll_data7",
  154. OMAP_PIN_INPUT_PULLDOWN);
  155. break;
  156. case EHCI_HCD_OMAP_MODE_UNKNOWN:
  157. /* FALLTHROUGH */
  158. default:
  159. break;
  160. }
  161. switch (port_mode[2]) {
  162. case EHCI_HCD_OMAP_MODE_PHY:
  163. printk(KERN_WARNING "Port3 can't be used in PHY mode\n");
  164. break;
  165. case EHCI_HCD_OMAP_MODE_TLL:
  166. omap_mux_init_signal("hsusb3_tll_stp",
  167. OMAP_PIN_INPUT_PULLUP);
  168. omap_mux_init_signal("hsusb3_tll_clk",
  169. OMAP_PIN_INPUT_PULLDOWN);
  170. omap_mux_init_signal("hsusb3_tll_dir",
  171. OMAP_PIN_INPUT_PULLDOWN);
  172. omap_mux_init_signal("hsusb3_tll_nxt",
  173. OMAP_PIN_INPUT_PULLDOWN);
  174. omap_mux_init_signal("hsusb3_tll_data0",
  175. OMAP_PIN_INPUT_PULLDOWN);
  176. omap_mux_init_signal("hsusb3_tll_data1",
  177. OMAP_PIN_INPUT_PULLDOWN);
  178. omap_mux_init_signal("hsusb3_tll_data2",
  179. OMAP_PIN_INPUT_PULLDOWN);
  180. omap_mux_init_signal("hsusb3_tll_data3",
  181. OMAP_PIN_INPUT_PULLDOWN);
  182. omap_mux_init_signal("hsusb3_tll_data4",
  183. OMAP_PIN_INPUT_PULLDOWN);
  184. omap_mux_init_signal("hsusb3_tll_data5",
  185. OMAP_PIN_INPUT_PULLDOWN);
  186. omap_mux_init_signal("hsusb3_tll_data6",
  187. OMAP_PIN_INPUT_PULLDOWN);
  188. omap_mux_init_signal("hsusb3_tll_data7",
  189. OMAP_PIN_INPUT_PULLDOWN);
  190. break;
  191. case EHCI_HCD_OMAP_MODE_UNKNOWN:
  192. /* FALLTHROUGH */
  193. default:
  194. break;
  195. }
  196. return;
  197. }
  198. static void setup_4430ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
  199. {
  200. switch (port_mode[0]) {
  201. case EHCI_HCD_OMAP_MODE_PHY:
  202. omap_mux_init_signal("usbb1_ulpiphy_stp",
  203. OMAP_PIN_OUTPUT);
  204. omap_mux_init_signal("usbb1_ulpiphy_clk",
  205. OMAP_PIN_INPUT_PULLDOWN);
  206. omap_mux_init_signal("usbb1_ulpiphy_dir",
  207. OMAP_PIN_INPUT_PULLDOWN);
  208. omap_mux_init_signal("usbb1_ulpiphy_nxt",
  209. OMAP_PIN_INPUT_PULLDOWN);
  210. omap_mux_init_signal("usbb1_ulpiphy_dat0",
  211. OMAP_PIN_INPUT_PULLDOWN);
  212. omap_mux_init_signal("usbb1_ulpiphy_dat1",
  213. OMAP_PIN_INPUT_PULLDOWN);
  214. omap_mux_init_signal("usbb1_ulpiphy_dat2",
  215. OMAP_PIN_INPUT_PULLDOWN);
  216. omap_mux_init_signal("usbb1_ulpiphy_dat3",
  217. OMAP_PIN_INPUT_PULLDOWN);
  218. omap_mux_init_signal("usbb1_ulpiphy_dat4",
  219. OMAP_PIN_INPUT_PULLDOWN);
  220. omap_mux_init_signal("usbb1_ulpiphy_dat5",
  221. OMAP_PIN_INPUT_PULLDOWN);
  222. omap_mux_init_signal("usbb1_ulpiphy_dat6",
  223. OMAP_PIN_INPUT_PULLDOWN);
  224. omap_mux_init_signal("usbb1_ulpiphy_dat7",
  225. OMAP_PIN_INPUT_PULLDOWN);
  226. break;
  227. case EHCI_HCD_OMAP_MODE_TLL:
  228. omap_mux_init_signal("usbb1_ulpitll_stp",
  229. OMAP_PIN_INPUT_PULLUP);
  230. omap_mux_init_signal("usbb1_ulpitll_clk",
  231. OMAP_PIN_INPUT_PULLDOWN);
  232. omap_mux_init_signal("usbb1_ulpitll_dir",
  233. OMAP_PIN_INPUT_PULLDOWN);
  234. omap_mux_init_signal("usbb1_ulpitll_nxt",
  235. OMAP_PIN_INPUT_PULLDOWN);
  236. omap_mux_init_signal("usbb1_ulpitll_dat0",
  237. OMAP_PIN_INPUT_PULLDOWN);
  238. omap_mux_init_signal("usbb1_ulpitll_dat1",
  239. OMAP_PIN_INPUT_PULLDOWN);
  240. omap_mux_init_signal("usbb1_ulpitll_dat2",
  241. OMAP_PIN_INPUT_PULLDOWN);
  242. omap_mux_init_signal("usbb1_ulpitll_dat3",
  243. OMAP_PIN_INPUT_PULLDOWN);
  244. omap_mux_init_signal("usbb1_ulpitll_dat4",
  245. OMAP_PIN_INPUT_PULLDOWN);
  246. omap_mux_init_signal("usbb1_ulpitll_dat5",
  247. OMAP_PIN_INPUT_PULLDOWN);
  248. omap_mux_init_signal("usbb1_ulpitll_dat6",
  249. OMAP_PIN_INPUT_PULLDOWN);
  250. omap_mux_init_signal("usbb1_ulpitll_dat7",
  251. OMAP_PIN_INPUT_PULLDOWN);
  252. break;
  253. case EHCI_HCD_OMAP_MODE_UNKNOWN:
  254. default:
  255. break;
  256. }
  257. switch (port_mode[1]) {
  258. case EHCI_HCD_OMAP_MODE_PHY:
  259. omap_mux_init_signal("usbb2_ulpiphy_stp",
  260. OMAP_PIN_OUTPUT);
  261. omap_mux_init_signal("usbb2_ulpiphy_clk",
  262. OMAP_PIN_INPUT_PULLDOWN);
  263. omap_mux_init_signal("usbb2_ulpiphy_dir",
  264. OMAP_PIN_INPUT_PULLDOWN);
  265. omap_mux_init_signal("usbb2_ulpiphy_nxt",
  266. OMAP_PIN_INPUT_PULLDOWN);
  267. omap_mux_init_signal("usbb2_ulpiphy_dat0",
  268. OMAP_PIN_INPUT_PULLDOWN);
  269. omap_mux_init_signal("usbb2_ulpiphy_dat1",
  270. OMAP_PIN_INPUT_PULLDOWN);
  271. omap_mux_init_signal("usbb2_ulpiphy_dat2",
  272. OMAP_PIN_INPUT_PULLDOWN);
  273. omap_mux_init_signal("usbb2_ulpiphy_dat3",
  274. OMAP_PIN_INPUT_PULLDOWN);
  275. omap_mux_init_signal("usbb2_ulpiphy_dat4",
  276. OMAP_PIN_INPUT_PULLDOWN);
  277. omap_mux_init_signal("usbb2_ulpiphy_dat5",
  278. OMAP_PIN_INPUT_PULLDOWN);
  279. omap_mux_init_signal("usbb2_ulpiphy_dat6",
  280. OMAP_PIN_INPUT_PULLDOWN);
  281. omap_mux_init_signal("usbb2_ulpiphy_dat7",
  282. OMAP_PIN_INPUT_PULLDOWN);
  283. break;
  284. case EHCI_HCD_OMAP_MODE_TLL:
  285. omap_mux_init_signal("usbb2_ulpitll_stp",
  286. OMAP_PIN_INPUT_PULLUP);
  287. omap_mux_init_signal("usbb2_ulpitll_clk",
  288. OMAP_PIN_INPUT_PULLDOWN);
  289. omap_mux_init_signal("usbb2_ulpitll_dir",
  290. OMAP_PIN_INPUT_PULLDOWN);
  291. omap_mux_init_signal("usbb2_ulpitll_nxt",
  292. OMAP_PIN_INPUT_PULLDOWN);
  293. omap_mux_init_signal("usbb2_ulpitll_dat0",
  294. OMAP_PIN_INPUT_PULLDOWN);
  295. omap_mux_init_signal("usbb2_ulpitll_dat1",
  296. OMAP_PIN_INPUT_PULLDOWN);
  297. omap_mux_init_signal("usbb2_ulpitll_dat2",
  298. OMAP_PIN_INPUT_PULLDOWN);
  299. omap_mux_init_signal("usbb2_ulpitll_dat3",
  300. OMAP_PIN_INPUT_PULLDOWN);
  301. omap_mux_init_signal("usbb2_ulpitll_dat4",
  302. OMAP_PIN_INPUT_PULLDOWN);
  303. omap_mux_init_signal("usbb2_ulpitll_dat5",
  304. OMAP_PIN_INPUT_PULLDOWN);
  305. omap_mux_init_signal("usbb2_ulpitll_dat6",
  306. OMAP_PIN_INPUT_PULLDOWN);
  307. omap_mux_init_signal("usbb2_ulpitll_dat7",
  308. OMAP_PIN_INPUT_PULLDOWN);
  309. break;
  310. case EHCI_HCD_OMAP_MODE_UNKNOWN:
  311. default:
  312. break;
  313. }
  314. }
  315. void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
  316. {
  317. platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
  318. /* Setup Pin IO MUX for EHCI */
  319. if (cpu_is_omap34xx()) {
  320. ehci_resources[0].start = OMAP34XX_EHCI_BASE;
  321. ehci_resources[0].end = OMAP34XX_EHCI_BASE + SZ_1K - 1;
  322. ehci_resources[1].start = OMAP34XX_UHH_CONFIG_BASE;
  323. ehci_resources[1].end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1;
  324. ehci_resources[2].start = OMAP34XX_USBTLL_BASE;
  325. ehci_resources[2].end = OMAP34XX_USBTLL_BASE + SZ_4K - 1;
  326. ehci_resources[3].start = INT_34XX_EHCI_IRQ;
  327. setup_ehci_io_mux(pdata->port_mode);
  328. } else if (cpu_is_omap44xx()) {
  329. ehci_resources[0].start = OMAP44XX_HSUSB_EHCI_BASE;
  330. ehci_resources[0].end = OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1;
  331. ehci_resources[1].start = OMAP44XX_UHH_CONFIG_BASE;
  332. ehci_resources[1].end = OMAP44XX_UHH_CONFIG_BASE + SZ_2K - 1;
  333. ehci_resources[2].start = OMAP44XX_USBTLL_BASE;
  334. ehci_resources[2].end = OMAP44XX_USBTLL_BASE + SZ_4K - 1;
  335. ehci_resources[3].start = OMAP44XX_IRQ_EHCI;
  336. setup_4430ehci_io_mux(pdata->port_mode);
  337. }
  338. if (platform_device_register(&ehci_device) < 0) {
  339. printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
  340. return;
  341. }
  342. }
  343. #else
  344. void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
  345. {
  346. }
  347. #endif /* CONFIG_USB_EHCI_HCD */
  348. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  349. static struct resource ohci_resources[] = {
  350. {
  351. .start = OMAP34XX_OHCI_BASE,
  352. .end = OMAP34XX_OHCI_BASE + SZ_1K - 1,
  353. .flags = IORESOURCE_MEM,
  354. },
  355. {
  356. .start = OMAP34XX_UHH_CONFIG_BASE,
  357. .end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1,
  358. .flags = IORESOURCE_MEM,
  359. },
  360. {
  361. .start = OMAP34XX_USBTLL_BASE,
  362. .end = OMAP34XX_USBTLL_BASE + SZ_4K - 1,
  363. .flags = IORESOURCE_MEM,
  364. },
  365. { /* general IRQ */
  366. .start = INT_34XX_OHCI_IRQ,
  367. .flags = IORESOURCE_IRQ,
  368. }
  369. };
  370. static u64 ohci_dmamask = DMA_BIT_MASK(32);
  371. static struct platform_device ohci_device = {
  372. .name = "ohci-omap3",
  373. .id = 0,
  374. .dev = {
  375. .dma_mask = &ohci_dmamask,
  376. .coherent_dma_mask = 0xffffffff,
  377. },
  378. .num_resources = ARRAY_SIZE(ohci_resources),
  379. .resource = ohci_resources,
  380. };
  381. static void setup_ohci_io_mux(const enum ohci_omap3_port_mode *port_mode)
  382. {
  383. switch (port_mode[0]) {
  384. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  385. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  386. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  387. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  388. omap_mux_init_signal("mm1_rxdp",
  389. OMAP_PIN_INPUT_PULLDOWN);
  390. omap_mux_init_signal("mm1_rxdm",
  391. OMAP_PIN_INPUT_PULLDOWN);
  392. /* FALLTHROUGH */
  393. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  394. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  395. omap_mux_init_signal("mm1_rxrcv",
  396. OMAP_PIN_INPUT_PULLDOWN);
  397. /* FALLTHROUGH */
  398. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  399. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  400. omap_mux_init_signal("mm1_txen_n", OMAP_PIN_OUTPUT);
  401. /* FALLTHROUGH */
  402. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  403. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  404. omap_mux_init_signal("mm1_txse0",
  405. OMAP_PIN_INPUT_PULLDOWN);
  406. omap_mux_init_signal("mm1_txdat",
  407. OMAP_PIN_INPUT_PULLDOWN);
  408. break;
  409. case OMAP_OHCI_PORT_MODE_UNUSED:
  410. /* FALLTHROUGH */
  411. default:
  412. break;
  413. }
  414. switch (port_mode[1]) {
  415. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  416. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  417. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  418. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  419. omap_mux_init_signal("mm2_rxdp",
  420. OMAP_PIN_INPUT_PULLDOWN);
  421. omap_mux_init_signal("mm2_rxdm",
  422. OMAP_PIN_INPUT_PULLDOWN);
  423. /* FALLTHROUGH */
  424. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  425. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  426. omap_mux_init_signal("mm2_rxrcv",
  427. OMAP_PIN_INPUT_PULLDOWN);
  428. /* FALLTHROUGH */
  429. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  430. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  431. omap_mux_init_signal("mm2_txen_n", OMAP_PIN_OUTPUT);
  432. /* FALLTHROUGH */
  433. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  434. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  435. omap_mux_init_signal("mm2_txse0",
  436. OMAP_PIN_INPUT_PULLDOWN);
  437. omap_mux_init_signal("mm2_txdat",
  438. OMAP_PIN_INPUT_PULLDOWN);
  439. break;
  440. case OMAP_OHCI_PORT_MODE_UNUSED:
  441. /* FALLTHROUGH */
  442. default:
  443. break;
  444. }
  445. switch (port_mode[2]) {
  446. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
  447. case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
  448. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
  449. case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
  450. omap_mux_init_signal("mm3_rxdp",
  451. OMAP_PIN_INPUT_PULLDOWN);
  452. omap_mux_init_signal("mm3_rxdm",
  453. OMAP_PIN_INPUT_PULLDOWN);
  454. /* FALLTHROUGH */
  455. case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
  456. case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
  457. omap_mux_init_signal("mm3_rxrcv",
  458. OMAP_PIN_INPUT_PULLDOWN);
  459. /* FALLTHROUGH */
  460. case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
  461. case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
  462. omap_mux_init_signal("mm3_txen_n", OMAP_PIN_OUTPUT);
  463. /* FALLTHROUGH */
  464. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
  465. case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
  466. omap_mux_init_signal("mm3_txse0",
  467. OMAP_PIN_INPUT_PULLDOWN);
  468. omap_mux_init_signal("mm3_txdat",
  469. OMAP_PIN_INPUT_PULLDOWN);
  470. break;
  471. case OMAP_OHCI_PORT_MODE_UNUSED:
  472. /* FALLTHROUGH */
  473. default:
  474. break;
  475. }
  476. }
  477. void __init usb_ohci_init(const struct ohci_hcd_omap_platform_data *pdata)
  478. {
  479. platform_device_add_data(&ohci_device, pdata, sizeof(*pdata));
  480. /* Setup Pin IO MUX for OHCI */
  481. if (cpu_is_omap34xx())
  482. setup_ohci_io_mux(pdata->port_mode);
  483. if (platform_device_register(&ohci_device) < 0) {
  484. pr_err("Unable to register FS-USB (OHCI) device\n");
  485. return;
  486. }
  487. }
  488. #else
  489. void __init usb_ohci_init(const struct ohci_hcd_omap_platform_data *pdata)
  490. {
  491. }
  492. #endif /* CONFIG_USB_OHCI_HCD */