dma-mapping.h 17 KB

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  1. #ifndef ASMARM_DMA_MAPPING_H
  2. #define ASMARM_DMA_MAPPING_H
  3. #ifdef __KERNEL__
  4. #include <linux/mm_types.h>
  5. #include <linux/scatterlist.h>
  6. #include <linux/dma-debug.h>
  7. #include <asm-generic/dma-coherent.h>
  8. #include <asm/memory.h>
  9. #ifdef __arch_page_to_dma
  10. #error Please update to __arch_pfn_to_dma
  11. #endif
  12. /*
  13. * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
  14. * functions used internally by the DMA-mapping API to provide DMA
  15. * addresses. They must not be used by drivers.
  16. */
  17. #ifndef __arch_pfn_to_dma
  18. static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
  19. {
  20. return (dma_addr_t)__pfn_to_bus(pfn);
  21. }
  22. static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
  23. {
  24. return __bus_to_pfn(addr);
  25. }
  26. static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  27. {
  28. return (void *)__bus_to_virt(addr);
  29. }
  30. static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  31. {
  32. return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
  33. }
  34. #else
  35. static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
  36. {
  37. return __arch_pfn_to_dma(dev, pfn);
  38. }
  39. static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
  40. {
  41. return __arch_dma_to_pfn(dev, addr);
  42. }
  43. static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  44. {
  45. return __arch_dma_to_virt(dev, addr);
  46. }
  47. static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  48. {
  49. return __arch_virt_to_dma(dev, addr);
  50. }
  51. #endif
  52. /*
  53. * The DMA API is built upon the notion of "buffer ownership". A buffer
  54. * is either exclusively owned by the CPU (and therefore may be accessed
  55. * by it) or exclusively owned by the DMA device. These helper functions
  56. * represent the transitions between these two ownership states.
  57. *
  58. * Note, however, that on later ARMs, this notion does not work due to
  59. * speculative prefetches. We model our approach on the assumption that
  60. * the CPU does do speculative prefetches, which means we clean caches
  61. * before transfers and delay cache invalidation until transfer completion.
  62. *
  63. * Private support functions: these are not part of the API and are
  64. * liable to change. Drivers must not use these.
  65. */
  66. static inline void __dma_single_cpu_to_dev(const void *kaddr, size_t size,
  67. enum dma_data_direction dir)
  68. {
  69. extern void ___dma_single_cpu_to_dev(const void *, size_t,
  70. enum dma_data_direction);
  71. if (!arch_is_coherent())
  72. ___dma_single_cpu_to_dev(kaddr, size, dir);
  73. }
  74. static inline void __dma_single_dev_to_cpu(const void *kaddr, size_t size,
  75. enum dma_data_direction dir)
  76. {
  77. extern void ___dma_single_dev_to_cpu(const void *, size_t,
  78. enum dma_data_direction);
  79. if (!arch_is_coherent())
  80. ___dma_single_dev_to_cpu(kaddr, size, dir);
  81. }
  82. static inline void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
  83. size_t size, enum dma_data_direction dir)
  84. {
  85. extern void ___dma_page_cpu_to_dev(struct page *, unsigned long,
  86. size_t, enum dma_data_direction);
  87. if (!arch_is_coherent())
  88. ___dma_page_cpu_to_dev(page, off, size, dir);
  89. }
  90. static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
  91. size_t size, enum dma_data_direction dir)
  92. {
  93. extern void ___dma_page_dev_to_cpu(struct page *, unsigned long,
  94. size_t, enum dma_data_direction);
  95. if (!arch_is_coherent())
  96. ___dma_page_dev_to_cpu(page, off, size, dir);
  97. }
  98. /*
  99. * Return whether the given device DMA address mask can be supported
  100. * properly. For example, if your device can only drive the low 24-bits
  101. * during bus mastering, then you would pass 0x00ffffff as the mask
  102. * to this function.
  103. *
  104. * FIXME: This should really be a platform specific issue - we should
  105. * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
  106. */
  107. static inline int dma_supported(struct device *dev, u64 mask)
  108. {
  109. if (mask < ISA_DMA_THRESHOLD)
  110. return 0;
  111. return 1;
  112. }
  113. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  114. {
  115. #ifdef CONFIG_DMABOUNCE
  116. if (dev->archdata.dmabounce) {
  117. if (dma_mask >= ISA_DMA_THRESHOLD)
  118. return 0;
  119. else
  120. return -EIO;
  121. }
  122. #endif
  123. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  124. return -EIO;
  125. *dev->dma_mask = dma_mask;
  126. return 0;
  127. }
  128. /*
  129. * DMA errors are defined by all-bits-set in the DMA address.
  130. */
  131. static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  132. {
  133. return dma_addr == ~0;
  134. }
  135. /*
  136. * Dummy noncoherent implementation. We don't provide a dma_cache_sync
  137. * function so drivers using this API are highlighted with build warnings.
  138. */
  139. static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
  140. dma_addr_t *handle, gfp_t gfp)
  141. {
  142. return NULL;
  143. }
  144. static inline void dma_free_noncoherent(struct device *dev, size_t size,
  145. void *cpu_addr, dma_addr_t handle)
  146. {
  147. }
  148. /**
  149. * dma_alloc_coherent - allocate consistent memory for DMA
  150. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  151. * @size: required memory size
  152. * @handle: bus-specific DMA address
  153. *
  154. * Allocate some uncached, unbuffered memory for a device for
  155. * performing DMA. This function allocates pages, and will
  156. * return the CPU-viewed address, and sets @handle to be the
  157. * device-viewed address.
  158. */
  159. extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
  160. /**
  161. * dma_free_coherent - free memory allocated by dma_alloc_coherent
  162. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  163. * @size: size of memory originally requested in dma_alloc_coherent
  164. * @cpu_addr: CPU-view address returned from dma_alloc_coherent
  165. * @handle: device-view address returned from dma_alloc_coherent
  166. *
  167. * Free (and unmap) a DMA buffer previously allocated by
  168. * dma_alloc_coherent().
  169. *
  170. * References to memory and mappings associated with cpu_addr/handle
  171. * during and after this call executing are illegal.
  172. */
  173. extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
  174. /**
  175. * dma_mmap_coherent - map a coherent DMA allocation into user space
  176. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  177. * @vma: vm_area_struct describing requested user mapping
  178. * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
  179. * @handle: device-view address returned from dma_alloc_coherent
  180. * @size: size of memory originally requested in dma_alloc_coherent
  181. *
  182. * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
  183. * into user space. The coherent DMA buffer must not be freed by the
  184. * driver until the user space mapping has been released.
  185. */
  186. int dma_mmap_coherent(struct device *, struct vm_area_struct *,
  187. void *, dma_addr_t, size_t);
  188. /**
  189. * dma_alloc_writecombine - allocate writecombining memory for DMA
  190. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  191. * @size: required memory size
  192. * @handle: bus-specific DMA address
  193. *
  194. * Allocate some uncached, buffered memory for a device for
  195. * performing DMA. This function allocates pages, and will
  196. * return the CPU-viewed address, and sets @handle to be the
  197. * device-viewed address.
  198. */
  199. extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,
  200. gfp_t);
  201. #define dma_free_writecombine(dev,size,cpu_addr,handle) \
  202. dma_free_coherent(dev,size,cpu_addr,handle)
  203. int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
  204. void *, dma_addr_t, size_t);
  205. #ifdef CONFIG_DMABOUNCE
  206. /*
  207. * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
  208. * and utilize bounce buffers as needed to work around limited DMA windows.
  209. *
  210. * On the SA-1111, a bug limits DMA to only certain regions of RAM.
  211. * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
  212. * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
  213. *
  214. * The following are helper functions used by the dmabounce subystem
  215. *
  216. */
  217. /**
  218. * dmabounce_register_dev
  219. *
  220. * @dev: valid struct device pointer
  221. * @small_buf_size: size of buffers to use with small buffer pool
  222. * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
  223. *
  224. * This function should be called by low-level platform code to register
  225. * a device as requireing DMA buffer bouncing. The function will allocate
  226. * appropriate DMA pools for the device.
  227. *
  228. */
  229. extern int dmabounce_register_dev(struct device *, unsigned long,
  230. unsigned long);
  231. /**
  232. * dmabounce_unregister_dev
  233. *
  234. * @dev: valid struct device pointer
  235. *
  236. * This function should be called by low-level platform code when device
  237. * that was previously registered with dmabounce_register_dev is removed
  238. * from the system.
  239. *
  240. */
  241. extern void dmabounce_unregister_dev(struct device *);
  242. /**
  243. * dma_needs_bounce
  244. *
  245. * @dev: valid struct device pointer
  246. * @dma_handle: dma_handle of unbounced buffer
  247. * @size: size of region being mapped
  248. *
  249. * Platforms that utilize the dmabounce mechanism must implement
  250. * this function.
  251. *
  252. * The dmabounce routines call this function whenever a dma-mapping
  253. * is requested to determine whether a given buffer needs to be bounced
  254. * or not. The function must return 0 if the buffer is OK for
  255. * DMA access and 1 if the buffer needs to be bounced.
  256. *
  257. */
  258. extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
  259. /*
  260. * The DMA API, implemented by dmabounce.c. See below for descriptions.
  261. */
  262. extern dma_addr_t __dma_map_single(struct device *, void *, size_t,
  263. enum dma_data_direction);
  264. extern void __dma_unmap_single(struct device *, dma_addr_t, size_t,
  265. enum dma_data_direction);
  266. extern dma_addr_t __dma_map_page(struct device *, struct page *,
  267. unsigned long, size_t, enum dma_data_direction);
  268. extern void __dma_unmap_page(struct device *, dma_addr_t, size_t,
  269. enum dma_data_direction);
  270. /*
  271. * Private functions
  272. */
  273. int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
  274. size_t, enum dma_data_direction);
  275. int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
  276. size_t, enum dma_data_direction);
  277. #else
  278. static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,
  279. unsigned long offset, size_t size, enum dma_data_direction dir)
  280. {
  281. return 1;
  282. }
  283. static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
  284. unsigned long offset, size_t size, enum dma_data_direction dir)
  285. {
  286. return 1;
  287. }
  288. static inline dma_addr_t __dma_map_single(struct device *dev, void *cpu_addr,
  289. size_t size, enum dma_data_direction dir)
  290. {
  291. __dma_single_cpu_to_dev(cpu_addr, size, dir);
  292. return virt_to_dma(dev, cpu_addr);
  293. }
  294. static inline dma_addr_t __dma_map_page(struct device *dev, struct page *page,
  295. unsigned long offset, size_t size, enum dma_data_direction dir)
  296. {
  297. __dma_page_cpu_to_dev(page, offset, size, dir);
  298. return pfn_to_dma(dev, page_to_pfn(page)) + offset;
  299. }
  300. static inline void __dma_unmap_single(struct device *dev, dma_addr_t handle,
  301. size_t size, enum dma_data_direction dir)
  302. {
  303. __dma_single_dev_to_cpu(dma_to_virt(dev, handle), size, dir);
  304. }
  305. static inline void __dma_unmap_page(struct device *dev, dma_addr_t handle,
  306. size_t size, enum dma_data_direction dir)
  307. {
  308. __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
  309. handle & ~PAGE_MASK, size, dir);
  310. }
  311. #endif /* CONFIG_DMABOUNCE */
  312. /**
  313. * dma_map_single - map a single buffer for streaming DMA
  314. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  315. * @cpu_addr: CPU direct mapped address of buffer
  316. * @size: size of buffer to map
  317. * @dir: DMA transfer direction
  318. *
  319. * Ensure that any data held in the cache is appropriately discarded
  320. * or written back.
  321. *
  322. * The device owns this memory once this call has completed. The CPU
  323. * can regain ownership by calling dma_unmap_single() or
  324. * dma_sync_single_for_cpu().
  325. */
  326. static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
  327. size_t size, enum dma_data_direction dir)
  328. {
  329. dma_addr_t addr;
  330. BUG_ON(!valid_dma_direction(dir));
  331. addr = __dma_map_single(dev, cpu_addr, size, dir);
  332. debug_dma_map_page(dev, virt_to_page(cpu_addr),
  333. (unsigned long)cpu_addr & ~PAGE_MASK, size,
  334. dir, addr, true);
  335. return addr;
  336. }
  337. /**
  338. * dma_map_page - map a portion of a page for streaming DMA
  339. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  340. * @page: page that buffer resides in
  341. * @offset: offset into page for start of buffer
  342. * @size: size of buffer to map
  343. * @dir: DMA transfer direction
  344. *
  345. * Ensure that any data held in the cache is appropriately discarded
  346. * or written back.
  347. *
  348. * The device owns this memory once this call has completed. The CPU
  349. * can regain ownership by calling dma_unmap_page().
  350. */
  351. static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
  352. unsigned long offset, size_t size, enum dma_data_direction dir)
  353. {
  354. dma_addr_t addr;
  355. BUG_ON(!valid_dma_direction(dir));
  356. addr = __dma_map_page(dev, page, offset, size, dir);
  357. debug_dma_map_page(dev, page, offset, size, dir, addr, false);
  358. return addr;
  359. }
  360. /**
  361. * dma_unmap_single - unmap a single buffer previously mapped
  362. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  363. * @handle: DMA address of buffer
  364. * @size: size of buffer (same as passed to dma_map_single)
  365. * @dir: DMA transfer direction (same as passed to dma_map_single)
  366. *
  367. * Unmap a single streaming mode DMA translation. The handle and size
  368. * must match what was provided in the previous dma_map_single() call.
  369. * All other usages are undefined.
  370. *
  371. * After this call, reads by the CPU to the buffer are guaranteed to see
  372. * whatever the device wrote there.
  373. */
  374. static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
  375. size_t size, enum dma_data_direction dir)
  376. {
  377. debug_dma_unmap_page(dev, handle, size, dir, true);
  378. __dma_unmap_single(dev, handle, size, dir);
  379. }
  380. /**
  381. * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
  382. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  383. * @handle: DMA address of buffer
  384. * @size: size of buffer (same as passed to dma_map_page)
  385. * @dir: DMA transfer direction (same as passed to dma_map_page)
  386. *
  387. * Unmap a page streaming mode DMA translation. The handle and size
  388. * must match what was provided in the previous dma_map_page() call.
  389. * All other usages are undefined.
  390. *
  391. * After this call, reads by the CPU to the buffer are guaranteed to see
  392. * whatever the device wrote there.
  393. */
  394. static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,
  395. size_t size, enum dma_data_direction dir)
  396. {
  397. debug_dma_unmap_page(dev, handle, size, dir, false);
  398. __dma_unmap_page(dev, handle, size, dir);
  399. }
  400. /**
  401. * dma_sync_single_range_for_cpu
  402. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  403. * @handle: DMA address of buffer
  404. * @offset: offset of region to start sync
  405. * @size: size of region to sync
  406. * @dir: DMA transfer direction (same as passed to dma_map_single)
  407. *
  408. * Make physical memory consistent for a single streaming mode DMA
  409. * translation after a transfer.
  410. *
  411. * If you perform a dma_map_single() but wish to interrogate the
  412. * buffer using the cpu, yet do not wish to teardown the PCI dma
  413. * mapping, you must call this function before doing so. At the
  414. * next point you give the PCI dma address back to the card, you
  415. * must first the perform a dma_sync_for_device, and then the
  416. * device again owns the buffer.
  417. */
  418. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  419. dma_addr_t handle, unsigned long offset, size_t size,
  420. enum dma_data_direction dir)
  421. {
  422. BUG_ON(!valid_dma_direction(dir));
  423. debug_dma_sync_single_for_cpu(dev, handle + offset, size, dir);
  424. if (!dmabounce_sync_for_cpu(dev, handle, offset, size, dir))
  425. return;
  426. __dma_single_dev_to_cpu(dma_to_virt(dev, handle) + offset, size, dir);
  427. }
  428. static inline void dma_sync_single_range_for_device(struct device *dev,
  429. dma_addr_t handle, unsigned long offset, size_t size,
  430. enum dma_data_direction dir)
  431. {
  432. BUG_ON(!valid_dma_direction(dir));
  433. debug_dma_sync_single_for_device(dev, handle + offset, size, dir);
  434. if (!dmabounce_sync_for_device(dev, handle, offset, size, dir))
  435. return;
  436. __dma_single_cpu_to_dev(dma_to_virt(dev, handle) + offset, size, dir);
  437. }
  438. static inline void dma_sync_single_for_cpu(struct device *dev,
  439. dma_addr_t handle, size_t size, enum dma_data_direction dir)
  440. {
  441. dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);
  442. }
  443. static inline void dma_sync_single_for_device(struct device *dev,
  444. dma_addr_t handle, size_t size, enum dma_data_direction dir)
  445. {
  446. dma_sync_single_range_for_device(dev, handle, 0, size, dir);
  447. }
  448. /*
  449. * The scatter list versions of the above methods.
  450. */
  451. extern int dma_map_sg(struct device *, struct scatterlist *, int,
  452. enum dma_data_direction);
  453. extern void dma_unmap_sg(struct device *, struct scatterlist *, int,
  454. enum dma_data_direction);
  455. extern void dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
  456. enum dma_data_direction);
  457. extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
  458. enum dma_data_direction);
  459. #endif /* __KERNEL__ */
  460. #endif