omap_hwmod.c 56 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2010 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * Introduction
  17. * ------------
  18. * One way to view an OMAP SoC is as a collection of largely unrelated
  19. * IP blocks connected by interconnects. The IP blocks include
  20. * devices such as ARM processors, audio serial interfaces, UARTs,
  21. * etc. Some of these devices, like the DSP, are created by TI;
  22. * others, like the SGX, largely originate from external vendors. In
  23. * TI's documentation, on-chip devices are referred to as "OMAP
  24. * modules." Some of these IP blocks are identical across several
  25. * OMAP versions. Others are revised frequently.
  26. *
  27. * These OMAP modules are tied together by various interconnects.
  28. * Most of the address and data flow between modules is via OCP-based
  29. * interconnects such as the L3 and L4 buses; but there are other
  30. * interconnects that distribute the hardware clock tree, handle idle
  31. * and reset signaling, supply power, and connect the modules to
  32. * various pads or balls on the OMAP package.
  33. *
  34. * OMAP hwmod provides a consistent way to describe the on-chip
  35. * hardware blocks and their integration into the rest of the chip.
  36. * This description can be automatically generated from the TI
  37. * hardware database. OMAP hwmod provides a standard, consistent API
  38. * to reset, enable, idle, and disable these hardware blocks. And
  39. * hwmod provides a way for other core code, such as the Linux device
  40. * code or the OMAP power management and address space mapping code,
  41. * to query the hardware database.
  42. *
  43. * Using hwmod
  44. * -----------
  45. * Drivers won't call hwmod functions directly. That is done by the
  46. * omap_device code, and in rare occasions, by custom integration code
  47. * in arch/arm/ *omap*. The omap_device code includes functions to
  48. * build a struct platform_device using omap_hwmod data, and that is
  49. * currently how hwmod data is communicated to drivers and to the
  50. * Linux driver model. Most drivers will call omap_hwmod functions only
  51. * indirectly, via pm_runtime*() functions.
  52. *
  53. * From a layering perspective, here is where the OMAP hwmod code
  54. * fits into the kernel software stack:
  55. *
  56. * +-------------------------------+
  57. * | Device driver code |
  58. * | (e.g., drivers/) |
  59. * +-------------------------------+
  60. * | Linux driver model |
  61. * | (platform_device / |
  62. * | platform_driver data/code) |
  63. * +-------------------------------+
  64. * | OMAP core-driver integration |
  65. * |(arch/arm/mach-omap2/devices.c)|
  66. * +-------------------------------+
  67. * | omap_device code |
  68. * | (../plat-omap/omap_device.c) |
  69. * +-------------------------------+
  70. * ----> | omap_hwmod code/data | <-----
  71. * | (../mach-omap2/omap_hwmod*) |
  72. * +-------------------------------+
  73. * | OMAP clock/PRCM/register fns |
  74. * | (__raw_{read,write}l, clk*) |
  75. * +-------------------------------+
  76. *
  77. * Device drivers should not contain any OMAP-specific code or data in
  78. * them. They should only contain code to operate the IP block that
  79. * the driver is responsible for. This is because these IP blocks can
  80. * also appear in other SoCs, either from TI (such as DaVinci) or from
  81. * other manufacturers; and drivers should be reusable across other
  82. * platforms.
  83. *
  84. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  85. * devices upon boot. The goal here is for the kernel to be
  86. * completely self-reliant and independent from bootloaders. This is
  87. * to ensure a repeatable configuration, both to ensure consistent
  88. * runtime behavior, and to make it easier for others to reproduce
  89. * bugs.
  90. *
  91. * OMAP module activity states
  92. * ---------------------------
  93. * The hwmod code considers modules to be in one of several activity
  94. * states. IP blocks start out in an UNKNOWN state, then once they
  95. * are registered via the hwmod code, proceed to the REGISTERED state.
  96. * Once their clock names are resolved to clock pointers, the module
  97. * enters the CLKS_INITED state; and finally, once the module has been
  98. * reset and the integration registers programmed, the INITIALIZED state
  99. * is entered. The hwmod code will then place the module into either
  100. * the IDLE state to save power, or in the case of a critical system
  101. * module, the ENABLED state.
  102. *
  103. * OMAP core integration code can then call omap_hwmod*() functions
  104. * directly to move the module between the IDLE, ENABLED, and DISABLED
  105. * states, as needed. This is done during both the PM idle loop, and
  106. * in the OMAP core integration code's implementation of the PM runtime
  107. * functions.
  108. *
  109. * References
  110. * ----------
  111. * This is a partial list.
  112. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  113. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  114. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  115. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  116. * - Open Core Protocol Specification 2.2
  117. *
  118. * To do:
  119. * - pin mux handling
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <plat/common.h>
  138. #include <plat/cpu.h>
  139. #include <plat/clockdomain.h>
  140. #include <plat/powerdomain.h>
  141. #include <plat/clock.h>
  142. #include <plat/omap_hwmod.h>
  143. #include <plat/prcm.h>
  144. #include "cm.h"
  145. #include "prm.h"
  146. /* Maximum microseconds to wait for OMAP module to softreset */
  147. #define MAX_MODULE_SOFTRESET_WAIT 10000
  148. /* Name of the OMAP hwmod for the MPU */
  149. #define MPU_INITIATOR_NAME "mpu"
  150. /* omap_hwmod_list contains all registered struct omap_hwmods */
  151. static LIST_HEAD(omap_hwmod_list);
  152. static DEFINE_MUTEX(omap_hwmod_mutex);
  153. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  154. static struct omap_hwmod *mpu_oh;
  155. /* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
  156. static u8 inited;
  157. /* Private functions */
  158. /**
  159. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  160. * @oh: struct omap_hwmod *
  161. *
  162. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  163. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  164. * OCP_SYSCONFIG register or 0 upon success.
  165. */
  166. static int _update_sysc_cache(struct omap_hwmod *oh)
  167. {
  168. if (!oh->class->sysc) {
  169. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  170. return -EINVAL;
  171. }
  172. /* XXX ensure module interface clock is up */
  173. oh->_sysc_cache = omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
  174. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  175. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  176. return 0;
  177. }
  178. /**
  179. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  180. * @v: OCP_SYSCONFIG value to write
  181. * @oh: struct omap_hwmod *
  182. *
  183. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  184. * one. No return value.
  185. */
  186. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  187. {
  188. if (!oh->class->sysc) {
  189. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  190. return;
  191. }
  192. /* XXX ensure module interface clock is up */
  193. if (oh->_sysc_cache != v) {
  194. oh->_sysc_cache = v;
  195. omap_hwmod_writel(v, oh, oh->class->sysc->sysc_offs);
  196. }
  197. }
  198. /**
  199. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  200. * @oh: struct omap_hwmod *
  201. * @standbymode: MIDLEMODE field bits
  202. * @v: pointer to register contents to modify
  203. *
  204. * Update the master standby mode bits in @v to be @standbymode for
  205. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  206. * upon error or 0 upon success.
  207. */
  208. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  209. u32 *v)
  210. {
  211. u32 mstandby_mask;
  212. u8 mstandby_shift;
  213. if (!oh->class->sysc ||
  214. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  215. return -EINVAL;
  216. if (!oh->class->sysc->sysc_fields) {
  217. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  218. return -EINVAL;
  219. }
  220. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  221. mstandby_mask = (0x3 << mstandby_shift);
  222. *v &= ~mstandby_mask;
  223. *v |= __ffs(standbymode) << mstandby_shift;
  224. return 0;
  225. }
  226. /**
  227. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  228. * @oh: struct omap_hwmod *
  229. * @idlemode: SIDLEMODE field bits
  230. * @v: pointer to register contents to modify
  231. *
  232. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  233. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  234. * or 0 upon success.
  235. */
  236. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  237. {
  238. u32 sidle_mask;
  239. u8 sidle_shift;
  240. if (!oh->class->sysc ||
  241. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  242. return -EINVAL;
  243. if (!oh->class->sysc->sysc_fields) {
  244. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  245. return -EINVAL;
  246. }
  247. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  248. sidle_mask = (0x3 << sidle_shift);
  249. *v &= ~sidle_mask;
  250. *v |= __ffs(idlemode) << sidle_shift;
  251. return 0;
  252. }
  253. /**
  254. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  255. * @oh: struct omap_hwmod *
  256. * @clockact: CLOCKACTIVITY field bits
  257. * @v: pointer to register contents to modify
  258. *
  259. * Update the clockactivity mode bits in @v to be @clockact for the
  260. * @oh hwmod. Used for additional powersaving on some modules. Does
  261. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  262. * success.
  263. */
  264. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  265. {
  266. u32 clkact_mask;
  267. u8 clkact_shift;
  268. if (!oh->class->sysc ||
  269. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  270. return -EINVAL;
  271. if (!oh->class->sysc->sysc_fields) {
  272. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  273. return -EINVAL;
  274. }
  275. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  276. clkact_mask = (0x3 << clkact_shift);
  277. *v &= ~clkact_mask;
  278. *v |= clockact << clkact_shift;
  279. return 0;
  280. }
  281. /**
  282. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  283. * @oh: struct omap_hwmod *
  284. * @v: pointer to register contents to modify
  285. *
  286. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  287. * error or 0 upon success.
  288. */
  289. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  290. {
  291. u32 softrst_mask;
  292. if (!oh->class->sysc ||
  293. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  294. return -EINVAL;
  295. if (!oh->class->sysc->sysc_fields) {
  296. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  297. return -EINVAL;
  298. }
  299. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  300. *v |= softrst_mask;
  301. return 0;
  302. }
  303. /**
  304. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  305. * @oh: struct omap_hwmod *
  306. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  307. * @v: pointer to register contents to modify
  308. *
  309. * Update the module autoidle bit in @v to be @autoidle for the @oh
  310. * hwmod. The autoidle bit controls whether the module can gate
  311. * internal clocks automatically when it isn't doing anything; the
  312. * exact function of this bit varies on a per-module basis. This
  313. * function does not write to the hardware. Returns -EINVAL upon
  314. * error or 0 upon success.
  315. */
  316. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  317. u32 *v)
  318. {
  319. u32 autoidle_mask;
  320. u8 autoidle_shift;
  321. if (!oh->class->sysc ||
  322. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  323. return -EINVAL;
  324. if (!oh->class->sysc->sysc_fields) {
  325. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  326. return -EINVAL;
  327. }
  328. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  329. autoidle_mask = (0x3 << autoidle_shift);
  330. *v &= ~autoidle_mask;
  331. *v |= autoidle << autoidle_shift;
  332. return 0;
  333. }
  334. /**
  335. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  336. * @oh: struct omap_hwmod *
  337. *
  338. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  339. * upon error or 0 upon success.
  340. */
  341. static int _enable_wakeup(struct omap_hwmod *oh)
  342. {
  343. u32 v, wakeup_mask;
  344. if (!oh->class->sysc ||
  345. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  346. return -EINVAL;
  347. if (!oh->class->sysc->sysc_fields) {
  348. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  349. return -EINVAL;
  350. }
  351. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  352. v = oh->_sysc_cache;
  353. v |= wakeup_mask;
  354. _write_sysconfig(v, oh);
  355. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  356. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  357. return 0;
  358. }
  359. /**
  360. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  361. * @oh: struct omap_hwmod *
  362. *
  363. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  364. * upon error or 0 upon success.
  365. */
  366. static int _disable_wakeup(struct omap_hwmod *oh)
  367. {
  368. u32 v, wakeup_mask;
  369. if (!oh->class->sysc ||
  370. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  371. return -EINVAL;
  372. if (!oh->class->sysc->sysc_fields) {
  373. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  374. return -EINVAL;
  375. }
  376. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  377. v = oh->_sysc_cache;
  378. v &= ~wakeup_mask;
  379. _write_sysconfig(v, oh);
  380. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  381. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  382. return 0;
  383. }
  384. /**
  385. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  386. * @oh: struct omap_hwmod *
  387. *
  388. * Prevent the hardware module @oh from entering idle while the
  389. * hardare module initiator @init_oh is active. Useful when a module
  390. * will be accessed by a particular initiator (e.g., if a module will
  391. * be accessed by the IVA, there should be a sleepdep between the IVA
  392. * initiator and the module). Only applies to modules in smart-idle
  393. * mode. Returns -EINVAL upon error or passes along
  394. * clkdm_add_sleepdep() value upon success.
  395. */
  396. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  397. {
  398. if (!oh->_clk)
  399. return -EINVAL;
  400. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  401. }
  402. /**
  403. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  404. * @oh: struct omap_hwmod *
  405. *
  406. * Allow the hardware module @oh to enter idle while the hardare
  407. * module initiator @init_oh is active. Useful when a module will not
  408. * be accessed by a particular initiator (e.g., if a module will not
  409. * be accessed by the IVA, there should be no sleepdep between the IVA
  410. * initiator and the module). Only applies to modules in smart-idle
  411. * mode. Returns -EINVAL upon error or passes along
  412. * clkdm_del_sleepdep() value upon success.
  413. */
  414. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  415. {
  416. if (!oh->_clk)
  417. return -EINVAL;
  418. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  419. }
  420. /**
  421. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  422. * @oh: struct omap_hwmod *
  423. *
  424. * Called from _init_clocks(). Populates the @oh _clk (main
  425. * functional clock pointer) if a main_clk is present. Returns 0 on
  426. * success or -EINVAL on error.
  427. */
  428. static int _init_main_clk(struct omap_hwmod *oh)
  429. {
  430. int ret = 0;
  431. if (!oh->main_clk)
  432. return 0;
  433. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  434. if (!oh->_clk) {
  435. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  436. oh->name, oh->main_clk);
  437. return -EINVAL;
  438. }
  439. if (!oh->_clk->clkdm)
  440. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  441. oh->main_clk, oh->_clk->name);
  442. return ret;
  443. }
  444. /**
  445. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  446. * @oh: struct omap_hwmod *
  447. *
  448. * Called from _init_clocks(). Populates the @oh OCP slave interface
  449. * clock pointers. Returns 0 on success or -EINVAL on error.
  450. */
  451. static int _init_interface_clks(struct omap_hwmod *oh)
  452. {
  453. struct clk *c;
  454. int i;
  455. int ret = 0;
  456. if (oh->slaves_cnt == 0)
  457. return 0;
  458. for (i = 0; i < oh->slaves_cnt; i++) {
  459. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  460. if (!os->clk)
  461. continue;
  462. c = omap_clk_get_by_name(os->clk);
  463. if (!c) {
  464. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  465. oh->name, os->clk);
  466. ret = -EINVAL;
  467. }
  468. os->_clk = c;
  469. }
  470. return ret;
  471. }
  472. /**
  473. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  474. * @oh: struct omap_hwmod *
  475. *
  476. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  477. * clock pointers. Returns 0 on success or -EINVAL on error.
  478. */
  479. static int _init_opt_clks(struct omap_hwmod *oh)
  480. {
  481. struct omap_hwmod_opt_clk *oc;
  482. struct clk *c;
  483. int i;
  484. int ret = 0;
  485. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  486. c = omap_clk_get_by_name(oc->clk);
  487. if (!c) {
  488. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  489. oh->name, oc->clk);
  490. ret = -EINVAL;
  491. }
  492. oc->_clk = c;
  493. }
  494. return ret;
  495. }
  496. /**
  497. * _enable_clocks - enable hwmod main clock and interface clocks
  498. * @oh: struct omap_hwmod *
  499. *
  500. * Enables all clocks necessary for register reads and writes to succeed
  501. * on the hwmod @oh. Returns 0.
  502. */
  503. static int _enable_clocks(struct omap_hwmod *oh)
  504. {
  505. int i;
  506. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  507. if (oh->_clk)
  508. clk_enable(oh->_clk);
  509. if (oh->slaves_cnt > 0) {
  510. for (i = 0; i < oh->slaves_cnt; i++) {
  511. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  512. struct clk *c = os->_clk;
  513. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  514. clk_enable(c);
  515. }
  516. }
  517. /* The opt clocks are controlled by the device driver. */
  518. return 0;
  519. }
  520. /**
  521. * _disable_clocks - disable hwmod main clock and interface clocks
  522. * @oh: struct omap_hwmod *
  523. *
  524. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  525. */
  526. static int _disable_clocks(struct omap_hwmod *oh)
  527. {
  528. int i;
  529. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  530. if (oh->_clk)
  531. clk_disable(oh->_clk);
  532. if (oh->slaves_cnt > 0) {
  533. for (i = 0; i < oh->slaves_cnt; i++) {
  534. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  535. struct clk *c = os->_clk;
  536. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  537. clk_disable(c);
  538. }
  539. }
  540. /* The opt clocks are controlled by the device driver. */
  541. return 0;
  542. }
  543. static void _enable_optional_clocks(struct omap_hwmod *oh)
  544. {
  545. struct omap_hwmod_opt_clk *oc;
  546. int i;
  547. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  548. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  549. if (oc->_clk) {
  550. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  551. oc->_clk->name);
  552. clk_enable(oc->_clk);
  553. }
  554. }
  555. static void _disable_optional_clocks(struct omap_hwmod *oh)
  556. {
  557. struct omap_hwmod_opt_clk *oc;
  558. int i;
  559. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  560. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  561. if (oc->_clk) {
  562. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  563. oc->_clk->name);
  564. clk_disable(oc->_clk);
  565. }
  566. }
  567. /**
  568. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  569. * @oh: struct omap_hwmod *
  570. *
  571. * Returns the array index of the OCP slave port that the MPU
  572. * addresses the device on, or -EINVAL upon error or not found.
  573. */
  574. static int _find_mpu_port_index(struct omap_hwmod *oh)
  575. {
  576. int i;
  577. int found = 0;
  578. if (!oh || oh->slaves_cnt == 0)
  579. return -EINVAL;
  580. for (i = 0; i < oh->slaves_cnt; i++) {
  581. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  582. if (os->user & OCP_USER_MPU) {
  583. found = 1;
  584. break;
  585. }
  586. }
  587. if (found)
  588. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  589. oh->name, i);
  590. else
  591. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  592. oh->name);
  593. return (found) ? i : -EINVAL;
  594. }
  595. /**
  596. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  597. * @oh: struct omap_hwmod *
  598. *
  599. * Return the virtual address of the base of the register target of
  600. * device @oh, or NULL on error.
  601. */
  602. static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  603. {
  604. struct omap_hwmod_ocp_if *os;
  605. struct omap_hwmod_addr_space *mem;
  606. int i;
  607. int found = 0;
  608. void __iomem *va_start;
  609. if (!oh || oh->slaves_cnt == 0)
  610. return NULL;
  611. os = oh->slaves[index];
  612. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  613. if (mem->flags & ADDR_TYPE_RT) {
  614. found = 1;
  615. break;
  616. }
  617. }
  618. if (found) {
  619. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  620. if (!va_start) {
  621. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  622. return NULL;
  623. }
  624. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  625. oh->name, va_start);
  626. } else {
  627. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  628. oh->name);
  629. }
  630. return (found) ? va_start : NULL;
  631. }
  632. /**
  633. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  634. * @oh: struct omap_hwmod *
  635. *
  636. * If module is marked as SWSUP_SIDLE, force the module out of slave
  637. * idle; otherwise, configure it for smart-idle. If module is marked
  638. * as SWSUP_MSUSPEND, force the module out of master standby;
  639. * otherwise, configure it for smart-standby. No return value.
  640. */
  641. static void _enable_sysc(struct omap_hwmod *oh)
  642. {
  643. u8 idlemode, sf;
  644. u32 v;
  645. if (!oh->class->sysc)
  646. return;
  647. v = oh->_sysc_cache;
  648. sf = oh->class->sysc->sysc_flags;
  649. if (sf & SYSC_HAS_SIDLEMODE) {
  650. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  651. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  652. _set_slave_idlemode(oh, idlemode, &v);
  653. }
  654. if (sf & SYSC_HAS_MIDLEMODE) {
  655. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  656. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  657. _set_master_standbymode(oh, idlemode, &v);
  658. }
  659. if (sf & SYSC_HAS_AUTOIDLE) {
  660. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  661. 0 : 1;
  662. _set_module_autoidle(oh, idlemode, &v);
  663. }
  664. /*
  665. * XXX The clock framework should handle this, by
  666. * calling into this code. But this must wait until the
  667. * clock structures are tagged with omap_hwmod entries
  668. */
  669. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  670. (sf & SYSC_HAS_CLOCKACTIVITY))
  671. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  672. _write_sysconfig(v, oh);
  673. /* If slave is in SMARTIDLE, also enable wakeup */
  674. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  675. _enable_wakeup(oh);
  676. }
  677. /**
  678. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  679. * @oh: struct omap_hwmod *
  680. *
  681. * If module is marked as SWSUP_SIDLE, force the module into slave
  682. * idle; otherwise, configure it for smart-idle. If module is marked
  683. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  684. * configure it for smart-standby. No return value.
  685. */
  686. static void _idle_sysc(struct omap_hwmod *oh)
  687. {
  688. u8 idlemode, sf;
  689. u32 v;
  690. if (!oh->class->sysc)
  691. return;
  692. v = oh->_sysc_cache;
  693. sf = oh->class->sysc->sysc_flags;
  694. if (sf & SYSC_HAS_SIDLEMODE) {
  695. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  696. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  697. _set_slave_idlemode(oh, idlemode, &v);
  698. }
  699. if (sf & SYSC_HAS_MIDLEMODE) {
  700. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  701. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  702. _set_master_standbymode(oh, idlemode, &v);
  703. }
  704. _write_sysconfig(v, oh);
  705. }
  706. /**
  707. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  708. * @oh: struct omap_hwmod *
  709. *
  710. * Force the module into slave idle and master suspend. No return
  711. * value.
  712. */
  713. static void _shutdown_sysc(struct omap_hwmod *oh)
  714. {
  715. u32 v;
  716. u8 sf;
  717. if (!oh->class->sysc)
  718. return;
  719. v = oh->_sysc_cache;
  720. sf = oh->class->sysc->sysc_flags;
  721. if (sf & SYSC_HAS_SIDLEMODE)
  722. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  723. if (sf & SYSC_HAS_MIDLEMODE)
  724. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  725. if (sf & SYSC_HAS_AUTOIDLE)
  726. _set_module_autoidle(oh, 1, &v);
  727. _write_sysconfig(v, oh);
  728. }
  729. /**
  730. * _lookup - find an omap_hwmod by name
  731. * @name: find an omap_hwmod by name
  732. *
  733. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  734. * Caller must hold omap_hwmod_mutex.
  735. */
  736. static struct omap_hwmod *_lookup(const char *name)
  737. {
  738. struct omap_hwmod *oh, *temp_oh;
  739. oh = NULL;
  740. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  741. if (!strcmp(name, temp_oh->name)) {
  742. oh = temp_oh;
  743. break;
  744. }
  745. }
  746. return oh;
  747. }
  748. /**
  749. * _init_clocks - clk_get() all clocks associated with this hwmod
  750. * @oh: struct omap_hwmod *
  751. * @data: not used; pass NULL
  752. *
  753. * Called by omap_hwmod_late_init() (after omap2_clk_init()).
  754. * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
  755. * the omap_hwmod has not yet been registered or if the clocks have
  756. * already been initialized, 0 on success, or a non-zero error on
  757. * failure.
  758. */
  759. static int _init_clocks(struct omap_hwmod *oh, void *data)
  760. {
  761. int ret = 0;
  762. if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
  763. return -EINVAL;
  764. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  765. ret |= _init_main_clk(oh);
  766. ret |= _init_interface_clks(oh);
  767. ret |= _init_opt_clks(oh);
  768. if (!ret)
  769. oh->_state = _HWMOD_STATE_CLKS_INITED;
  770. return 0;
  771. }
  772. /**
  773. * _wait_target_ready - wait for a module to leave slave idle
  774. * @oh: struct omap_hwmod *
  775. *
  776. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  777. * does not have an IDLEST bit or if the module successfully leaves
  778. * slave idle; otherwise, pass along the return value of the
  779. * appropriate *_cm_wait_module_ready() function.
  780. */
  781. static int _wait_target_ready(struct omap_hwmod *oh)
  782. {
  783. struct omap_hwmod_ocp_if *os;
  784. int ret;
  785. if (!oh)
  786. return -EINVAL;
  787. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  788. return 0;
  789. os = oh->slaves[oh->_mpu_port_index];
  790. if (oh->flags & HWMOD_NO_IDLEST)
  791. return 0;
  792. /* XXX check module SIDLEMODE */
  793. /* XXX check clock enable states */
  794. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  795. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  796. oh->prcm.omap2.idlest_reg_id,
  797. oh->prcm.omap2.idlest_idle_bit);
  798. } else if (cpu_is_omap44xx()) {
  799. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  800. } else {
  801. BUG();
  802. };
  803. return ret;
  804. }
  805. /**
  806. * _lookup_hardreset - return the register bit shift for this hwmod/reset line
  807. * @oh: struct omap_hwmod *
  808. * @name: name of the reset line in the context of this hwmod
  809. *
  810. * Return the bit position of the reset line that match the
  811. * input name. Return -ENOENT if not found.
  812. */
  813. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
  814. {
  815. int i;
  816. for (i = 0; i < oh->rst_lines_cnt; i++) {
  817. const char *rst_line = oh->rst_lines[i].name;
  818. if (!strcmp(rst_line, name)) {
  819. u8 shift = oh->rst_lines[i].rst_shift;
  820. pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
  821. oh->name, rst_line, shift);
  822. return shift;
  823. }
  824. }
  825. return -ENOENT;
  826. }
  827. /**
  828. * _assert_hardreset - assert the HW reset line of submodules
  829. * contained in the hwmod module.
  830. * @oh: struct omap_hwmod *
  831. * @name: name of the reset line to lookup and assert
  832. *
  833. * Some IP like dsp, ipu or iva contain processor that require
  834. * an HW reset line to be assert / deassert in order to enable fully
  835. * the IP.
  836. */
  837. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  838. {
  839. u8 shift;
  840. if (!oh)
  841. return -EINVAL;
  842. shift = _lookup_hardreset(oh, name);
  843. if (IS_ERR_VALUE(shift))
  844. return shift;
  845. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  846. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  847. shift);
  848. else if (cpu_is_omap44xx())
  849. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  850. shift);
  851. else
  852. return -EINVAL;
  853. }
  854. /**
  855. * _deassert_hardreset - deassert the HW reset line of submodules contained
  856. * in the hwmod module.
  857. * @oh: struct omap_hwmod *
  858. * @name: name of the reset line to look up and deassert
  859. *
  860. * Some IP like dsp, ipu or iva contain processor that require
  861. * an HW reset line to be assert / deassert in order to enable fully
  862. * the IP.
  863. */
  864. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  865. {
  866. u8 shift;
  867. int r;
  868. if (!oh)
  869. return -EINVAL;
  870. shift = _lookup_hardreset(oh, name);
  871. if (IS_ERR_VALUE(shift))
  872. return shift;
  873. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  874. r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  875. shift);
  876. else if (cpu_is_omap44xx())
  877. r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  878. shift);
  879. else
  880. return -EINVAL;
  881. if (r == -EBUSY)
  882. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  883. return r;
  884. }
  885. /**
  886. * _read_hardreset - read the HW reset line state of submodules
  887. * contained in the hwmod module
  888. * @oh: struct omap_hwmod *
  889. * @name: name of the reset line to look up and read
  890. *
  891. * Return the state of the reset line.
  892. */
  893. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  894. {
  895. u8 shift;
  896. if (!oh)
  897. return -EINVAL;
  898. shift = _lookup_hardreset(oh, name);
  899. if (IS_ERR_VALUE(shift))
  900. return shift;
  901. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  902. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  903. shift);
  904. } else if (cpu_is_omap44xx()) {
  905. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  906. shift);
  907. } else {
  908. return -EINVAL;
  909. }
  910. }
  911. /**
  912. * _reset - reset an omap_hwmod
  913. * @oh: struct omap_hwmod *
  914. *
  915. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  916. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  917. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  918. * the module did not reset in time, or 0 upon success.
  919. *
  920. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  921. * Starting in OMAP4, some IPs does not have SYSSTATUS register and instead
  922. * use the SYSCONFIG softreset bit to provide the status.
  923. *
  924. * Note that some IP like McBSP does have a reset control but no reset status.
  925. */
  926. static int _reset(struct omap_hwmod *oh)
  927. {
  928. u32 v;
  929. int c = 0;
  930. int ret = 0;
  931. if (!oh->class->sysc ||
  932. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  933. return -EINVAL;
  934. /* clocks must be on for this operation */
  935. if (oh->_state != _HWMOD_STATE_ENABLED) {
  936. pr_warning("omap_hwmod: %s: reset can only be entered from "
  937. "enabled state\n", oh->name);
  938. return -EINVAL;
  939. }
  940. /* For some modules, all optionnal clocks need to be enabled as well */
  941. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  942. _enable_optional_clocks(oh);
  943. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  944. v = oh->_sysc_cache;
  945. ret = _set_softreset(oh, &v);
  946. if (ret)
  947. goto dis_opt_clks;
  948. _write_sysconfig(v, oh);
  949. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  950. omap_test_timeout((omap_hwmod_readl(oh,
  951. oh->class->sysc->syss_offs)
  952. & SYSS_RESETDONE_MASK),
  953. MAX_MODULE_SOFTRESET_WAIT, c);
  954. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  955. omap_test_timeout(!(omap_hwmod_readl(oh,
  956. oh->class->sysc->sysc_offs)
  957. & SYSC_TYPE2_SOFTRESET_MASK),
  958. MAX_MODULE_SOFTRESET_WAIT, c);
  959. if (c == MAX_MODULE_SOFTRESET_WAIT)
  960. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  961. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  962. else
  963. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  964. /*
  965. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  966. * _wait_target_ready() or _reset()
  967. */
  968. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  969. dis_opt_clks:
  970. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  971. _disable_optional_clocks(oh);
  972. return ret;
  973. }
  974. /**
  975. * _omap_hwmod_enable - enable an omap_hwmod
  976. * @oh: struct omap_hwmod *
  977. *
  978. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  979. * register target. (This function has a full name --
  980. * _omap_hwmod_enable() rather than simply _enable() -- because it is
  981. * currently required by the pm34xx.c idle loop.) Returns -EINVAL if
  982. * the hwmod is in the wrong state or passes along the return value of
  983. * _wait_target_ready().
  984. */
  985. int _omap_hwmod_enable(struct omap_hwmod *oh)
  986. {
  987. int r;
  988. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  989. oh->_state != _HWMOD_STATE_IDLE &&
  990. oh->_state != _HWMOD_STATE_DISABLED) {
  991. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  992. "from initialized, idle, or disabled state\n", oh->name);
  993. return -EINVAL;
  994. }
  995. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  996. /*
  997. * If an IP contains only one HW reset line, then de-assert it in order
  998. * to allow to enable the clocks. Otherwise the PRCM will return
  999. * Intransition status, and the init will failed.
  1000. */
  1001. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1002. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1003. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1004. /* XXX mux balls */
  1005. _add_initiator_dep(oh, mpu_oh);
  1006. _enable_clocks(oh);
  1007. r = _wait_target_ready(oh);
  1008. if (!r) {
  1009. oh->_state = _HWMOD_STATE_ENABLED;
  1010. /* Access the sysconfig only if the target is ready */
  1011. if (oh->class->sysc) {
  1012. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1013. _update_sysc_cache(oh);
  1014. _enable_sysc(oh);
  1015. }
  1016. } else {
  1017. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1018. oh->name, r);
  1019. }
  1020. return r;
  1021. }
  1022. /**
  1023. * _omap_hwmod_idle - idle an omap_hwmod
  1024. * @oh: struct omap_hwmod *
  1025. *
  1026. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1027. * no further work. (This function has a full name --
  1028. * _omap_hwmod_idle() rather than simply _idle() -- because it is
  1029. * currently required by the pm34xx.c idle loop.) Returns -EINVAL if
  1030. * the hwmod is in the wrong state or returns 0.
  1031. */
  1032. int _omap_hwmod_idle(struct omap_hwmod *oh)
  1033. {
  1034. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1035. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1036. "enabled state\n", oh->name);
  1037. return -EINVAL;
  1038. }
  1039. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1040. if (oh->class->sysc)
  1041. _idle_sysc(oh);
  1042. _del_initiator_dep(oh, mpu_oh);
  1043. _disable_clocks(oh);
  1044. oh->_state = _HWMOD_STATE_IDLE;
  1045. return 0;
  1046. }
  1047. /**
  1048. * _shutdown - shutdown an omap_hwmod
  1049. * @oh: struct omap_hwmod *
  1050. *
  1051. * Shut down an omap_hwmod @oh. This should be called when the driver
  1052. * used for the hwmod is removed or unloaded or if the driver is not
  1053. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1054. * state or returns 0.
  1055. */
  1056. static int _shutdown(struct omap_hwmod *oh)
  1057. {
  1058. if (oh->_state != _HWMOD_STATE_IDLE &&
  1059. oh->_state != _HWMOD_STATE_ENABLED) {
  1060. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1061. "from idle, or enabled state\n", oh->name);
  1062. return -EINVAL;
  1063. }
  1064. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1065. if (oh->class->sysc)
  1066. _shutdown_sysc(oh);
  1067. /*
  1068. * If an IP contains only one HW reset line, then assert it
  1069. * before disabling the clocks and shutting down the IP.
  1070. */
  1071. if (oh->rst_lines_cnt == 1)
  1072. _assert_hardreset(oh, oh->rst_lines[0].name);
  1073. /* clocks and deps are already disabled in idle */
  1074. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1075. _del_initiator_dep(oh, mpu_oh);
  1076. /* XXX what about the other system initiators here? dma, dsp */
  1077. _disable_clocks(oh);
  1078. }
  1079. /* XXX Should this code also force-disable the optional clocks? */
  1080. /* XXX mux any associated balls to safe mode */
  1081. oh->_state = _HWMOD_STATE_DISABLED;
  1082. return 0;
  1083. }
  1084. /**
  1085. * _setup - do initial configuration of omap_hwmod
  1086. * @oh: struct omap_hwmod *
  1087. * @skip_setup_idle_p: do not idle hwmods at the end of the fn if 1
  1088. *
  1089. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1090. * OCP_SYSCONFIG register. @skip_setup_idle is intended to be used on
  1091. * a system that will not call omap_hwmod_enable() to enable devices
  1092. * (e.g., a system without PM runtime). Returns -EINVAL if the hwmod
  1093. * is in the wrong state or returns 0.
  1094. */
  1095. static int _setup(struct omap_hwmod *oh, void *data)
  1096. {
  1097. int i, r;
  1098. u8 skip_setup_idle;
  1099. if (!oh || !data)
  1100. return -EINVAL;
  1101. skip_setup_idle = *(u8 *)data;
  1102. /* Set iclk autoidle mode */
  1103. if (oh->slaves_cnt > 0) {
  1104. for (i = 0; i < oh->slaves_cnt; i++) {
  1105. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1106. struct clk *c = os->_clk;
  1107. if (!c)
  1108. continue;
  1109. if (os->flags & OCPIF_SWSUP_IDLE) {
  1110. /* XXX omap_iclk_deny_idle(c); */
  1111. } else {
  1112. /* XXX omap_iclk_allow_idle(c); */
  1113. clk_enable(c);
  1114. }
  1115. }
  1116. }
  1117. mutex_init(&oh->_mutex);
  1118. oh->_state = _HWMOD_STATE_INITIALIZED;
  1119. /*
  1120. * In the case of hwmod with hardreset that should not be
  1121. * de-assert at boot time, we have to keep the module
  1122. * initialized, because we cannot enable it properly with the
  1123. * reset asserted. Exit without warning because that behavior is
  1124. * expected.
  1125. */
  1126. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1127. return 0;
  1128. r = _omap_hwmod_enable(oh);
  1129. if (r) {
  1130. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1131. oh->name, oh->_state);
  1132. return 0;
  1133. }
  1134. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1135. _reset(oh);
  1136. /*
  1137. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1138. * The _omap_hwmod_enable() function should be split to
  1139. * avoid the rewrite of the OCP_SYSCONFIG register.
  1140. */
  1141. if (oh->class->sysc) {
  1142. _update_sysc_cache(oh);
  1143. _enable_sysc(oh);
  1144. }
  1145. }
  1146. if (!(oh->flags & HWMOD_INIT_NO_IDLE) && !skip_setup_idle)
  1147. _omap_hwmod_idle(oh);
  1148. return 0;
  1149. }
  1150. /* Public functions */
  1151. u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs)
  1152. {
  1153. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1154. }
  1155. void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1156. {
  1157. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1158. }
  1159. /**
  1160. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1161. * @oh: struct omap_hwmod *
  1162. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1163. *
  1164. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1165. * local copy. Intended to be used by drivers that have some erratum
  1166. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1167. * -EINVAL if @oh is null, or passes along the return value from
  1168. * _set_slave_idlemode().
  1169. *
  1170. * XXX Does this function have any current users? If not, we should
  1171. * remove it; it is better to let the rest of the hwmod code handle this.
  1172. * Any users of this function should be scrutinized carefully.
  1173. */
  1174. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1175. {
  1176. u32 v;
  1177. int retval = 0;
  1178. if (!oh)
  1179. return -EINVAL;
  1180. v = oh->_sysc_cache;
  1181. retval = _set_slave_idlemode(oh, idlemode, &v);
  1182. if (!retval)
  1183. _write_sysconfig(v, oh);
  1184. return retval;
  1185. }
  1186. /**
  1187. * omap_hwmod_register - register a struct omap_hwmod
  1188. * @oh: struct omap_hwmod *
  1189. *
  1190. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1191. * already has been registered by the same name; -EINVAL if the
  1192. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1193. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1194. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1195. * success.
  1196. *
  1197. * XXX The data should be copied into bootmem, so the original data
  1198. * should be marked __initdata and freed after init. This would allow
  1199. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1200. * that the copy process would be relatively complex due to the large number
  1201. * of substructures.
  1202. */
  1203. int omap_hwmod_register(struct omap_hwmod *oh)
  1204. {
  1205. int ret, ms_id;
  1206. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1207. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1208. return -EINVAL;
  1209. mutex_lock(&omap_hwmod_mutex);
  1210. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1211. if (_lookup(oh->name)) {
  1212. ret = -EEXIST;
  1213. goto ohr_unlock;
  1214. }
  1215. ms_id = _find_mpu_port_index(oh);
  1216. if (!IS_ERR_VALUE(ms_id)) {
  1217. oh->_mpu_port_index = ms_id;
  1218. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1219. } else {
  1220. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1221. }
  1222. list_add_tail(&oh->node, &omap_hwmod_list);
  1223. oh->_state = _HWMOD_STATE_REGISTERED;
  1224. ret = 0;
  1225. ohr_unlock:
  1226. mutex_unlock(&omap_hwmod_mutex);
  1227. return ret;
  1228. }
  1229. /**
  1230. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1231. * @name: name of the omap_hwmod to look up
  1232. *
  1233. * Given a @name of an omap_hwmod, return a pointer to the registered
  1234. * struct omap_hwmod *, or NULL upon error.
  1235. */
  1236. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1237. {
  1238. struct omap_hwmod *oh;
  1239. if (!name)
  1240. return NULL;
  1241. mutex_lock(&omap_hwmod_mutex);
  1242. oh = _lookup(name);
  1243. mutex_unlock(&omap_hwmod_mutex);
  1244. return oh;
  1245. }
  1246. /**
  1247. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1248. * @fn: pointer to a callback function
  1249. * @data: void * data to pass to callback function
  1250. *
  1251. * Call @fn for each registered omap_hwmod, passing @data to each
  1252. * function. @fn must return 0 for success or any other value for
  1253. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1254. * will stop and the non-zero return value will be passed to the
  1255. * caller of omap_hwmod_for_each(). @fn is called with
  1256. * omap_hwmod_for_each() held.
  1257. */
  1258. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1259. void *data)
  1260. {
  1261. struct omap_hwmod *temp_oh;
  1262. int ret;
  1263. if (!fn)
  1264. return -EINVAL;
  1265. mutex_lock(&omap_hwmod_mutex);
  1266. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1267. ret = (*fn)(temp_oh, data);
  1268. if (ret)
  1269. break;
  1270. }
  1271. mutex_unlock(&omap_hwmod_mutex);
  1272. return ret;
  1273. }
  1274. /**
  1275. * omap_hwmod_init - init omap_hwmod code and register hwmods
  1276. * @ohs: pointer to an array of omap_hwmods to register
  1277. *
  1278. * Intended to be called early in boot before the clock framework is
  1279. * initialized. If @ohs is not null, will register all omap_hwmods
  1280. * listed in @ohs that are valid for this chip. Returns -EINVAL if
  1281. * omap_hwmod_init() has already been called or 0 otherwise.
  1282. */
  1283. int omap_hwmod_init(struct omap_hwmod **ohs)
  1284. {
  1285. struct omap_hwmod *oh;
  1286. int r;
  1287. if (inited)
  1288. return -EINVAL;
  1289. inited = 1;
  1290. if (!ohs)
  1291. return 0;
  1292. oh = *ohs;
  1293. while (oh) {
  1294. if (omap_chip_is(oh->omap_chip)) {
  1295. r = omap_hwmod_register(oh);
  1296. WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
  1297. "%d\n", oh->name, r);
  1298. }
  1299. oh = *++ohs;
  1300. }
  1301. return 0;
  1302. }
  1303. /**
  1304. * omap_hwmod_late_init - do some post-clock framework initialization
  1305. * @skip_setup_idle: if 1, do not idle hwmods in _setup()
  1306. *
  1307. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1308. * to struct clk pointers for each registered omap_hwmod. Also calls
  1309. * _setup() on each hwmod. Returns 0.
  1310. */
  1311. int omap_hwmod_late_init(u8 skip_setup_idle)
  1312. {
  1313. int r;
  1314. /* XXX check return value */
  1315. r = omap_hwmod_for_each(_init_clocks, NULL);
  1316. WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
  1317. mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
  1318. WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
  1319. MPU_INITIATOR_NAME);
  1320. if (skip_setup_idle)
  1321. pr_debug("omap_hwmod: will leave hwmods enabled during setup\n");
  1322. omap_hwmod_for_each(_setup, &skip_setup_idle);
  1323. return 0;
  1324. }
  1325. /**
  1326. * omap_hwmod_unregister - unregister an omap_hwmod
  1327. * @oh: struct omap_hwmod *
  1328. *
  1329. * Unregisters a previously-registered omap_hwmod @oh. There's probably
  1330. * no use case for this, so it is likely to be removed in a later version.
  1331. *
  1332. * XXX Free all of the bootmem-allocated structures here when that is
  1333. * implemented. Make it clear that core code is the only code that is
  1334. * expected to unregister modules.
  1335. */
  1336. int omap_hwmod_unregister(struct omap_hwmod *oh)
  1337. {
  1338. if (!oh)
  1339. return -EINVAL;
  1340. pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
  1341. mutex_lock(&omap_hwmod_mutex);
  1342. iounmap(oh->_mpu_rt_va);
  1343. list_del(&oh->node);
  1344. mutex_unlock(&omap_hwmod_mutex);
  1345. return 0;
  1346. }
  1347. /**
  1348. * omap_hwmod_enable - enable an omap_hwmod
  1349. * @oh: struct omap_hwmod *
  1350. *
  1351. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1352. * Returns -EINVAL on error or passes along the return value from _enable().
  1353. */
  1354. int omap_hwmod_enable(struct omap_hwmod *oh)
  1355. {
  1356. int r;
  1357. if (!oh)
  1358. return -EINVAL;
  1359. mutex_lock(&oh->_mutex);
  1360. r = _omap_hwmod_enable(oh);
  1361. mutex_unlock(&oh->_mutex);
  1362. return r;
  1363. }
  1364. /**
  1365. * omap_hwmod_idle - idle an omap_hwmod
  1366. * @oh: struct omap_hwmod *
  1367. *
  1368. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1369. * Returns -EINVAL on error or passes along the return value from _idle().
  1370. */
  1371. int omap_hwmod_idle(struct omap_hwmod *oh)
  1372. {
  1373. if (!oh)
  1374. return -EINVAL;
  1375. mutex_lock(&oh->_mutex);
  1376. _omap_hwmod_idle(oh);
  1377. mutex_unlock(&oh->_mutex);
  1378. return 0;
  1379. }
  1380. /**
  1381. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1382. * @oh: struct omap_hwmod *
  1383. *
  1384. * Shutdown an omap_hwmod @oh. Intended to be called by
  1385. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1386. * the return value from _shutdown().
  1387. */
  1388. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1389. {
  1390. if (!oh)
  1391. return -EINVAL;
  1392. mutex_lock(&oh->_mutex);
  1393. _shutdown(oh);
  1394. mutex_unlock(&oh->_mutex);
  1395. return 0;
  1396. }
  1397. /**
  1398. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1399. * @oh: struct omap_hwmod *oh
  1400. *
  1401. * Intended to be called by the omap_device code.
  1402. */
  1403. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1404. {
  1405. mutex_lock(&oh->_mutex);
  1406. _enable_clocks(oh);
  1407. mutex_unlock(&oh->_mutex);
  1408. return 0;
  1409. }
  1410. /**
  1411. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1412. * @oh: struct omap_hwmod *oh
  1413. *
  1414. * Intended to be called by the omap_device code.
  1415. */
  1416. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1417. {
  1418. mutex_lock(&oh->_mutex);
  1419. _disable_clocks(oh);
  1420. mutex_unlock(&oh->_mutex);
  1421. return 0;
  1422. }
  1423. /**
  1424. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1425. * @oh: struct omap_hwmod *oh
  1426. *
  1427. * Intended to be called by drivers and core code when all posted
  1428. * writes to a device must complete before continuing further
  1429. * execution (for example, after clearing some device IRQSTATUS
  1430. * register bits)
  1431. *
  1432. * XXX what about targets with multiple OCP threads?
  1433. */
  1434. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1435. {
  1436. BUG_ON(!oh);
  1437. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1438. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1439. "device configuration\n", oh->name);
  1440. return;
  1441. }
  1442. /*
  1443. * Forces posted writes to complete on the OCP thread handling
  1444. * register writes
  1445. */
  1446. omap_hwmod_readl(oh, oh->class->sysc->sysc_offs);
  1447. }
  1448. /**
  1449. * omap_hwmod_reset - reset the hwmod
  1450. * @oh: struct omap_hwmod *
  1451. *
  1452. * Under some conditions, a driver may wish to reset the entire device.
  1453. * Called from omap_device code. Returns -EINVAL on error or passes along
  1454. * the return value from _reset().
  1455. */
  1456. int omap_hwmod_reset(struct omap_hwmod *oh)
  1457. {
  1458. int r;
  1459. if (!oh)
  1460. return -EINVAL;
  1461. mutex_lock(&oh->_mutex);
  1462. r = _reset(oh);
  1463. mutex_unlock(&oh->_mutex);
  1464. return r;
  1465. }
  1466. /**
  1467. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1468. * @oh: struct omap_hwmod *
  1469. * @res: pointer to the first element of an array of struct resource to fill
  1470. *
  1471. * Count the number of struct resource array elements necessary to
  1472. * contain omap_hwmod @oh resources. Intended to be called by code
  1473. * that registers omap_devices. Intended to be used to determine the
  1474. * size of a dynamically-allocated struct resource array, before
  1475. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1476. * resource array elements needed.
  1477. *
  1478. * XXX This code is not optimized. It could attempt to merge adjacent
  1479. * resource IDs.
  1480. *
  1481. */
  1482. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1483. {
  1484. int ret, i;
  1485. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1486. for (i = 0; i < oh->slaves_cnt; i++)
  1487. ret += oh->slaves[i]->addr_cnt;
  1488. return ret;
  1489. }
  1490. /**
  1491. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1492. * @oh: struct omap_hwmod *
  1493. * @res: pointer to the first element of an array of struct resource to fill
  1494. *
  1495. * Fill the struct resource array @res with resource data from the
  1496. * omap_hwmod @oh. Intended to be called by code that registers
  1497. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1498. * number of array elements filled.
  1499. */
  1500. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1501. {
  1502. int i, j;
  1503. int r = 0;
  1504. /* For each IRQ, DMA, memory area, fill in array.*/
  1505. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1506. (res + r)->name = (oh->mpu_irqs + i)->name;
  1507. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1508. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1509. (res + r)->flags = IORESOURCE_IRQ;
  1510. r++;
  1511. }
  1512. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1513. (res + r)->name = (oh->sdma_reqs + i)->name;
  1514. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1515. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1516. (res + r)->flags = IORESOURCE_DMA;
  1517. r++;
  1518. }
  1519. for (i = 0; i < oh->slaves_cnt; i++) {
  1520. struct omap_hwmod_ocp_if *os;
  1521. os = oh->slaves[i];
  1522. for (j = 0; j < os->addr_cnt; j++) {
  1523. (res + r)->start = (os->addr + j)->pa_start;
  1524. (res + r)->end = (os->addr + j)->pa_end;
  1525. (res + r)->flags = IORESOURCE_MEM;
  1526. r++;
  1527. }
  1528. }
  1529. return r;
  1530. }
  1531. /**
  1532. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1533. * @oh: struct omap_hwmod *
  1534. *
  1535. * Return the powerdomain pointer associated with the OMAP module
  1536. * @oh's main clock. If @oh does not have a main clk, return the
  1537. * powerdomain associated with the interface clock associated with the
  1538. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1539. * instead?) Returns NULL on error, or a struct powerdomain * on
  1540. * success.
  1541. */
  1542. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1543. {
  1544. struct clk *c;
  1545. if (!oh)
  1546. return NULL;
  1547. if (oh->_clk) {
  1548. c = oh->_clk;
  1549. } else {
  1550. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1551. return NULL;
  1552. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1553. }
  1554. if (!c->clkdm)
  1555. return NULL;
  1556. return c->clkdm->pwrdm.ptr;
  1557. }
  1558. /**
  1559. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1560. * @oh: struct omap_hwmod *
  1561. *
  1562. * Returns the virtual address corresponding to the beginning of the
  1563. * module's register target, in the address range that is intended to
  1564. * be used by the MPU. Returns the virtual address upon success or NULL
  1565. * upon error.
  1566. */
  1567. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1568. {
  1569. if (!oh)
  1570. return NULL;
  1571. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1572. return NULL;
  1573. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1574. return NULL;
  1575. return oh->_mpu_rt_va;
  1576. }
  1577. /**
  1578. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1579. * @oh: struct omap_hwmod *
  1580. * @init_oh: struct omap_hwmod * (initiator)
  1581. *
  1582. * Add a sleep dependency between the initiator @init_oh and @oh.
  1583. * Intended to be called by DSP/Bridge code via platform_data for the
  1584. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1585. * code needs to add/del initiator dependencies dynamically
  1586. * before/after accessing a device. Returns the return value from
  1587. * _add_initiator_dep().
  1588. *
  1589. * XXX Keep a usecount in the clockdomain code
  1590. */
  1591. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1592. struct omap_hwmod *init_oh)
  1593. {
  1594. return _add_initiator_dep(oh, init_oh);
  1595. }
  1596. /*
  1597. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1598. * for context save/restore operations?
  1599. */
  1600. /**
  1601. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1602. * @oh: struct omap_hwmod *
  1603. * @init_oh: struct omap_hwmod * (initiator)
  1604. *
  1605. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1606. * Intended to be called by DSP/Bridge code via platform_data for the
  1607. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1608. * code needs to add/del initiator dependencies dynamically
  1609. * before/after accessing a device. Returns the return value from
  1610. * _del_initiator_dep().
  1611. *
  1612. * XXX Keep a usecount in the clockdomain code
  1613. */
  1614. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1615. struct omap_hwmod *init_oh)
  1616. {
  1617. return _del_initiator_dep(oh, init_oh);
  1618. }
  1619. /**
  1620. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1621. * @oh: struct omap_hwmod *
  1622. *
  1623. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1624. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1625. * registers to cause the PRCM to receive wakeup events from the
  1626. * module. Does not set any wakeup routing registers beyond this
  1627. * point - if the module is to wake up any other module or subsystem,
  1628. * that must be set separately. Called by omap_device code. Returns
  1629. * -EINVAL on error or 0 upon success.
  1630. */
  1631. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1632. {
  1633. if (!oh->class->sysc ||
  1634. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1635. return -EINVAL;
  1636. mutex_lock(&oh->_mutex);
  1637. _enable_wakeup(oh);
  1638. mutex_unlock(&oh->_mutex);
  1639. return 0;
  1640. }
  1641. /**
  1642. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1643. * @oh: struct omap_hwmod *
  1644. *
  1645. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1646. * from sending wakeups to the PRCM. Eventually this should clear
  1647. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1648. * from the module. Does not set any wakeup routing registers beyond
  1649. * this point - if the module is to wake up any other module or
  1650. * subsystem, that must be set separately. Called by omap_device
  1651. * code. Returns -EINVAL on error or 0 upon success.
  1652. */
  1653. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1654. {
  1655. if (!oh->class->sysc ||
  1656. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1657. return -EINVAL;
  1658. mutex_lock(&oh->_mutex);
  1659. _disable_wakeup(oh);
  1660. mutex_unlock(&oh->_mutex);
  1661. return 0;
  1662. }
  1663. /**
  1664. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1665. * contained in the hwmod module.
  1666. * @oh: struct omap_hwmod *
  1667. * @name: name of the reset line to lookup and assert
  1668. *
  1669. * Some IP like dsp, ipu or iva contain processor that require
  1670. * an HW reset line to be assert / deassert in order to enable fully
  1671. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1672. * yet supported on this OMAP; otherwise, passes along the return value
  1673. * from _assert_hardreset().
  1674. */
  1675. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1676. {
  1677. int ret;
  1678. if (!oh)
  1679. return -EINVAL;
  1680. mutex_lock(&oh->_mutex);
  1681. ret = _assert_hardreset(oh, name);
  1682. mutex_unlock(&oh->_mutex);
  1683. return ret;
  1684. }
  1685. /**
  1686. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1687. * contained in the hwmod module.
  1688. * @oh: struct omap_hwmod *
  1689. * @name: name of the reset line to look up and deassert
  1690. *
  1691. * Some IP like dsp, ipu or iva contain processor that require
  1692. * an HW reset line to be assert / deassert in order to enable fully
  1693. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1694. * yet supported on this OMAP; otherwise, passes along the return value
  1695. * from _deassert_hardreset().
  1696. */
  1697. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1698. {
  1699. int ret;
  1700. if (!oh)
  1701. return -EINVAL;
  1702. mutex_lock(&oh->_mutex);
  1703. ret = _deassert_hardreset(oh, name);
  1704. mutex_unlock(&oh->_mutex);
  1705. return ret;
  1706. }
  1707. /**
  1708. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1709. * contained in the hwmod module
  1710. * @oh: struct omap_hwmod *
  1711. * @name: name of the reset line to look up and read
  1712. *
  1713. * Return the current state of the hwmod @oh's reset line named @name:
  1714. * returns -EINVAL upon parameter error or if this operation
  1715. * is unsupported on the current OMAP; otherwise, passes along the return
  1716. * value from _read_hardreset().
  1717. */
  1718. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1719. {
  1720. int ret;
  1721. if (!oh)
  1722. return -EINVAL;
  1723. mutex_lock(&oh->_mutex);
  1724. ret = _read_hardreset(oh, name);
  1725. mutex_unlock(&oh->_mutex);
  1726. return ret;
  1727. }
  1728. /**
  1729. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1730. * @classname: struct omap_hwmod_class name to search for
  1731. * @fn: callback function pointer to call for each hwmod in class @classname
  1732. * @user: arbitrary context data to pass to the callback function
  1733. *
  1734. * For each omap_hwmod of class @classname, call @fn. Takes
  1735. * omap_hwmod_mutex to prevent the hwmod list from changing during the
  1736. * iteration. If the callback function returns something other than
  1737. * zero, the iterator is terminated, and the callback function's return
  1738. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1739. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1740. */
  1741. int omap_hwmod_for_each_by_class(const char *classname,
  1742. int (*fn)(struct omap_hwmod *oh,
  1743. void *user),
  1744. void *user)
  1745. {
  1746. struct omap_hwmod *temp_oh;
  1747. int ret = 0;
  1748. if (!classname || !fn)
  1749. return -EINVAL;
  1750. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1751. __func__, classname);
  1752. mutex_lock(&omap_hwmod_mutex);
  1753. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1754. if (!strcmp(temp_oh->class->name, classname)) {
  1755. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1756. __func__, temp_oh->name);
  1757. ret = (*fn)(temp_oh, user);
  1758. if (ret)
  1759. break;
  1760. }
  1761. }
  1762. mutex_unlock(&omap_hwmod_mutex);
  1763. if (ret)
  1764. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1765. __func__, ret);
  1766. return ret;
  1767. }