time.c 16 KB

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  1. /* $Id: time.c,v 1.60 2002/01/23 14:33:55 davem Exp $
  2. * linux/arch/sparc/kernel/time.c
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  6. *
  7. * Chris Davis (cdavis@cois.on.ca) 03/27/1998
  8. * Added support for the intersil on the sun4/4200
  9. *
  10. * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
  11. * Support for MicroSPARC-IIep, PCI CPU.
  12. *
  13. * This file handles the Sparc specific time handling details.
  14. *
  15. * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
  16. * "A Kernel Model for Precision Timekeeping" by Dave Mills
  17. */
  18. #include <linux/errno.h>
  19. #include <linux/module.h>
  20. #include <linux/sched.h>
  21. #include <linux/kernel.h>
  22. #include <linux/param.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/time.h>
  27. #include <linux/timex.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/ioport.h>
  31. #include <linux/profile.h>
  32. #include <asm/oplib.h>
  33. #include <asm/timer.h>
  34. #include <asm/mostek.h>
  35. #include <asm/system.h>
  36. #include <asm/irq.h>
  37. #include <asm/io.h>
  38. #include <asm/idprom.h>
  39. #include <asm/machines.h>
  40. #include <asm/sun4paddr.h>
  41. #include <asm/page.h>
  42. #include <asm/pcic.h>
  43. #include <asm/of_device.h>
  44. #include <asm/irq_regs.h>
  45. DEFINE_SPINLOCK(rtc_lock);
  46. enum sparc_clock_type sp_clock_typ;
  47. DEFINE_SPINLOCK(mostek_lock);
  48. void __iomem *mstk48t02_regs = NULL;
  49. static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
  50. static int set_rtc_mmss(unsigned long);
  51. static int sbus_do_settimeofday(struct timespec *tv);
  52. #ifdef CONFIG_SUN4
  53. struct intersil *intersil_clock;
  54. #define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
  55. (intsil_cmd)
  56. #define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
  57. (intsil_cmd)
  58. #define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
  59. ( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
  60. INTERSIL_INTR_ENABLE))
  61. #define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
  62. ( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
  63. INTERSIL_INTR_ENABLE))
  64. #define intersil_read_intr(intersil_reg, towhere) towhere = \
  65. intersil_reg->int_intr_reg
  66. #endif
  67. unsigned long profile_pc(struct pt_regs *regs)
  68. {
  69. extern char __copy_user_begin[], __copy_user_end[];
  70. extern char __atomic_begin[], __atomic_end[];
  71. extern char __bzero_begin[], __bzero_end[];
  72. extern char __bitops_begin[], __bitops_end[];
  73. unsigned long pc = regs->pc;
  74. if (in_lock_functions(pc) ||
  75. (pc >= (unsigned long) __copy_user_begin &&
  76. pc < (unsigned long) __copy_user_end) ||
  77. (pc >= (unsigned long) __atomic_begin &&
  78. pc < (unsigned long) __atomic_end) ||
  79. (pc >= (unsigned long) __bzero_begin &&
  80. pc < (unsigned long) __bzero_end) ||
  81. (pc >= (unsigned long) __bitops_begin &&
  82. pc < (unsigned long) __bitops_end))
  83. pc = regs->u_regs[UREG_RETPC];
  84. return pc;
  85. }
  86. EXPORT_SYMBOL(profile_pc);
  87. __volatile__ unsigned int *master_l10_counter;
  88. __volatile__ unsigned int *master_l10_limit;
  89. /*
  90. * timer_interrupt() needs to keep up the real-time clock,
  91. * as well as call the "do_timer()" routine every clocktick
  92. */
  93. #define TICK_SIZE (tick_nsec / 1000)
  94. irqreturn_t timer_interrupt(int irq, void *dev_id)
  95. {
  96. /* last time the cmos clock got updated */
  97. static long last_rtc_update;
  98. #ifndef CONFIG_SMP
  99. profile_tick(CPU_PROFILING);
  100. #endif
  101. /* Protect counter clear so that do_gettimeoffset works */
  102. write_seqlock(&xtime_lock);
  103. #ifdef CONFIG_SUN4
  104. if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
  105. (idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
  106. int temp;
  107. intersil_read_intr(intersil_clock, temp);
  108. /* re-enable the irq */
  109. enable_pil_irq(10);
  110. }
  111. #endif
  112. clear_clock_irq();
  113. do_timer(1);
  114. #ifndef CONFIG_SMP
  115. update_process_times(user_mode(get_irq_regs()));
  116. #endif
  117. /* Determine when to update the Mostek clock. */
  118. if (ntp_synced() &&
  119. xtime.tv_sec > last_rtc_update + 660 &&
  120. (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
  121. (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
  122. if (set_rtc_mmss(xtime.tv_sec) == 0)
  123. last_rtc_update = xtime.tv_sec;
  124. else
  125. last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
  126. }
  127. write_sequnlock(&xtime_lock);
  128. return IRQ_HANDLED;
  129. }
  130. /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
  131. static void __init kick_start_clock(void)
  132. {
  133. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  134. unsigned char sec;
  135. int i, count;
  136. prom_printf("CLOCK: Clock was stopped. Kick start ");
  137. spin_lock_irq(&mostek_lock);
  138. /* Turn on the kick start bit to start the oscillator. */
  139. regs->creg |= MSTK_CREG_WRITE;
  140. regs->sec &= ~MSTK_STOP;
  141. regs->hour |= MSTK_KICK_START;
  142. regs->creg &= ~MSTK_CREG_WRITE;
  143. spin_unlock_irq(&mostek_lock);
  144. /* Delay to allow the clock oscillator to start. */
  145. sec = MSTK_REG_SEC(regs);
  146. for (i = 0; i < 3; i++) {
  147. while (sec == MSTK_REG_SEC(regs))
  148. for (count = 0; count < 100000; count++)
  149. /* nothing */ ;
  150. prom_printf(".");
  151. sec = regs->sec;
  152. }
  153. prom_printf("\n");
  154. spin_lock_irq(&mostek_lock);
  155. /* Turn off kick start and set a "valid" time and date. */
  156. regs->creg |= MSTK_CREG_WRITE;
  157. regs->hour &= ~MSTK_KICK_START;
  158. MSTK_SET_REG_SEC(regs,0);
  159. MSTK_SET_REG_MIN(regs,0);
  160. MSTK_SET_REG_HOUR(regs,0);
  161. MSTK_SET_REG_DOW(regs,5);
  162. MSTK_SET_REG_DOM(regs,1);
  163. MSTK_SET_REG_MONTH(regs,8);
  164. MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
  165. regs->creg &= ~MSTK_CREG_WRITE;
  166. spin_unlock_irq(&mostek_lock);
  167. /* Ensure the kick start bit is off. If it isn't, turn it off. */
  168. while (regs->hour & MSTK_KICK_START) {
  169. prom_printf("CLOCK: Kick start still on!\n");
  170. spin_lock_irq(&mostek_lock);
  171. regs->creg |= MSTK_CREG_WRITE;
  172. regs->hour &= ~MSTK_KICK_START;
  173. regs->creg &= ~MSTK_CREG_WRITE;
  174. spin_unlock_irq(&mostek_lock);
  175. }
  176. prom_printf("CLOCK: Kick start procedure successful.\n");
  177. }
  178. /* Return nonzero if the clock chip battery is low. */
  179. static __inline__ int has_low_battery(void)
  180. {
  181. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  182. unsigned char data1, data2;
  183. spin_lock_irq(&mostek_lock);
  184. data1 = regs->eeprom[0]; /* Read some data. */
  185. regs->eeprom[0] = ~data1; /* Write back the complement. */
  186. data2 = regs->eeprom[0]; /* Read back the complement. */
  187. regs->eeprom[0] = data1; /* Restore the original value. */
  188. spin_unlock_irq(&mostek_lock);
  189. return (data1 == data2); /* Was the write blocked? */
  190. }
  191. static void __init mostek_set_system_time(void)
  192. {
  193. unsigned int year, mon, day, hour, min, sec;
  194. struct mostek48t02 *mregs;
  195. mregs = (struct mostek48t02 *)mstk48t02_regs;
  196. if(!mregs) {
  197. prom_printf("Something wrong, clock regs not mapped yet.\n");
  198. prom_halt();
  199. }
  200. spin_lock_irq(&mostek_lock);
  201. mregs->creg |= MSTK_CREG_READ;
  202. sec = MSTK_REG_SEC(mregs);
  203. min = MSTK_REG_MIN(mregs);
  204. hour = MSTK_REG_HOUR(mregs);
  205. day = MSTK_REG_DOM(mregs);
  206. mon = MSTK_REG_MONTH(mregs);
  207. year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
  208. xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
  209. xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  210. set_normalized_timespec(&wall_to_monotonic,
  211. -xtime.tv_sec, -xtime.tv_nsec);
  212. mregs->creg &= ~MSTK_CREG_READ;
  213. spin_unlock_irq(&mostek_lock);
  214. }
  215. /* Probe for the real time clock chip on Sun4 */
  216. static __inline__ void sun4_clock_probe(void)
  217. {
  218. #ifdef CONFIG_SUN4
  219. int temp;
  220. struct resource r;
  221. memset(&r, 0, sizeof(r));
  222. if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
  223. sp_clock_typ = MSTK48T02;
  224. r.start = sun4_clock_physaddr;
  225. mstk48t02_regs = sbus_ioremap(&r, 0,
  226. sizeof(struct mostek48t02), NULL);
  227. mstk48t08_regs = NULL; /* To catch weirdness */
  228. intersil_clock = NULL; /* just in case */
  229. /* Kick start the clock if it is completely stopped. */
  230. if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
  231. kick_start_clock();
  232. } else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
  233. /* intersil setup code */
  234. printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
  235. sp_clock_typ = INTERSIL;
  236. r.start = sun4_clock_physaddr;
  237. intersil_clock = (struct intersil *)
  238. sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
  239. mstk48t02_regs = 0; /* just be sure */
  240. mstk48t08_regs = NULL; /* ditto */
  241. /* initialise the clock */
  242. intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
  243. intersil_start(intersil_clock);
  244. intersil_read_intr(intersil_clock, temp);
  245. while (!(temp & 0x80))
  246. intersil_read_intr(intersil_clock, temp);
  247. intersil_read_intr(intersil_clock, temp);
  248. while (!(temp & 0x80))
  249. intersil_read_intr(intersil_clock, temp);
  250. intersil_stop(intersil_clock);
  251. }
  252. #endif
  253. }
  254. #ifndef CONFIG_SUN4
  255. static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
  256. {
  257. struct device_node *dp = op->node;
  258. char *model = of_get_property(dp, "model", NULL);
  259. if (!model)
  260. return -ENODEV;
  261. if (!strcmp(model, "mk48t02")) {
  262. sp_clock_typ = MSTK48T02;
  263. /* Map the clock register io area read-only */
  264. mstk48t02_regs = of_ioremap(&op->resource[0], 0,
  265. sizeof(struct mostek48t02),
  266. "mk48t02");
  267. mstk48t08_regs = NULL; /* To catch weirdness */
  268. } else if (!strcmp(model, "mk48t08")) {
  269. sp_clock_typ = MSTK48T08;
  270. mstk48t08_regs = of_ioremap(&op->resource[0], 0,
  271. sizeof(struct mostek48t08),
  272. "mk48t08");
  273. mstk48t02_regs = &mstk48t08_regs->regs;
  274. } else
  275. return -ENODEV;
  276. /* Report a low battery voltage condition. */
  277. if (has_low_battery())
  278. printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
  279. /* Kick start the clock if it is completely stopped. */
  280. if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
  281. kick_start_clock();
  282. mostek_set_system_time();
  283. return 0;
  284. }
  285. static struct of_device_id clock_match[] = {
  286. {
  287. .name = "eeprom",
  288. },
  289. {},
  290. };
  291. static struct of_platform_driver clock_driver = {
  292. .name = "clock",
  293. .match_table = clock_match,
  294. .probe = clock_probe,
  295. };
  296. /* Probe for the mostek real time clock chip. */
  297. static int __init clock_init(void)
  298. {
  299. return of_register_driver(&clock_driver, &of_bus_type);
  300. }
  301. /* Must be after subsys_initcall() so that busses are probed. Must
  302. * be before device_initcall() because things like the RTC driver
  303. * need to see the clock registers.
  304. */
  305. fs_initcall(clock_init);
  306. #endif /* !CONFIG_SUN4 */
  307. void __init sbus_time_init(void)
  308. {
  309. BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
  310. btfixup();
  311. if (ARCH_SUN4)
  312. sun4_clock_probe();
  313. sparc_init_timers(timer_interrupt);
  314. #ifdef CONFIG_SUN4
  315. if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
  316. mostek_set_system_time();
  317. } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
  318. /* initialise the intersil on sun4 */
  319. unsigned int year, mon, day, hour, min, sec;
  320. int temp;
  321. struct intersil *iregs;
  322. iregs=intersil_clock;
  323. if(!iregs) {
  324. prom_printf("Something wrong, clock regs not mapped yet.\n");
  325. prom_halt();
  326. }
  327. intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
  328. disable_pil_irq(10);
  329. intersil_stop(iregs);
  330. intersil_read_intr(intersil_clock, temp);
  331. temp = iregs->clk.int_csec;
  332. sec = iregs->clk.int_sec;
  333. min = iregs->clk.int_min;
  334. hour = iregs->clk.int_hour;
  335. day = iregs->clk.int_day;
  336. mon = iregs->clk.int_month;
  337. year = MSTK_CVT_YEAR(iregs->clk.int_year);
  338. enable_pil_irq(10);
  339. intersil_start(iregs);
  340. xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
  341. xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  342. set_normalized_timespec(&wall_to_monotonic,
  343. -xtime.tv_sec, -xtime.tv_nsec);
  344. printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
  345. }
  346. #endif
  347. /* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
  348. local_irq_enable();
  349. }
  350. void __init time_init(void)
  351. {
  352. #ifdef CONFIG_PCI
  353. extern void pci_time_init(void);
  354. if (pcic_present()) {
  355. pci_time_init();
  356. return;
  357. }
  358. #endif
  359. sbus_time_init();
  360. }
  361. static inline unsigned long do_gettimeoffset(void)
  362. {
  363. return (*master_l10_counter >> 10) & 0x1fffff;
  364. }
  365. /*
  366. * Returns nanoseconds
  367. * XXX This is a suboptimal implementation.
  368. */
  369. unsigned long long sched_clock(void)
  370. {
  371. return (unsigned long long)jiffies * (1000000000 / HZ);
  372. }
  373. /* Ok, my cute asm atomicity trick doesn't work anymore.
  374. * There are just too many variables that need to be protected
  375. * now (both members of xtime, et al.)
  376. */
  377. void do_gettimeofday(struct timeval *tv)
  378. {
  379. unsigned long flags;
  380. unsigned long seq;
  381. unsigned long usec, sec;
  382. unsigned long max_ntp_tick = tick_usec - tickadj;
  383. do {
  384. seq = read_seqbegin_irqsave(&xtime_lock, flags);
  385. usec = do_gettimeoffset();
  386. /*
  387. * If time_adjust is negative then NTP is slowing the clock
  388. * so make sure not to go into next possible interval.
  389. * Better to lose some accuracy than have time go backwards..
  390. */
  391. if (unlikely(time_adjust < 0))
  392. usec = min(usec, max_ntp_tick);
  393. sec = xtime.tv_sec;
  394. usec += (xtime.tv_nsec / 1000);
  395. } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
  396. while (usec >= 1000000) {
  397. usec -= 1000000;
  398. sec++;
  399. }
  400. tv->tv_sec = sec;
  401. tv->tv_usec = usec;
  402. }
  403. EXPORT_SYMBOL(do_gettimeofday);
  404. int do_settimeofday(struct timespec *tv)
  405. {
  406. int ret;
  407. write_seqlock_irq(&xtime_lock);
  408. ret = bus_do_settimeofday(tv);
  409. write_sequnlock_irq(&xtime_lock);
  410. clock_was_set();
  411. return ret;
  412. }
  413. EXPORT_SYMBOL(do_settimeofday);
  414. static int sbus_do_settimeofday(struct timespec *tv)
  415. {
  416. time_t wtm_sec, sec = tv->tv_sec;
  417. long wtm_nsec, nsec = tv->tv_nsec;
  418. if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
  419. return -EINVAL;
  420. /*
  421. * This is revolting. We need to set "xtime" correctly. However, the
  422. * value in this location is the value at the most recent update of
  423. * wall time. Discover what correction gettimeofday() would have
  424. * made, and then undo it!
  425. */
  426. nsec -= 1000 * do_gettimeoffset();
  427. wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
  428. wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
  429. set_normalized_timespec(&xtime, sec, nsec);
  430. set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
  431. ntp_clear();
  432. return 0;
  433. }
  434. /*
  435. * BUG: This routine does not handle hour overflow properly; it just
  436. * sets the minutes. Usually you won't notice until after reboot!
  437. */
  438. static int set_rtc_mmss(unsigned long nowtime)
  439. {
  440. int real_seconds, real_minutes, mostek_minutes;
  441. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  442. unsigned long flags;
  443. #ifdef CONFIG_SUN4
  444. struct intersil *iregs = intersil_clock;
  445. int temp;
  446. #endif
  447. /* Not having a register set can lead to trouble. */
  448. if (!regs) {
  449. #ifdef CONFIG_SUN4
  450. if(!iregs)
  451. return -1;
  452. else {
  453. temp = iregs->clk.int_csec;
  454. mostek_minutes = iregs->clk.int_min;
  455. real_seconds = nowtime % 60;
  456. real_minutes = nowtime / 60;
  457. if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
  458. real_minutes += 30; /* correct for half hour time zone */
  459. real_minutes %= 60;
  460. if (abs(real_minutes - mostek_minutes) < 30) {
  461. intersil_stop(iregs);
  462. iregs->clk.int_sec=real_seconds;
  463. iregs->clk.int_min=real_minutes;
  464. intersil_start(iregs);
  465. } else {
  466. printk(KERN_WARNING
  467. "set_rtc_mmss: can't update from %d to %d\n",
  468. mostek_minutes, real_minutes);
  469. return -1;
  470. }
  471. return 0;
  472. }
  473. #endif
  474. }
  475. spin_lock_irqsave(&mostek_lock, flags);
  476. /* Read the current RTC minutes. */
  477. regs->creg |= MSTK_CREG_READ;
  478. mostek_minutes = MSTK_REG_MIN(regs);
  479. regs->creg &= ~MSTK_CREG_READ;
  480. /*
  481. * since we're only adjusting minutes and seconds,
  482. * don't interfere with hour overflow. This avoids
  483. * messing with unknown time zones but requires your
  484. * RTC not to be off by more than 15 minutes
  485. */
  486. real_seconds = nowtime % 60;
  487. real_minutes = nowtime / 60;
  488. if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
  489. real_minutes += 30; /* correct for half hour time zone */
  490. real_minutes %= 60;
  491. if (abs(real_minutes - mostek_minutes) < 30) {
  492. regs->creg |= MSTK_CREG_WRITE;
  493. MSTK_SET_REG_SEC(regs,real_seconds);
  494. MSTK_SET_REG_MIN(regs,real_minutes);
  495. regs->creg &= ~MSTK_CREG_WRITE;
  496. spin_unlock_irqrestore(&mostek_lock, flags);
  497. return 0;
  498. } else {
  499. spin_unlock_irqrestore(&mostek_lock, flags);
  500. return -1;
  501. }
  502. }