setup.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575
  1. /*
  2. * 64-bit pSeries and RS/6000 setup code.
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #undef DEBUG
  18. #include <linux/cpu.h>
  19. #include <linux/errno.h>
  20. #include <linux/sched.h>
  21. #include <linux/kernel.h>
  22. #include <linux/mm.h>
  23. #include <linux/stddef.h>
  24. #include <linux/unistd.h>
  25. #include <linux/slab.h>
  26. #include <linux/user.h>
  27. #include <linux/a.out.h>
  28. #include <linux/tty.h>
  29. #include <linux/major.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/reboot.h>
  32. #include <linux/init.h>
  33. #include <linux/ioport.h>
  34. #include <linux/console.h>
  35. #include <linux/pci.h>
  36. #include <linux/utsname.h>
  37. #include <linux/adb.h>
  38. #include <linux/module.h>
  39. #include <linux/delay.h>
  40. #include <linux/irq.h>
  41. #include <linux/seq_file.h>
  42. #include <linux/root_dev.h>
  43. #include <asm/mmu.h>
  44. #include <asm/processor.h>
  45. #include <asm/io.h>
  46. #include <asm/pgtable.h>
  47. #include <asm/prom.h>
  48. #include <asm/rtas.h>
  49. #include <asm/pci-bridge.h>
  50. #include <asm/iommu.h>
  51. #include <asm/dma.h>
  52. #include <asm/machdep.h>
  53. #include <asm/irq.h>
  54. #include <asm/kexec.h>
  55. #include <asm/time.h>
  56. #include <asm/nvram.h>
  57. #include "xics.h"
  58. #include <asm/pmc.h>
  59. #include <asm/mpic.h>
  60. #include <asm/ppc-pci.h>
  61. #include <asm/i8259.h>
  62. #include <asm/udbg.h>
  63. #include <asm/smp.h>
  64. #include "plpar_wrappers.h"
  65. #include "ras.h"
  66. #include "firmware.h"
  67. #ifdef DEBUG
  68. #define DBG(fmt...) udbg_printf(fmt)
  69. #else
  70. #define DBG(fmt...)
  71. #endif
  72. /* move those away to a .h */
  73. extern void smp_init_pseries_mpic(void);
  74. extern void smp_init_pseries_xics(void);
  75. extern void find_udbg_vterm(void);
  76. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  77. static void pseries_shared_idle_sleep(void);
  78. static void pseries_dedicated_idle_sleep(void);
  79. static struct device_node *pSeries_mpic_node;
  80. static void pSeries_show_cpuinfo(struct seq_file *m)
  81. {
  82. struct device_node *root;
  83. const char *model = "";
  84. root = of_find_node_by_path("/");
  85. if (root)
  86. model = get_property(root, "model", NULL);
  87. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  88. of_node_put(root);
  89. }
  90. /* Initialize firmware assisted non-maskable interrupts if
  91. * the firmware supports this feature.
  92. */
  93. static void __init fwnmi_init(void)
  94. {
  95. unsigned long system_reset_addr, machine_check_addr;
  96. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  97. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  98. return;
  99. /* If the kernel's not linked at zero we point the firmware at low
  100. * addresses anyway, and use a trampoline to get to the real code. */
  101. system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
  102. machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
  103. if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
  104. machine_check_addr))
  105. fwnmi_active = 1;
  106. }
  107. void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc)
  108. {
  109. unsigned int cascade_irq = i8259_irq();
  110. if (cascade_irq != NO_IRQ)
  111. generic_handle_irq(cascade_irq);
  112. desc->chip->eoi(irq);
  113. }
  114. static void __init pseries_mpic_init_IRQ(void)
  115. {
  116. struct device_node *np, *old, *cascade = NULL;
  117. const unsigned int *addrp;
  118. unsigned long intack = 0;
  119. const unsigned int *opprop;
  120. unsigned long openpic_addr = 0;
  121. unsigned int cascade_irq;
  122. int naddr, n, i, opplen;
  123. struct mpic *mpic;
  124. np = of_find_node_by_path("/");
  125. naddr = prom_n_addr_cells(np);
  126. opprop = get_property(np, "platform-open-pic", &opplen);
  127. if (opprop != 0) {
  128. openpic_addr = of_read_number(opprop, naddr);
  129. printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
  130. }
  131. of_node_put(np);
  132. BUG_ON(openpic_addr == 0);
  133. /* Setup the openpic driver */
  134. mpic = mpic_alloc(pSeries_mpic_node, openpic_addr,
  135. MPIC_PRIMARY,
  136. 16, 250, /* isu size, irq count */
  137. " MPIC ");
  138. BUG_ON(mpic == NULL);
  139. /* Add ISUs */
  140. opplen /= sizeof(u32);
  141. for (n = 0, i = naddr; i < opplen; i += naddr, n++) {
  142. unsigned long isuaddr = of_read_number(opprop + i, naddr);
  143. mpic_assign_isu(mpic, n, isuaddr);
  144. }
  145. /* All ISUs are setup, complete initialization */
  146. mpic_init(mpic);
  147. /* Look for cascade */
  148. for_each_node_by_type(np, "interrupt-controller")
  149. if (device_is_compatible(np, "chrp,iic")) {
  150. cascade = np;
  151. break;
  152. }
  153. if (cascade == NULL)
  154. return;
  155. cascade_irq = irq_of_parse_and_map(cascade, 0);
  156. if (cascade == NO_IRQ) {
  157. printk(KERN_ERR "mpic: failed to map cascade interrupt");
  158. return;
  159. }
  160. /* Check ACK type */
  161. for (old = of_node_get(cascade); old != NULL ; old = np) {
  162. np = of_get_parent(old);
  163. of_node_put(old);
  164. if (np == NULL)
  165. break;
  166. if (strcmp(np->name, "pci") != 0)
  167. continue;
  168. addrp = get_property(np, "8259-interrupt-acknowledge",
  169. NULL);
  170. if (addrp == NULL)
  171. continue;
  172. naddr = prom_n_addr_cells(np);
  173. intack = addrp[naddr-1];
  174. if (naddr > 1)
  175. intack |= ((unsigned long)addrp[naddr-2]) << 32;
  176. }
  177. if (intack)
  178. printk(KERN_DEBUG "mpic: PCI 8259 intack at 0x%016lx\n",
  179. intack);
  180. i8259_init(cascade, intack);
  181. of_node_put(cascade);
  182. set_irq_chained_handler(cascade_irq, pseries_8259_cascade);
  183. }
  184. static void pseries_lpar_enable_pmcs(void)
  185. {
  186. unsigned long set, reset;
  187. set = 1UL << 63;
  188. reset = 0;
  189. plpar_hcall_norets(H_PERFMON, set, reset);
  190. /* instruct hypervisor to maintain PMCs */
  191. if (firmware_has_feature(FW_FEATURE_SPLPAR))
  192. get_lppaca()->pmcregs_in_use = 1;
  193. }
  194. #ifdef CONFIG_KEXEC
  195. static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
  196. {
  197. /* Don't risk a hypervisor call if we're crashing */
  198. if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
  199. unsigned long addr;
  200. addr = __pa(get_slb_shadow());
  201. if (unregister_slb_shadow(hard_smp_processor_id(), addr))
  202. printk("SLB shadow buffer deregistration of "
  203. "cpu %u (hw_cpu_id %d) failed\n",
  204. smp_processor_id(),
  205. hard_smp_processor_id());
  206. addr = __pa(get_lppaca());
  207. if (unregister_vpa(hard_smp_processor_id(), addr)) {
  208. printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
  209. "failed\n", smp_processor_id(),
  210. hard_smp_processor_id());
  211. }
  212. }
  213. }
  214. static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary)
  215. {
  216. pseries_kexec_cpu_down(crash_shutdown, secondary);
  217. mpic_teardown_this_cpu(secondary);
  218. }
  219. static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary)
  220. {
  221. pseries_kexec_cpu_down(crash_shutdown, secondary);
  222. xics_teardown_cpu(secondary);
  223. }
  224. #endif /* CONFIG_KEXEC */
  225. static void __init pseries_discover_pic(void)
  226. {
  227. struct device_node *np;
  228. const char *typep;
  229. for (np = NULL; (np = of_find_node_by_name(np,
  230. "interrupt-controller"));) {
  231. typep = get_property(np, "compatible", NULL);
  232. if (strstr(typep, "open-pic")) {
  233. pSeries_mpic_node = of_node_get(np);
  234. ppc_md.init_IRQ = pseries_mpic_init_IRQ;
  235. ppc_md.get_irq = mpic_get_irq;
  236. #ifdef CONFIG_KEXEC
  237. ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic;
  238. #endif
  239. #ifdef CONFIG_SMP
  240. smp_init_pseries_mpic();
  241. #endif
  242. return;
  243. } else if (strstr(typep, "ppc-xicp")) {
  244. ppc_md.init_IRQ = xics_init_IRQ;
  245. #ifdef CONFIG_KEXEC
  246. ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
  247. #endif
  248. #ifdef CONFIG_SMP
  249. smp_init_pseries_xics();
  250. #endif
  251. return;
  252. }
  253. }
  254. printk(KERN_ERR "pSeries_discover_pic: failed to recognize"
  255. " interrupt-controller\n");
  256. }
  257. static void __init pSeries_setup_arch(void)
  258. {
  259. /* Discover PIC type and setup ppc_md accordingly */
  260. pseries_discover_pic();
  261. /* openpic global configuration register (64-bit format). */
  262. /* openpic Interrupt Source Unit pointer (64-bit format). */
  263. /* python0 facility area (mmio) (64-bit format) REAL address. */
  264. /* init to some ~sane value until calibrate_delay() runs */
  265. loops_per_jiffy = 50000000;
  266. if (ROOT_DEV == 0) {
  267. printk("No ramdisk, default root is /dev/sda2\n");
  268. ROOT_DEV = Root_SDA2;
  269. }
  270. fwnmi_init();
  271. /* Find and initialize PCI host bridges */
  272. init_pci_config_tokens();
  273. find_and_init_phbs();
  274. eeh_init();
  275. pSeries_nvram_init();
  276. /* Choose an idle loop */
  277. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  278. vpa_init(boot_cpuid);
  279. if (get_lppaca()->shared_proc) {
  280. printk(KERN_DEBUG "Using shared processor idle loop\n");
  281. ppc_md.power_save = pseries_shared_idle_sleep;
  282. } else {
  283. printk(KERN_DEBUG "Using dedicated idle loop\n");
  284. ppc_md.power_save = pseries_dedicated_idle_sleep;
  285. }
  286. } else {
  287. printk(KERN_DEBUG "Using default idle loop\n");
  288. }
  289. if (firmware_has_feature(FW_FEATURE_LPAR))
  290. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  291. else
  292. ppc_md.enable_pmcs = power4_enable_pmcs;
  293. }
  294. static int __init pSeries_init_panel(void)
  295. {
  296. /* Manually leave the kernel version on the panel. */
  297. ppc_md.progress("Linux ppc64\n", 0);
  298. ppc_md.progress(init_utsname()->version, 0);
  299. return 0;
  300. }
  301. arch_initcall(pSeries_init_panel);
  302. static void pSeries_mach_cpu_die(void)
  303. {
  304. local_irq_disable();
  305. idle_task_exit();
  306. xics_teardown_cpu(0);
  307. rtas_stop_self();
  308. /* Should never get here... */
  309. BUG();
  310. for(;;);
  311. }
  312. static int pseries_set_dabr(unsigned long dabr)
  313. {
  314. return plpar_hcall_norets(H_SET_DABR, dabr);
  315. }
  316. static int pseries_set_xdabr(unsigned long dabr)
  317. {
  318. /* We want to catch accesses from kernel and userspace */
  319. return plpar_hcall_norets(H_SET_XDABR, dabr,
  320. H_DABRX_KERNEL | H_DABRX_USER);
  321. }
  322. /*
  323. * Early initialization. Relocation is on but do not reference unbolted pages
  324. */
  325. static void __init pSeries_init_early(void)
  326. {
  327. DBG(" -> pSeries_init_early()\n");
  328. fw_feature_init();
  329. if (firmware_has_feature(FW_FEATURE_LPAR))
  330. find_udbg_vterm();
  331. if (firmware_has_feature(FW_FEATURE_DABR))
  332. ppc_md.set_dabr = pseries_set_dabr;
  333. else if (firmware_has_feature(FW_FEATURE_XDABR))
  334. ppc_md.set_dabr = pseries_set_xdabr;
  335. iommu_init_early_pSeries();
  336. DBG(" <- pSeries_init_early()\n");
  337. }
  338. static int pSeries_check_legacy_ioport(unsigned int baseport)
  339. {
  340. struct device_node *np;
  341. #define I8042_DATA_REG 0x60
  342. #define FDC_BASE 0x3f0
  343. switch(baseport) {
  344. case I8042_DATA_REG:
  345. np = of_find_node_by_type(NULL, "8042");
  346. if (np == NULL)
  347. return -ENODEV;
  348. of_node_put(np);
  349. break;
  350. case FDC_BASE:
  351. np = of_find_node_by_type(NULL, "fdc");
  352. if (np == NULL)
  353. return -ENODEV;
  354. of_node_put(np);
  355. break;
  356. }
  357. return 0;
  358. }
  359. /*
  360. * Called very early, MMU is off, device-tree isn't unflattened
  361. */
  362. static int __init pSeries_probe_hypertas(unsigned long node,
  363. const char *uname, int depth,
  364. void *data)
  365. {
  366. if (depth != 1 ||
  367. (strcmp(uname, "rtas") != 0 && strcmp(uname, "rtas@0") != 0))
  368. return 0;
  369. if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL)
  370. powerpc_firmware_features |= FW_FEATURE_LPAR;
  371. if (firmware_has_feature(FW_FEATURE_LPAR))
  372. hpte_init_lpar();
  373. else
  374. hpte_init_native();
  375. return 1;
  376. }
  377. static int __init pSeries_probe(void)
  378. {
  379. unsigned long root = of_get_flat_dt_root();
  380. char *dtype = of_get_flat_dt_prop(of_get_flat_dt_root(),
  381. "device_type", NULL);
  382. if (dtype == NULL)
  383. return 0;
  384. if (strcmp(dtype, "chrp"))
  385. return 0;
  386. /* Cell blades firmware claims to be chrp while it's not. Until this
  387. * is fixed, we need to avoid those here.
  388. */
  389. if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") ||
  390. of_flat_dt_is_compatible(root, "IBM,CBEA"))
  391. return 0;
  392. DBG("pSeries detected, looking for LPAR capability...\n");
  393. /* Now try to figure out if we are running on LPAR */
  394. of_scan_flat_dt(pSeries_probe_hypertas, NULL);
  395. DBG("Machine is%s LPAR !\n",
  396. (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
  397. return 1;
  398. }
  399. DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
  400. static void pseries_dedicated_idle_sleep(void)
  401. {
  402. unsigned int cpu = smp_processor_id();
  403. unsigned long start_snooze;
  404. /*
  405. * Indicate to the HV that we are idle. Now would be
  406. * a good time to find other work to dispatch.
  407. */
  408. get_lppaca()->idle = 1;
  409. /*
  410. * We come in with interrupts disabled, and need_resched()
  411. * has been checked recently. If we should poll for a little
  412. * while, do so.
  413. */
  414. if (__get_cpu_var(smt_snooze_delay)) {
  415. start_snooze = get_tb() +
  416. __get_cpu_var(smt_snooze_delay) * tb_ticks_per_usec;
  417. local_irq_enable();
  418. set_thread_flag(TIF_POLLING_NRFLAG);
  419. while (get_tb() < start_snooze) {
  420. if (need_resched() || cpu_is_offline(cpu))
  421. goto out;
  422. ppc64_runlatch_off();
  423. HMT_low();
  424. HMT_very_low();
  425. }
  426. HMT_medium();
  427. clear_thread_flag(TIF_POLLING_NRFLAG);
  428. smp_mb();
  429. local_irq_disable();
  430. if (need_resched() || cpu_is_offline(cpu))
  431. goto out;
  432. }
  433. cede_processor();
  434. out:
  435. HMT_medium();
  436. get_lppaca()->idle = 0;
  437. }
  438. static void pseries_shared_idle_sleep(void)
  439. {
  440. /*
  441. * Indicate to the HV that we are idle. Now would be
  442. * a good time to find other work to dispatch.
  443. */
  444. get_lppaca()->idle = 1;
  445. /*
  446. * Yield the processor to the hypervisor. We return if
  447. * an external interrupt occurs (which are driven prior
  448. * to returning here) or if a prod occurs from another
  449. * processor. When returning here, external interrupts
  450. * are enabled.
  451. */
  452. cede_processor();
  453. get_lppaca()->idle = 0;
  454. }
  455. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  456. {
  457. if (firmware_has_feature(FW_FEATURE_LPAR))
  458. return PCI_PROBE_DEVTREE;
  459. return PCI_PROBE_NORMAL;
  460. }
  461. define_machine(pseries) {
  462. .name = "pSeries",
  463. .probe = pSeries_probe,
  464. .setup_arch = pSeries_setup_arch,
  465. .init_early = pSeries_init_early,
  466. .show_cpuinfo = pSeries_show_cpuinfo,
  467. .log_error = pSeries_log_error,
  468. .pcibios_fixup = pSeries_final_fixup,
  469. .pci_probe_mode = pSeries_pci_probe_mode,
  470. .irq_bus_setup = pSeries_irq_bus_setup,
  471. .restart = rtas_restart,
  472. .power_off = rtas_power_off,
  473. .halt = rtas_halt,
  474. .panic = rtas_os_term,
  475. .cpu_die = pSeries_mach_cpu_die,
  476. .get_boot_time = rtas_get_boot_time,
  477. .get_rtc_time = rtas_get_rtc_time,
  478. .set_rtc_time = rtas_set_rtc_time,
  479. .calibrate_decr = generic_calibrate_decr,
  480. .progress = rtas_progress,
  481. .check_legacy_ioport = pSeries_check_legacy_ioport,
  482. .system_reset_exception = pSeries_system_reset_exception,
  483. .machine_check_exception = pSeries_machine_check_exception,
  484. #ifdef CONFIG_KEXEC
  485. .machine_kexec = default_machine_kexec,
  486. .machine_kexec_prepare = default_machine_kexec_prepare,
  487. .machine_crash_shutdown = default_machine_crash_shutdown,
  488. #endif
  489. };