sm.c 6.6 KB

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  1. /*
  2. * System Manager driver for AT32AP CPUs
  3. *
  4. * Copyright (C) 2006 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/errno.h>
  11. #include <linux/init.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/kernel.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/random.h>
  16. #include <linux/spinlock.h>
  17. #include <asm/intc.h>
  18. #include <asm/io.h>
  19. #include <asm/irq.h>
  20. #include <asm/arch/sm.h>
  21. #include "sm.h"
  22. #define SM_EIM_IRQ_RESOURCE 1
  23. #define SM_PM_IRQ_RESOURCE 2
  24. #define SM_RTC_IRQ_RESOURCE 3
  25. #define to_eim(irqc) container_of(irqc, struct at32_sm, irqc)
  26. struct at32_sm system_manager;
  27. int __init at32_sm_init(void)
  28. {
  29. struct resource *regs;
  30. struct at32_sm *sm = &system_manager;
  31. int ret = -ENXIO;
  32. regs = platform_get_resource(&at32_sm_device, IORESOURCE_MEM, 0);
  33. if (!regs)
  34. goto fail;
  35. spin_lock_init(&sm->lock);
  36. sm->pdev = &at32_sm_device;
  37. ret = -ENOMEM;
  38. sm->regs = ioremap(regs->start, regs->end - regs->start + 1);
  39. if (!sm->regs)
  40. goto fail;
  41. return 0;
  42. fail:
  43. printk(KERN_ERR "Failed to initialize System Manager: %d\n", ret);
  44. return ret;
  45. }
  46. /*
  47. * External Interrupt Module (EIM).
  48. *
  49. * EIM gets level- or edge-triggered interrupts of either polarity
  50. * from the outside and converts it to active-high level-triggered
  51. * interrupts that the internal interrupt controller can handle. EIM
  52. * also provides masking/unmasking of interrupts, as well as
  53. * acknowledging of edge-triggered interrupts.
  54. */
  55. static irqreturn_t spurious_eim_interrupt(int irq, void *dev_id,
  56. struct pt_regs *regs)
  57. {
  58. printk(KERN_WARNING "Spurious EIM interrupt %d\n", irq);
  59. disable_irq(irq);
  60. return IRQ_NONE;
  61. }
  62. static struct irqaction eim_spurious_action = {
  63. .handler = spurious_eim_interrupt,
  64. };
  65. static irqreturn_t eim_handle_irq(int irq, void *dev_id, struct pt_regs *regs)
  66. {
  67. struct irq_controller * irqc = dev_id;
  68. struct at32_sm *sm = to_eim(irqc);
  69. unsigned long pending;
  70. /*
  71. * No need to disable interrupts globally. The interrupt
  72. * level relevant to this group must be masked all the time,
  73. * so we know that this particular EIM instance will not be
  74. * re-entered.
  75. */
  76. spin_lock(&sm->lock);
  77. pending = intc_get_pending(sm->irqc.irq_group);
  78. if (unlikely(!pending)) {
  79. printk(KERN_ERR "EIM (group %u): No interrupts pending!\n",
  80. sm->irqc.irq_group);
  81. goto unlock;
  82. }
  83. do {
  84. struct irqaction *action;
  85. unsigned int i;
  86. i = fls(pending) - 1;
  87. pending &= ~(1 << i);
  88. action = sm->action[i];
  89. /* Acknowledge the interrupt */
  90. sm_writel(sm, EIM_ICR, 1 << i);
  91. spin_unlock(&sm->lock);
  92. if (action->flags & SA_INTERRUPT)
  93. local_irq_disable();
  94. action->handler(sm->irqc.first_irq + i, action->dev_id, regs);
  95. local_irq_enable();
  96. spin_lock(&sm->lock);
  97. if (action->flags & SA_SAMPLE_RANDOM)
  98. add_interrupt_randomness(sm->irqc.first_irq + i);
  99. } while (pending);
  100. unlock:
  101. spin_unlock(&sm->lock);
  102. return IRQ_HANDLED;
  103. }
  104. static void eim_mask(struct irq_controller *irqc, unsigned int irq)
  105. {
  106. struct at32_sm *sm = to_eim(irqc);
  107. unsigned int i;
  108. i = irq - sm->irqc.first_irq;
  109. sm_writel(sm, EIM_IDR, 1 << i);
  110. }
  111. static void eim_unmask(struct irq_controller *irqc, unsigned int irq)
  112. {
  113. struct at32_sm *sm = to_eim(irqc);
  114. unsigned int i;
  115. i = irq - sm->irqc.first_irq;
  116. sm_writel(sm, EIM_IER, 1 << i);
  117. }
  118. static int eim_setup(struct irq_controller *irqc, unsigned int irq,
  119. struct irqaction *action)
  120. {
  121. struct at32_sm *sm = to_eim(irqc);
  122. sm->action[irq - sm->irqc.first_irq] = action;
  123. /* Acknowledge earlier interrupts */
  124. sm_writel(sm, EIM_ICR, (1<<(irq - sm->irqc.first_irq)));
  125. eim_unmask(irqc, irq);
  126. return 0;
  127. }
  128. static void eim_free(struct irq_controller *irqc, unsigned int irq,
  129. void *dev)
  130. {
  131. struct at32_sm *sm = to_eim(irqc);
  132. eim_mask(irqc, irq);
  133. sm->action[irq - sm->irqc.first_irq] = &eim_spurious_action;
  134. }
  135. static int eim_set_type(struct irq_controller *irqc, unsigned int irq,
  136. unsigned int type)
  137. {
  138. struct at32_sm *sm = to_eim(irqc);
  139. unsigned long flags;
  140. u32 value, pattern;
  141. spin_lock_irqsave(&sm->lock, flags);
  142. pattern = 1 << (irq - sm->irqc.first_irq);
  143. value = sm_readl(sm, EIM_MODE);
  144. if (type & IRQ_TYPE_LEVEL)
  145. value |= pattern;
  146. else
  147. value &= ~pattern;
  148. sm_writel(sm, EIM_MODE, value);
  149. value = sm_readl(sm, EIM_EDGE);
  150. if (type & IRQ_EDGE_RISING)
  151. value |= pattern;
  152. else
  153. value &= ~pattern;
  154. sm_writel(sm, EIM_EDGE, value);
  155. value = sm_readl(sm, EIM_LEVEL);
  156. if (type & IRQ_LEVEL_HIGH)
  157. value |= pattern;
  158. else
  159. value &= ~pattern;
  160. sm_writel(sm, EIM_LEVEL, value);
  161. spin_unlock_irqrestore(&sm->lock, flags);
  162. return 0;
  163. }
  164. static unsigned int eim_get_type(struct irq_controller *irqc,
  165. unsigned int irq)
  166. {
  167. struct at32_sm *sm = to_eim(irqc);
  168. unsigned long flags;
  169. unsigned int type = 0;
  170. u32 mode, edge, level, pattern;
  171. pattern = 1 << (irq - sm->irqc.first_irq);
  172. spin_lock_irqsave(&sm->lock, flags);
  173. mode = sm_readl(sm, EIM_MODE);
  174. edge = sm_readl(sm, EIM_EDGE);
  175. level = sm_readl(sm, EIM_LEVEL);
  176. spin_unlock_irqrestore(&sm->lock, flags);
  177. if (mode & pattern)
  178. type |= IRQ_TYPE_LEVEL;
  179. if (edge & pattern)
  180. type |= IRQ_EDGE_RISING;
  181. if (level & pattern)
  182. type |= IRQ_LEVEL_HIGH;
  183. return type;
  184. }
  185. static struct irq_controller_class eim_irq_class = {
  186. .typename = "EIM",
  187. .handle = eim_handle_irq,
  188. .setup = eim_setup,
  189. .free = eim_free,
  190. .mask = eim_mask,
  191. .unmask = eim_unmask,
  192. .set_type = eim_set_type,
  193. .get_type = eim_get_type,
  194. };
  195. static int __init eim_init(void)
  196. {
  197. struct at32_sm *sm = &system_manager;
  198. unsigned int i;
  199. u32 pattern;
  200. int ret;
  201. /*
  202. * The EIM is really the same module as SM, so register
  203. * mapping, etc. has been taken care of already.
  204. */
  205. /*
  206. * Find out how many interrupt lines that are actually
  207. * implemented in hardware.
  208. */
  209. sm_writel(sm, EIM_IDR, ~0UL);
  210. sm_writel(sm, EIM_MODE, ~0UL);
  211. pattern = sm_readl(sm, EIM_MODE);
  212. sm->irqc.nr_irqs = fls(pattern);
  213. ret = -ENOMEM;
  214. sm->action = kmalloc(sizeof(*sm->action) * sm->irqc.nr_irqs,
  215. GFP_KERNEL);
  216. if (!sm->action)
  217. goto out;
  218. for (i = 0; i < sm->irqc.nr_irqs; i++)
  219. sm->action[i] = &eim_spurious_action;
  220. spin_lock_init(&sm->lock);
  221. sm->irqc.irq_group = sm->pdev->resource[SM_EIM_IRQ_RESOURCE].start;
  222. sm->irqc.class = &eim_irq_class;
  223. ret = intc_register_controller(&sm->irqc);
  224. if (ret < 0)
  225. goto out_free_actions;
  226. printk("EIM: External Interrupt Module at 0x%p, IRQ group %u\n",
  227. sm->regs, sm->irqc.irq_group);
  228. printk("EIM: Handling %u external IRQs, starting with IRQ%u\n",
  229. sm->irqc.nr_irqs, sm->irqc.first_irq);
  230. return 0;
  231. out_free_actions:
  232. kfree(sm->action);
  233. out:
  234. return ret;
  235. }
  236. arch_initcall(eim_init);