devices.c 20 KB

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  1. /*
  2. * arch/arm/mach-at91rm9200/devices.c
  3. *
  4. * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
  5. * Copyright (C) 2005 David Brownell
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. */
  13. #include <asm/mach/arch.h>
  14. #include <asm/mach/map.h>
  15. #include <linux/platform_device.h>
  16. #include <asm/hardware.h>
  17. #include <asm/arch/board.h>
  18. #include <asm/arch/gpio.h>
  19. #include "generic.h"
  20. #define SZ_512 0x00000200
  21. #define SZ_256 0x00000100
  22. #define SZ_16 0x00000010
  23. /* --------------------------------------------------------------------
  24. * USB Host
  25. * -------------------------------------------------------------------- */
  26. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  27. static u64 ohci_dmamask = 0xffffffffUL;
  28. static struct at91_usbh_data usbh_data;
  29. static struct resource at91_usbh_resources[] = {
  30. [0] = {
  31. .start = AT91RM9200_UHP_BASE,
  32. .end = AT91RM9200_UHP_BASE + SZ_1M - 1,
  33. .flags = IORESOURCE_MEM,
  34. },
  35. [1] = {
  36. .start = AT91RM9200_ID_UHP,
  37. .end = AT91RM9200_ID_UHP,
  38. .flags = IORESOURCE_IRQ,
  39. },
  40. };
  41. static struct platform_device at91rm9200_usbh_device = {
  42. .name = "at91_ohci",
  43. .id = -1,
  44. .dev = {
  45. .dma_mask = &ohci_dmamask,
  46. .coherent_dma_mask = 0xffffffff,
  47. .platform_data = &usbh_data,
  48. },
  49. .resource = at91_usbh_resources,
  50. .num_resources = ARRAY_SIZE(at91_usbh_resources),
  51. };
  52. void __init at91_add_device_usbh(struct at91_usbh_data *data)
  53. {
  54. if (!data)
  55. return;
  56. usbh_data = *data;
  57. platform_device_register(&at91rm9200_usbh_device);
  58. }
  59. #else
  60. void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  61. #endif
  62. /* --------------------------------------------------------------------
  63. * USB Device (Gadget)
  64. * -------------------------------------------------------------------- */
  65. #ifdef CONFIG_USB_GADGET_AT91
  66. static struct at91_udc_data udc_data;
  67. static struct resource at91_udc_resources[] = {
  68. [0] = {
  69. .start = AT91RM9200_BASE_UDP,
  70. .end = AT91RM9200_BASE_UDP + SZ_16K - 1,
  71. .flags = IORESOURCE_MEM,
  72. },
  73. [1] = {
  74. .start = AT91RM9200_ID_UDP,
  75. .end = AT91RM9200_ID_UDP,
  76. .flags = IORESOURCE_IRQ,
  77. },
  78. };
  79. static struct platform_device at91rm9200_udc_device = {
  80. .name = "at91_udc",
  81. .id = -1,
  82. .dev = {
  83. .platform_data = &udc_data,
  84. },
  85. .resource = at91_udc_resources,
  86. .num_resources = ARRAY_SIZE(at91_udc_resources),
  87. };
  88. void __init at91_add_device_udc(struct at91_udc_data *data)
  89. {
  90. if (!data)
  91. return;
  92. if (data->vbus_pin) {
  93. at91_set_gpio_input(data->vbus_pin, 0);
  94. at91_set_deglitch(data->vbus_pin, 1);
  95. }
  96. if (data->pullup_pin)
  97. at91_set_gpio_output(data->pullup_pin, 0);
  98. udc_data = *data;
  99. platform_device_register(&at91rm9200_udc_device);
  100. }
  101. #else
  102. void __init at91_add_device_udc(struct at91_udc_data *data) {}
  103. #endif
  104. /* --------------------------------------------------------------------
  105. * Ethernet
  106. * -------------------------------------------------------------------- */
  107. #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
  108. static u64 eth_dmamask = 0xffffffffUL;
  109. static struct at91_eth_data eth_data;
  110. static struct resource at91_eth_resources[] = {
  111. [0] = {
  112. .start = AT91_VA_BASE_EMAC,
  113. .end = AT91_VA_BASE_EMAC + SZ_16K - 1,
  114. .flags = IORESOURCE_MEM,
  115. },
  116. [1] = {
  117. .start = AT91RM9200_ID_EMAC,
  118. .end = AT91RM9200_ID_EMAC,
  119. .flags = IORESOURCE_IRQ,
  120. },
  121. };
  122. static struct platform_device at91rm9200_eth_device = {
  123. .name = "at91_ether",
  124. .id = -1,
  125. .dev = {
  126. .dma_mask = &eth_dmamask,
  127. .coherent_dma_mask = 0xffffffff,
  128. .platform_data = &eth_data,
  129. },
  130. .resource = at91_eth_resources,
  131. .num_resources = ARRAY_SIZE(at91_eth_resources),
  132. };
  133. void __init at91_add_device_eth(struct at91_eth_data *data)
  134. {
  135. if (!data)
  136. return;
  137. if (data->phy_irq_pin) {
  138. at91_set_gpio_input(data->phy_irq_pin, 0);
  139. at91_set_deglitch(data->phy_irq_pin, 1);
  140. }
  141. /* Pins used for MII and RMII */
  142. at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
  143. at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
  144. at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
  145. at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
  146. at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
  147. at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
  148. at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
  149. at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
  150. at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
  151. at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
  152. if (!data->is_rmii) {
  153. at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
  154. at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
  155. at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
  156. at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
  157. at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
  158. at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
  159. at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
  160. at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
  161. }
  162. eth_data = *data;
  163. platform_device_register(&at91rm9200_eth_device);
  164. }
  165. #else
  166. void __init at91_add_device_eth(struct at91_eth_data *data) {}
  167. #endif
  168. /* --------------------------------------------------------------------
  169. * Compact Flash / PCMCIA
  170. * -------------------------------------------------------------------- */
  171. #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
  172. static struct at91_cf_data cf_data;
  173. static struct resource at91_cf_resources[] = {
  174. [0] = {
  175. .start = AT91_CF_BASE,
  176. /* ties up CS4, CS5 and CS6 */
  177. .end = AT91_CF_BASE + (0x30000000 - 1),
  178. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
  179. },
  180. };
  181. static struct platform_device at91rm9200_cf_device = {
  182. .name = "at91_cf",
  183. .id = -1,
  184. .dev = {
  185. .platform_data = &cf_data,
  186. },
  187. .resource = at91_cf_resources,
  188. .num_resources = ARRAY_SIZE(at91_cf_resources),
  189. };
  190. void __init at91_add_device_cf(struct at91_cf_data *data)
  191. {
  192. if (!data)
  193. return;
  194. /* input/irq */
  195. if (data->irq_pin) {
  196. at91_set_gpio_input(data->irq_pin, 1);
  197. at91_set_deglitch(data->irq_pin, 1);
  198. }
  199. at91_set_gpio_input(data->det_pin, 1);
  200. at91_set_deglitch(data->det_pin, 1);
  201. /* outputs, initially off */
  202. if (data->vcc_pin)
  203. at91_set_gpio_output(data->vcc_pin, 0);
  204. at91_set_gpio_output(data->rst_pin, 0);
  205. /* force poweron defaults for these pins ... */
  206. at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */
  207. at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */
  208. at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
  209. at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
  210. cf_data = *data;
  211. platform_device_register(&at91rm9200_cf_device);
  212. }
  213. #else
  214. void __init at91_add_device_cf(struct at91_cf_data *data) {}
  215. #endif
  216. /* --------------------------------------------------------------------
  217. * MMC / SD
  218. * -------------------------------------------------------------------- */
  219. #if defined(CONFIG_MMC_AT91RM9200) || defined(CONFIG_MMC_AT91RM9200_MODULE)
  220. static u64 mmc_dmamask = 0xffffffffUL;
  221. static struct at91_mmc_data mmc_data;
  222. static struct resource at91_mmc_resources[] = {
  223. [0] = {
  224. .start = AT91RM9200_BASE_MCI,
  225. .end = AT91RM9200_BASE_MCI + SZ_16K - 1,
  226. .flags = IORESOURCE_MEM,
  227. },
  228. [1] = {
  229. .start = AT91RM9200_ID_MCI,
  230. .end = AT91RM9200_ID_MCI,
  231. .flags = IORESOURCE_IRQ,
  232. },
  233. };
  234. static struct platform_device at91rm9200_mmc_device = {
  235. .name = "at91_mci",
  236. .id = -1,
  237. .dev = {
  238. .dma_mask = &mmc_dmamask,
  239. .coherent_dma_mask = 0xffffffff,
  240. .platform_data = &mmc_data,
  241. },
  242. .resource = at91_mmc_resources,
  243. .num_resources = ARRAY_SIZE(at91_mmc_resources),
  244. };
  245. void __init at91_add_device_mmc(struct at91_mmc_data *data)
  246. {
  247. if (!data)
  248. return;
  249. /* input/irq */
  250. if (data->det_pin) {
  251. at91_set_gpio_input(data->det_pin, 1);
  252. at91_set_deglitch(data->det_pin, 1);
  253. }
  254. if (data->wp_pin)
  255. at91_set_gpio_input(data->wp_pin, 1);
  256. /* CLK */
  257. at91_set_A_periph(AT91_PIN_PA27, 0);
  258. if (data->is_b) {
  259. /* CMD */
  260. at91_set_B_periph(AT91_PIN_PA8, 0);
  261. /* DAT0, maybe DAT1..DAT3 */
  262. at91_set_B_periph(AT91_PIN_PA9, 0);
  263. if (data->wire4) {
  264. at91_set_B_periph(AT91_PIN_PA10, 0);
  265. at91_set_B_periph(AT91_PIN_PA11, 0);
  266. at91_set_B_periph(AT91_PIN_PA12, 0);
  267. }
  268. } else {
  269. /* CMD */
  270. at91_set_A_periph(AT91_PIN_PA28, 0);
  271. /* DAT0, maybe DAT1..DAT3 */
  272. at91_set_A_periph(AT91_PIN_PA29, 0);
  273. if (data->wire4) {
  274. at91_set_B_periph(AT91_PIN_PB3, 0);
  275. at91_set_B_periph(AT91_PIN_PB4, 0);
  276. at91_set_B_periph(AT91_PIN_PB5, 0);
  277. }
  278. }
  279. mmc_data = *data;
  280. platform_device_register(&at91rm9200_mmc_device);
  281. }
  282. #else
  283. void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
  284. #endif
  285. /* --------------------------------------------------------------------
  286. * NAND / SmartMedia
  287. * -------------------------------------------------------------------- */
  288. #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
  289. static struct at91_nand_data nand_data;
  290. static struct resource at91_nand_resources[] = {
  291. {
  292. .start = AT91_SMARTMEDIA_BASE,
  293. .end = AT91_SMARTMEDIA_BASE + SZ_8M - 1,
  294. .flags = IORESOURCE_MEM,
  295. }
  296. };
  297. static struct platform_device at91_nand_device = {
  298. .name = "at91_nand",
  299. .id = -1,
  300. .dev = {
  301. .platform_data = &nand_data,
  302. },
  303. .resource = at91_nand_resources,
  304. .num_resources = ARRAY_SIZE(at91_nand_resources),
  305. };
  306. void __init at91_add_device_nand(struct at91_nand_data *data)
  307. {
  308. if (!data)
  309. return;
  310. /* enable pin */
  311. if (data->enable_pin)
  312. at91_set_gpio_output(data->enable_pin, 1);
  313. /* ready/busy pin */
  314. if (data->rdy_pin)
  315. at91_set_gpio_input(data->rdy_pin, 1);
  316. /* card detect pin */
  317. if (data->det_pin)
  318. at91_set_gpio_input(data->det_pin, 1);
  319. at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
  320. at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
  321. nand_data = *data;
  322. platform_device_register(&at91_nand_device);
  323. }
  324. #else
  325. void __init at91_add_device_nand(struct at91_nand_data *data) {}
  326. #endif
  327. /* --------------------------------------------------------------------
  328. * TWI (i2c)
  329. * -------------------------------------------------------------------- */
  330. #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
  331. static struct platform_device at91rm9200_twi_device = {
  332. .name = "at91_i2c",
  333. .id = -1,
  334. .num_resources = 0,
  335. };
  336. void __init at91_add_device_i2c(void)
  337. {
  338. /* pins used for TWI interface */
  339. at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
  340. at91_set_multi_drive(AT91_PIN_PA25, 1);
  341. at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
  342. at91_set_multi_drive(AT91_PIN_PA26, 1);
  343. platform_device_register(&at91rm9200_twi_device);
  344. }
  345. #else
  346. void __init at91_add_device_i2c(void) {}
  347. #endif
  348. /* --------------------------------------------------------------------
  349. * SPI
  350. * -------------------------------------------------------------------- */
  351. #if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
  352. static u64 spi_dmamask = 0xffffffffUL;
  353. static struct resource at91_spi_resources[] = {
  354. [0] = {
  355. .start = AT91RM9200_BASE_SPI,
  356. .end = AT91RM9200_BASE_SPI + SZ_16K - 1,
  357. .flags = IORESOURCE_MEM,
  358. },
  359. [1] = {
  360. .start = AT91RM9200_ID_SPI,
  361. .end = AT91RM9200_ID_SPI,
  362. .flags = IORESOURCE_IRQ,
  363. },
  364. };
  365. static struct platform_device at91rm9200_spi_device = {
  366. .name = "at91_spi",
  367. .id = 0,
  368. .dev = {
  369. .dma_mask = &spi_dmamask,
  370. .coherent_dma_mask = 0xffffffff,
  371. },
  372. .resource = at91_spi_resources,
  373. .num_resources = ARRAY_SIZE(at91_spi_resources),
  374. };
  375. static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
  376. void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
  377. {
  378. int i;
  379. unsigned long cs_pin;
  380. at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */
  381. at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */
  382. at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */
  383. /* Enable SPI chip-selects */
  384. for (i = 0; i < nr_devices; i++) {
  385. if (devices[i].controller_data)
  386. cs_pin = (unsigned long) devices[i].controller_data;
  387. else
  388. cs_pin = at91_spi_standard_cs[devices[i].chip_select];
  389. #ifdef CONFIG_SPI_AT91_MANUAL_CS
  390. at91_set_gpio_output(cs_pin, 1);
  391. #else
  392. at91_set_A_periph(cs_pin, 0);
  393. #endif
  394. /* pass chip-select pin to driver */
  395. devices[i].controller_data = (void *) cs_pin;
  396. }
  397. spi_register_board_info(devices, nr_devices);
  398. at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi");
  399. platform_device_register(&at91rm9200_spi_device);
  400. }
  401. #else
  402. void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
  403. #endif
  404. /* --------------------------------------------------------------------
  405. * RTC
  406. * -------------------------------------------------------------------- */
  407. #if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE)
  408. static struct platform_device at91rm9200_rtc_device = {
  409. .name = "at91_rtc",
  410. .id = -1,
  411. .num_resources = 0,
  412. };
  413. static void __init at91_add_device_rtc(void)
  414. {
  415. platform_device_register(&at91rm9200_rtc_device);
  416. }
  417. #else
  418. static void __init at91_add_device_rtc(void) {}
  419. #endif
  420. /* --------------------------------------------------------------------
  421. * Watchdog
  422. * -------------------------------------------------------------------- */
  423. #if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE)
  424. static struct platform_device at91rm9200_wdt_device = {
  425. .name = "at91_wdt",
  426. .id = -1,
  427. .num_resources = 0,
  428. };
  429. static void __init at91_add_device_watchdog(void)
  430. {
  431. platform_device_register(&at91rm9200_wdt_device);
  432. }
  433. #else
  434. static void __init at91_add_device_watchdog(void) {}
  435. #endif
  436. /* --------------------------------------------------------------------
  437. * LEDs
  438. * -------------------------------------------------------------------- */
  439. #if defined(CONFIG_LEDS)
  440. u8 at91_leds_cpu;
  441. u8 at91_leds_timer;
  442. void __init at91_init_leds(u8 cpu_led, u8 timer_led)
  443. {
  444. at91_leds_cpu = cpu_led;
  445. at91_leds_timer = timer_led;
  446. }
  447. #else
  448. void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
  449. #endif
  450. /* --------------------------------------------------------------------
  451. * UART
  452. * -------------------------------------------------------------------- */
  453. #if defined(CONFIG_SERIAL_ATMEL)
  454. static struct resource dbgu_resources[] = {
  455. [0] = {
  456. .start = AT91_VA_BASE_SYS + AT91_DBGU,
  457. .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
  458. .flags = IORESOURCE_MEM,
  459. },
  460. [1] = {
  461. .start = AT91_ID_SYS,
  462. .end = AT91_ID_SYS,
  463. .flags = IORESOURCE_IRQ,
  464. },
  465. };
  466. static struct atmel_uart_data dbgu_data = {
  467. .use_dma_tx = 0,
  468. .use_dma_rx = 0, /* DBGU not capable of receive DMA */
  469. .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
  470. };
  471. static struct platform_device at91rm9200_dbgu_device = {
  472. .name = "atmel_usart",
  473. .id = 0,
  474. .dev = {
  475. .platform_data = &dbgu_data,
  476. .coherent_dma_mask = 0xffffffff,
  477. },
  478. .resource = dbgu_resources,
  479. .num_resources = ARRAY_SIZE(dbgu_resources),
  480. };
  481. static inline void configure_dbgu_pins(void)
  482. {
  483. at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */
  484. at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */
  485. }
  486. static struct resource uart0_resources[] = {
  487. [0] = {
  488. .start = AT91RM9200_BASE_US0,
  489. .end = AT91RM9200_BASE_US0 + SZ_16K - 1,
  490. .flags = IORESOURCE_MEM,
  491. },
  492. [1] = {
  493. .start = AT91RM9200_ID_US0,
  494. .end = AT91RM9200_ID_US0,
  495. .flags = IORESOURCE_IRQ,
  496. },
  497. };
  498. static struct atmel_uart_data uart0_data = {
  499. .use_dma_tx = 1,
  500. .use_dma_rx = 1,
  501. };
  502. static struct platform_device at91rm9200_uart0_device = {
  503. .name = "atmel_usart",
  504. .id = 1,
  505. .dev = {
  506. .platform_data = &uart0_data,
  507. .coherent_dma_mask = 0xffffffff,
  508. },
  509. .resource = uart0_resources,
  510. .num_resources = ARRAY_SIZE(uart0_resources),
  511. };
  512. static inline void configure_usart0_pins(void)
  513. {
  514. at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */
  515. at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */
  516. at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */
  517. /*
  518. * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
  519. * We need to drive the pin manually. Default is off (RTS is active low).
  520. */
  521. at91_set_gpio_output(AT91_PIN_PA21, 1);
  522. }
  523. static struct resource uart1_resources[] = {
  524. [0] = {
  525. .start = AT91RM9200_BASE_US1,
  526. .end = AT91RM9200_BASE_US1 + SZ_16K - 1,
  527. .flags = IORESOURCE_MEM,
  528. },
  529. [1] = {
  530. .start = AT91RM9200_ID_US1,
  531. .end = AT91RM9200_ID_US1,
  532. .flags = IORESOURCE_IRQ,
  533. },
  534. };
  535. static struct atmel_uart_data uart1_data = {
  536. .use_dma_tx = 1,
  537. .use_dma_rx = 1,
  538. };
  539. static struct platform_device at91rm9200_uart1_device = {
  540. .name = "atmel_usart",
  541. .id = 2,
  542. .dev = {
  543. .platform_data = &uart1_data,
  544. .coherent_dma_mask = 0xffffffff,
  545. },
  546. .resource = uart1_resources,
  547. .num_resources = ARRAY_SIZE(uart1_resources),
  548. };
  549. static inline void configure_usart1_pins(void)
  550. {
  551. at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */
  552. at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */
  553. at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */
  554. at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */
  555. at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */
  556. at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */
  557. at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */
  558. at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */
  559. }
  560. static struct resource uart2_resources[] = {
  561. [0] = {
  562. .start = AT91RM9200_BASE_US2,
  563. .end = AT91RM9200_BASE_US2 + SZ_16K - 1,
  564. .flags = IORESOURCE_MEM,
  565. },
  566. [1] = {
  567. .start = AT91RM9200_ID_US2,
  568. .end = AT91RM9200_ID_US2,
  569. .flags = IORESOURCE_IRQ,
  570. },
  571. };
  572. static struct atmel_uart_data uart2_data = {
  573. .use_dma_tx = 1,
  574. .use_dma_rx = 1,
  575. };
  576. static struct platform_device at91rm9200_uart2_device = {
  577. .name = "atmel_usart",
  578. .id = 3,
  579. .dev = {
  580. .platform_data = &uart2_data,
  581. .coherent_dma_mask = 0xffffffff,
  582. },
  583. .resource = uart2_resources,
  584. .num_resources = ARRAY_SIZE(uart2_resources),
  585. };
  586. static inline void configure_usart2_pins(void)
  587. {
  588. at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */
  589. at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */
  590. }
  591. static struct resource uart3_resources[] = {
  592. [0] = {
  593. .start = AT91RM9200_BASE_US3,
  594. .end = AT91RM9200_BASE_US3 + SZ_16K - 1,
  595. .flags = IORESOURCE_MEM,
  596. },
  597. [1] = {
  598. .start = AT91RM9200_ID_US3,
  599. .end = AT91RM9200_ID_US3,
  600. .flags = IORESOURCE_IRQ,
  601. },
  602. };
  603. static struct atmel_uart_data uart3_data = {
  604. .use_dma_tx = 1,
  605. .use_dma_rx = 1,
  606. };
  607. static struct platform_device at91rm9200_uart3_device = {
  608. .name = "atmel_usart",
  609. .id = 4,
  610. .dev = {
  611. .platform_data = &uart3_data,
  612. .coherent_dma_mask = 0xffffffff,
  613. },
  614. .resource = uart3_resources,
  615. .num_resources = ARRAY_SIZE(uart3_resources),
  616. };
  617. static inline void configure_usart3_pins(void)
  618. {
  619. at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
  620. at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
  621. }
  622. struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
  623. struct platform_device *atmel_default_console_device; /* the serial console device */
  624. void __init at91_init_serial(struct at91_uart_config *config)
  625. {
  626. int i;
  627. /* Fill in list of supported UARTs */
  628. for (i = 0; i < config->nr_tty; i++) {
  629. switch (config->tty_map[i]) {
  630. case 0:
  631. configure_usart0_pins();
  632. at91_uarts[i] = &at91rm9200_uart0_device;
  633. at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
  634. break;
  635. case 1:
  636. configure_usart1_pins();
  637. at91_uarts[i] = &at91rm9200_uart1_device;
  638. at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
  639. break;
  640. case 2:
  641. configure_usart2_pins();
  642. at91_uarts[i] = &at91rm9200_uart2_device;
  643. at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
  644. break;
  645. case 3:
  646. configure_usart3_pins();
  647. at91_uarts[i] = &at91rm9200_uart3_device;
  648. at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
  649. break;
  650. case 4:
  651. configure_dbgu_pins();
  652. at91_uarts[i] = &at91rm9200_dbgu_device;
  653. at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart");
  654. break;
  655. default:
  656. continue;
  657. }
  658. at91_uarts[i]->id = i; /* update ID number to mapped ID */
  659. }
  660. /* Set serial console device */
  661. if (config->console_tty < ATMEL_MAX_UART)
  662. atmel_default_console_device = at91_uarts[config->console_tty];
  663. if (!atmel_default_console_device)
  664. printk(KERN_INFO "AT91: No default serial console defined.\n");
  665. }
  666. void __init at91_add_device_serial(void)
  667. {
  668. int i;
  669. for (i = 0; i < ATMEL_MAX_UART; i++) {
  670. if (at91_uarts[i])
  671. platform_device_register(at91_uarts[i]);
  672. }
  673. }
  674. #else
  675. void __init at91_init_serial(struct at91_uart_config *config) {}
  676. void __init at91_add_device_serial(void) {}
  677. #endif
  678. /* -------------------------------------------------------------------- */
  679. /*
  680. * These devices are always present and don't need any board-specific
  681. * setup.
  682. */
  683. static int __init at91_add_standard_devices(void)
  684. {
  685. at91_add_device_rtc();
  686. at91_add_device_watchdog();
  687. return 0;
  688. }
  689. arch_initcall(at91_add_standard_devices);