be_main.c 51 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include <asm/div64.h>
  19. MODULE_VERSION(DRV_VER);
  20. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  21. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  22. MODULE_AUTHOR("ServerEngines Corporation");
  23. MODULE_LICENSE("GPL");
  24. static unsigned int rx_frag_size = 2048;
  25. module_param(rx_frag_size, uint, S_IRUGO);
  26. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  27. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  28. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  29. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  31. { 0 }
  32. };
  33. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  34. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  35. {
  36. struct be_dma_mem *mem = &q->dma_mem;
  37. if (mem->va)
  38. pci_free_consistent(adapter->pdev, mem->size,
  39. mem->va, mem->dma);
  40. }
  41. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  42. u16 len, u16 entry_size)
  43. {
  44. struct be_dma_mem *mem = &q->dma_mem;
  45. memset(q, 0, sizeof(*q));
  46. q->len = len;
  47. q->entry_size = entry_size;
  48. mem->size = len * entry_size;
  49. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  50. if (!mem->va)
  51. return -1;
  52. memset(mem->va, 0, mem->size);
  53. return 0;
  54. }
  55. static void be_intr_set(struct be_ctrl_info *ctrl, bool enable)
  56. {
  57. u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  58. u32 reg = ioread32(addr);
  59. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  60. if (!enabled && enable) {
  61. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  62. } else if (enabled && !enable) {
  63. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  64. } else {
  65. printk(KERN_WARNING DRV_NAME
  66. ": bad value in membar_int_ctrl reg=0x%x\n", reg);
  67. return;
  68. }
  69. iowrite32(reg, addr);
  70. }
  71. static void be_rxq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
  72. {
  73. u32 val = 0;
  74. val |= qid & DB_RQ_RING_ID_MASK;
  75. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  76. iowrite32(val, ctrl->db + DB_RQ_OFFSET);
  77. }
  78. static void be_txq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
  79. {
  80. u32 val = 0;
  81. val |= qid & DB_TXULP_RING_ID_MASK;
  82. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  83. iowrite32(val, ctrl->db + DB_TXULP1_OFFSET);
  84. }
  85. static void be_eq_notify(struct be_ctrl_info *ctrl, u16 qid,
  86. bool arm, bool clear_int, u16 num_popped)
  87. {
  88. u32 val = 0;
  89. val |= qid & DB_EQ_RING_ID_MASK;
  90. if (arm)
  91. val |= 1 << DB_EQ_REARM_SHIFT;
  92. if (clear_int)
  93. val |= 1 << DB_EQ_CLR_SHIFT;
  94. val |= 1 << DB_EQ_EVNT_SHIFT;
  95. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  96. iowrite32(val, ctrl->db + DB_EQ_OFFSET);
  97. }
  98. void be_cq_notify(struct be_ctrl_info *ctrl, u16 qid,
  99. bool arm, u16 num_popped)
  100. {
  101. u32 val = 0;
  102. val |= qid & DB_CQ_RING_ID_MASK;
  103. if (arm)
  104. val |= 1 << DB_CQ_REARM_SHIFT;
  105. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  106. iowrite32(val, ctrl->db + DB_CQ_OFFSET);
  107. }
  108. static int be_mac_addr_set(struct net_device *netdev, void *p)
  109. {
  110. struct be_adapter *adapter = netdev_priv(netdev);
  111. struct sockaddr *addr = p;
  112. int status = 0;
  113. if (netif_running(netdev)) {
  114. status = be_cmd_pmac_del(&adapter->ctrl, adapter->if_handle,
  115. adapter->pmac_id);
  116. if (status)
  117. return status;
  118. status = be_cmd_pmac_add(&adapter->ctrl, (u8 *)addr->sa_data,
  119. adapter->if_handle, &adapter->pmac_id);
  120. }
  121. if (!status)
  122. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  123. return status;
  124. }
  125. static void netdev_stats_update(struct be_adapter *adapter)
  126. {
  127. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  128. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  129. struct be_port_rxf_stats *port_stats =
  130. &rxf_stats->port[adapter->port_num];
  131. struct net_device_stats *dev_stats = &adapter->stats.net_stats;
  132. struct be_erx_stats *erx_stats = &hw_stats->erx;
  133. dev_stats->rx_packets = port_stats->rx_total_frames;
  134. dev_stats->tx_packets = port_stats->tx_unicastframes +
  135. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  136. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  137. (u64) port_stats->rx_bytes_lsd;
  138. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  139. (u64) port_stats->tx_bytes_lsd;
  140. /* bad pkts received */
  141. dev_stats->rx_errors = port_stats->rx_crc_errors +
  142. port_stats->rx_alignment_symbol_errors +
  143. port_stats->rx_in_range_errors +
  144. port_stats->rx_out_range_errors +
  145. port_stats->rx_frame_too_long +
  146. port_stats->rx_dropped_too_small +
  147. port_stats->rx_dropped_too_short +
  148. port_stats->rx_dropped_header_too_small +
  149. port_stats->rx_dropped_tcp_length +
  150. port_stats->rx_dropped_runt +
  151. port_stats->rx_tcp_checksum_errs +
  152. port_stats->rx_ip_checksum_errs +
  153. port_stats->rx_udp_checksum_errs;
  154. /* no space in linux buffers: best possible approximation */
  155. dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0];
  156. /* detailed rx errors */
  157. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  158. port_stats->rx_out_range_errors +
  159. port_stats->rx_frame_too_long;
  160. /* receive ring buffer overflow */
  161. dev_stats->rx_over_errors = 0;
  162. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  163. /* frame alignment errors */
  164. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  165. /* receiver fifo overrun */
  166. /* drops_no_pbuf is no per i/f, it's per BE card */
  167. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  168. port_stats->rx_input_fifo_overflow +
  169. rxf_stats->rx_drops_no_pbuf;
  170. /* receiver missed packetd */
  171. dev_stats->rx_missed_errors = 0;
  172. /* packet transmit problems */
  173. dev_stats->tx_errors = 0;
  174. /* no space available in linux */
  175. dev_stats->tx_dropped = 0;
  176. dev_stats->multicast = port_stats->tx_multicastframes;
  177. dev_stats->collisions = 0;
  178. /* detailed tx_errors */
  179. dev_stats->tx_aborted_errors = 0;
  180. dev_stats->tx_carrier_errors = 0;
  181. dev_stats->tx_fifo_errors = 0;
  182. dev_stats->tx_heartbeat_errors = 0;
  183. dev_stats->tx_window_errors = 0;
  184. }
  185. void be_link_status_update(void *ctxt, bool link_up)
  186. {
  187. struct be_adapter *adapter = ctxt;
  188. struct net_device *netdev = adapter->netdev;
  189. /* If link came up or went down */
  190. if (adapter->link_up != link_up) {
  191. if (link_up) {
  192. netif_start_queue(netdev);
  193. netif_carrier_on(netdev);
  194. printk(KERN_INFO "%s: Link up\n", netdev->name);
  195. } else {
  196. netif_stop_queue(netdev);
  197. netif_carrier_off(netdev);
  198. printk(KERN_INFO "%s: Link down\n", netdev->name);
  199. }
  200. adapter->link_up = link_up;
  201. }
  202. }
  203. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  204. static void be_rx_eqd_update(struct be_adapter *adapter)
  205. {
  206. struct be_ctrl_info *ctrl = &adapter->ctrl;
  207. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  208. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  209. ulong now = jiffies;
  210. u32 eqd;
  211. if (!rx_eq->enable_aic)
  212. return;
  213. /* Wrapped around */
  214. if (time_before(now, stats->rx_fps_jiffies)) {
  215. stats->rx_fps_jiffies = now;
  216. return;
  217. }
  218. /* Update once a second */
  219. if ((now - stats->rx_fps_jiffies) < HZ)
  220. return;
  221. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  222. ((now - stats->rx_fps_jiffies) / HZ);
  223. stats->rx_fps_jiffies = now;
  224. stats->be_prev_rx_frags = stats->be_rx_frags;
  225. eqd = stats->be_rx_fps / 110000;
  226. eqd = eqd << 3;
  227. if (eqd > rx_eq->max_eqd)
  228. eqd = rx_eq->max_eqd;
  229. if (eqd < rx_eq->min_eqd)
  230. eqd = rx_eq->min_eqd;
  231. if (eqd < 10)
  232. eqd = 0;
  233. if (eqd != rx_eq->cur_eqd)
  234. be_cmd_modify_eqd(ctrl, rx_eq->q.id, eqd);
  235. rx_eq->cur_eqd = eqd;
  236. }
  237. static struct net_device_stats *be_get_stats(struct net_device *dev)
  238. {
  239. struct be_adapter *adapter = netdev_priv(dev);
  240. return &adapter->stats.net_stats;
  241. }
  242. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  243. {
  244. u64 rate = bytes;
  245. do_div(rate, ticks / HZ);
  246. rate <<= 3; /* bytes/sec -> bits/sec */
  247. do_div(rate, 1000000ul); /* MB/Sec */
  248. return rate;
  249. }
  250. static void be_tx_rate_update(struct be_adapter *adapter)
  251. {
  252. struct be_drvr_stats *stats = drvr_stats(adapter);
  253. ulong now = jiffies;
  254. /* Wrapped around? */
  255. if (time_before(now, stats->be_tx_jiffies)) {
  256. stats->be_tx_jiffies = now;
  257. return;
  258. }
  259. /* Update tx rate once in two seconds */
  260. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  261. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  262. - stats->be_tx_bytes_prev,
  263. now - stats->be_tx_jiffies);
  264. stats->be_tx_jiffies = now;
  265. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  266. }
  267. }
  268. static void be_tx_stats_update(struct be_adapter *adapter,
  269. u32 wrb_cnt, u32 copied, bool stopped)
  270. {
  271. struct be_drvr_stats *stats = drvr_stats(adapter);
  272. stats->be_tx_reqs++;
  273. stats->be_tx_wrbs += wrb_cnt;
  274. stats->be_tx_bytes += copied;
  275. if (stopped)
  276. stats->be_tx_stops++;
  277. }
  278. /* Determine number of WRB entries needed to xmit data in an skb */
  279. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  280. {
  281. int cnt = (skb->len > skb->data_len);
  282. cnt += skb_shinfo(skb)->nr_frags;
  283. /* to account for hdr wrb */
  284. cnt++;
  285. if (cnt & 1) {
  286. /* add a dummy to make it an even num */
  287. cnt++;
  288. *dummy = true;
  289. } else
  290. *dummy = false;
  291. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  292. return cnt;
  293. }
  294. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  295. {
  296. wrb->frag_pa_hi = upper_32_bits(addr);
  297. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  298. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  299. }
  300. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  301. bool vlan, u32 wrb_cnt, u32 len)
  302. {
  303. memset(hdr, 0, sizeof(*hdr));
  304. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  305. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  306. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  307. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  308. hdr, skb_shinfo(skb)->gso_size);
  309. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  310. if (is_tcp_pkt(skb))
  311. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  312. else if (is_udp_pkt(skb))
  313. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  314. }
  315. if (vlan && vlan_tx_tag_present(skb)) {
  316. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  317. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  318. hdr, vlan_tx_tag_get(skb));
  319. }
  320. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  321. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  322. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  323. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  324. }
  325. static int make_tx_wrbs(struct be_adapter *adapter,
  326. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  327. {
  328. u64 busaddr;
  329. u32 i, copied = 0;
  330. struct pci_dev *pdev = adapter->pdev;
  331. struct sk_buff *first_skb = skb;
  332. struct be_queue_info *txq = &adapter->tx_obj.q;
  333. struct be_eth_wrb *wrb;
  334. struct be_eth_hdr_wrb *hdr;
  335. atomic_add(wrb_cnt, &txq->used);
  336. hdr = queue_head_node(txq);
  337. queue_head_inc(txq);
  338. if (skb->len > skb->data_len) {
  339. int len = skb->len - skb->data_len;
  340. busaddr = pci_map_single(pdev, skb->data, len,
  341. PCI_DMA_TODEVICE);
  342. wrb = queue_head_node(txq);
  343. wrb_fill(wrb, busaddr, len);
  344. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  345. queue_head_inc(txq);
  346. copied += len;
  347. }
  348. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  349. struct skb_frag_struct *frag =
  350. &skb_shinfo(skb)->frags[i];
  351. busaddr = pci_map_page(pdev, frag->page,
  352. frag->page_offset,
  353. frag->size, PCI_DMA_TODEVICE);
  354. wrb = queue_head_node(txq);
  355. wrb_fill(wrb, busaddr, frag->size);
  356. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  357. queue_head_inc(txq);
  358. copied += frag->size;
  359. }
  360. if (dummy_wrb) {
  361. wrb = queue_head_node(txq);
  362. wrb_fill(wrb, 0, 0);
  363. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  364. queue_head_inc(txq);
  365. }
  366. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  367. wrb_cnt, copied);
  368. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  369. return copied;
  370. }
  371. static int be_xmit(struct sk_buff *skb, struct net_device *netdev)
  372. {
  373. struct be_adapter *adapter = netdev_priv(netdev);
  374. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  375. struct be_queue_info *txq = &tx_obj->q;
  376. u32 wrb_cnt = 0, copied = 0;
  377. u32 start = txq->head;
  378. bool dummy_wrb, stopped = false;
  379. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  380. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  381. /* record the sent skb in the sent_skb table */
  382. BUG_ON(tx_obj->sent_skb_list[start]);
  383. tx_obj->sent_skb_list[start] = skb;
  384. /* Ensure that txq has space for the next skb; Else stop the queue
  385. * *BEFORE* ringing the tx doorbell, so that we serialze the
  386. * tx compls of the current transmit which'll wake up the queue
  387. */
  388. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= txq->len) {
  389. netif_stop_queue(netdev);
  390. stopped = true;
  391. }
  392. be_txq_notify(&adapter->ctrl, txq->id, wrb_cnt);
  393. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  394. return NETDEV_TX_OK;
  395. }
  396. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  397. {
  398. struct be_adapter *adapter = netdev_priv(netdev);
  399. if (new_mtu < BE_MIN_MTU ||
  400. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  401. dev_info(&adapter->pdev->dev,
  402. "MTU must be between %d and %d bytes\n",
  403. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  404. return -EINVAL;
  405. }
  406. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  407. netdev->mtu, new_mtu);
  408. netdev->mtu = new_mtu;
  409. return 0;
  410. }
  411. /*
  412. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  413. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  414. * set the BE in promiscuous VLAN mode.
  415. */
  416. static void be_vid_config(struct net_device *netdev)
  417. {
  418. struct be_adapter *adapter = netdev_priv(netdev);
  419. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  420. u16 ntags = 0, i;
  421. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  422. /* Construct VLAN Table to give to HW */
  423. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  424. if (adapter->vlan_tag[i]) {
  425. vtag[ntags] = cpu_to_le16(i);
  426. ntags++;
  427. }
  428. }
  429. be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
  430. vtag, ntags, 1, 0);
  431. } else {
  432. be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
  433. NULL, 0, 1, 1);
  434. }
  435. }
  436. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  437. {
  438. struct be_adapter *adapter = netdev_priv(netdev);
  439. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  440. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  441. struct be_ctrl_info *ctrl = &adapter->ctrl;
  442. be_eq_notify(ctrl, rx_eq->q.id, false, false, 0);
  443. be_eq_notify(ctrl, tx_eq->q.id, false, false, 0);
  444. adapter->vlan_grp = grp;
  445. be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
  446. be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
  447. }
  448. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  449. {
  450. struct be_adapter *adapter = netdev_priv(netdev);
  451. adapter->num_vlans++;
  452. adapter->vlan_tag[vid] = 1;
  453. be_vid_config(netdev);
  454. }
  455. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  456. {
  457. struct be_adapter *adapter = netdev_priv(netdev);
  458. adapter->num_vlans--;
  459. adapter->vlan_tag[vid] = 0;
  460. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  461. be_vid_config(netdev);
  462. }
  463. static void be_set_multicast_list(struct net_device *netdev)
  464. {
  465. struct be_adapter *adapter = netdev_priv(netdev);
  466. struct be_ctrl_info *ctrl = &adapter->ctrl;
  467. if (netdev->flags & IFF_PROMISC) {
  468. be_cmd_promiscuous_config(ctrl, adapter->port_num, 1);
  469. adapter->promiscuous = true;
  470. goto done;
  471. }
  472. /* BE was previously in promiscous mode; disable it */
  473. if (adapter->promiscuous) {
  474. adapter->promiscuous = false;
  475. be_cmd_promiscuous_config(ctrl, adapter->port_num, 0);
  476. }
  477. if (netdev->flags & IFF_ALLMULTI) {
  478. be_cmd_multicast_set(ctrl, adapter->if_handle, NULL, 0);
  479. goto done;
  480. }
  481. be_cmd_multicast_set(ctrl, adapter->if_handle, netdev->mc_list,
  482. netdev->mc_count);
  483. done:
  484. return;
  485. }
  486. static void be_rx_rate_update(struct be_adapter *adapter)
  487. {
  488. struct be_drvr_stats *stats = drvr_stats(adapter);
  489. ulong now = jiffies;
  490. /* Wrapped around */
  491. if (time_before(now, stats->be_rx_jiffies)) {
  492. stats->be_rx_jiffies = now;
  493. return;
  494. }
  495. /* Update the rate once in two seconds */
  496. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  497. return;
  498. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  499. - stats->be_rx_bytes_prev,
  500. now - stats->be_rx_jiffies);
  501. stats->be_rx_jiffies = now;
  502. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  503. }
  504. static void be_rx_stats_update(struct be_adapter *adapter,
  505. u32 pktsize, u16 numfrags)
  506. {
  507. struct be_drvr_stats *stats = drvr_stats(adapter);
  508. stats->be_rx_compl++;
  509. stats->be_rx_frags += numfrags;
  510. stats->be_rx_bytes += pktsize;
  511. }
  512. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  513. {
  514. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  515. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  516. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  517. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  518. if (ip_version) {
  519. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  520. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  521. }
  522. ipv6_chk = (ip_version && (tcpf || udpf));
  523. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  524. }
  525. static struct be_rx_page_info *
  526. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  527. {
  528. struct be_rx_page_info *rx_page_info;
  529. struct be_queue_info *rxq = &adapter->rx_obj.q;
  530. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  531. BUG_ON(!rx_page_info->page);
  532. if (rx_page_info->last_page_user)
  533. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  534. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  535. atomic_dec(&rxq->used);
  536. return rx_page_info;
  537. }
  538. /* Throwaway the data in the Rx completion */
  539. static void be_rx_compl_discard(struct be_adapter *adapter,
  540. struct be_eth_rx_compl *rxcp)
  541. {
  542. struct be_queue_info *rxq = &adapter->rx_obj.q;
  543. struct be_rx_page_info *page_info;
  544. u16 rxq_idx, i, num_rcvd;
  545. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  546. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  547. for (i = 0; i < num_rcvd; i++) {
  548. page_info = get_rx_page_info(adapter, rxq_idx);
  549. put_page(page_info->page);
  550. memset(page_info, 0, sizeof(*page_info));
  551. index_inc(&rxq_idx, rxq->len);
  552. }
  553. }
  554. /*
  555. * skb_fill_rx_data forms a complete skb for an ether frame
  556. * indicated by rxcp.
  557. */
  558. static void skb_fill_rx_data(struct be_adapter *adapter,
  559. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  560. {
  561. struct be_queue_info *rxq = &adapter->rx_obj.q;
  562. struct be_rx_page_info *page_info;
  563. u16 rxq_idx, i, num_rcvd, j;
  564. u32 pktsize, hdr_len, curr_frag_len, size;
  565. u8 *start;
  566. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  567. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  568. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  569. page_info = get_rx_page_info(adapter, rxq_idx);
  570. start = page_address(page_info->page) + page_info->page_offset;
  571. prefetch(start);
  572. /* Copy data in the first descriptor of this completion */
  573. curr_frag_len = min(pktsize, rx_frag_size);
  574. /* Copy the header portion into skb_data */
  575. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  576. memcpy(skb->data, start, hdr_len);
  577. skb->len = curr_frag_len;
  578. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  579. /* Complete packet has now been moved to data */
  580. put_page(page_info->page);
  581. skb->data_len = 0;
  582. skb->tail += curr_frag_len;
  583. } else {
  584. skb_shinfo(skb)->nr_frags = 1;
  585. skb_shinfo(skb)->frags[0].page = page_info->page;
  586. skb_shinfo(skb)->frags[0].page_offset =
  587. page_info->page_offset + hdr_len;
  588. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  589. skb->data_len = curr_frag_len - hdr_len;
  590. skb->tail += hdr_len;
  591. }
  592. memset(page_info, 0, sizeof(*page_info));
  593. if (pktsize <= rx_frag_size) {
  594. BUG_ON(num_rcvd != 1);
  595. goto done;
  596. }
  597. /* More frags present for this completion */
  598. size = pktsize;
  599. for (i = 1, j = 0; i < num_rcvd; i++) {
  600. size -= curr_frag_len;
  601. index_inc(&rxq_idx, rxq->len);
  602. page_info = get_rx_page_info(adapter, rxq_idx);
  603. curr_frag_len = min(size, rx_frag_size);
  604. /* Coalesce all frags from the same physical page in one slot */
  605. if (page_info->page_offset == 0) {
  606. /* Fresh page */
  607. j++;
  608. skb_shinfo(skb)->frags[j].page = page_info->page;
  609. skb_shinfo(skb)->frags[j].page_offset =
  610. page_info->page_offset;
  611. skb_shinfo(skb)->frags[j].size = 0;
  612. skb_shinfo(skb)->nr_frags++;
  613. } else {
  614. put_page(page_info->page);
  615. }
  616. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  617. skb->len += curr_frag_len;
  618. skb->data_len += curr_frag_len;
  619. memset(page_info, 0, sizeof(*page_info));
  620. }
  621. BUG_ON(j > MAX_SKB_FRAGS);
  622. done:
  623. be_rx_stats_update(adapter, pktsize, num_rcvd);
  624. return;
  625. }
  626. /* Process the RX completion indicated by rxcp when GRO is disabled */
  627. static void be_rx_compl_process(struct be_adapter *adapter,
  628. struct be_eth_rx_compl *rxcp)
  629. {
  630. struct sk_buff *skb;
  631. u32 vtp, vid;
  632. vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  633. skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
  634. if (!skb) {
  635. if (net_ratelimit())
  636. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  637. be_rx_compl_discard(adapter, rxcp);
  638. return;
  639. }
  640. skb_reserve(skb, NET_IP_ALIGN);
  641. skb_fill_rx_data(adapter, skb, rxcp);
  642. if (do_pkt_csum(rxcp, adapter->rx_csum))
  643. skb->ip_summed = CHECKSUM_NONE;
  644. else
  645. skb->ip_summed = CHECKSUM_UNNECESSARY;
  646. skb->truesize = skb->len + sizeof(struct sk_buff);
  647. skb->protocol = eth_type_trans(skb, adapter->netdev);
  648. skb->dev = adapter->netdev;
  649. if (vtp) {
  650. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  651. kfree_skb(skb);
  652. return;
  653. }
  654. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  655. vid = be16_to_cpu(vid);
  656. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  657. } else {
  658. netif_receive_skb(skb);
  659. }
  660. adapter->netdev->last_rx = jiffies;
  661. return;
  662. }
  663. /* Process the RX completion indicated by rxcp when GRO is enabled */
  664. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  665. struct be_eth_rx_compl *rxcp)
  666. {
  667. struct be_rx_page_info *page_info;
  668. struct sk_buff *skb = NULL;
  669. struct be_queue_info *rxq = &adapter->rx_obj.q;
  670. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  671. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  672. u16 i, rxq_idx = 0, vid, j;
  673. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  674. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  675. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  676. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  677. skb = napi_get_frags(&eq_obj->napi);
  678. if (!skb) {
  679. be_rx_compl_discard(adapter, rxcp);
  680. return;
  681. }
  682. remaining = pkt_size;
  683. for (i = 0, j = -1; i < num_rcvd; i++) {
  684. page_info = get_rx_page_info(adapter, rxq_idx);
  685. curr_frag_len = min(remaining, rx_frag_size);
  686. /* Coalesce all frags from the same physical page in one slot */
  687. if (i == 0 || page_info->page_offset == 0) {
  688. /* First frag or Fresh page */
  689. j++;
  690. skb_shinfo(skb)->frags[j].page = page_info->page;
  691. skb_shinfo(skb)->frags[j].page_offset =
  692. page_info->page_offset;
  693. skb_shinfo(skb)->frags[j].size = 0;
  694. } else {
  695. put_page(page_info->page);
  696. }
  697. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  698. remaining -= curr_frag_len;
  699. index_inc(&rxq_idx, rxq->len);
  700. memset(page_info, 0, sizeof(*page_info));
  701. }
  702. BUG_ON(j > MAX_SKB_FRAGS);
  703. skb_shinfo(skb)->nr_frags = j + 1;
  704. skb->len = pkt_size;
  705. skb->data_len = pkt_size;
  706. skb->truesize += pkt_size;
  707. skb->ip_summed = CHECKSUM_UNNECESSARY;
  708. if (likely(!vlanf)) {
  709. napi_gro_frags(&eq_obj->napi);
  710. } else {
  711. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  712. vid = be16_to_cpu(vid);
  713. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  714. return;
  715. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  716. }
  717. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  718. return;
  719. }
  720. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  721. {
  722. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  723. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  724. return NULL;
  725. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  726. queue_tail_inc(&adapter->rx_obj.cq);
  727. return rxcp;
  728. }
  729. /* To reset the valid bit, we need to reset the whole word as
  730. * when walking the queue the valid entries are little-endian
  731. * and invalid entries are host endian
  732. */
  733. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  734. {
  735. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  736. }
  737. static inline struct page *be_alloc_pages(u32 size)
  738. {
  739. gfp_t alloc_flags = GFP_ATOMIC;
  740. u32 order = get_order(size);
  741. if (order > 0)
  742. alloc_flags |= __GFP_COMP;
  743. return alloc_pages(alloc_flags, order);
  744. }
  745. /*
  746. * Allocate a page, split it to fragments of size rx_frag_size and post as
  747. * receive buffers to BE
  748. */
  749. static void be_post_rx_frags(struct be_adapter *adapter)
  750. {
  751. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  752. struct be_rx_page_info *page_info = NULL;
  753. struct be_queue_info *rxq = &adapter->rx_obj.q;
  754. struct page *pagep = NULL;
  755. struct be_eth_rx_d *rxd;
  756. u64 page_dmaaddr = 0, frag_dmaaddr;
  757. u32 posted, page_offset = 0;
  758. page_info = &page_info_tbl[rxq->head];
  759. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  760. if (!pagep) {
  761. pagep = be_alloc_pages(adapter->big_page_size);
  762. if (unlikely(!pagep)) {
  763. drvr_stats(adapter)->be_ethrx_post_fail++;
  764. break;
  765. }
  766. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  767. adapter->big_page_size,
  768. PCI_DMA_FROMDEVICE);
  769. page_info->page_offset = 0;
  770. } else {
  771. get_page(pagep);
  772. page_info->page_offset = page_offset + rx_frag_size;
  773. }
  774. page_offset = page_info->page_offset;
  775. page_info->page = pagep;
  776. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  777. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  778. rxd = queue_head_node(rxq);
  779. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  780. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  781. queue_head_inc(rxq);
  782. /* Any space left in the current big page for another frag? */
  783. if ((page_offset + rx_frag_size + rx_frag_size) >
  784. adapter->big_page_size) {
  785. pagep = NULL;
  786. page_info->last_page_user = true;
  787. }
  788. page_info = &page_info_tbl[rxq->head];
  789. }
  790. if (pagep)
  791. page_info->last_page_user = true;
  792. if (posted) {
  793. atomic_add(posted, &rxq->used);
  794. be_rxq_notify(&adapter->ctrl, rxq->id, posted);
  795. } else if (atomic_read(&rxq->used) == 0) {
  796. /* Let be_worker replenish when memory is available */
  797. adapter->rx_post_starved = true;
  798. }
  799. return;
  800. }
  801. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  802. {
  803. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  804. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  805. return NULL;
  806. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  807. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  808. queue_tail_inc(tx_cq);
  809. return txcp;
  810. }
  811. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  812. {
  813. struct be_queue_info *txq = &adapter->tx_obj.q;
  814. struct be_eth_wrb *wrb;
  815. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  816. struct sk_buff *sent_skb;
  817. u64 busaddr;
  818. u16 cur_index, num_wrbs = 0;
  819. cur_index = txq->tail;
  820. sent_skb = sent_skbs[cur_index];
  821. BUG_ON(!sent_skb);
  822. sent_skbs[cur_index] = NULL;
  823. do {
  824. cur_index = txq->tail;
  825. wrb = queue_tail_node(txq);
  826. be_dws_le_to_cpu(wrb, sizeof(*wrb));
  827. busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
  828. if (busaddr != 0) {
  829. pci_unmap_single(adapter->pdev, busaddr,
  830. wrb->frag_len, PCI_DMA_TODEVICE);
  831. }
  832. num_wrbs++;
  833. queue_tail_inc(txq);
  834. } while (cur_index != last_index);
  835. atomic_sub(num_wrbs, &txq->used);
  836. kfree_skb(sent_skb);
  837. }
  838. static void be_rx_q_clean(struct be_adapter *adapter)
  839. {
  840. struct be_rx_page_info *page_info;
  841. struct be_queue_info *rxq = &adapter->rx_obj.q;
  842. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  843. struct be_eth_rx_compl *rxcp;
  844. u16 tail;
  845. /* First cleanup pending rx completions */
  846. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  847. be_rx_compl_discard(adapter, rxcp);
  848. be_rx_compl_reset(rxcp);
  849. be_cq_notify(&adapter->ctrl, rx_cq->id, true, 1);
  850. }
  851. /* Then free posted rx buffer that were not used */
  852. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  853. for (; tail != rxq->head; index_inc(&tail, rxq->len)) {
  854. page_info = get_rx_page_info(adapter, tail);
  855. put_page(page_info->page);
  856. memset(page_info, 0, sizeof(*page_info));
  857. }
  858. BUG_ON(atomic_read(&rxq->used));
  859. }
  860. static void be_tx_q_clean(struct be_adapter *adapter)
  861. {
  862. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  863. struct sk_buff *sent_skb;
  864. struct be_queue_info *txq = &adapter->tx_obj.q;
  865. u16 last_index;
  866. bool dummy_wrb;
  867. while (atomic_read(&txq->used)) {
  868. sent_skb = sent_skbs[txq->tail];
  869. last_index = txq->tail;
  870. index_adv(&last_index,
  871. wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
  872. be_tx_compl_process(adapter, last_index);
  873. }
  874. }
  875. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  876. {
  877. struct be_queue_info *q;
  878. struct be_ctrl_info *ctrl = &adapter->ctrl;
  879. q = &ctrl->mcc_obj.q;
  880. if (q->created)
  881. be_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
  882. be_queue_free(adapter, q);
  883. q = &ctrl->mcc_obj.cq;
  884. if (q->created)
  885. be_cmd_q_destroy(ctrl, q, QTYPE_CQ);
  886. be_queue_free(adapter, q);
  887. }
  888. /* Must be called only after TX qs are created as MCC shares TX EQ */
  889. static int be_mcc_queues_create(struct be_adapter *adapter)
  890. {
  891. struct be_queue_info *q, *cq;
  892. struct be_ctrl_info *ctrl = &adapter->ctrl;
  893. /* Alloc MCC compl queue */
  894. cq = &ctrl->mcc_obj.cq;
  895. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  896. sizeof(struct be_mcc_cq_entry)))
  897. goto err;
  898. /* Ask BE to create MCC compl queue; share TX's eq */
  899. if (be_cmd_cq_create(ctrl, cq, &adapter->tx_eq.q, false, true, 0))
  900. goto mcc_cq_free;
  901. /* Alloc MCC queue */
  902. q = &ctrl->mcc_obj.q;
  903. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  904. goto mcc_cq_destroy;
  905. /* Ask BE to create MCC queue */
  906. if (be_cmd_mccq_create(ctrl, q, cq))
  907. goto mcc_q_free;
  908. return 0;
  909. mcc_q_free:
  910. be_queue_free(adapter, q);
  911. mcc_cq_destroy:
  912. be_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
  913. mcc_cq_free:
  914. be_queue_free(adapter, cq);
  915. err:
  916. return -1;
  917. }
  918. static void be_tx_queues_destroy(struct be_adapter *adapter)
  919. {
  920. struct be_queue_info *q;
  921. q = &adapter->tx_obj.q;
  922. if (q->created) {
  923. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_TXQ);
  924. /* No more tx completions can be rcvd now; clean up if there
  925. * are any pending completions or pending tx requests */
  926. be_tx_q_clean(adapter);
  927. }
  928. be_queue_free(adapter, q);
  929. q = &adapter->tx_obj.cq;
  930. if (q->created)
  931. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
  932. be_queue_free(adapter, q);
  933. q = &adapter->tx_eq.q;
  934. if (q->created)
  935. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
  936. be_queue_free(adapter, q);
  937. }
  938. static int be_tx_queues_create(struct be_adapter *adapter)
  939. {
  940. struct be_queue_info *eq, *q, *cq;
  941. adapter->tx_eq.max_eqd = 0;
  942. adapter->tx_eq.min_eqd = 0;
  943. adapter->tx_eq.cur_eqd = 96;
  944. adapter->tx_eq.enable_aic = false;
  945. /* Alloc Tx Event queue */
  946. eq = &adapter->tx_eq.q;
  947. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  948. return -1;
  949. /* Ask BE to create Tx Event queue */
  950. if (be_cmd_eq_create(&adapter->ctrl, eq, adapter->tx_eq.cur_eqd))
  951. goto tx_eq_free;
  952. /* Alloc TX eth compl queue */
  953. cq = &adapter->tx_obj.cq;
  954. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  955. sizeof(struct be_eth_tx_compl)))
  956. goto tx_eq_destroy;
  957. /* Ask BE to create Tx eth compl queue */
  958. if (be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3))
  959. goto tx_cq_free;
  960. /* Alloc TX eth queue */
  961. q = &adapter->tx_obj.q;
  962. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  963. goto tx_cq_destroy;
  964. /* Ask BE to create Tx eth queue */
  965. if (be_cmd_txq_create(&adapter->ctrl, q, cq))
  966. goto tx_q_free;
  967. return 0;
  968. tx_q_free:
  969. be_queue_free(adapter, q);
  970. tx_cq_destroy:
  971. be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
  972. tx_cq_free:
  973. be_queue_free(adapter, cq);
  974. tx_eq_destroy:
  975. be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
  976. tx_eq_free:
  977. be_queue_free(adapter, eq);
  978. return -1;
  979. }
  980. static void be_rx_queues_destroy(struct be_adapter *adapter)
  981. {
  982. struct be_queue_info *q;
  983. q = &adapter->rx_obj.q;
  984. if (q->created) {
  985. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_RXQ);
  986. be_rx_q_clean(adapter);
  987. }
  988. be_queue_free(adapter, q);
  989. q = &adapter->rx_obj.cq;
  990. if (q->created)
  991. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
  992. be_queue_free(adapter, q);
  993. q = &adapter->rx_eq.q;
  994. if (q->created)
  995. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
  996. be_queue_free(adapter, q);
  997. }
  998. static int be_rx_queues_create(struct be_adapter *adapter)
  999. {
  1000. struct be_queue_info *eq, *q, *cq;
  1001. int rc;
  1002. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1003. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1004. adapter->rx_eq.min_eqd = 0;
  1005. adapter->rx_eq.cur_eqd = 0;
  1006. adapter->rx_eq.enable_aic = true;
  1007. /* Alloc Rx Event queue */
  1008. eq = &adapter->rx_eq.q;
  1009. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1010. sizeof(struct be_eq_entry));
  1011. if (rc)
  1012. return rc;
  1013. /* Ask BE to create Rx Event queue */
  1014. rc = be_cmd_eq_create(&adapter->ctrl, eq, adapter->rx_eq.cur_eqd);
  1015. if (rc)
  1016. goto rx_eq_free;
  1017. /* Alloc RX eth compl queue */
  1018. cq = &adapter->rx_obj.cq;
  1019. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1020. sizeof(struct be_eth_rx_compl));
  1021. if (rc)
  1022. goto rx_eq_destroy;
  1023. /* Ask BE to create Rx eth compl queue */
  1024. rc = be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3);
  1025. if (rc)
  1026. goto rx_cq_free;
  1027. /* Alloc RX eth queue */
  1028. q = &adapter->rx_obj.q;
  1029. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1030. if (rc)
  1031. goto rx_cq_destroy;
  1032. /* Ask BE to create Rx eth queue */
  1033. rc = be_cmd_rxq_create(&adapter->ctrl, q, cq->id, rx_frag_size,
  1034. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1035. if (rc)
  1036. goto rx_q_free;
  1037. return 0;
  1038. rx_q_free:
  1039. be_queue_free(adapter, q);
  1040. rx_cq_destroy:
  1041. be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
  1042. rx_cq_free:
  1043. be_queue_free(adapter, cq);
  1044. rx_eq_destroy:
  1045. be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
  1046. rx_eq_free:
  1047. be_queue_free(adapter, eq);
  1048. return rc;
  1049. }
  1050. static bool event_get(struct be_eq_obj *eq_obj, u16 *rid)
  1051. {
  1052. struct be_eq_entry *entry = queue_tail_node(&eq_obj->q);
  1053. u32 evt = entry->evt;
  1054. if (!evt)
  1055. return false;
  1056. evt = le32_to_cpu(evt);
  1057. *rid = (evt >> EQ_ENTRY_RES_ID_SHIFT) & EQ_ENTRY_RES_ID_MASK;
  1058. entry->evt = 0;
  1059. queue_tail_inc(&eq_obj->q);
  1060. return true;
  1061. }
  1062. static int event_handle(struct be_ctrl_info *ctrl,
  1063. struct be_eq_obj *eq_obj)
  1064. {
  1065. u16 rid = 0, num = 0;
  1066. while (event_get(eq_obj, &rid))
  1067. num++;
  1068. /* We can see an interrupt and no event */
  1069. be_eq_notify(ctrl, eq_obj->q.id, true, true, num);
  1070. if (num)
  1071. napi_schedule(&eq_obj->napi);
  1072. return num;
  1073. }
  1074. static irqreturn_t be_intx(int irq, void *dev)
  1075. {
  1076. struct be_adapter *adapter = dev;
  1077. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1078. int isr;
  1079. isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
  1080. ctrl->pci_func * CEV_ISR_SIZE);
  1081. if (!isr)
  1082. return IRQ_NONE;
  1083. event_handle(ctrl, &adapter->tx_eq);
  1084. event_handle(ctrl, &adapter->rx_eq);
  1085. return IRQ_HANDLED;
  1086. }
  1087. static irqreturn_t be_msix_rx(int irq, void *dev)
  1088. {
  1089. struct be_adapter *adapter = dev;
  1090. event_handle(&adapter->ctrl, &adapter->rx_eq);
  1091. return IRQ_HANDLED;
  1092. }
  1093. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1094. {
  1095. struct be_adapter *adapter = dev;
  1096. event_handle(&adapter->ctrl, &adapter->tx_eq);
  1097. return IRQ_HANDLED;
  1098. }
  1099. static inline bool do_gro(struct be_adapter *adapter,
  1100. struct be_eth_rx_compl *rxcp)
  1101. {
  1102. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1103. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1104. if (err)
  1105. drvr_stats(adapter)->be_rxcp_err++;
  1106. return (tcp_frame && !err) ? true : false;
  1107. }
  1108. int be_poll_rx(struct napi_struct *napi, int budget)
  1109. {
  1110. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1111. struct be_adapter *adapter =
  1112. container_of(rx_eq, struct be_adapter, rx_eq);
  1113. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1114. struct be_eth_rx_compl *rxcp;
  1115. u32 work_done;
  1116. for (work_done = 0; work_done < budget; work_done++) {
  1117. rxcp = be_rx_compl_get(adapter);
  1118. if (!rxcp)
  1119. break;
  1120. if (do_gro(adapter, rxcp))
  1121. be_rx_compl_process_gro(adapter, rxcp);
  1122. else
  1123. be_rx_compl_process(adapter, rxcp);
  1124. be_rx_compl_reset(rxcp);
  1125. }
  1126. /* Refill the queue */
  1127. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1128. be_post_rx_frags(adapter);
  1129. /* All consumed */
  1130. if (work_done < budget) {
  1131. napi_complete(napi);
  1132. be_cq_notify(&adapter->ctrl, rx_cq->id, true, work_done);
  1133. } else {
  1134. /* More to be consumed; continue with interrupts disabled */
  1135. be_cq_notify(&adapter->ctrl, rx_cq->id, false, work_done);
  1136. }
  1137. return work_done;
  1138. }
  1139. void be_process_tx(struct be_adapter *adapter)
  1140. {
  1141. struct be_queue_info *txq = &adapter->tx_obj.q;
  1142. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1143. struct be_eth_tx_compl *txcp;
  1144. u32 num_cmpl = 0;
  1145. u16 end_idx;
  1146. while ((txcp = be_tx_compl_get(tx_cq))) {
  1147. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1148. wrb_index, txcp);
  1149. be_tx_compl_process(adapter, end_idx);
  1150. num_cmpl++;
  1151. }
  1152. if (num_cmpl) {
  1153. be_cq_notify(&adapter->ctrl, tx_cq->id, true, num_cmpl);
  1154. /* As Tx wrbs have been freed up, wake up netdev queue if
  1155. * it was stopped due to lack of tx wrbs.
  1156. */
  1157. if (netif_queue_stopped(adapter->netdev) &&
  1158. atomic_read(&txq->used) < txq->len / 2) {
  1159. netif_wake_queue(adapter->netdev);
  1160. }
  1161. drvr_stats(adapter)->be_tx_events++;
  1162. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1163. }
  1164. }
  1165. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1166. * For TX/MCC we don't honour budget; consume everything
  1167. */
  1168. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1169. {
  1170. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1171. struct be_adapter *adapter =
  1172. container_of(tx_eq, struct be_adapter, tx_eq);
  1173. napi_complete(napi);
  1174. be_process_tx(adapter);
  1175. be_process_mcc(&adapter->ctrl);
  1176. return 1;
  1177. }
  1178. static void be_worker(struct work_struct *work)
  1179. {
  1180. struct be_adapter *adapter =
  1181. container_of(work, struct be_adapter, work.work);
  1182. int status;
  1183. /* Get Stats */
  1184. status = be_cmd_get_stats(&adapter->ctrl, &adapter->stats.cmd);
  1185. if (!status)
  1186. netdev_stats_update(adapter);
  1187. /* Set EQ delay */
  1188. be_rx_eqd_update(adapter);
  1189. be_tx_rate_update(adapter);
  1190. be_rx_rate_update(adapter);
  1191. if (adapter->rx_post_starved) {
  1192. adapter->rx_post_starved = false;
  1193. be_post_rx_frags(adapter);
  1194. }
  1195. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1196. }
  1197. static void be_msix_enable(struct be_adapter *adapter)
  1198. {
  1199. int i, status;
  1200. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1201. adapter->msix_entries[i].entry = i;
  1202. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1203. BE_NUM_MSIX_VECTORS);
  1204. if (status == 0)
  1205. adapter->msix_enabled = true;
  1206. return;
  1207. }
  1208. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1209. {
  1210. return adapter->msix_entries[eq_id -
  1211. 8 * adapter->ctrl.pci_func].vector;
  1212. }
  1213. static int be_msix_register(struct be_adapter *adapter)
  1214. {
  1215. struct net_device *netdev = adapter->netdev;
  1216. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1217. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1218. int status, vec;
  1219. sprintf(tx_eq->desc, "%s-tx", netdev->name);
  1220. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1221. status = request_irq(vec, be_msix_tx_mcc, 0, tx_eq->desc, adapter);
  1222. if (status)
  1223. goto err;
  1224. sprintf(rx_eq->desc, "%s-rx", netdev->name);
  1225. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1226. status = request_irq(vec, be_msix_rx, 0, rx_eq->desc, adapter);
  1227. if (status) { /* Free TX IRQ */
  1228. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1229. free_irq(vec, adapter);
  1230. goto err;
  1231. }
  1232. return 0;
  1233. err:
  1234. dev_warn(&adapter->pdev->dev,
  1235. "MSIX Request IRQ failed - err %d\n", status);
  1236. pci_disable_msix(adapter->pdev);
  1237. adapter->msix_enabled = false;
  1238. return status;
  1239. }
  1240. static int be_irq_register(struct be_adapter *adapter)
  1241. {
  1242. struct net_device *netdev = adapter->netdev;
  1243. int status;
  1244. if (adapter->msix_enabled) {
  1245. status = be_msix_register(adapter);
  1246. if (status == 0)
  1247. goto done;
  1248. }
  1249. /* INTx */
  1250. netdev->irq = adapter->pdev->irq;
  1251. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1252. adapter);
  1253. if (status) {
  1254. dev_err(&adapter->pdev->dev,
  1255. "INTx request IRQ failed - err %d\n", status);
  1256. return status;
  1257. }
  1258. done:
  1259. adapter->isr_registered = true;
  1260. return 0;
  1261. }
  1262. static void be_irq_unregister(struct be_adapter *adapter)
  1263. {
  1264. struct net_device *netdev = adapter->netdev;
  1265. int vec;
  1266. if (!adapter->isr_registered)
  1267. return;
  1268. /* INTx */
  1269. if (!adapter->msix_enabled) {
  1270. free_irq(netdev->irq, adapter);
  1271. goto done;
  1272. }
  1273. /* MSIx */
  1274. vec = be_msix_vec_get(adapter, adapter->tx_eq.q.id);
  1275. free_irq(vec, adapter);
  1276. vec = be_msix_vec_get(adapter, adapter->rx_eq.q.id);
  1277. free_irq(vec, adapter);
  1278. done:
  1279. adapter->isr_registered = false;
  1280. return;
  1281. }
  1282. static int be_open(struct net_device *netdev)
  1283. {
  1284. struct be_adapter *adapter = netdev_priv(netdev);
  1285. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1286. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1287. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1288. bool link_up;
  1289. int status;
  1290. /* First time posting */
  1291. be_post_rx_frags(adapter);
  1292. napi_enable(&rx_eq->napi);
  1293. napi_enable(&tx_eq->napi);
  1294. be_irq_register(adapter);
  1295. be_intr_set(ctrl, true);
  1296. /* The evt queues are created in unarmed state; arm them */
  1297. be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
  1298. be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
  1299. /* Rx compl queue may be in unarmed state; rearm it */
  1300. be_cq_notify(ctrl, adapter->rx_obj.cq.id, true, 0);
  1301. status = be_cmd_link_status_query(ctrl, &link_up);
  1302. if (status)
  1303. return status;
  1304. be_link_status_update(adapter, link_up);
  1305. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1306. return 0;
  1307. }
  1308. static int be_setup(struct be_adapter *adapter)
  1309. {
  1310. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1311. struct net_device *netdev = adapter->netdev;
  1312. u32 if_flags;
  1313. int status;
  1314. if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
  1315. BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
  1316. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1317. status = be_cmd_if_create(ctrl, if_flags, netdev->dev_addr,
  1318. false/* pmac_invalid */, &adapter->if_handle,
  1319. &adapter->pmac_id);
  1320. if (status != 0)
  1321. goto do_none;
  1322. be_vid_config(netdev);
  1323. status = be_cmd_set_flow_control(ctrl, true, true);
  1324. if (status != 0)
  1325. goto if_destroy;
  1326. status = be_tx_queues_create(adapter);
  1327. if (status != 0)
  1328. goto if_destroy;
  1329. status = be_rx_queues_create(adapter);
  1330. if (status != 0)
  1331. goto tx_qs_destroy;
  1332. status = be_mcc_queues_create(adapter);
  1333. if (status != 0)
  1334. goto rx_qs_destroy;
  1335. return 0;
  1336. rx_qs_destroy:
  1337. be_rx_queues_destroy(adapter);
  1338. tx_qs_destroy:
  1339. be_tx_queues_destroy(adapter);
  1340. if_destroy:
  1341. be_cmd_if_destroy(ctrl, adapter->if_handle);
  1342. do_none:
  1343. return status;
  1344. }
  1345. static int be_clear(struct be_adapter *adapter)
  1346. {
  1347. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1348. be_rx_queues_destroy(adapter);
  1349. be_tx_queues_destroy(adapter);
  1350. be_cmd_if_destroy(ctrl, adapter->if_handle);
  1351. be_mcc_queues_destroy(adapter);
  1352. return 0;
  1353. }
  1354. static int be_close(struct net_device *netdev)
  1355. {
  1356. struct be_adapter *adapter = netdev_priv(netdev);
  1357. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1358. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1359. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1360. int vec;
  1361. cancel_delayed_work_sync(&adapter->work);
  1362. netif_stop_queue(netdev);
  1363. netif_carrier_off(netdev);
  1364. adapter->link_up = false;
  1365. be_intr_set(ctrl, false);
  1366. if (adapter->msix_enabled) {
  1367. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1368. synchronize_irq(vec);
  1369. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1370. synchronize_irq(vec);
  1371. } else {
  1372. synchronize_irq(netdev->irq);
  1373. }
  1374. be_irq_unregister(adapter);
  1375. napi_disable(&rx_eq->napi);
  1376. napi_disable(&tx_eq->napi);
  1377. return 0;
  1378. }
  1379. static struct net_device_ops be_netdev_ops = {
  1380. .ndo_open = be_open,
  1381. .ndo_stop = be_close,
  1382. .ndo_start_xmit = be_xmit,
  1383. .ndo_get_stats = be_get_stats,
  1384. .ndo_set_rx_mode = be_set_multicast_list,
  1385. .ndo_set_mac_address = be_mac_addr_set,
  1386. .ndo_change_mtu = be_change_mtu,
  1387. .ndo_validate_addr = eth_validate_addr,
  1388. .ndo_vlan_rx_register = be_vlan_register,
  1389. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1390. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1391. };
  1392. static void be_netdev_init(struct net_device *netdev)
  1393. {
  1394. struct be_adapter *adapter = netdev_priv(netdev);
  1395. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1396. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
  1397. NETIF_F_IPV6_CSUM | NETIF_F_GRO;
  1398. netdev->flags |= IFF_MULTICAST;
  1399. adapter->rx_csum = true;
  1400. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1401. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1402. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1403. BE_NAPI_WEIGHT);
  1404. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1405. BE_NAPI_WEIGHT);
  1406. netif_carrier_off(netdev);
  1407. netif_stop_queue(netdev);
  1408. }
  1409. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1410. {
  1411. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1412. if (ctrl->csr)
  1413. iounmap(ctrl->csr);
  1414. if (ctrl->db)
  1415. iounmap(ctrl->db);
  1416. if (ctrl->pcicfg)
  1417. iounmap(ctrl->pcicfg);
  1418. }
  1419. static int be_map_pci_bars(struct be_adapter *adapter)
  1420. {
  1421. u8 __iomem *addr;
  1422. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1423. pci_resource_len(adapter->pdev, 2));
  1424. if (addr == NULL)
  1425. return -ENOMEM;
  1426. adapter->ctrl.csr = addr;
  1427. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1428. 128 * 1024);
  1429. if (addr == NULL)
  1430. goto pci_map_err;
  1431. adapter->ctrl.db = addr;
  1432. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1433. pci_resource_len(adapter->pdev, 1));
  1434. if (addr == NULL)
  1435. goto pci_map_err;
  1436. adapter->ctrl.pcicfg = addr;
  1437. return 0;
  1438. pci_map_err:
  1439. be_unmap_pci_bars(adapter);
  1440. return -ENOMEM;
  1441. }
  1442. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1443. {
  1444. struct be_dma_mem *mem = &adapter->ctrl.mbox_mem_alloced;
  1445. be_unmap_pci_bars(adapter);
  1446. if (mem->va)
  1447. pci_free_consistent(adapter->pdev, mem->size,
  1448. mem->va, mem->dma);
  1449. }
  1450. /* Initialize the mbox required to send cmds to BE */
  1451. static int be_ctrl_init(struct be_adapter *adapter)
  1452. {
  1453. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1454. struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
  1455. struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
  1456. int status;
  1457. u32 val;
  1458. status = be_map_pci_bars(adapter);
  1459. if (status)
  1460. return status;
  1461. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1462. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1463. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1464. if (!mbox_mem_alloc->va) {
  1465. be_unmap_pci_bars(adapter);
  1466. return -1;
  1467. }
  1468. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1469. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1470. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1471. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1472. spin_lock_init(&ctrl->mbox_lock);
  1473. spin_lock_init(&ctrl->mcc_lock);
  1474. spin_lock_init(&ctrl->mcc_cq_lock);
  1475. ctrl->async_cb = be_link_status_update;
  1476. ctrl->adapter_ctxt = adapter;
  1477. val = ioread32(ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
  1478. ctrl->pci_func = (val >> MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT) &
  1479. MEMBAR_CTRL_INT_CTRL_PFUNC_MASK;
  1480. return 0;
  1481. }
  1482. static void be_stats_cleanup(struct be_adapter *adapter)
  1483. {
  1484. struct be_stats_obj *stats = &adapter->stats;
  1485. struct be_dma_mem *cmd = &stats->cmd;
  1486. if (cmd->va)
  1487. pci_free_consistent(adapter->pdev, cmd->size,
  1488. cmd->va, cmd->dma);
  1489. }
  1490. static int be_stats_init(struct be_adapter *adapter)
  1491. {
  1492. struct be_stats_obj *stats = &adapter->stats;
  1493. struct be_dma_mem *cmd = &stats->cmd;
  1494. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1495. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1496. if (cmd->va == NULL)
  1497. return -1;
  1498. return 0;
  1499. }
  1500. static void __devexit be_remove(struct pci_dev *pdev)
  1501. {
  1502. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1503. if (!adapter)
  1504. return;
  1505. unregister_netdev(adapter->netdev);
  1506. be_clear(adapter);
  1507. be_stats_cleanup(adapter);
  1508. be_ctrl_cleanup(adapter);
  1509. if (adapter->msix_enabled) {
  1510. pci_disable_msix(adapter->pdev);
  1511. adapter->msix_enabled = false;
  1512. }
  1513. pci_set_drvdata(pdev, NULL);
  1514. pci_release_regions(pdev);
  1515. pci_disable_device(pdev);
  1516. free_netdev(adapter->netdev);
  1517. }
  1518. static int be_hw_up(struct be_adapter *adapter)
  1519. {
  1520. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1521. int status;
  1522. status = be_cmd_POST(ctrl);
  1523. if (status)
  1524. return status;
  1525. status = be_cmd_get_fw_ver(ctrl, adapter->fw_ver);
  1526. if (status)
  1527. return status;
  1528. status = be_cmd_query_fw_cfg(ctrl, &adapter->port_num);
  1529. return status;
  1530. }
  1531. static int __devinit be_probe(struct pci_dev *pdev,
  1532. const struct pci_device_id *pdev_id)
  1533. {
  1534. int status = 0;
  1535. struct be_adapter *adapter;
  1536. struct net_device *netdev;
  1537. struct be_ctrl_info *ctrl;
  1538. u8 mac[ETH_ALEN];
  1539. status = pci_enable_device(pdev);
  1540. if (status)
  1541. goto do_none;
  1542. status = pci_request_regions(pdev, DRV_NAME);
  1543. if (status)
  1544. goto disable_dev;
  1545. pci_set_master(pdev);
  1546. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1547. if (netdev == NULL) {
  1548. status = -ENOMEM;
  1549. goto rel_reg;
  1550. }
  1551. adapter = netdev_priv(netdev);
  1552. adapter->pdev = pdev;
  1553. pci_set_drvdata(pdev, adapter);
  1554. adapter->netdev = netdev;
  1555. be_msix_enable(adapter);
  1556. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1557. if (!status) {
  1558. netdev->features |= NETIF_F_HIGHDMA;
  1559. } else {
  1560. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1561. if (status) {
  1562. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1563. goto free_netdev;
  1564. }
  1565. }
  1566. ctrl = &adapter->ctrl;
  1567. status = be_ctrl_init(adapter);
  1568. if (status)
  1569. goto free_netdev;
  1570. status = be_stats_init(adapter);
  1571. if (status)
  1572. goto ctrl_clean;
  1573. status = be_hw_up(adapter);
  1574. if (status)
  1575. goto stats_clean;
  1576. status = be_cmd_mac_addr_query(ctrl, mac, MAC_ADDRESS_TYPE_NETWORK,
  1577. true /* permanent */, 0);
  1578. if (status)
  1579. goto stats_clean;
  1580. memcpy(netdev->dev_addr, mac, ETH_ALEN);
  1581. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1582. be_netdev_init(netdev);
  1583. SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  1584. status = be_setup(adapter);
  1585. if (status)
  1586. goto stats_clean;
  1587. status = register_netdev(netdev);
  1588. if (status != 0)
  1589. goto unsetup;
  1590. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1591. return 0;
  1592. unsetup:
  1593. be_clear(adapter);
  1594. stats_clean:
  1595. be_stats_cleanup(adapter);
  1596. ctrl_clean:
  1597. be_ctrl_cleanup(adapter);
  1598. free_netdev:
  1599. free_netdev(adapter->netdev);
  1600. rel_reg:
  1601. pci_release_regions(pdev);
  1602. disable_dev:
  1603. pci_disable_device(pdev);
  1604. do_none:
  1605. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1606. return status;
  1607. }
  1608. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1609. {
  1610. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1611. struct net_device *netdev = adapter->netdev;
  1612. netif_device_detach(netdev);
  1613. if (netif_running(netdev)) {
  1614. rtnl_lock();
  1615. be_close(netdev);
  1616. be_clear(adapter);
  1617. rtnl_unlock();
  1618. }
  1619. pci_save_state(pdev);
  1620. pci_disable_device(pdev);
  1621. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1622. return 0;
  1623. }
  1624. static int be_resume(struct pci_dev *pdev)
  1625. {
  1626. int status = 0;
  1627. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1628. struct net_device *netdev = adapter->netdev;
  1629. netif_device_detach(netdev);
  1630. status = pci_enable_device(pdev);
  1631. if (status)
  1632. return status;
  1633. pci_set_power_state(pdev, 0);
  1634. pci_restore_state(pdev);
  1635. if (netif_running(netdev)) {
  1636. rtnl_lock();
  1637. be_setup(adapter);
  1638. be_open(netdev);
  1639. rtnl_unlock();
  1640. }
  1641. netif_device_attach(netdev);
  1642. return 0;
  1643. }
  1644. static struct pci_driver be_driver = {
  1645. .name = DRV_NAME,
  1646. .id_table = be_dev_ids,
  1647. .probe = be_probe,
  1648. .remove = be_remove,
  1649. .suspend = be_suspend,
  1650. .resume = be_resume
  1651. };
  1652. static int __init be_init_module(void)
  1653. {
  1654. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1655. && rx_frag_size != 2048) {
  1656. printk(KERN_WARNING DRV_NAME
  1657. " : Module param rx_frag_size must be 2048/4096/8192."
  1658. " Using 2048\n");
  1659. rx_frag_size = 2048;
  1660. }
  1661. /* Ensure rx_frag_size is aligned to chache line */
  1662. if (SKB_DATA_ALIGN(rx_frag_size) != rx_frag_size) {
  1663. printk(KERN_WARNING DRV_NAME
  1664. " : Bad module param rx_frag_size. Using 2048\n");
  1665. rx_frag_size = 2048;
  1666. }
  1667. return pci_register_driver(&be_driver);
  1668. }
  1669. module_init(be_init_module);
  1670. static void __exit be_exit_module(void)
  1671. {
  1672. pci_unregister_driver(&be_driver);
  1673. }
  1674. module_exit(be_exit_module);