mcam-core.c 46 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845
  1. /*
  2. * The Marvell camera core. This device appears in a number of settings,
  3. * so it needs platform-specific support outside of the core.
  4. *
  5. * Copyright 2011 Jonathan Corbet corbet@lwn.net
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/fs.h>
  10. #include <linux/mm.h>
  11. #include <linux/i2c.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/slab.h>
  15. #include <linux/device.h>
  16. #include <linux/wait.h>
  17. #include <linux/list.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/delay.h>
  20. #include <linux/vmalloc.h>
  21. #include <linux/io.h>
  22. #include <linux/videodev2.h>
  23. #include <media/v4l2-device.h>
  24. #include <media/v4l2-ioctl.h>
  25. #include <media/v4l2-chip-ident.h>
  26. #include <media/ov7670.h>
  27. #include <media/videobuf2-vmalloc.h>
  28. #include <media/videobuf2-dma-contig.h>
  29. #include <media/videobuf2-dma-sg.h>
  30. #include "mcam-core.h"
  31. /*
  32. * Basic frame stats - to be deleted shortly
  33. */
  34. static int frames;
  35. static int singles;
  36. static int delivered;
  37. #ifdef MCAM_MODE_VMALLOC
  38. /*
  39. * Internal DMA buffer management. Since the controller cannot do S/G I/O,
  40. * we must have physically contiguous buffers to bring frames into.
  41. * These parameters control how many buffers we use, whether we
  42. * allocate them at load time (better chance of success, but nails down
  43. * memory) or when somebody tries to use the camera (riskier), and,
  44. * for load-time allocation, how big they should be.
  45. *
  46. * The controller can cycle through three buffers. We could use
  47. * more by flipping pointers around, but it probably makes little
  48. * sense.
  49. */
  50. static int alloc_bufs_at_read;
  51. module_param(alloc_bufs_at_read, bool, 0444);
  52. MODULE_PARM_DESC(alloc_bufs_at_read,
  53. "Non-zero value causes DMA buffers to be allocated when the "
  54. "video capture device is read, rather than at module load "
  55. "time. This saves memory, but decreases the chances of "
  56. "successfully getting those buffers. This parameter is "
  57. "only used in the vmalloc buffer mode");
  58. static int n_dma_bufs = 3;
  59. module_param(n_dma_bufs, uint, 0644);
  60. MODULE_PARM_DESC(n_dma_bufs,
  61. "The number of DMA buffers to allocate. Can be either two "
  62. "(saves memory, makes timing tighter) or three.");
  63. static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */
  64. module_param(dma_buf_size, uint, 0444);
  65. MODULE_PARM_DESC(dma_buf_size,
  66. "The size of the allocated DMA buffers. If actual operating "
  67. "parameters require larger buffers, an attempt to reallocate "
  68. "will be made.");
  69. #else /* MCAM_MODE_VMALLOC */
  70. static const int alloc_bufs_at_read = 0;
  71. static const int n_dma_bufs = 3; /* Used by S/G_PARM */
  72. #endif /* MCAM_MODE_VMALLOC */
  73. static int flip;
  74. module_param(flip, bool, 0444);
  75. MODULE_PARM_DESC(flip,
  76. "If set, the sensor will be instructed to flip the image "
  77. "vertically.");
  78. static int buffer_mode = -1;
  79. module_param(buffer_mode, int, 0444);
  80. MODULE_PARM_DESC(buffer_mode,
  81. "Set the buffer mode to be used; default is to go with what "
  82. "the platform driver asks for. Set to 0 for vmalloc, 1 for "
  83. "DMA contiguous.");
  84. /*
  85. * Status flags. Always manipulated with bit operations.
  86. */
  87. #define CF_BUF0_VALID 0 /* Buffers valid - first three */
  88. #define CF_BUF1_VALID 1
  89. #define CF_BUF2_VALID 2
  90. #define CF_DMA_ACTIVE 3 /* A frame is incoming */
  91. #define CF_CONFIG_NEEDED 4 /* Must configure hardware */
  92. #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */
  93. #define CF_SG_RESTART 6 /* SG restart needed */
  94. #define sensor_call(cam, o, f, args...) \
  95. v4l2_subdev_call(cam->sensor, o, f, ##args)
  96. static struct mcam_format_struct {
  97. __u8 *desc;
  98. __u32 pixelformat;
  99. int bpp; /* Bytes per pixel */
  100. enum v4l2_mbus_pixelcode mbus_code;
  101. } mcam_formats[] = {
  102. {
  103. .desc = "YUYV 4:2:2",
  104. .pixelformat = V4L2_PIX_FMT_YUYV,
  105. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  106. .bpp = 2,
  107. },
  108. {
  109. .desc = "RGB 444",
  110. .pixelformat = V4L2_PIX_FMT_RGB444,
  111. .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE,
  112. .bpp = 2,
  113. },
  114. {
  115. .desc = "RGB 565",
  116. .pixelformat = V4L2_PIX_FMT_RGB565,
  117. .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE,
  118. .bpp = 2,
  119. },
  120. {
  121. .desc = "Raw RGB Bayer",
  122. .pixelformat = V4L2_PIX_FMT_SBGGR8,
  123. .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8,
  124. .bpp = 1
  125. },
  126. };
  127. #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
  128. static struct mcam_format_struct *mcam_find_format(u32 pixelformat)
  129. {
  130. unsigned i;
  131. for (i = 0; i < N_MCAM_FMTS; i++)
  132. if (mcam_formats[i].pixelformat == pixelformat)
  133. return mcam_formats + i;
  134. /* Not found? Then return the first format. */
  135. return mcam_formats;
  136. }
  137. /*
  138. * The default format we use until somebody says otherwise.
  139. */
  140. static const struct v4l2_pix_format mcam_def_pix_format = {
  141. .width = VGA_WIDTH,
  142. .height = VGA_HEIGHT,
  143. .pixelformat = V4L2_PIX_FMT_YUYV,
  144. .field = V4L2_FIELD_NONE,
  145. .bytesperline = VGA_WIDTH*2,
  146. .sizeimage = VGA_WIDTH*VGA_HEIGHT*2,
  147. };
  148. static const enum v4l2_mbus_pixelcode mcam_def_mbus_code =
  149. V4L2_MBUS_FMT_YUYV8_2X8;
  150. /*
  151. * The two-word DMA descriptor format used by the Armada 610 and like. There
  152. * Is a three-word format as well (set C1_DESC_3WORD) where the third
  153. * word is a pointer to the next descriptor, but we don't use it. Two-word
  154. * descriptors have to be contiguous in memory.
  155. */
  156. struct mcam_dma_desc {
  157. u32 dma_addr;
  158. u32 segment_len;
  159. };
  160. /*
  161. * Our buffer type for working with videobuf2. Note that the vb2
  162. * developers have decreed that struct vb2_buffer must be at the
  163. * beginning of this structure.
  164. */
  165. struct mcam_vb_buffer {
  166. struct vb2_buffer vb_buf;
  167. struct list_head queue;
  168. struct mcam_dma_desc *dma_desc; /* Descriptor virtual address */
  169. dma_addr_t dma_desc_pa; /* Descriptor physical address */
  170. int dma_desc_nent; /* Number of mapped descriptors */
  171. };
  172. static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb)
  173. {
  174. return container_of(vb, struct mcam_vb_buffer, vb_buf);
  175. }
  176. /*
  177. * Hand a completed buffer back to user space.
  178. */
  179. static void mcam_buffer_done(struct mcam_camera *cam, int frame,
  180. struct vb2_buffer *vbuf)
  181. {
  182. vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage;
  183. vbuf->v4l2_buf.sequence = cam->buf_seq[frame];
  184. vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage);
  185. vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE);
  186. }
  187. /*
  188. * Debugging and related.
  189. */
  190. #define cam_err(cam, fmt, arg...) \
  191. dev_err((cam)->dev, fmt, ##arg);
  192. #define cam_warn(cam, fmt, arg...) \
  193. dev_warn((cam)->dev, fmt, ##arg);
  194. #define cam_dbg(cam, fmt, arg...) \
  195. dev_dbg((cam)->dev, fmt, ##arg);
  196. /*
  197. * Flag manipulation helpers
  198. */
  199. static void mcam_reset_buffers(struct mcam_camera *cam)
  200. {
  201. int i;
  202. cam->next_buf = -1;
  203. for (i = 0; i < cam->nbufs; i++)
  204. clear_bit(i, &cam->flags);
  205. }
  206. static inline int mcam_needs_config(struct mcam_camera *cam)
  207. {
  208. return test_bit(CF_CONFIG_NEEDED, &cam->flags);
  209. }
  210. static void mcam_set_config_needed(struct mcam_camera *cam, int needed)
  211. {
  212. if (needed)
  213. set_bit(CF_CONFIG_NEEDED, &cam->flags);
  214. else
  215. clear_bit(CF_CONFIG_NEEDED, &cam->flags);
  216. }
  217. /* ------------------------------------------------------------------- */
  218. /*
  219. * Make the controller start grabbing images. Everything must
  220. * be set up before doing this.
  221. */
  222. static void mcam_ctlr_start(struct mcam_camera *cam)
  223. {
  224. /* set_bit performs a read, so no other barrier should be
  225. needed here */
  226. mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE);
  227. }
  228. static void mcam_ctlr_stop(struct mcam_camera *cam)
  229. {
  230. mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
  231. }
  232. /* ------------------------------------------------------------------- */
  233. #ifdef MCAM_MODE_VMALLOC
  234. /*
  235. * Code specific to the vmalloc buffer mode.
  236. */
  237. /*
  238. * Allocate in-kernel DMA buffers for vmalloc mode.
  239. */
  240. static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
  241. {
  242. int i;
  243. mcam_set_config_needed(cam, 1);
  244. if (loadtime)
  245. cam->dma_buf_size = dma_buf_size;
  246. else
  247. cam->dma_buf_size = cam->pix_format.sizeimage;
  248. if (n_dma_bufs > 3)
  249. n_dma_bufs = 3;
  250. cam->nbufs = 0;
  251. for (i = 0; i < n_dma_bufs; i++) {
  252. cam->dma_bufs[i] = dma_alloc_coherent(cam->dev,
  253. cam->dma_buf_size, cam->dma_handles + i,
  254. GFP_KERNEL);
  255. if (cam->dma_bufs[i] == NULL) {
  256. cam_warn(cam, "Failed to allocate DMA buffer\n");
  257. break;
  258. }
  259. (cam->nbufs)++;
  260. }
  261. switch (cam->nbufs) {
  262. case 1:
  263. dma_free_coherent(cam->dev, cam->dma_buf_size,
  264. cam->dma_bufs[0], cam->dma_handles[0]);
  265. cam->nbufs = 0;
  266. case 0:
  267. cam_err(cam, "Insufficient DMA buffers, cannot operate\n");
  268. return -ENOMEM;
  269. case 2:
  270. if (n_dma_bufs > 2)
  271. cam_warn(cam, "Will limp along with only 2 buffers\n");
  272. break;
  273. }
  274. return 0;
  275. }
  276. static void mcam_free_dma_bufs(struct mcam_camera *cam)
  277. {
  278. int i;
  279. for (i = 0; i < cam->nbufs; i++) {
  280. dma_free_coherent(cam->dev, cam->dma_buf_size,
  281. cam->dma_bufs[i], cam->dma_handles[i]);
  282. cam->dma_bufs[i] = NULL;
  283. }
  284. cam->nbufs = 0;
  285. }
  286. /*
  287. * Set up DMA buffers when operating in vmalloc mode
  288. */
  289. static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam)
  290. {
  291. /*
  292. * Store the first two Y buffers (we aren't supporting
  293. * planar formats for now, so no UV bufs). Then either
  294. * set the third if it exists, or tell the controller
  295. * to just use two.
  296. */
  297. mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]);
  298. mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]);
  299. if (cam->nbufs > 2) {
  300. mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]);
  301. mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS);
  302. } else
  303. mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
  304. if (cam->chip_id == V4L2_IDENT_CAFE)
  305. mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */
  306. }
  307. /*
  308. * Copy data out to user space in the vmalloc case
  309. */
  310. static void mcam_frame_tasklet(unsigned long data)
  311. {
  312. struct mcam_camera *cam = (struct mcam_camera *) data;
  313. int i;
  314. unsigned long flags;
  315. struct mcam_vb_buffer *buf;
  316. spin_lock_irqsave(&cam->dev_lock, flags);
  317. for (i = 0; i < cam->nbufs; i++) {
  318. int bufno = cam->next_buf;
  319. if (cam->state != S_STREAMING || bufno < 0)
  320. break; /* I/O got stopped */
  321. if (++(cam->next_buf) >= cam->nbufs)
  322. cam->next_buf = 0;
  323. if (!test_bit(bufno, &cam->flags))
  324. continue;
  325. if (list_empty(&cam->buffers)) {
  326. singles++;
  327. break; /* Leave it valid, hope for better later */
  328. }
  329. delivered++;
  330. clear_bit(bufno, &cam->flags);
  331. buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer,
  332. queue);
  333. list_del_init(&buf->queue);
  334. /*
  335. * Drop the lock during the big copy. This *should* be safe...
  336. */
  337. spin_unlock_irqrestore(&cam->dev_lock, flags);
  338. memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno],
  339. cam->pix_format.sizeimage);
  340. mcam_buffer_done(cam, bufno, &buf->vb_buf);
  341. spin_lock_irqsave(&cam->dev_lock, flags);
  342. }
  343. spin_unlock_irqrestore(&cam->dev_lock, flags);
  344. }
  345. /*
  346. * Make sure our allocated buffers are up to the task.
  347. */
  348. static int mcam_check_dma_buffers(struct mcam_camera *cam)
  349. {
  350. if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage)
  351. mcam_free_dma_bufs(cam);
  352. if (cam->nbufs == 0)
  353. return mcam_alloc_dma_bufs(cam, 0);
  354. return 0;
  355. }
  356. static void mcam_vmalloc_done(struct mcam_camera *cam, int frame)
  357. {
  358. tasklet_schedule(&cam->s_tasklet);
  359. }
  360. #else /* MCAM_MODE_VMALLOC */
  361. static inline int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
  362. {
  363. return 0;
  364. }
  365. static inline void mcam_free_dma_bufs(struct mcam_camera *cam)
  366. {
  367. return;
  368. }
  369. static inline int mcam_check_dma_buffers(struct mcam_camera *cam)
  370. {
  371. return 0;
  372. }
  373. #endif /* MCAM_MODE_VMALLOC */
  374. #ifdef MCAM_MODE_DMA_CONTIG
  375. /* ---------------------------------------------------------------------- */
  376. /*
  377. * DMA-contiguous code.
  378. */
  379. /*
  380. * Set up a contiguous buffer for the given frame. Here also is where
  381. * the underrun strategy is set: if there is no buffer available, reuse
  382. * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to
  383. * keep the interrupt handler from giving that buffer back to user
  384. * space. In this way, we always have a buffer to DMA to and don't
  385. * have to try to play games stopping and restarting the controller.
  386. */
  387. static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame)
  388. {
  389. struct mcam_vb_buffer *buf;
  390. /*
  391. * If there are no available buffers, go into single mode
  392. */
  393. if (list_empty(&cam->buffers)) {
  394. buf = cam->vb_bufs[frame ^ 0x1];
  395. cam->vb_bufs[frame] = buf;
  396. mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
  397. vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
  398. set_bit(CF_SINGLE_BUFFER, &cam->flags);
  399. singles++;
  400. return;
  401. }
  402. /*
  403. * OK, we have a buffer we can use.
  404. */
  405. buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
  406. list_del_init(&buf->queue);
  407. mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
  408. vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
  409. cam->vb_bufs[frame] = buf;
  410. clear_bit(CF_SINGLE_BUFFER, &cam->flags);
  411. }
  412. /*
  413. * Initial B_DMA_contig setup.
  414. */
  415. static void mcam_ctlr_dma_contig(struct mcam_camera *cam)
  416. {
  417. mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
  418. cam->nbufs = 2;
  419. mcam_set_contig_buffer(cam, 0);
  420. mcam_set_contig_buffer(cam, 1);
  421. }
  422. /*
  423. * Frame completion handling.
  424. */
  425. static void mcam_dma_contig_done(struct mcam_camera *cam, int frame)
  426. {
  427. struct mcam_vb_buffer *buf = cam->vb_bufs[frame];
  428. if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) {
  429. delivered++;
  430. mcam_buffer_done(cam, frame, &buf->vb_buf);
  431. }
  432. mcam_set_contig_buffer(cam, frame);
  433. }
  434. #endif /* MCAM_MODE_DMA_CONTIG */
  435. #ifdef MCAM_MODE_DMA_SG
  436. /* ---------------------------------------------------------------------- */
  437. /*
  438. * Scatter/gather-specific code.
  439. */
  440. /*
  441. * Set up the next buffer for S/G I/O; caller should be sure that
  442. * the controller is stopped and a buffer is available.
  443. */
  444. static void mcam_sg_next_buffer(struct mcam_camera *cam)
  445. {
  446. struct mcam_vb_buffer *buf;
  447. buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
  448. list_del_init(&buf->queue);
  449. mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa);
  450. mcam_reg_write(cam, REG_DESC_LEN_Y,
  451. buf->dma_desc_nent*sizeof(struct mcam_dma_desc));
  452. mcam_reg_write(cam, REG_DESC_LEN_U, 0);
  453. mcam_reg_write(cam, REG_DESC_LEN_V, 0);
  454. cam->vb_bufs[0] = buf;
  455. }
  456. /*
  457. * Initial B_DMA_sg setup
  458. */
  459. static void mcam_ctlr_dma_sg(struct mcam_camera *cam)
  460. {
  461. mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD);
  462. mcam_sg_next_buffer(cam);
  463. mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
  464. cam->nbufs = 3;
  465. }
  466. /*
  467. * Frame completion with S/G is trickier. We can't muck with
  468. * a descriptor chain on the fly, since the controller buffers it
  469. * internally. So we have to actually stop and restart; Marvell
  470. * says this is the way to do it.
  471. *
  472. * Of course, stopping is easier said than done; experience shows
  473. * that the controller can start a frame *after* C0_ENABLE has been
  474. * cleared. So when running in S/G mode, the controller is "stopped"
  475. * on receipt of the start-of-frame interrupt. That means we can
  476. * safely change the DMA descriptor array here and restart things
  477. * (assuming there's another buffer waiting to go).
  478. */
  479. static void mcam_dma_sg_done(struct mcam_camera *cam, int frame)
  480. {
  481. struct mcam_vb_buffer *buf = cam->vb_bufs[0];
  482. /*
  483. * Very Bad Not Good Things happen if you don't clear
  484. * C1_DESC_ENA before making any descriptor changes.
  485. */
  486. mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA);
  487. /*
  488. * If we have another buffer available, put it in and
  489. * restart the engine.
  490. */
  491. if (!list_empty(&cam->buffers)) {
  492. mcam_sg_next_buffer(cam);
  493. mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
  494. mcam_ctlr_start(cam);
  495. /*
  496. * Otherwise set CF_SG_RESTART and the controller will
  497. * be restarted once another buffer shows up.
  498. */
  499. } else {
  500. set_bit(CF_SG_RESTART, &cam->flags);
  501. singles++;
  502. }
  503. /*
  504. * Now we can give the completed frame back to user space.
  505. */
  506. delivered++;
  507. mcam_buffer_done(cam, frame, &buf->vb_buf);
  508. }
  509. /*
  510. * Scatter/gather mode requires stopping the controller between
  511. * frames so we can put in a new DMA descriptor array. If no new
  512. * buffer exists at frame completion, the controller is left stopped;
  513. * this function is charged with gettig things going again.
  514. */
  515. static void mcam_sg_restart(struct mcam_camera *cam)
  516. {
  517. mcam_ctlr_dma_sg(cam);
  518. mcam_ctlr_start(cam);
  519. clear_bit(CF_SG_RESTART, &cam->flags);
  520. }
  521. #else /* MCAM_MODE_DMA_SG */
  522. static inline void mcam_sg_restart(struct mcam_camera *cam)
  523. {
  524. return;
  525. }
  526. #endif /* MCAM_MODE_DMA_SG */
  527. /* ---------------------------------------------------------------------- */
  528. /*
  529. * Buffer-mode-independent controller code.
  530. */
  531. /*
  532. * Image format setup
  533. */
  534. static void mcam_ctlr_image(struct mcam_camera *cam)
  535. {
  536. int imgsz;
  537. struct v4l2_pix_format *fmt = &cam->pix_format;
  538. imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) |
  539. (fmt->bytesperline & IMGSZ_H_MASK);
  540. mcam_reg_write(cam, REG_IMGSIZE, imgsz);
  541. mcam_reg_write(cam, REG_IMGOFFSET, 0);
  542. /* YPITCH just drops the last two bits */
  543. mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline,
  544. IMGP_YP_MASK);
  545. /*
  546. * Tell the controller about the image format we are using.
  547. */
  548. switch (cam->pix_format.pixelformat) {
  549. case V4L2_PIX_FMT_YUYV:
  550. mcam_reg_write_mask(cam, REG_CTRL0,
  551. C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV,
  552. C0_DF_MASK);
  553. break;
  554. case V4L2_PIX_FMT_RGB444:
  555. mcam_reg_write_mask(cam, REG_CTRL0,
  556. C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB,
  557. C0_DF_MASK);
  558. /* Alpha value? */
  559. break;
  560. case V4L2_PIX_FMT_RGB565:
  561. mcam_reg_write_mask(cam, REG_CTRL0,
  562. C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR,
  563. C0_DF_MASK);
  564. break;
  565. default:
  566. cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat);
  567. break;
  568. }
  569. /*
  570. * Make sure it knows we want to use hsync/vsync.
  571. */
  572. mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC,
  573. C0_SIFM_MASK);
  574. }
  575. /*
  576. * Configure the controller for operation; caller holds the
  577. * device mutex.
  578. */
  579. static int mcam_ctlr_configure(struct mcam_camera *cam)
  580. {
  581. unsigned long flags;
  582. spin_lock_irqsave(&cam->dev_lock, flags);
  583. cam->dma_setup(cam);
  584. mcam_ctlr_image(cam);
  585. mcam_set_config_needed(cam, 0);
  586. clear_bit(CF_SG_RESTART, &cam->flags);
  587. spin_unlock_irqrestore(&cam->dev_lock, flags);
  588. return 0;
  589. }
  590. static void mcam_ctlr_irq_enable(struct mcam_camera *cam)
  591. {
  592. /*
  593. * Clear any pending interrupts, since we do not
  594. * expect to have I/O active prior to enabling.
  595. */
  596. mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS);
  597. mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS);
  598. }
  599. static void mcam_ctlr_irq_disable(struct mcam_camera *cam)
  600. {
  601. mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS);
  602. }
  603. static void mcam_ctlr_init(struct mcam_camera *cam)
  604. {
  605. unsigned long flags;
  606. spin_lock_irqsave(&cam->dev_lock, flags);
  607. /*
  608. * Make sure it's not powered down.
  609. */
  610. mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
  611. /*
  612. * Turn off the enable bit. It sure should be off anyway,
  613. * but it's good to be sure.
  614. */
  615. mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
  616. /*
  617. * Clock the sensor appropriately. Controller clock should
  618. * be 48MHz, sensor "typical" value is half that.
  619. */
  620. mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
  621. spin_unlock_irqrestore(&cam->dev_lock, flags);
  622. }
  623. /*
  624. * Stop the controller, and don't return until we're really sure that no
  625. * further DMA is going on.
  626. */
  627. static void mcam_ctlr_stop_dma(struct mcam_camera *cam)
  628. {
  629. unsigned long flags;
  630. /*
  631. * Theory: stop the camera controller (whether it is operating
  632. * or not). Delay briefly just in case we race with the SOF
  633. * interrupt, then wait until no DMA is active.
  634. */
  635. spin_lock_irqsave(&cam->dev_lock, flags);
  636. clear_bit(CF_SG_RESTART, &cam->flags);
  637. mcam_ctlr_stop(cam);
  638. cam->state = S_IDLE;
  639. spin_unlock_irqrestore(&cam->dev_lock, flags);
  640. msleep(40);
  641. if (test_bit(CF_DMA_ACTIVE, &cam->flags))
  642. cam_err(cam, "Timeout waiting for DMA to end\n");
  643. /* This would be bad news - what now? */
  644. spin_lock_irqsave(&cam->dev_lock, flags);
  645. mcam_ctlr_irq_disable(cam);
  646. spin_unlock_irqrestore(&cam->dev_lock, flags);
  647. }
  648. /*
  649. * Power up and down.
  650. */
  651. static void mcam_ctlr_power_up(struct mcam_camera *cam)
  652. {
  653. unsigned long flags;
  654. spin_lock_irqsave(&cam->dev_lock, flags);
  655. cam->plat_power_up(cam);
  656. mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
  657. spin_unlock_irqrestore(&cam->dev_lock, flags);
  658. msleep(5); /* Just to be sure */
  659. }
  660. static void mcam_ctlr_power_down(struct mcam_camera *cam)
  661. {
  662. unsigned long flags;
  663. spin_lock_irqsave(&cam->dev_lock, flags);
  664. /*
  665. * School of hard knocks department: be sure we do any register
  666. * twiddling on the controller *before* calling the platform
  667. * power down routine.
  668. */
  669. mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN);
  670. cam->plat_power_down(cam);
  671. spin_unlock_irqrestore(&cam->dev_lock, flags);
  672. }
  673. /* -------------------------------------------------------------------- */
  674. /*
  675. * Communications with the sensor.
  676. */
  677. static int __mcam_cam_reset(struct mcam_camera *cam)
  678. {
  679. return sensor_call(cam, core, reset, 0);
  680. }
  681. /*
  682. * We have found the sensor on the i2c. Let's try to have a
  683. * conversation.
  684. */
  685. static int mcam_cam_init(struct mcam_camera *cam)
  686. {
  687. struct v4l2_dbg_chip_ident chip;
  688. int ret;
  689. mutex_lock(&cam->s_mutex);
  690. if (cam->state != S_NOTREADY)
  691. cam_warn(cam, "Cam init with device in funky state %d",
  692. cam->state);
  693. ret = __mcam_cam_reset(cam);
  694. if (ret)
  695. goto out;
  696. chip.ident = V4L2_IDENT_NONE;
  697. chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR;
  698. chip.match.addr = cam->sensor_addr;
  699. ret = sensor_call(cam, core, g_chip_ident, &chip);
  700. if (ret)
  701. goto out;
  702. cam->sensor_type = chip.ident;
  703. if (cam->sensor_type != V4L2_IDENT_OV7670) {
  704. cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type);
  705. ret = -EINVAL;
  706. goto out;
  707. }
  708. /* Get/set parameters? */
  709. ret = 0;
  710. cam->state = S_IDLE;
  711. out:
  712. mcam_ctlr_power_down(cam);
  713. mutex_unlock(&cam->s_mutex);
  714. return ret;
  715. }
  716. /*
  717. * Configure the sensor to match the parameters we have. Caller should
  718. * hold s_mutex
  719. */
  720. static int mcam_cam_set_flip(struct mcam_camera *cam)
  721. {
  722. struct v4l2_control ctrl;
  723. memset(&ctrl, 0, sizeof(ctrl));
  724. ctrl.id = V4L2_CID_VFLIP;
  725. ctrl.value = flip;
  726. return sensor_call(cam, core, s_ctrl, &ctrl);
  727. }
  728. static int mcam_cam_configure(struct mcam_camera *cam)
  729. {
  730. struct v4l2_mbus_framefmt mbus_fmt;
  731. int ret;
  732. v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code);
  733. ret = sensor_call(cam, core, init, 0);
  734. if (ret == 0)
  735. ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt);
  736. /*
  737. * OV7670 does weird things if flip is set *before* format...
  738. */
  739. ret += mcam_cam_set_flip(cam);
  740. return ret;
  741. }
  742. /*
  743. * Get everything ready, and start grabbing frames.
  744. */
  745. static int mcam_read_setup(struct mcam_camera *cam)
  746. {
  747. int ret;
  748. unsigned long flags;
  749. /*
  750. * Configuration. If we still don't have DMA buffers,
  751. * make one last, desperate attempt.
  752. */
  753. if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 &&
  754. mcam_alloc_dma_bufs(cam, 0))
  755. return -ENOMEM;
  756. if (mcam_needs_config(cam)) {
  757. mcam_cam_configure(cam);
  758. ret = mcam_ctlr_configure(cam);
  759. if (ret)
  760. return ret;
  761. }
  762. /*
  763. * Turn it loose.
  764. */
  765. spin_lock_irqsave(&cam->dev_lock, flags);
  766. mcam_reset_buffers(cam);
  767. mcam_ctlr_irq_enable(cam);
  768. cam->state = S_STREAMING;
  769. mcam_ctlr_start(cam);
  770. spin_unlock_irqrestore(&cam->dev_lock, flags);
  771. return 0;
  772. }
  773. /* ----------------------------------------------------------------------- */
  774. /*
  775. * Videobuf2 interface code.
  776. */
  777. static int mcam_vb_queue_setup(struct vb2_queue *vq, unsigned int *nbufs,
  778. unsigned int *num_planes, unsigned long sizes[],
  779. void *alloc_ctxs[])
  780. {
  781. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  782. int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2;
  783. sizes[0] = cam->pix_format.sizeimage;
  784. *num_planes = 1; /* Someday we have to support planar formats... */
  785. if (*nbufs < minbufs)
  786. *nbufs = minbufs;
  787. if (cam->buffer_mode == B_DMA_contig)
  788. alloc_ctxs[0] = cam->vb_alloc_ctx;
  789. return 0;
  790. }
  791. static void mcam_vb_buf_queue(struct vb2_buffer *vb)
  792. {
  793. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  794. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  795. unsigned long flags;
  796. int start;
  797. spin_lock_irqsave(&cam->dev_lock, flags);
  798. start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers);
  799. list_add(&mvb->queue, &cam->buffers);
  800. if (test_bit(CF_SG_RESTART, &cam->flags))
  801. mcam_sg_restart(cam);
  802. spin_unlock_irqrestore(&cam->dev_lock, flags);
  803. if (start)
  804. mcam_read_setup(cam);
  805. }
  806. /*
  807. * vb2 uses these to release the mutex when waiting in dqbuf. I'm
  808. * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs
  809. * to be called with the mutex held), but better safe than sorry.
  810. */
  811. static void mcam_vb_wait_prepare(struct vb2_queue *vq)
  812. {
  813. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  814. mutex_unlock(&cam->s_mutex);
  815. }
  816. static void mcam_vb_wait_finish(struct vb2_queue *vq)
  817. {
  818. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  819. mutex_lock(&cam->s_mutex);
  820. }
  821. /*
  822. * These need to be called with the mutex held from vb2
  823. */
  824. static int mcam_vb_start_streaming(struct vb2_queue *vq)
  825. {
  826. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  827. if (cam->state != S_IDLE)
  828. return -EINVAL;
  829. cam->sequence = 0;
  830. /*
  831. * Videobuf2 sneakily hoards all the buffers and won't
  832. * give them to us until *after* streaming starts. But
  833. * we can't actually start streaming until we have a
  834. * destination. So go into a wait state and hope they
  835. * give us buffers soon.
  836. */
  837. if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) {
  838. cam->state = S_BUFWAIT;
  839. return 0;
  840. }
  841. return mcam_read_setup(cam);
  842. }
  843. static int mcam_vb_stop_streaming(struct vb2_queue *vq)
  844. {
  845. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  846. unsigned long flags;
  847. if (cam->state == S_BUFWAIT) {
  848. /* They never gave us buffers */
  849. cam->state = S_IDLE;
  850. return 0;
  851. }
  852. if (cam->state != S_STREAMING)
  853. return -EINVAL;
  854. mcam_ctlr_stop_dma(cam);
  855. /*
  856. * VB2 reclaims the buffers, so we need to forget
  857. * about them.
  858. */
  859. spin_lock_irqsave(&cam->dev_lock, flags);
  860. INIT_LIST_HEAD(&cam->buffers);
  861. spin_unlock_irqrestore(&cam->dev_lock, flags);
  862. return 0;
  863. }
  864. static const struct vb2_ops mcam_vb2_ops = {
  865. .queue_setup = mcam_vb_queue_setup,
  866. .buf_queue = mcam_vb_buf_queue,
  867. .start_streaming = mcam_vb_start_streaming,
  868. .stop_streaming = mcam_vb_stop_streaming,
  869. .wait_prepare = mcam_vb_wait_prepare,
  870. .wait_finish = mcam_vb_wait_finish,
  871. };
  872. #ifdef MCAM_MODE_DMA_SG
  873. /*
  874. * Scatter/gather mode uses all of the above functions plus a
  875. * few extras to deal with DMA mapping.
  876. */
  877. static int mcam_vb_sg_buf_init(struct vb2_buffer *vb)
  878. {
  879. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  880. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  881. int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
  882. mvb->dma_desc = dma_alloc_coherent(cam->dev,
  883. ndesc * sizeof(struct mcam_dma_desc),
  884. &mvb->dma_desc_pa, GFP_KERNEL);
  885. if (mvb->dma_desc == NULL) {
  886. cam_err(cam, "Unable to get DMA descriptor array\n");
  887. return -ENOMEM;
  888. }
  889. return 0;
  890. }
  891. static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb)
  892. {
  893. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  894. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  895. struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
  896. struct mcam_dma_desc *desc = mvb->dma_desc;
  897. struct scatterlist *sg;
  898. int i;
  899. mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages,
  900. DMA_FROM_DEVICE);
  901. if (mvb->dma_desc_nent <= 0)
  902. return -EIO; /* Not sure what's right here */
  903. for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) {
  904. desc->dma_addr = sg_dma_address(sg);
  905. desc->segment_len = sg_dma_len(sg);
  906. desc++;
  907. }
  908. return 0;
  909. }
  910. static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb)
  911. {
  912. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  913. struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
  914. dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE);
  915. return 0;
  916. }
  917. static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb)
  918. {
  919. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  920. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  921. int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
  922. dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc),
  923. mvb->dma_desc, mvb->dma_desc_pa);
  924. }
  925. static const struct vb2_ops mcam_vb2_sg_ops = {
  926. .queue_setup = mcam_vb_queue_setup,
  927. .buf_init = mcam_vb_sg_buf_init,
  928. .buf_prepare = mcam_vb_sg_buf_prepare,
  929. .buf_queue = mcam_vb_buf_queue,
  930. .buf_finish = mcam_vb_sg_buf_finish,
  931. .buf_cleanup = mcam_vb_sg_buf_cleanup,
  932. .start_streaming = mcam_vb_start_streaming,
  933. .stop_streaming = mcam_vb_stop_streaming,
  934. .wait_prepare = mcam_vb_wait_prepare,
  935. .wait_finish = mcam_vb_wait_finish,
  936. };
  937. #endif /* MCAM_MODE_DMA_SG */
  938. static int mcam_setup_vb2(struct mcam_camera *cam)
  939. {
  940. struct vb2_queue *vq = &cam->vb_queue;
  941. memset(vq, 0, sizeof(*vq));
  942. vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  943. vq->drv_priv = cam;
  944. INIT_LIST_HEAD(&cam->buffers);
  945. switch (cam->buffer_mode) {
  946. case B_DMA_contig:
  947. #ifdef MCAM_MODE_DMA_CONTIG
  948. vq->ops = &mcam_vb2_ops;
  949. vq->mem_ops = &vb2_dma_contig_memops;
  950. cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev);
  951. vq->io_modes = VB2_MMAP | VB2_USERPTR;
  952. cam->dma_setup = mcam_ctlr_dma_contig;
  953. cam->frame_complete = mcam_dma_contig_done;
  954. #endif
  955. break;
  956. case B_DMA_sg:
  957. #ifdef MCAM_MODE_DMA_SG
  958. vq->ops = &mcam_vb2_sg_ops;
  959. vq->mem_ops = &vb2_dma_sg_memops;
  960. vq->io_modes = VB2_MMAP | VB2_USERPTR;
  961. cam->dma_setup = mcam_ctlr_dma_sg;
  962. cam->frame_complete = mcam_dma_sg_done;
  963. #endif
  964. break;
  965. case B_vmalloc:
  966. #ifdef MCAM_MODE_VMALLOC
  967. tasklet_init(&cam->s_tasklet, mcam_frame_tasklet,
  968. (unsigned long) cam);
  969. vq->ops = &mcam_vb2_ops;
  970. vq->mem_ops = &vb2_vmalloc_memops;
  971. vq->buf_struct_size = sizeof(struct mcam_vb_buffer);
  972. vq->io_modes = VB2_MMAP;
  973. cam->dma_setup = mcam_ctlr_dma_vmalloc;
  974. cam->frame_complete = mcam_vmalloc_done;
  975. #endif
  976. break;
  977. }
  978. return vb2_queue_init(vq);
  979. }
  980. static void mcam_cleanup_vb2(struct mcam_camera *cam)
  981. {
  982. vb2_queue_release(&cam->vb_queue);
  983. #ifdef MCAM_MODE_DMA_CONTIG
  984. if (cam->buffer_mode == B_DMA_contig)
  985. vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx);
  986. #endif
  987. }
  988. /* ---------------------------------------------------------------------- */
  989. /*
  990. * The long list of V4L2 ioctl() operations.
  991. */
  992. static int mcam_vidioc_streamon(struct file *filp, void *priv,
  993. enum v4l2_buf_type type)
  994. {
  995. struct mcam_camera *cam = filp->private_data;
  996. int ret;
  997. mutex_lock(&cam->s_mutex);
  998. ret = vb2_streamon(&cam->vb_queue, type);
  999. mutex_unlock(&cam->s_mutex);
  1000. return ret;
  1001. }
  1002. static int mcam_vidioc_streamoff(struct file *filp, void *priv,
  1003. enum v4l2_buf_type type)
  1004. {
  1005. struct mcam_camera *cam = filp->private_data;
  1006. int ret;
  1007. mutex_lock(&cam->s_mutex);
  1008. ret = vb2_streamoff(&cam->vb_queue, type);
  1009. mutex_unlock(&cam->s_mutex);
  1010. return ret;
  1011. }
  1012. static int mcam_vidioc_reqbufs(struct file *filp, void *priv,
  1013. struct v4l2_requestbuffers *req)
  1014. {
  1015. struct mcam_camera *cam = filp->private_data;
  1016. int ret;
  1017. mutex_lock(&cam->s_mutex);
  1018. ret = vb2_reqbufs(&cam->vb_queue, req);
  1019. mutex_unlock(&cam->s_mutex);
  1020. return ret;
  1021. }
  1022. static int mcam_vidioc_querybuf(struct file *filp, void *priv,
  1023. struct v4l2_buffer *buf)
  1024. {
  1025. struct mcam_camera *cam = filp->private_data;
  1026. int ret;
  1027. mutex_lock(&cam->s_mutex);
  1028. ret = vb2_querybuf(&cam->vb_queue, buf);
  1029. mutex_unlock(&cam->s_mutex);
  1030. return ret;
  1031. }
  1032. static int mcam_vidioc_qbuf(struct file *filp, void *priv,
  1033. struct v4l2_buffer *buf)
  1034. {
  1035. struct mcam_camera *cam = filp->private_data;
  1036. int ret;
  1037. mutex_lock(&cam->s_mutex);
  1038. ret = vb2_qbuf(&cam->vb_queue, buf);
  1039. mutex_unlock(&cam->s_mutex);
  1040. return ret;
  1041. }
  1042. static int mcam_vidioc_dqbuf(struct file *filp, void *priv,
  1043. struct v4l2_buffer *buf)
  1044. {
  1045. struct mcam_camera *cam = filp->private_data;
  1046. int ret;
  1047. mutex_lock(&cam->s_mutex);
  1048. ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK);
  1049. mutex_unlock(&cam->s_mutex);
  1050. return ret;
  1051. }
  1052. static int mcam_vidioc_queryctrl(struct file *filp, void *priv,
  1053. struct v4l2_queryctrl *qc)
  1054. {
  1055. struct mcam_camera *cam = priv;
  1056. int ret;
  1057. mutex_lock(&cam->s_mutex);
  1058. ret = sensor_call(cam, core, queryctrl, qc);
  1059. mutex_unlock(&cam->s_mutex);
  1060. return ret;
  1061. }
  1062. static int mcam_vidioc_g_ctrl(struct file *filp, void *priv,
  1063. struct v4l2_control *ctrl)
  1064. {
  1065. struct mcam_camera *cam = priv;
  1066. int ret;
  1067. mutex_lock(&cam->s_mutex);
  1068. ret = sensor_call(cam, core, g_ctrl, ctrl);
  1069. mutex_unlock(&cam->s_mutex);
  1070. return ret;
  1071. }
  1072. static int mcam_vidioc_s_ctrl(struct file *filp, void *priv,
  1073. struct v4l2_control *ctrl)
  1074. {
  1075. struct mcam_camera *cam = priv;
  1076. int ret;
  1077. mutex_lock(&cam->s_mutex);
  1078. ret = sensor_call(cam, core, s_ctrl, ctrl);
  1079. mutex_unlock(&cam->s_mutex);
  1080. return ret;
  1081. }
  1082. static int mcam_vidioc_querycap(struct file *file, void *priv,
  1083. struct v4l2_capability *cap)
  1084. {
  1085. strcpy(cap->driver, "marvell_ccic");
  1086. strcpy(cap->card, "marvell_ccic");
  1087. cap->version = 1;
  1088. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
  1089. V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
  1090. return 0;
  1091. }
  1092. static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp,
  1093. void *priv, struct v4l2_fmtdesc *fmt)
  1094. {
  1095. if (fmt->index >= N_MCAM_FMTS)
  1096. return -EINVAL;
  1097. strlcpy(fmt->description, mcam_formats[fmt->index].desc,
  1098. sizeof(fmt->description));
  1099. fmt->pixelformat = mcam_formats[fmt->index].pixelformat;
  1100. return 0;
  1101. }
  1102. static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv,
  1103. struct v4l2_format *fmt)
  1104. {
  1105. struct mcam_camera *cam = priv;
  1106. struct mcam_format_struct *f;
  1107. struct v4l2_pix_format *pix = &fmt->fmt.pix;
  1108. struct v4l2_mbus_framefmt mbus_fmt;
  1109. int ret;
  1110. f = mcam_find_format(pix->pixelformat);
  1111. pix->pixelformat = f->pixelformat;
  1112. v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code);
  1113. mutex_lock(&cam->s_mutex);
  1114. ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt);
  1115. mutex_unlock(&cam->s_mutex);
  1116. v4l2_fill_pix_format(pix, &mbus_fmt);
  1117. pix->bytesperline = pix->width * f->bpp;
  1118. pix->sizeimage = pix->height * pix->bytesperline;
  1119. return ret;
  1120. }
  1121. static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv,
  1122. struct v4l2_format *fmt)
  1123. {
  1124. struct mcam_camera *cam = priv;
  1125. struct mcam_format_struct *f;
  1126. int ret;
  1127. /*
  1128. * Can't do anything if the device is not idle
  1129. * Also can't if there are streaming buffers in place.
  1130. */
  1131. if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0)
  1132. return -EBUSY;
  1133. f = mcam_find_format(fmt->fmt.pix.pixelformat);
  1134. /*
  1135. * See if the formatting works in principle.
  1136. */
  1137. ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt);
  1138. if (ret)
  1139. return ret;
  1140. /*
  1141. * Now we start to change things for real, so let's do it
  1142. * under lock.
  1143. */
  1144. mutex_lock(&cam->s_mutex);
  1145. cam->pix_format = fmt->fmt.pix;
  1146. cam->mbus_code = f->mbus_code;
  1147. /*
  1148. * Make sure we have appropriate DMA buffers.
  1149. */
  1150. if (cam->buffer_mode == B_vmalloc) {
  1151. ret = mcam_check_dma_buffers(cam);
  1152. if (ret)
  1153. goto out;
  1154. }
  1155. mcam_set_config_needed(cam, 1);
  1156. ret = 0;
  1157. out:
  1158. mutex_unlock(&cam->s_mutex);
  1159. return ret;
  1160. }
  1161. /*
  1162. * Return our stored notion of how the camera is/should be configured.
  1163. * The V4l2 spec wants us to be smarter, and actually get this from
  1164. * the camera (and not mess with it at open time). Someday.
  1165. */
  1166. static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv,
  1167. struct v4l2_format *f)
  1168. {
  1169. struct mcam_camera *cam = priv;
  1170. f->fmt.pix = cam->pix_format;
  1171. return 0;
  1172. }
  1173. /*
  1174. * We only have one input - the sensor - so minimize the nonsense here.
  1175. */
  1176. static int mcam_vidioc_enum_input(struct file *filp, void *priv,
  1177. struct v4l2_input *input)
  1178. {
  1179. if (input->index != 0)
  1180. return -EINVAL;
  1181. input->type = V4L2_INPUT_TYPE_CAMERA;
  1182. input->std = V4L2_STD_ALL; /* Not sure what should go here */
  1183. strcpy(input->name, "Camera");
  1184. return 0;
  1185. }
  1186. static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i)
  1187. {
  1188. *i = 0;
  1189. return 0;
  1190. }
  1191. static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i)
  1192. {
  1193. if (i != 0)
  1194. return -EINVAL;
  1195. return 0;
  1196. }
  1197. /* from vivi.c */
  1198. static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a)
  1199. {
  1200. return 0;
  1201. }
  1202. /*
  1203. * G/S_PARM. Most of this is done by the sensor, but we are
  1204. * the level which controls the number of read buffers.
  1205. */
  1206. static int mcam_vidioc_g_parm(struct file *filp, void *priv,
  1207. struct v4l2_streamparm *parms)
  1208. {
  1209. struct mcam_camera *cam = priv;
  1210. int ret;
  1211. mutex_lock(&cam->s_mutex);
  1212. ret = sensor_call(cam, video, g_parm, parms);
  1213. mutex_unlock(&cam->s_mutex);
  1214. parms->parm.capture.readbuffers = n_dma_bufs;
  1215. return ret;
  1216. }
  1217. static int mcam_vidioc_s_parm(struct file *filp, void *priv,
  1218. struct v4l2_streamparm *parms)
  1219. {
  1220. struct mcam_camera *cam = priv;
  1221. int ret;
  1222. mutex_lock(&cam->s_mutex);
  1223. ret = sensor_call(cam, video, s_parm, parms);
  1224. mutex_unlock(&cam->s_mutex);
  1225. parms->parm.capture.readbuffers = n_dma_bufs;
  1226. return ret;
  1227. }
  1228. static int mcam_vidioc_g_chip_ident(struct file *file, void *priv,
  1229. struct v4l2_dbg_chip_ident *chip)
  1230. {
  1231. struct mcam_camera *cam = priv;
  1232. chip->ident = V4L2_IDENT_NONE;
  1233. chip->revision = 0;
  1234. if (v4l2_chip_match_host(&chip->match)) {
  1235. chip->ident = cam->chip_id;
  1236. return 0;
  1237. }
  1238. return sensor_call(cam, core, g_chip_ident, chip);
  1239. }
  1240. static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv,
  1241. struct v4l2_frmsizeenum *sizes)
  1242. {
  1243. struct mcam_camera *cam = priv;
  1244. int ret;
  1245. mutex_lock(&cam->s_mutex);
  1246. ret = sensor_call(cam, video, enum_framesizes, sizes);
  1247. mutex_unlock(&cam->s_mutex);
  1248. return ret;
  1249. }
  1250. static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv,
  1251. struct v4l2_frmivalenum *interval)
  1252. {
  1253. struct mcam_camera *cam = priv;
  1254. int ret;
  1255. mutex_lock(&cam->s_mutex);
  1256. ret = sensor_call(cam, video, enum_frameintervals, interval);
  1257. mutex_unlock(&cam->s_mutex);
  1258. return ret;
  1259. }
  1260. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1261. static int mcam_vidioc_g_register(struct file *file, void *priv,
  1262. struct v4l2_dbg_register *reg)
  1263. {
  1264. struct mcam_camera *cam = priv;
  1265. if (v4l2_chip_match_host(&reg->match)) {
  1266. reg->val = mcam_reg_read(cam, reg->reg);
  1267. reg->size = 4;
  1268. return 0;
  1269. }
  1270. return sensor_call(cam, core, g_register, reg);
  1271. }
  1272. static int mcam_vidioc_s_register(struct file *file, void *priv,
  1273. struct v4l2_dbg_register *reg)
  1274. {
  1275. struct mcam_camera *cam = priv;
  1276. if (v4l2_chip_match_host(&reg->match)) {
  1277. mcam_reg_write(cam, reg->reg, reg->val);
  1278. return 0;
  1279. }
  1280. return sensor_call(cam, core, s_register, reg);
  1281. }
  1282. #endif
  1283. static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = {
  1284. .vidioc_querycap = mcam_vidioc_querycap,
  1285. .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap,
  1286. .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap,
  1287. .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap,
  1288. .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap,
  1289. .vidioc_enum_input = mcam_vidioc_enum_input,
  1290. .vidioc_g_input = mcam_vidioc_g_input,
  1291. .vidioc_s_input = mcam_vidioc_s_input,
  1292. .vidioc_s_std = mcam_vidioc_s_std,
  1293. .vidioc_reqbufs = mcam_vidioc_reqbufs,
  1294. .vidioc_querybuf = mcam_vidioc_querybuf,
  1295. .vidioc_qbuf = mcam_vidioc_qbuf,
  1296. .vidioc_dqbuf = mcam_vidioc_dqbuf,
  1297. .vidioc_streamon = mcam_vidioc_streamon,
  1298. .vidioc_streamoff = mcam_vidioc_streamoff,
  1299. .vidioc_queryctrl = mcam_vidioc_queryctrl,
  1300. .vidioc_g_ctrl = mcam_vidioc_g_ctrl,
  1301. .vidioc_s_ctrl = mcam_vidioc_s_ctrl,
  1302. .vidioc_g_parm = mcam_vidioc_g_parm,
  1303. .vidioc_s_parm = mcam_vidioc_s_parm,
  1304. .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes,
  1305. .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals,
  1306. .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident,
  1307. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1308. .vidioc_g_register = mcam_vidioc_g_register,
  1309. .vidioc_s_register = mcam_vidioc_s_register,
  1310. #endif
  1311. };
  1312. /* ---------------------------------------------------------------------- */
  1313. /*
  1314. * Our various file operations.
  1315. */
  1316. static int mcam_v4l_open(struct file *filp)
  1317. {
  1318. struct mcam_camera *cam = video_drvdata(filp);
  1319. int ret = 0;
  1320. filp->private_data = cam;
  1321. frames = singles = delivered = 0;
  1322. mutex_lock(&cam->s_mutex);
  1323. if (cam->users == 0) {
  1324. ret = mcam_setup_vb2(cam);
  1325. if (ret)
  1326. goto out;
  1327. mcam_ctlr_power_up(cam);
  1328. __mcam_cam_reset(cam);
  1329. mcam_set_config_needed(cam, 1);
  1330. }
  1331. (cam->users)++;
  1332. out:
  1333. mutex_unlock(&cam->s_mutex);
  1334. return ret;
  1335. }
  1336. static int mcam_v4l_release(struct file *filp)
  1337. {
  1338. struct mcam_camera *cam = filp->private_data;
  1339. cam_err(cam, "Release, %d frames, %d singles, %d delivered\n", frames,
  1340. singles, delivered);
  1341. mutex_lock(&cam->s_mutex);
  1342. (cam->users)--;
  1343. if (filp == cam->owner) {
  1344. mcam_ctlr_stop_dma(cam);
  1345. cam->owner = NULL;
  1346. }
  1347. if (cam->users == 0) {
  1348. mcam_cleanup_vb2(cam);
  1349. mcam_ctlr_power_down(cam);
  1350. if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read)
  1351. mcam_free_dma_bufs(cam);
  1352. }
  1353. mutex_unlock(&cam->s_mutex);
  1354. return 0;
  1355. }
  1356. static ssize_t mcam_v4l_read(struct file *filp,
  1357. char __user *buffer, size_t len, loff_t *pos)
  1358. {
  1359. struct mcam_camera *cam = filp->private_data;
  1360. int ret;
  1361. mutex_lock(&cam->s_mutex);
  1362. ret = vb2_read(&cam->vb_queue, buffer, len, pos,
  1363. filp->f_flags & O_NONBLOCK);
  1364. mutex_unlock(&cam->s_mutex);
  1365. return ret;
  1366. }
  1367. static unsigned int mcam_v4l_poll(struct file *filp,
  1368. struct poll_table_struct *pt)
  1369. {
  1370. struct mcam_camera *cam = filp->private_data;
  1371. int ret;
  1372. mutex_lock(&cam->s_mutex);
  1373. ret = vb2_poll(&cam->vb_queue, filp, pt);
  1374. mutex_unlock(&cam->s_mutex);
  1375. return ret;
  1376. }
  1377. static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma)
  1378. {
  1379. struct mcam_camera *cam = filp->private_data;
  1380. int ret;
  1381. mutex_lock(&cam->s_mutex);
  1382. ret = vb2_mmap(&cam->vb_queue, vma);
  1383. mutex_unlock(&cam->s_mutex);
  1384. return ret;
  1385. }
  1386. static const struct v4l2_file_operations mcam_v4l_fops = {
  1387. .owner = THIS_MODULE,
  1388. .open = mcam_v4l_open,
  1389. .release = mcam_v4l_release,
  1390. .read = mcam_v4l_read,
  1391. .poll = mcam_v4l_poll,
  1392. .mmap = mcam_v4l_mmap,
  1393. .unlocked_ioctl = video_ioctl2,
  1394. };
  1395. /*
  1396. * This template device holds all of those v4l2 methods; we
  1397. * clone it for specific real devices.
  1398. */
  1399. static struct video_device mcam_v4l_template = {
  1400. .name = "mcam",
  1401. .tvnorms = V4L2_STD_NTSC_M,
  1402. .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */
  1403. .fops = &mcam_v4l_fops,
  1404. .ioctl_ops = &mcam_v4l_ioctl_ops,
  1405. .release = video_device_release_empty,
  1406. };
  1407. /* ---------------------------------------------------------------------- */
  1408. /*
  1409. * Interrupt handler stuff
  1410. */
  1411. static void mcam_frame_complete(struct mcam_camera *cam, int frame)
  1412. {
  1413. /*
  1414. * Basic frame housekeeping.
  1415. */
  1416. set_bit(frame, &cam->flags);
  1417. clear_bit(CF_DMA_ACTIVE, &cam->flags);
  1418. cam->next_buf = frame;
  1419. cam->buf_seq[frame] = ++(cam->sequence);
  1420. cam->last_delivered = frame;
  1421. frames++;
  1422. /*
  1423. * "This should never happen"
  1424. */
  1425. if (cam->state != S_STREAMING)
  1426. return;
  1427. /*
  1428. * Process the frame and set up the next one.
  1429. */
  1430. cam->frame_complete(cam, frame);
  1431. }
  1432. /*
  1433. * The interrupt handler; this needs to be called from the
  1434. * platform irq handler with the lock held.
  1435. */
  1436. int mccic_irq(struct mcam_camera *cam, unsigned int irqs)
  1437. {
  1438. unsigned int frame, handled = 0;
  1439. mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */
  1440. /*
  1441. * Handle any frame completions. There really should
  1442. * not be more than one of these, or we have fallen
  1443. * far behind.
  1444. *
  1445. * When running in S/G mode, the frame number lacks any
  1446. * real meaning - there's only one descriptor array - but
  1447. * the controller still picks a different one to signal
  1448. * each time.
  1449. */
  1450. for (frame = 0; frame < cam->nbufs; frame++)
  1451. if (irqs & (IRQ_EOF0 << frame)) {
  1452. mcam_frame_complete(cam, frame);
  1453. handled = 1;
  1454. }
  1455. /*
  1456. * If a frame starts, note that we have DMA active. This
  1457. * code assumes that we won't get multiple frame interrupts
  1458. * at once; may want to rethink that.
  1459. */
  1460. if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) {
  1461. set_bit(CF_DMA_ACTIVE, &cam->flags);
  1462. handled = 1;
  1463. if (cam->buffer_mode == B_DMA_sg)
  1464. mcam_ctlr_stop(cam);
  1465. }
  1466. return handled;
  1467. }
  1468. /* ---------------------------------------------------------------------- */
  1469. /*
  1470. * Registration and such.
  1471. */
  1472. static struct ov7670_config sensor_cfg = {
  1473. /*
  1474. * Exclude QCIF mode, because it only captures a tiny portion
  1475. * of the sensor FOV
  1476. */
  1477. .min_width = 320,
  1478. .min_height = 240,
  1479. };
  1480. int mccic_register(struct mcam_camera *cam)
  1481. {
  1482. struct i2c_board_info ov7670_info = {
  1483. .type = "ov7670",
  1484. .addr = 0x42 >> 1,
  1485. .platform_data = &sensor_cfg,
  1486. };
  1487. int ret;
  1488. /*
  1489. * Validate the requested buffer mode.
  1490. */
  1491. if (buffer_mode >= 0)
  1492. cam->buffer_mode = buffer_mode;
  1493. if (cam->buffer_mode == B_DMA_sg &&
  1494. cam->chip_id == V4L2_IDENT_CAFE) {
  1495. printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O, "
  1496. "attempting vmalloc mode instead\n");
  1497. cam->buffer_mode = B_vmalloc;
  1498. }
  1499. if (!mcam_buffer_mode_supported(cam->buffer_mode)) {
  1500. printk(KERN_ERR "marvell-cam: buffer mode %d unsupported\n",
  1501. cam->buffer_mode);
  1502. return -EINVAL;
  1503. }
  1504. /*
  1505. * Register with V4L
  1506. */
  1507. ret = v4l2_device_register(cam->dev, &cam->v4l2_dev);
  1508. if (ret)
  1509. return ret;
  1510. mutex_init(&cam->s_mutex);
  1511. cam->state = S_NOTREADY;
  1512. mcam_set_config_needed(cam, 1);
  1513. cam->pix_format = mcam_def_pix_format;
  1514. cam->mbus_code = mcam_def_mbus_code;
  1515. INIT_LIST_HEAD(&cam->dev_list);
  1516. INIT_LIST_HEAD(&cam->buffers);
  1517. mcam_ctlr_init(cam);
  1518. /*
  1519. * Try to find the sensor.
  1520. */
  1521. sensor_cfg.clock_speed = cam->clock_speed;
  1522. sensor_cfg.use_smbus = cam->use_smbus;
  1523. cam->sensor_addr = ov7670_info.addr;
  1524. cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev,
  1525. cam->i2c_adapter, &ov7670_info, NULL);
  1526. if (cam->sensor == NULL) {
  1527. ret = -ENODEV;
  1528. goto out_unregister;
  1529. }
  1530. ret = mcam_cam_init(cam);
  1531. if (ret)
  1532. goto out_unregister;
  1533. /*
  1534. * Get the v4l2 setup done.
  1535. */
  1536. mutex_lock(&cam->s_mutex);
  1537. cam->vdev = mcam_v4l_template;
  1538. cam->vdev.debug = 0;
  1539. cam->vdev.v4l2_dev = &cam->v4l2_dev;
  1540. ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1);
  1541. if (ret)
  1542. goto out;
  1543. video_set_drvdata(&cam->vdev, cam);
  1544. /*
  1545. * If so requested, try to get our DMA buffers now.
  1546. */
  1547. if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) {
  1548. if (mcam_alloc_dma_bufs(cam, 1))
  1549. cam_warn(cam, "Unable to alloc DMA buffers at load"
  1550. " will try again later.");
  1551. }
  1552. out:
  1553. mutex_unlock(&cam->s_mutex);
  1554. return ret;
  1555. out_unregister:
  1556. v4l2_device_unregister(&cam->v4l2_dev);
  1557. return ret;
  1558. }
  1559. void mccic_shutdown(struct mcam_camera *cam)
  1560. {
  1561. /*
  1562. * If we have no users (and we really, really should have no
  1563. * users) the device will already be powered down. Trying to
  1564. * take it down again will wedge the machine, which is frowned
  1565. * upon.
  1566. */
  1567. if (cam->users > 0) {
  1568. cam_warn(cam, "Removing a device with users!\n");
  1569. mcam_ctlr_power_down(cam);
  1570. }
  1571. vb2_queue_release(&cam->vb_queue);
  1572. if (cam->buffer_mode == B_vmalloc)
  1573. mcam_free_dma_bufs(cam);
  1574. video_unregister_device(&cam->vdev);
  1575. v4l2_device_unregister(&cam->v4l2_dev);
  1576. }
  1577. /*
  1578. * Power management
  1579. */
  1580. #ifdef CONFIG_PM
  1581. void mccic_suspend(struct mcam_camera *cam)
  1582. {
  1583. enum mcam_state cstate = cam->state;
  1584. mcam_ctlr_stop_dma(cam);
  1585. mcam_ctlr_power_down(cam);
  1586. cam->state = cstate;
  1587. }
  1588. int mccic_resume(struct mcam_camera *cam)
  1589. {
  1590. int ret = 0;
  1591. mutex_lock(&cam->s_mutex);
  1592. if (cam->users > 0) {
  1593. mcam_ctlr_power_up(cam);
  1594. __mcam_cam_reset(cam);
  1595. } else {
  1596. mcam_ctlr_power_down(cam);
  1597. }
  1598. mutex_unlock(&cam->s_mutex);
  1599. set_bit(CF_CONFIG_NEEDED, &cam->flags);
  1600. if (cam->state == S_STREAMING)
  1601. ret = mcam_read_setup(cam);
  1602. return ret;
  1603. }
  1604. #endif /* CONFIG_PM */