board-g3evm.c 9.1 KB

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  1. /*
  2. * G3EVM board support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/mtd/mtd.h>
  27. #include <linux/mtd/partitions.h>
  28. #include <linux/mtd/physmap.h>
  29. #include <linux/mtd/sh_flctl.h>
  30. #include <linux/usb/r8a66597.h>
  31. #include <linux/io.h>
  32. #include <linux/gpio.h>
  33. #include <linux/input.h>
  34. #include <linux/input/sh_keysc.h>
  35. #include <mach/sh7367.h>
  36. #include <mach/common.h>
  37. #include <asm/mach-types.h>
  38. #include <asm/mach/arch.h>
  39. #include <asm/mach/map.h>
  40. /*
  41. * IrDA
  42. *
  43. * S67: 5bit : ON power
  44. * : 6bit : ON remote control
  45. * OFF IrDA
  46. */
  47. static struct mtd_partition nor_flash_partitions[] = {
  48. {
  49. .name = "loader",
  50. .offset = 0x00000000,
  51. .size = 512 * 1024,
  52. },
  53. {
  54. .name = "bootenv",
  55. .offset = MTDPART_OFS_APPEND,
  56. .size = 512 * 1024,
  57. },
  58. {
  59. .name = "kernel_ro",
  60. .offset = MTDPART_OFS_APPEND,
  61. .size = 8 * 1024 * 1024,
  62. .mask_flags = MTD_WRITEABLE,
  63. },
  64. {
  65. .name = "kernel",
  66. .offset = MTDPART_OFS_APPEND,
  67. .size = 8 * 1024 * 1024,
  68. },
  69. {
  70. .name = "data",
  71. .offset = MTDPART_OFS_APPEND,
  72. .size = MTDPART_SIZ_FULL,
  73. },
  74. };
  75. static struct physmap_flash_data nor_flash_data = {
  76. .width = 2,
  77. .parts = nor_flash_partitions,
  78. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  79. };
  80. static struct resource nor_flash_resources[] = {
  81. [0] = {
  82. .start = 0x00000000,
  83. .end = 0x08000000 - 1,
  84. .flags = IORESOURCE_MEM,
  85. }
  86. };
  87. static struct platform_device nor_flash_device = {
  88. .name = "physmap-flash",
  89. .dev = {
  90. .platform_data = &nor_flash_data,
  91. },
  92. .num_resources = ARRAY_SIZE(nor_flash_resources),
  93. .resource = nor_flash_resources,
  94. };
  95. /* USBHS */
  96. void usb_host_port_power(int port, int power)
  97. {
  98. if (!power) /* only power-on supported for now */
  99. return;
  100. /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
  101. __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
  102. }
  103. static struct r8a66597_platdata usb_host_data = {
  104. .on_chip = 1,
  105. .port_power = usb_host_port_power,
  106. };
  107. static struct resource usb_host_resources[] = {
  108. [0] = {
  109. .name = "USBHS",
  110. .start = 0xe6890000,
  111. .end = 0xe68900e5,
  112. .flags = IORESOURCE_MEM,
  113. },
  114. [1] = {
  115. .start = evt2irq(0xa20), /* USBHS_USHI0 */
  116. .flags = IORESOURCE_IRQ,
  117. },
  118. };
  119. static struct platform_device usb_host_device = {
  120. .name = "r8a66597_hcd",
  121. .id = 0,
  122. .dev = {
  123. .platform_data = &usb_host_data,
  124. .dma_mask = NULL,
  125. .coherent_dma_mask = 0xffffffff,
  126. },
  127. .num_resources = ARRAY_SIZE(usb_host_resources),
  128. .resource = usb_host_resources,
  129. };
  130. /* KEYSC */
  131. static struct sh_keysc_info keysc_info = {
  132. .mode = SH_KEYSC_MODE_5,
  133. .scan_timing = 3,
  134. .delay = 100,
  135. .keycodes = {
  136. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G,
  137. KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N,
  138. KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U,
  139. KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP,
  140. KEY_WAKEUP, KEY_COFFEE, KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
  141. KEY_5, KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER,
  142. },
  143. };
  144. static struct resource keysc_resources[] = {
  145. [0] = {
  146. .name = "KEYSC",
  147. .start = 0xe61b0000,
  148. .end = 0xe61b000f,
  149. .flags = IORESOURCE_MEM,
  150. },
  151. [1] = {
  152. .start = evt2irq(0xbe0), /* KEYSC_KEY */
  153. .flags = IORESOURCE_IRQ,
  154. },
  155. };
  156. static struct platform_device keysc_device = {
  157. .name = "sh_keysc",
  158. .num_resources = ARRAY_SIZE(keysc_resources),
  159. .resource = keysc_resources,
  160. .dev = {
  161. .platform_data = &keysc_info,
  162. },
  163. };
  164. static struct mtd_partition nand_partition_info[] = {
  165. {
  166. .name = "system",
  167. .offset = 0,
  168. .size = 64 * 1024 * 1024,
  169. },
  170. {
  171. .name = "userdata",
  172. .offset = MTDPART_OFS_APPEND,
  173. .size = 128 * 1024 * 1024,
  174. },
  175. {
  176. .name = "cache",
  177. .offset = MTDPART_OFS_APPEND,
  178. .size = 64 * 1024 * 1024,
  179. },
  180. };
  181. static struct resource nand_flash_resources[] = {
  182. [0] = {
  183. .start = 0xe6a30000,
  184. .end = 0xe6a3009b,
  185. .flags = IORESOURCE_MEM,
  186. }
  187. };
  188. static struct sh_flctl_platform_data nand_flash_data = {
  189. .parts = nand_partition_info,
  190. .nr_parts = ARRAY_SIZE(nand_partition_info),
  191. .flcmncr_val = QTSEL_E | FCKSEL_E | TYPESEL_SET | NANWF_E
  192. | SHBUSSEL | SEL_16BIT,
  193. };
  194. static struct platform_device nand_flash_device = {
  195. .name = "sh_flctl",
  196. .resource = nand_flash_resources,
  197. .num_resources = ARRAY_SIZE(nand_flash_resources),
  198. .dev = {
  199. .platform_data = &nand_flash_data,
  200. },
  201. };
  202. static struct resource irda_resources[] = {
  203. [0] = {
  204. .start = 0xE6D00000,
  205. .end = 0xE6D01FD4 - 1,
  206. .flags = IORESOURCE_MEM,
  207. },
  208. [1] = {
  209. .start = evt2irq(0x480), /* IRDA */
  210. .flags = IORESOURCE_IRQ,
  211. },
  212. };
  213. static struct platform_device irda_device = {
  214. .name = "sh_irda",
  215. .resource = irda_resources,
  216. .num_resources = ARRAY_SIZE(irda_resources),
  217. };
  218. static struct platform_device *g3evm_devices[] __initdata = {
  219. &nor_flash_device,
  220. &usb_host_device,
  221. &keysc_device,
  222. &nand_flash_device,
  223. &irda_device,
  224. };
  225. static struct map_desc g3evm_io_desc[] __initdata = {
  226. /* create a 1:1 entity map for 0xe6xxxxxx
  227. * used by CPGA, INTC and PFC.
  228. */
  229. {
  230. .virtual = 0xe6000000,
  231. .pfn = __phys_to_pfn(0xe6000000),
  232. .length = 256 << 20,
  233. .type = MT_DEVICE_NONSHARED
  234. },
  235. };
  236. static void __init g3evm_map_io(void)
  237. {
  238. iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
  239. /* setup early devices, clocks and console here as well */
  240. sh7367_add_early_devices();
  241. sh7367_clock_init();
  242. shmobile_setup_console();
  243. }
  244. static void __init g3evm_init(void)
  245. {
  246. sh7367_pinmux_init();
  247. /* Lit DS4 LED */
  248. gpio_request(GPIO_PORT22, NULL);
  249. gpio_direction_output(GPIO_PORT22, 1);
  250. gpio_export(GPIO_PORT22, 0);
  251. /* Lit DS8 LED */
  252. gpio_request(GPIO_PORT23, NULL);
  253. gpio_direction_output(GPIO_PORT23, 1);
  254. gpio_export(GPIO_PORT23, 0);
  255. /* Lit DS3 LED */
  256. gpio_request(GPIO_PORT24, NULL);
  257. gpio_direction_output(GPIO_PORT24, 1);
  258. gpio_export(GPIO_PORT24, 0);
  259. /* SCIFA1 */
  260. gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
  261. gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
  262. gpio_request(GPIO_FN_SCIFA1_CTS, NULL);
  263. gpio_request(GPIO_FN_SCIFA1_RTS, NULL);
  264. /* USBHS */
  265. gpio_request(GPIO_FN_VBUS0, NULL);
  266. gpio_request(GPIO_FN_PWEN, NULL);
  267. gpio_request(GPIO_FN_OVCN, NULL);
  268. gpio_request(GPIO_FN_OVCN2, NULL);
  269. gpio_request(GPIO_FN_EXTLP, NULL);
  270. gpio_request(GPIO_FN_IDIN, NULL);
  271. /* enable clock in SYMSTPCR2 */
  272. __raw_writel(__raw_readl(0xe6158048) & ~(1 << 22), 0xe6158048);
  273. /* setup USB phy */
  274. __raw_writew(0x0300, 0xe605810a); /* USBCR1 */
  275. __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */
  276. __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */
  277. __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */
  278. /* KEYSC @ CN7 */
  279. gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL);
  280. gpio_request(GPIO_FN_PORT43_KEYOUT1, NULL);
  281. gpio_request(GPIO_FN_PORT44_KEYOUT2, NULL);
  282. gpio_request(GPIO_FN_PORT45_KEYOUT3, NULL);
  283. gpio_request(GPIO_FN_PORT46_KEYOUT4, NULL);
  284. gpio_request(GPIO_FN_PORT47_KEYOUT5, NULL);
  285. gpio_request(GPIO_FN_PORT48_KEYIN0_PU, NULL);
  286. gpio_request(GPIO_FN_PORT49_KEYIN1_PU, NULL);
  287. gpio_request(GPIO_FN_PORT50_KEYIN2_PU, NULL);
  288. gpio_request(GPIO_FN_PORT55_KEYIN3_PU, NULL);
  289. gpio_request(GPIO_FN_PORT56_KEYIN4_PU, NULL);
  290. gpio_request(GPIO_FN_PORT57_KEYIN5_PU, NULL);
  291. gpio_request(GPIO_FN_PORT58_KEYIN6_PU, NULL);
  292. /* FLCTL */
  293. gpio_request(GPIO_FN_FCE0, NULL);
  294. gpio_request(GPIO_FN_D0_ED0_NAF0, NULL);
  295. gpio_request(GPIO_FN_D1_ED1_NAF1, NULL);
  296. gpio_request(GPIO_FN_D2_ED2_NAF2, NULL);
  297. gpio_request(GPIO_FN_D3_ED3_NAF3, NULL);
  298. gpio_request(GPIO_FN_D4_ED4_NAF4, NULL);
  299. gpio_request(GPIO_FN_D5_ED5_NAF5, NULL);
  300. gpio_request(GPIO_FN_D6_ED6_NAF6, NULL);
  301. gpio_request(GPIO_FN_D7_ED7_NAF7, NULL);
  302. gpio_request(GPIO_FN_D8_ED8_NAF8, NULL);
  303. gpio_request(GPIO_FN_D9_ED9_NAF9, NULL);
  304. gpio_request(GPIO_FN_D10_ED10_NAF10, NULL);
  305. gpio_request(GPIO_FN_D11_ED11_NAF11, NULL);
  306. gpio_request(GPIO_FN_D12_ED12_NAF12, NULL);
  307. gpio_request(GPIO_FN_D13_ED13_NAF13, NULL);
  308. gpio_request(GPIO_FN_D14_ED14_NAF14, NULL);
  309. gpio_request(GPIO_FN_D15_ED15_NAF15, NULL);
  310. gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL);
  311. gpio_request(GPIO_FN_FRB, NULL);
  312. /* FOE, FCDE, FSC on dedicated pins */
  313. __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048);
  314. /* IrDA */
  315. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  316. gpio_request(GPIO_FN_IRDA_IN, NULL);
  317. gpio_request(GPIO_FN_IRDA_FIRSEL, NULL);
  318. set_irq_type(evt2irq(0x480), IRQ_TYPE_LEVEL_LOW);
  319. sh7367_add_standard_devices();
  320. platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
  321. }
  322. MACHINE_START(G3EVM, "g3evm")
  323. .phys_io = 0xe6000000,
  324. .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
  325. .map_io = g3evm_map_io,
  326. .init_irq = sh7367_init_irq,
  327. .init_machine = g3evm_init,
  328. .timer = &shmobile_timer,
  329. MACHINE_END