lh7a40x_udc.c 50 KB

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  1. /*
  2. * linux/drivers/usb/gadget/lh7a40x_udc.c
  3. * Sharp LH7A40x on-chip full speed USB device controllers
  4. *
  5. * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
  6. * Copyright (C) 2004 Bo Henriksen, Nordic ID
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/platform_device.h>
  24. #include "lh7a40x_udc.h"
  25. //#define DEBUG printk
  26. //#define DEBUG_EP0 printk
  27. //#define DEBUG_SETUP printk
  28. #ifndef DEBUG_EP0
  29. # define DEBUG_EP0(fmt,args...)
  30. #endif
  31. #ifndef DEBUG_SETUP
  32. # define DEBUG_SETUP(fmt,args...)
  33. #endif
  34. #ifndef DEBUG
  35. # define NO_STATES
  36. # define DEBUG(fmt,args...)
  37. #endif
  38. #define DRIVER_DESC "LH7A40x USB Device Controller"
  39. #define DRIVER_VERSION __DATE__
  40. #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
  41. #define _BIT(x) (1<<(x))
  42. #endif
  43. struct lh7a40x_udc *the_controller;
  44. static const char driver_name[] = "lh7a40x_udc";
  45. static const char driver_desc[] = DRIVER_DESC;
  46. static const char ep0name[] = "ep0-control";
  47. /*
  48. Local definintions.
  49. */
  50. #ifndef NO_STATES
  51. static char *state_names[] = {
  52. "WAIT_FOR_SETUP",
  53. "DATA_STATE_XMIT",
  54. "DATA_STATE_NEED_ZLP",
  55. "WAIT_FOR_OUT_STATUS",
  56. "DATA_STATE_RECV"
  57. };
  58. #endif
  59. /*
  60. Local declarations.
  61. */
  62. static int lh7a40x_ep_enable(struct usb_ep *ep,
  63. const struct usb_endpoint_descriptor *);
  64. static int lh7a40x_ep_disable(struct usb_ep *ep);
  65. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
  66. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
  67. static void *lh7a40x_alloc_buffer(struct usb_ep *ep, unsigned, dma_addr_t *,
  68. gfp_t);
  69. static void lh7a40x_free_buffer(struct usb_ep *ep, void *, dma_addr_t,
  70. unsigned);
  71. static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
  72. static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
  73. static int lh7a40x_set_halt(struct usb_ep *ep, int);
  74. static int lh7a40x_fifo_status(struct usb_ep *ep);
  75. static void lh7a40x_fifo_flush(struct usb_ep *ep);
  76. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
  77. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
  78. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
  79. int status);
  80. static void pio_irq_enable(int bEndpointAddress);
  81. static void pio_irq_disable(int bEndpointAddress);
  82. static void stop_activity(struct lh7a40x_udc *dev,
  83. struct usb_gadget_driver *driver);
  84. static void flush(struct lh7a40x_ep *ep);
  85. static void udc_enable(struct lh7a40x_udc *dev);
  86. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
  87. static struct usb_ep_ops lh7a40x_ep_ops = {
  88. .enable = lh7a40x_ep_enable,
  89. .disable = lh7a40x_ep_disable,
  90. .alloc_request = lh7a40x_alloc_request,
  91. .free_request = lh7a40x_free_request,
  92. .alloc_buffer = lh7a40x_alloc_buffer,
  93. .free_buffer = lh7a40x_free_buffer,
  94. .queue = lh7a40x_queue,
  95. .dequeue = lh7a40x_dequeue,
  96. .set_halt = lh7a40x_set_halt,
  97. .fifo_status = lh7a40x_fifo_status,
  98. .fifo_flush = lh7a40x_fifo_flush,
  99. };
  100. /* Inline code */
  101. static __inline__ int write_packet(struct lh7a40x_ep *ep,
  102. struct lh7a40x_request *req, int max)
  103. {
  104. u8 *buf;
  105. int length, count;
  106. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  107. buf = req->req.buf + req->req.actual;
  108. prefetch(buf);
  109. length = req->req.length - req->req.actual;
  110. length = min(length, max);
  111. req->req.actual += length;
  112. DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
  113. count = length;
  114. while (count--) {
  115. *fifo = *buf++;
  116. }
  117. return length;
  118. }
  119. static __inline__ void usb_set_index(u32 ep)
  120. {
  121. *(volatile u32 *)io_p2v(USB_INDEX) = ep;
  122. }
  123. static __inline__ u32 usb_read(u32 port)
  124. {
  125. return *(volatile u32 *)io_p2v(port);
  126. }
  127. static __inline__ void usb_write(u32 val, u32 port)
  128. {
  129. *(volatile u32 *)io_p2v(port) = val;
  130. }
  131. static __inline__ void usb_set(u32 val, u32 port)
  132. {
  133. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  134. u32 after = (*ioport) | val;
  135. *ioport = after;
  136. }
  137. static __inline__ void usb_clear(u32 val, u32 port)
  138. {
  139. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  140. u32 after = (*ioport) & ~val;
  141. *ioport = after;
  142. }
  143. /*-------------------------------------------------------------------------*/
  144. #define GPIO_PORTC_DR (0x80000E08)
  145. #define GPIO_PORTC_DDR (0x80000E18)
  146. #define GPIO_PORTC_PDR (0x80000E70)
  147. /* get port C pin data register */
  148. #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
  149. /* get port C data direction register */
  150. #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
  151. /* set port C data register */
  152. #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
  153. /* set port C data direction register */
  154. #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
  155. /*
  156. * LPD7A404 GPIO's:
  157. * Port C bit 1 = USB Port 1 Power Enable
  158. * Port C bit 2 = USB Port 1 Data Carrier Detect
  159. */
  160. #define is_usb_connected() get_portc_pdr(2)
  161. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  162. static const char proc_node_name[] = "driver/udc";
  163. static int
  164. udc_proc_read(char *page, char **start, off_t off, int count,
  165. int *eof, void *_dev)
  166. {
  167. char *buf = page;
  168. struct lh7a40x_udc *dev = _dev;
  169. char *next = buf;
  170. unsigned size = count;
  171. unsigned long flags;
  172. int t;
  173. if (off != 0)
  174. return 0;
  175. local_irq_save(flags);
  176. /* basic device status */
  177. t = scnprintf(next, size,
  178. DRIVER_DESC "\n"
  179. "%s version: %s\n"
  180. "Gadget driver: %s\n"
  181. "Host: %s\n\n",
  182. driver_name, DRIVER_VERSION,
  183. dev->driver ? dev->driver->driver.name : "(none)",
  184. is_usb_connected()? "full speed" : "disconnected");
  185. size -= t;
  186. next += t;
  187. t = scnprintf(next, size,
  188. "GPIO:\n"
  189. " Port C bit 1: %d, dir %d\n"
  190. " Port C bit 2: %d, dir %d\n\n",
  191. get_portc_pdr(1), get_portc_ddr(1),
  192. get_portc_pdr(2), get_portc_ddr(2)
  193. );
  194. size -= t;
  195. next += t;
  196. t = scnprintf(next, size,
  197. "DCP pullup: %d\n\n",
  198. (usb_read(USB_PM) & PM_USB_DCP) != 0);
  199. size -= t;
  200. next += t;
  201. local_irq_restore(flags);
  202. *eof = 1;
  203. return count - size;
  204. }
  205. #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
  206. #define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
  207. #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
  208. #define create_proc_files() do {} while (0)
  209. #define remove_proc_files() do {} while (0)
  210. #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
  211. /*
  212. * udc_disable - disable USB device controller
  213. */
  214. static void udc_disable(struct lh7a40x_udc *dev)
  215. {
  216. DEBUG("%s, %p\n", __FUNCTION__, dev);
  217. udc_set_address(dev, 0);
  218. /* Disable interrupts */
  219. usb_write(0, USB_IN_INT_EN);
  220. usb_write(0, USB_OUT_INT_EN);
  221. usb_write(0, USB_INT_EN);
  222. /* Disable the USB */
  223. usb_write(0, USB_PM);
  224. #ifdef CONFIG_ARCH_LH7A404
  225. /* Disable USB power */
  226. set_portc_dr(1, 0);
  227. #endif
  228. /* if hardware supports it, disconnect from usb */
  229. /* make_usb_disappear(); */
  230. dev->ep0state = WAIT_FOR_SETUP;
  231. dev->gadget.speed = USB_SPEED_UNKNOWN;
  232. dev->usb_address = 0;
  233. }
  234. /*
  235. * udc_reinit - initialize software state
  236. */
  237. static void udc_reinit(struct lh7a40x_udc *dev)
  238. {
  239. u32 i;
  240. DEBUG("%s, %p\n", __FUNCTION__, dev);
  241. /* device/ep0 records init */
  242. INIT_LIST_HEAD(&dev->gadget.ep_list);
  243. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  244. dev->ep0state = WAIT_FOR_SETUP;
  245. /* basic endpoint records init */
  246. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  247. struct lh7a40x_ep *ep = &dev->ep[i];
  248. if (i != 0)
  249. list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
  250. ep->desc = 0;
  251. ep->stopped = 0;
  252. INIT_LIST_HEAD(&ep->queue);
  253. ep->pio_irqs = 0;
  254. }
  255. /* the rest was statically initialized, and is read-only */
  256. }
  257. #define BYTES2MAXP(x) (x / 8)
  258. #define MAXP2BYTES(x) (x * 8)
  259. /* until it's enabled, this UDC should be completely invisible
  260. * to any USB host.
  261. */
  262. static void udc_enable(struct lh7a40x_udc *dev)
  263. {
  264. int ep;
  265. DEBUG("%s, %p\n", __FUNCTION__, dev);
  266. dev->gadget.speed = USB_SPEED_UNKNOWN;
  267. #ifdef CONFIG_ARCH_LH7A404
  268. /* Set Port C bit 1 & 2 as output */
  269. set_portc_ddr(1, 1);
  270. set_portc_ddr(2, 1);
  271. /* Enable USB power */
  272. set_portc_dr(1, 0);
  273. #endif
  274. /*
  275. * C.f Chapter 18.1.3.1 Initializing the USB
  276. */
  277. /* Disable the USB */
  278. usb_clear(PM_USB_ENABLE, USB_PM);
  279. /* Reset APB & I/O sides of the USB */
  280. usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  281. mdelay(5);
  282. usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  283. /* Set MAXP values for each */
  284. for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
  285. struct lh7a40x_ep *ep_reg = &dev->ep[ep];
  286. u32 csr;
  287. usb_set_index(ep);
  288. switch (ep_reg->ep_type) {
  289. case ep_bulk_in:
  290. case ep_interrupt:
  291. usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
  292. ep_reg->csr2);
  293. /* Fall through */
  294. case ep_control:
  295. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  296. USB_IN_MAXP);
  297. break;
  298. case ep_bulk_out:
  299. usb_clear(USB_OUT_CSR2_USB_DMA_EN |
  300. USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
  301. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  302. USB_OUT_MAXP);
  303. break;
  304. }
  305. /* Read & Write CSR1, just in case */
  306. csr = usb_read(ep_reg->csr1);
  307. usb_write(csr, ep_reg->csr1);
  308. flush(ep_reg);
  309. }
  310. /* Disable interrupts */
  311. usb_write(0, USB_IN_INT_EN);
  312. usb_write(0, USB_OUT_INT_EN);
  313. usb_write(0, USB_INT_EN);
  314. /* Enable interrupts */
  315. usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
  316. usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
  317. /* Dont enable rest of the interrupts */
  318. /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
  319. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
  320. /* Enable SUSPEND */
  321. usb_set(PM_ENABLE_SUSPEND, USB_PM);
  322. /* Enable the USB */
  323. usb_set(PM_USB_ENABLE, USB_PM);
  324. #ifdef CONFIG_ARCH_LH7A404
  325. /* NOTE: DOES NOT WORK! */
  326. /* Let host detect UDC:
  327. * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
  328. * transistor on and pull the USBDP pin HIGH.
  329. */
  330. /* usb_clear(PM_USB_DCP, USB_PM);
  331. usb_set(PM_USB_DCP, USB_PM); */
  332. #endif
  333. }
  334. /*
  335. Register entry point for the peripheral controller driver.
  336. */
  337. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  338. {
  339. struct lh7a40x_udc *dev = the_controller;
  340. int retval;
  341. DEBUG("%s: %s\n", __FUNCTION__, driver->driver.name);
  342. if (!driver
  343. || driver->speed != USB_SPEED_FULL
  344. || !driver->bind
  345. || !driver->unbind || !driver->disconnect || !driver->setup)
  346. return -EINVAL;
  347. if (!dev)
  348. return -ENODEV;
  349. if (dev->driver)
  350. return -EBUSY;
  351. /* first hook up the driver ... */
  352. dev->driver = driver;
  353. dev->gadget.dev.driver = &driver->driver;
  354. device_add(&dev->gadget.dev);
  355. retval = driver->bind(&dev->gadget);
  356. if (retval) {
  357. printk("%s: bind to driver %s --> error %d\n", dev->gadget.name,
  358. driver->driver.name, retval);
  359. device_del(&dev->gadget.dev);
  360. dev->driver = 0;
  361. dev->gadget.dev.driver = 0;
  362. return retval;
  363. }
  364. /* ... then enable host detection and ep0; and we're ready
  365. * for set_configuration as well as eventual disconnect.
  366. * NOTE: this shouldn't power up until later.
  367. */
  368. printk("%s: registered gadget driver '%s'\n", dev->gadget.name,
  369. driver->driver.name);
  370. udc_enable(dev);
  371. return 0;
  372. }
  373. EXPORT_SYMBOL(usb_gadget_register_driver);
  374. /*
  375. Unregister entry point for the peripheral controller driver.
  376. */
  377. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  378. {
  379. struct lh7a40x_udc *dev = the_controller;
  380. unsigned long flags;
  381. if (!dev)
  382. return -ENODEV;
  383. if (!driver || driver != dev->driver)
  384. return -EINVAL;
  385. spin_lock_irqsave(&dev->lock, flags);
  386. dev->driver = 0;
  387. stop_activity(dev, driver);
  388. spin_unlock_irqrestore(&dev->lock, flags);
  389. driver->unbind(&dev->gadget);
  390. device_del(&dev->gadget.dev);
  391. udc_disable(dev);
  392. DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
  393. return 0;
  394. }
  395. EXPORT_SYMBOL(usb_gadget_unregister_driver);
  396. /*-------------------------------------------------------------------------*/
  397. /** Write request to FIFO (max write == maxp size)
  398. * Return: 0 = still running, 1 = completed, negative = errno
  399. * NOTE: INDEX register must be set for EP
  400. */
  401. static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  402. {
  403. u32 max;
  404. u32 csr;
  405. max = le16_to_cpu(ep->desc->wMaxPacketSize);
  406. csr = usb_read(ep->csr1);
  407. DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
  408. if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
  409. unsigned count;
  410. int is_last, is_short;
  411. count = write_packet(ep, req, max);
  412. usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
  413. /* last packet is usually short (or a zlp) */
  414. if (unlikely(count != max))
  415. is_last = is_short = 1;
  416. else {
  417. if (likely(req->req.length != req->req.actual)
  418. || req->req.zero)
  419. is_last = 0;
  420. else
  421. is_last = 1;
  422. /* interrupt/iso maxpacket may not fill the fifo */
  423. is_short = unlikely(max < ep_maxpacket(ep));
  424. }
  425. DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __FUNCTION__,
  426. ep->ep.name, count,
  427. is_last ? "/L" : "", is_short ? "/S" : "",
  428. req->req.length - req->req.actual, req);
  429. /* requests complete when all IN data is in the FIFO */
  430. if (is_last) {
  431. done(ep, req, 0);
  432. if (list_empty(&ep->queue)) {
  433. pio_irq_disable(ep_index(ep));
  434. }
  435. return 1;
  436. }
  437. } else {
  438. DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
  439. }
  440. return 0;
  441. }
  442. /** Read to request from FIFO (max read == bytes in fifo)
  443. * Return: 0 = still running, 1 = completed, negative = errno
  444. * NOTE: INDEX register must be set for EP
  445. */
  446. static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  447. {
  448. u32 csr;
  449. u8 *buf;
  450. unsigned bufferspace, count, is_short;
  451. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  452. /* make sure there's a packet in the FIFO. */
  453. csr = usb_read(ep->csr1);
  454. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
  455. DEBUG("%s: Packet NOT ready!\n", __FUNCTION__);
  456. return -EINVAL;
  457. }
  458. buf = req->req.buf + req->req.actual;
  459. prefetchw(buf);
  460. bufferspace = req->req.length - req->req.actual;
  461. /* read all bytes from this packet */
  462. count = usb_read(USB_OUT_FIFO_WC1);
  463. req->req.actual += min(count, bufferspace);
  464. is_short = (count < ep->ep.maxpacket);
  465. DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
  466. ep->ep.name, csr, count,
  467. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  468. while (likely(count-- != 0)) {
  469. u8 byte = (u8) (*fifo & 0xff);
  470. if (unlikely(bufferspace == 0)) {
  471. /* this happens when the driver's buffer
  472. * is smaller than what the host sent.
  473. * discard the extra data.
  474. */
  475. if (req->req.status != -EOVERFLOW)
  476. printk("%s overflow %d\n", ep->ep.name, count);
  477. req->req.status = -EOVERFLOW;
  478. } else {
  479. *buf++ = byte;
  480. bufferspace--;
  481. }
  482. }
  483. usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
  484. /* completion */
  485. if (is_short || req->req.actual == req->req.length) {
  486. done(ep, req, 0);
  487. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  488. if (list_empty(&ep->queue))
  489. pio_irq_disable(ep_index(ep));
  490. return 1;
  491. }
  492. /* finished that packet. the next one may be waiting... */
  493. return 0;
  494. }
  495. /*
  496. * done - retire a request; caller blocked irqs
  497. * INDEX register is preserved to keep same
  498. */
  499. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
  500. {
  501. unsigned int stopped = ep->stopped;
  502. u32 index;
  503. DEBUG("%s, %p\n", __FUNCTION__, ep);
  504. list_del_init(&req->queue);
  505. if (likely(req->req.status == -EINPROGRESS))
  506. req->req.status = status;
  507. else
  508. status = req->req.status;
  509. if (status && status != -ESHUTDOWN)
  510. DEBUG("complete %s req %p stat %d len %u/%u\n",
  511. ep->ep.name, &req->req, status,
  512. req->req.actual, req->req.length);
  513. /* don't modify queue heads during completion callback */
  514. ep->stopped = 1;
  515. /* Read current index (completion may modify it) */
  516. index = usb_read(USB_INDEX);
  517. spin_unlock(&ep->dev->lock);
  518. req->req.complete(&ep->ep, &req->req);
  519. spin_lock(&ep->dev->lock);
  520. /* Restore index */
  521. usb_set_index(index);
  522. ep->stopped = stopped;
  523. }
  524. /** Enable EP interrupt */
  525. static void pio_irq_enable(int ep)
  526. {
  527. DEBUG("%s: %d\n", __FUNCTION__, ep);
  528. switch (ep) {
  529. case 1:
  530. usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
  531. break;
  532. case 2:
  533. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  534. break;
  535. case 3:
  536. usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
  537. break;
  538. default:
  539. DEBUG("Unknown endpoint: %d\n", ep);
  540. break;
  541. }
  542. }
  543. /** Disable EP interrupt */
  544. static void pio_irq_disable(int ep)
  545. {
  546. DEBUG("%s: %d\n", __FUNCTION__, ep);
  547. switch (ep) {
  548. case 1:
  549. usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
  550. break;
  551. case 2:
  552. usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  553. break;
  554. case 3:
  555. usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
  556. break;
  557. default:
  558. DEBUG("Unknown endpoint: %d\n", ep);
  559. break;
  560. }
  561. }
  562. /*
  563. * nuke - dequeue ALL requests
  564. */
  565. void nuke(struct lh7a40x_ep *ep, int status)
  566. {
  567. struct lh7a40x_request *req;
  568. DEBUG("%s, %p\n", __FUNCTION__, ep);
  569. /* Flush FIFO */
  570. flush(ep);
  571. /* called with irqs blocked */
  572. while (!list_empty(&ep->queue)) {
  573. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  574. done(ep, req, status);
  575. }
  576. /* Disable IRQ if EP is enabled (has descriptor) */
  577. if (ep->desc)
  578. pio_irq_disable(ep_index(ep));
  579. }
  580. /*
  581. void nuke_all(struct lh7a40x_udc *dev)
  582. {
  583. int n;
  584. for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
  585. struct lh7a40x_ep *ep = &dev->ep[n];
  586. usb_set_index(n);
  587. nuke(ep, 0);
  588. }
  589. }*/
  590. /*
  591. static void flush_all(struct lh7a40x_udc *dev)
  592. {
  593. int n;
  594. for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
  595. {
  596. struct lh7a40x_ep *ep = &dev->ep[n];
  597. flush(ep);
  598. }
  599. }
  600. */
  601. /** Flush EP
  602. * NOTE: INDEX register must be set before this call
  603. */
  604. static void flush(struct lh7a40x_ep *ep)
  605. {
  606. DEBUG("%s, %p\n", __FUNCTION__, ep);
  607. switch (ep->ep_type) {
  608. case ep_control:
  609. /* check, by implication c.f. 15.1.2.11 */
  610. break;
  611. case ep_bulk_in:
  612. case ep_interrupt:
  613. /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
  614. usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
  615. break;
  616. case ep_bulk_out:
  617. /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
  618. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  619. break;
  620. }
  621. }
  622. /**
  623. * lh7a40x_in_epn - handle IN interrupt
  624. */
  625. static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  626. {
  627. u32 csr;
  628. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  629. struct lh7a40x_request *req;
  630. usb_set_index(ep_idx);
  631. csr = usb_read(ep->csr1);
  632. DEBUG("%s: %d, csr %x\n", __FUNCTION__, ep_idx, csr);
  633. if (csr & USB_IN_CSR1_SENT_STALL) {
  634. DEBUG("USB_IN_CSR1_SENT_STALL\n");
  635. usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
  636. ep->csr1);
  637. return;
  638. }
  639. if (!ep->desc) {
  640. DEBUG("%s: NO EP DESC\n", __FUNCTION__);
  641. return;
  642. }
  643. if (list_empty(&ep->queue))
  644. req = 0;
  645. else
  646. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  647. DEBUG("req: %p\n", req);
  648. if (!req)
  649. return;
  650. write_fifo(ep, req);
  651. }
  652. /* ********************************************************************************************* */
  653. /* Bulk OUT (recv)
  654. */
  655. static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  656. {
  657. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  658. struct lh7a40x_request *req;
  659. DEBUG("%s: %d\n", __FUNCTION__, ep_idx);
  660. usb_set_index(ep_idx);
  661. if (ep->desc) {
  662. u32 csr;
  663. csr = usb_read(ep->csr1);
  664. while ((csr =
  665. usb_read(ep->
  666. csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
  667. USB_OUT_CSR1_SENT_STALL)) {
  668. DEBUG("%s: %x\n", __FUNCTION__, csr);
  669. if (csr & USB_OUT_CSR1_SENT_STALL) {
  670. DEBUG("%s: stall sent, flush fifo\n",
  671. __FUNCTION__);
  672. /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
  673. flush(ep);
  674. } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  675. if (list_empty(&ep->queue))
  676. req = 0;
  677. else
  678. req =
  679. list_entry(ep->queue.next,
  680. struct lh7a40x_request,
  681. queue);
  682. if (!req) {
  683. printk("%s: NULL REQ %d\n",
  684. __FUNCTION__, ep_idx);
  685. flush(ep);
  686. break;
  687. } else {
  688. read_fifo(ep, req);
  689. }
  690. }
  691. }
  692. } else {
  693. /* Throw packet away.. */
  694. printk("%s: No descriptor?!?\n", __FUNCTION__);
  695. flush(ep);
  696. }
  697. }
  698. static void stop_activity(struct lh7a40x_udc *dev,
  699. struct usb_gadget_driver *driver)
  700. {
  701. int i;
  702. /* don't disconnect drivers more than once */
  703. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  704. driver = 0;
  705. dev->gadget.speed = USB_SPEED_UNKNOWN;
  706. /* prevent new request submissions, kill any outstanding requests */
  707. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  708. struct lh7a40x_ep *ep = &dev->ep[i];
  709. ep->stopped = 1;
  710. usb_set_index(i);
  711. nuke(ep, -ESHUTDOWN);
  712. }
  713. /* report disconnect; the driver is already quiesced */
  714. if (driver) {
  715. spin_unlock(&dev->lock);
  716. driver->disconnect(&dev->gadget);
  717. spin_lock(&dev->lock);
  718. }
  719. /* re-init driver-visible data structures */
  720. udc_reinit(dev);
  721. }
  722. /** Handle USB RESET interrupt
  723. */
  724. static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
  725. {
  726. #if 0 /* def CONFIG_ARCH_LH7A404 */
  727. /* Does not work always... */
  728. DEBUG("%s: %d\n", __FUNCTION__, dev->usb_address);
  729. if (!dev->usb_address) {
  730. /*usb_set(USB_RESET_IO, USB_RESET);
  731. mdelay(5);
  732. usb_clear(USB_RESET_IO, USB_RESET); */
  733. return;
  734. }
  735. /* Put the USB controller into reset. */
  736. usb_set(USB_RESET_IO, USB_RESET);
  737. /* Set Device ID to 0 */
  738. udc_set_address(dev, 0);
  739. /* Let PLL2 settle down */
  740. mdelay(5);
  741. /* Release the USB controller from reset */
  742. usb_clear(USB_RESET_IO, USB_RESET);
  743. /* Re-enable UDC */
  744. udc_enable(dev);
  745. #endif
  746. dev->gadget.speed = USB_SPEED_FULL;
  747. }
  748. /*
  749. * lh7a40x usb client interrupt handler.
  750. */
  751. static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
  752. {
  753. struct lh7a40x_udc *dev = _dev;
  754. DEBUG("\n\n");
  755. spin_lock(&dev->lock);
  756. for (;;) {
  757. u32 intr_in = usb_read(USB_IN_INT);
  758. u32 intr_out = usb_read(USB_OUT_INT);
  759. u32 intr_int = usb_read(USB_INT);
  760. /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
  761. u32 in_en = usb_read(USB_IN_INT_EN);
  762. u32 out_en = usb_read(USB_OUT_INT_EN);
  763. if (!intr_out && !intr_in && !intr_int)
  764. break;
  765. DEBUG("%s (on state %s)\n", __FUNCTION__,
  766. state_names[dev->ep0state]);
  767. DEBUG("intr_out = %x\n", intr_out);
  768. DEBUG("intr_in = %x\n", intr_in);
  769. DEBUG("intr_int = %x\n", intr_int);
  770. if (intr_in) {
  771. usb_write(intr_in, USB_IN_INT);
  772. if ((intr_in & USB_IN_INT_EP1)
  773. && (in_en & USB_IN_INT_EP1)) {
  774. DEBUG("USB_IN_INT_EP1\n");
  775. lh7a40x_in_epn(dev, 1, intr_in);
  776. }
  777. if ((intr_in & USB_IN_INT_EP3)
  778. && (in_en & USB_IN_INT_EP3)) {
  779. DEBUG("USB_IN_INT_EP3\n");
  780. lh7a40x_in_epn(dev, 3, intr_in);
  781. }
  782. if (intr_in & USB_IN_INT_EP0) {
  783. DEBUG("USB_IN_INT_EP0 (control)\n");
  784. lh7a40x_handle_ep0(dev, intr_in);
  785. }
  786. }
  787. if (intr_out) {
  788. usb_write(intr_out, USB_OUT_INT);
  789. if ((intr_out & USB_OUT_INT_EP2)
  790. && (out_en & USB_OUT_INT_EP2)) {
  791. DEBUG("USB_OUT_INT_EP2\n");
  792. lh7a40x_out_epn(dev, 2, intr_out);
  793. }
  794. }
  795. if (intr_int) {
  796. usb_write(intr_int, USB_INT);
  797. if (intr_int & USB_INT_RESET_INT) {
  798. lh7a40x_reset_intr(dev);
  799. }
  800. if (intr_int & USB_INT_RESUME_INT) {
  801. DEBUG("USB resume\n");
  802. if (dev->gadget.speed != USB_SPEED_UNKNOWN
  803. && dev->driver
  804. && dev->driver->resume
  805. && is_usb_connected()) {
  806. dev->driver->resume(&dev->gadget);
  807. }
  808. }
  809. if (intr_int & USB_INT_SUSPEND_INT) {
  810. DEBUG("USB suspend%s\n",
  811. is_usb_connected()? "" : "+disconnect");
  812. if (!is_usb_connected()) {
  813. stop_activity(dev, dev->driver);
  814. } else if (dev->gadget.speed !=
  815. USB_SPEED_UNKNOWN && dev->driver
  816. && dev->driver->suspend) {
  817. dev->driver->suspend(&dev->gadget);
  818. }
  819. }
  820. }
  821. }
  822. spin_unlock(&dev->lock);
  823. return IRQ_HANDLED;
  824. }
  825. static int lh7a40x_ep_enable(struct usb_ep *_ep,
  826. const struct usb_endpoint_descriptor *desc)
  827. {
  828. struct lh7a40x_ep *ep;
  829. struct lh7a40x_udc *dev;
  830. unsigned long flags;
  831. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  832. ep = container_of(_ep, struct lh7a40x_ep, ep);
  833. if (!_ep || !desc || ep->desc || _ep->name == ep0name
  834. || desc->bDescriptorType != USB_DT_ENDPOINT
  835. || ep->bEndpointAddress != desc->bEndpointAddress
  836. || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
  837. DEBUG("%s, bad ep or descriptor\n", __FUNCTION__);
  838. return -EINVAL;
  839. }
  840. /* xfer types must match, except that interrupt ~= bulk */
  841. if (ep->bmAttributes != desc->bmAttributes
  842. && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
  843. && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
  844. DEBUG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
  845. return -EINVAL;
  846. }
  847. /* hardware _could_ do smaller, but driver doesn't */
  848. if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
  849. && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
  850. || !desc->wMaxPacketSize) {
  851. DEBUG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
  852. return -ERANGE;
  853. }
  854. dev = ep->dev;
  855. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  856. DEBUG("%s, bogus device state\n", __FUNCTION__);
  857. return -ESHUTDOWN;
  858. }
  859. spin_lock_irqsave(&ep->dev->lock, flags);
  860. ep->stopped = 0;
  861. ep->desc = desc;
  862. ep->pio_irqs = 0;
  863. ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
  864. spin_unlock_irqrestore(&ep->dev->lock, flags);
  865. /* Reset halt state (does flush) */
  866. lh7a40x_set_halt(_ep, 0);
  867. DEBUG("%s: enabled %s\n", __FUNCTION__, _ep->name);
  868. return 0;
  869. }
  870. /** Disable EP
  871. * NOTE: Sets INDEX register
  872. */
  873. static int lh7a40x_ep_disable(struct usb_ep *_ep)
  874. {
  875. struct lh7a40x_ep *ep;
  876. unsigned long flags;
  877. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  878. ep = container_of(_ep, struct lh7a40x_ep, ep);
  879. if (!_ep || !ep->desc) {
  880. DEBUG("%s, %s not enabled\n", __FUNCTION__,
  881. _ep ? ep->ep.name : NULL);
  882. return -EINVAL;
  883. }
  884. spin_lock_irqsave(&ep->dev->lock, flags);
  885. usb_set_index(ep_index(ep));
  886. /* Nuke all pending requests (does flush) */
  887. nuke(ep, -ESHUTDOWN);
  888. /* Disable ep IRQ */
  889. pio_irq_disable(ep_index(ep));
  890. ep->desc = 0;
  891. ep->stopped = 1;
  892. spin_unlock_irqrestore(&ep->dev->lock, flags);
  893. DEBUG("%s: disabled %s\n", __FUNCTION__, _ep->name);
  894. return 0;
  895. }
  896. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
  897. gfp_t gfp_flags)
  898. {
  899. struct lh7a40x_request *req;
  900. DEBUG("%s, %p\n", __FUNCTION__, ep);
  901. req = kzalloc(sizeof(*req), gfp_flags);
  902. if (!req)
  903. return 0;
  904. INIT_LIST_HEAD(&req->queue);
  905. return &req->req;
  906. }
  907. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
  908. {
  909. struct lh7a40x_request *req;
  910. DEBUG("%s, %p\n", __FUNCTION__, ep);
  911. req = container_of(_req, struct lh7a40x_request, req);
  912. WARN_ON(!list_empty(&req->queue));
  913. kfree(req);
  914. }
  915. static void *lh7a40x_alloc_buffer(struct usb_ep *ep, unsigned bytes,
  916. dma_addr_t * dma, gfp_t gfp_flags)
  917. {
  918. char *retval;
  919. DEBUG("%s (%p, %d, %d)\n", __FUNCTION__, ep, bytes, gfp_flags);
  920. retval = kmalloc(bytes, gfp_flags & ~(__GFP_DMA | __GFP_HIGHMEM));
  921. if (retval)
  922. *dma = virt_to_bus(retval);
  923. return retval;
  924. }
  925. static void lh7a40x_free_buffer(struct usb_ep *ep, void *buf, dma_addr_t dma,
  926. unsigned bytes)
  927. {
  928. DEBUG("%s, %p\n", __FUNCTION__, ep);
  929. kfree(buf);
  930. }
  931. /** Queue one request
  932. * Kickstart transfer if needed
  933. * NOTE: Sets INDEX register
  934. */
  935. static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
  936. gfp_t gfp_flags)
  937. {
  938. struct lh7a40x_request *req;
  939. struct lh7a40x_ep *ep;
  940. struct lh7a40x_udc *dev;
  941. unsigned long flags;
  942. DEBUG("\n\n\n%s, %p\n", __FUNCTION__, _ep);
  943. req = container_of(_req, struct lh7a40x_request, req);
  944. if (unlikely
  945. (!_req || !_req->complete || !_req->buf
  946. || !list_empty(&req->queue))) {
  947. DEBUG("%s, bad params\n", __FUNCTION__);
  948. return -EINVAL;
  949. }
  950. ep = container_of(_ep, struct lh7a40x_ep, ep);
  951. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  952. DEBUG("%s, bad ep\n", __FUNCTION__);
  953. return -EINVAL;
  954. }
  955. dev = ep->dev;
  956. if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
  957. DEBUG("%s, bogus device state %p\n", __FUNCTION__, dev->driver);
  958. return -ESHUTDOWN;
  959. }
  960. DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
  961. _req->buf);
  962. spin_lock_irqsave(&dev->lock, flags);
  963. _req->status = -EINPROGRESS;
  964. _req->actual = 0;
  965. /* kickstart this i/o queue? */
  966. DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
  967. ep->stopped);
  968. if (list_empty(&ep->queue) && likely(!ep->stopped)) {
  969. u32 csr;
  970. if (unlikely(ep_index(ep) == 0)) {
  971. /* EP0 */
  972. list_add_tail(&req->queue, &ep->queue);
  973. lh7a40x_ep0_kick(dev, ep);
  974. req = 0;
  975. } else if (ep_is_in(ep)) {
  976. /* EP1 & EP3 */
  977. usb_set_index(ep_index(ep));
  978. csr = usb_read(ep->csr1);
  979. pio_irq_enable(ep_index(ep));
  980. if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
  981. if (write_fifo(ep, req) == 1)
  982. req = 0;
  983. }
  984. } else {
  985. /* EP2 */
  986. usb_set_index(ep_index(ep));
  987. csr = usb_read(ep->csr1);
  988. pio_irq_enable(ep_index(ep));
  989. if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
  990. if (read_fifo(ep, req) == 1)
  991. req = 0;
  992. }
  993. }
  994. }
  995. /* pio or dma irq handler advances the queue. */
  996. if (likely(req != 0))
  997. list_add_tail(&req->queue, &ep->queue);
  998. spin_unlock_irqrestore(&dev->lock, flags);
  999. return 0;
  1000. }
  1001. /* dequeue JUST ONE request */
  1002. static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1003. {
  1004. struct lh7a40x_ep *ep;
  1005. struct lh7a40x_request *req;
  1006. unsigned long flags;
  1007. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  1008. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1009. if (!_ep || ep->ep.name == ep0name)
  1010. return -EINVAL;
  1011. spin_lock_irqsave(&ep->dev->lock, flags);
  1012. /* make sure it's actually queued on this endpoint */
  1013. list_for_each_entry(req, &ep->queue, queue) {
  1014. if (&req->req == _req)
  1015. break;
  1016. }
  1017. if (&req->req != _req) {
  1018. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1019. return -EINVAL;
  1020. }
  1021. done(ep, req, -ECONNRESET);
  1022. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1023. return 0;
  1024. }
  1025. /** Halt specific EP
  1026. * Return 0 if success
  1027. * NOTE: Sets INDEX register to EP !
  1028. */
  1029. static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
  1030. {
  1031. struct lh7a40x_ep *ep;
  1032. unsigned long flags;
  1033. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1034. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1035. DEBUG("%s, bad ep\n", __FUNCTION__);
  1036. return -EINVAL;
  1037. }
  1038. usb_set_index(ep_index(ep));
  1039. DEBUG("%s, ep %d, val %d\n", __FUNCTION__, ep_index(ep), value);
  1040. spin_lock_irqsave(&ep->dev->lock, flags);
  1041. if (ep_index(ep) == 0) {
  1042. /* EP0 */
  1043. usb_set(EP0_SEND_STALL, ep->csr1);
  1044. } else if (ep_is_in(ep)) {
  1045. u32 csr = usb_read(ep->csr1);
  1046. if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
  1047. || !list_empty(&ep->queue))) {
  1048. /*
  1049. * Attempts to halt IN endpoints will fail (returning -EAGAIN)
  1050. * if any transfer requests are still queued, or if the controller
  1051. * FIFO still holds bytes that the host hasn’t collected.
  1052. */
  1053. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1054. DEBUG
  1055. ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
  1056. (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
  1057. !list_empty(&ep->queue));
  1058. return -EAGAIN;
  1059. }
  1060. flush(ep);
  1061. if (value)
  1062. usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1063. else {
  1064. usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1065. usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
  1066. }
  1067. } else {
  1068. flush(ep);
  1069. if (value)
  1070. usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1071. else {
  1072. usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1073. usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
  1074. }
  1075. }
  1076. if (value) {
  1077. ep->stopped = 1;
  1078. } else {
  1079. ep->stopped = 0;
  1080. }
  1081. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1082. DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
  1083. return 0;
  1084. }
  1085. /** Return bytes in EP FIFO
  1086. * NOTE: Sets INDEX register to EP
  1087. */
  1088. static int lh7a40x_fifo_status(struct usb_ep *_ep)
  1089. {
  1090. u32 csr;
  1091. int count = 0;
  1092. struct lh7a40x_ep *ep;
  1093. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1094. if (!_ep) {
  1095. DEBUG("%s, bad ep\n", __FUNCTION__);
  1096. return -ENODEV;
  1097. }
  1098. DEBUG("%s, %d\n", __FUNCTION__, ep_index(ep));
  1099. /* LPD can't report unclaimed bytes from IN fifos */
  1100. if (ep_is_in(ep))
  1101. return -EOPNOTSUPP;
  1102. usb_set_index(ep_index(ep));
  1103. csr = usb_read(ep->csr1);
  1104. if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
  1105. csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  1106. count = usb_read(USB_OUT_FIFO_WC1);
  1107. }
  1108. return count;
  1109. }
  1110. /** Flush EP FIFO
  1111. * NOTE: Sets INDEX register to EP
  1112. */
  1113. static void lh7a40x_fifo_flush(struct usb_ep *_ep)
  1114. {
  1115. struct lh7a40x_ep *ep;
  1116. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1117. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1118. DEBUG("%s, bad ep\n", __FUNCTION__);
  1119. return;
  1120. }
  1121. usb_set_index(ep_index(ep));
  1122. flush(ep);
  1123. }
  1124. /****************************************************************/
  1125. /* End Point 0 related functions */
  1126. /****************************************************************/
  1127. /* return: 0 = still running, 1 = completed, negative = errno */
  1128. static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1129. {
  1130. u32 max;
  1131. unsigned count;
  1132. int is_last;
  1133. max = ep_maxpacket(ep);
  1134. DEBUG_EP0("%s\n", __FUNCTION__);
  1135. count = write_packet(ep, req, max);
  1136. /* last packet is usually short (or a zlp) */
  1137. if (unlikely(count != max))
  1138. is_last = 1;
  1139. else {
  1140. if (likely(req->req.length != req->req.actual) || req->req.zero)
  1141. is_last = 0;
  1142. else
  1143. is_last = 1;
  1144. }
  1145. DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __FUNCTION__,
  1146. ep->ep.name, count,
  1147. is_last ? "/L" : "", req->req.length - req->req.actual, req);
  1148. /* requests complete when all IN data is in the FIFO */
  1149. if (is_last) {
  1150. done(ep, req, 0);
  1151. return 1;
  1152. }
  1153. return 0;
  1154. }
  1155. static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
  1156. unsigned char *cp, int max)
  1157. {
  1158. int bytes;
  1159. int count = usb_read(USB_OUT_FIFO_WC1);
  1160. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1161. if (count > max)
  1162. count = max;
  1163. bytes = count;
  1164. while (count--)
  1165. *cp++ = *fifo & 0xFF;
  1166. return bytes;
  1167. }
  1168. static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
  1169. unsigned char *cp, int count)
  1170. {
  1171. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1172. DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
  1173. while (count--)
  1174. *fifo = *cp++;
  1175. }
  1176. static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1177. {
  1178. u32 csr;
  1179. u8 *buf;
  1180. unsigned bufferspace, count, is_short;
  1181. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1182. DEBUG_EP0("%s\n", __FUNCTION__);
  1183. csr = usb_read(USB_EP0_CSR);
  1184. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
  1185. return 0;
  1186. buf = req->req.buf + req->req.actual;
  1187. prefetchw(buf);
  1188. bufferspace = req->req.length - req->req.actual;
  1189. /* read all bytes from this packet */
  1190. if (likely(csr & EP0_OUT_PKT_RDY)) {
  1191. count = usb_read(USB_OUT_FIFO_WC1);
  1192. req->req.actual += min(count, bufferspace);
  1193. } else /* zlp */
  1194. count = 0;
  1195. is_short = (count < ep->ep.maxpacket);
  1196. DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
  1197. ep->ep.name, csr, count,
  1198. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  1199. while (likely(count-- != 0)) {
  1200. u8 byte = (u8) (*fifo & 0xff);
  1201. if (unlikely(bufferspace == 0)) {
  1202. /* this happens when the driver's buffer
  1203. * is smaller than what the host sent.
  1204. * discard the extra data.
  1205. */
  1206. if (req->req.status != -EOVERFLOW)
  1207. DEBUG_EP0("%s overflow %d\n", ep->ep.name,
  1208. count);
  1209. req->req.status = -EOVERFLOW;
  1210. } else {
  1211. *buf++ = byte;
  1212. bufferspace--;
  1213. }
  1214. }
  1215. /* completion */
  1216. if (is_short || req->req.actual == req->req.length) {
  1217. done(ep, req, 0);
  1218. return 1;
  1219. }
  1220. /* finished that packet. the next one may be waiting... */
  1221. return 0;
  1222. }
  1223. /**
  1224. * udc_set_address - set the USB address for this device
  1225. * @address:
  1226. *
  1227. * Called from control endpoint function after it decodes a set address setup packet.
  1228. */
  1229. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
  1230. {
  1231. DEBUG_EP0("%s: %d\n", __FUNCTION__, address);
  1232. /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
  1233. dev->usb_address = address;
  1234. usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
  1235. usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
  1236. /* usb_read(USB_FA); */
  1237. }
  1238. /*
  1239. * DATA_STATE_RECV (OUT_PKT_RDY)
  1240. * - if error
  1241. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1242. * - else
  1243. * set EP0_CLR_OUT bit
  1244. if last set EP0_DATA_END bit
  1245. */
  1246. static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
  1247. {
  1248. struct lh7a40x_request *req;
  1249. struct lh7a40x_ep *ep = &dev->ep[0];
  1250. int ret;
  1251. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1252. if (list_empty(&ep->queue))
  1253. req = 0;
  1254. else
  1255. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1256. if (req) {
  1257. if (req->req.length == 0) {
  1258. DEBUG_EP0("ZERO LENGTH OUT!\n");
  1259. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1260. dev->ep0state = WAIT_FOR_SETUP;
  1261. return;
  1262. }
  1263. ret = read_fifo_ep0(ep, req);
  1264. if (ret) {
  1265. /* Done! */
  1266. DEBUG_EP0("%s: finished, waiting for status\n",
  1267. __FUNCTION__);
  1268. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1269. dev->ep0state = WAIT_FOR_SETUP;
  1270. } else {
  1271. /* Not done yet.. */
  1272. DEBUG_EP0("%s: not finished\n", __FUNCTION__);
  1273. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1274. }
  1275. } else {
  1276. DEBUG_EP0("NO REQ??!\n");
  1277. }
  1278. }
  1279. /*
  1280. * DATA_STATE_XMIT
  1281. */
  1282. static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
  1283. {
  1284. struct lh7a40x_request *req;
  1285. struct lh7a40x_ep *ep = &dev->ep[0];
  1286. int ret, need_zlp = 0;
  1287. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1288. if (list_empty(&ep->queue))
  1289. req = 0;
  1290. else
  1291. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1292. if (!req) {
  1293. DEBUG_EP0("%s: NULL REQ\n", __FUNCTION__);
  1294. return 0;
  1295. }
  1296. if (req->req.length == 0) {
  1297. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1298. dev->ep0state = WAIT_FOR_SETUP;
  1299. return 1;
  1300. }
  1301. if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
  1302. /* Next write will end with the packet size, */
  1303. /* so we need Zero-length-packet */
  1304. need_zlp = 1;
  1305. }
  1306. ret = write_fifo_ep0(ep, req);
  1307. if (ret == 1 && !need_zlp) {
  1308. /* Last packet */
  1309. DEBUG_EP0("%s: finished, waiting for status\n", __FUNCTION__);
  1310. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1311. dev->ep0state = WAIT_FOR_SETUP;
  1312. } else {
  1313. DEBUG_EP0("%s: not finished\n", __FUNCTION__);
  1314. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1315. }
  1316. if (need_zlp) {
  1317. DEBUG_EP0("%s: Need ZLP!\n", __FUNCTION__);
  1318. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1319. dev->ep0state = DATA_STATE_NEED_ZLP;
  1320. }
  1321. return 1;
  1322. }
  1323. static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
  1324. struct usb_ctrlrequest *ctrl)
  1325. {
  1326. struct lh7a40x_ep *ep0 = &dev->ep[0];
  1327. struct lh7a40x_ep *qep;
  1328. int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
  1329. u16 val = 0;
  1330. if (reqtype == USB_RECIP_INTERFACE) {
  1331. /* This is not supported.
  1332. * And according to the USB spec, this one does nothing..
  1333. * Just return 0
  1334. */
  1335. DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
  1336. } else if (reqtype == USB_RECIP_DEVICE) {
  1337. DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
  1338. val |= (1 << 0); /* Self powered */
  1339. /*val |= (1<<1); *//* Remote wakeup */
  1340. } else if (reqtype == USB_RECIP_ENDPOINT) {
  1341. int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
  1342. DEBUG_SETUP
  1343. ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
  1344. ep_num, ctrl->wLength);
  1345. if (ctrl->wLength > 2 || ep_num > 3)
  1346. return -EOPNOTSUPP;
  1347. qep = &dev->ep[ep_num];
  1348. if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
  1349. && ep_index(qep) != 0) {
  1350. return -EOPNOTSUPP;
  1351. }
  1352. usb_set_index(ep_index(qep));
  1353. /* Return status on next IN token */
  1354. switch (qep->ep_type) {
  1355. case ep_control:
  1356. val =
  1357. (usb_read(qep->csr1) & EP0_SEND_STALL) ==
  1358. EP0_SEND_STALL;
  1359. break;
  1360. case ep_bulk_in:
  1361. case ep_interrupt:
  1362. val =
  1363. (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
  1364. USB_IN_CSR1_SEND_STALL;
  1365. break;
  1366. case ep_bulk_out:
  1367. val =
  1368. (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
  1369. USB_OUT_CSR1_SEND_STALL;
  1370. break;
  1371. }
  1372. /* Back to EP0 index */
  1373. usb_set_index(0);
  1374. DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
  1375. ctrl->wIndex, val);
  1376. } else {
  1377. DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
  1378. return -EOPNOTSUPP;
  1379. }
  1380. /* Clear "out packet ready" */
  1381. usb_set((EP0_CLR_OUT), USB_EP0_CSR);
  1382. /* Put status to FIFO */
  1383. lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
  1384. /* Issue "In packet ready" */
  1385. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1386. return 0;
  1387. }
  1388. /*
  1389. * WAIT_FOR_SETUP (OUT_PKT_RDY)
  1390. * - read data packet from EP0 FIFO
  1391. * - decode command
  1392. * - if error
  1393. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1394. * - else
  1395. * set EP0_CLR_OUT | EP0_DATA_END bits
  1396. */
  1397. static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
  1398. {
  1399. struct lh7a40x_ep *ep = &dev->ep[0];
  1400. struct usb_ctrlrequest ctrl;
  1401. int i, bytes, is_in;
  1402. DEBUG_SETUP("%s: %x\n", __FUNCTION__, csr);
  1403. /* Nuke all previous transfers */
  1404. nuke(ep, -EPROTO);
  1405. /* read control req from fifo (8 bytes) */
  1406. bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
  1407. DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
  1408. DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
  1409. ctrl.bRequestType == USB_DIR_IN);
  1410. DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
  1411. DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
  1412. DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
  1413. DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
  1414. /* Set direction of EP0 */
  1415. if (likely(ctrl.bRequestType & USB_DIR_IN)) {
  1416. ep->bEndpointAddress |= USB_DIR_IN;
  1417. is_in = 1;
  1418. } else {
  1419. ep->bEndpointAddress &= ~USB_DIR_IN;
  1420. is_in = 0;
  1421. }
  1422. dev->req_pending = 1;
  1423. /* Handle some SETUP packets ourselves */
  1424. switch (ctrl.bRequest) {
  1425. case USB_REQ_SET_ADDRESS:
  1426. if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
  1427. break;
  1428. DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
  1429. udc_set_address(dev, ctrl.wValue);
  1430. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1431. return;
  1432. case USB_REQ_GET_STATUS:{
  1433. if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
  1434. return;
  1435. case USB_REQ_CLEAR_FEATURE:
  1436. case USB_REQ_SET_FEATURE:
  1437. if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
  1438. struct lh7a40x_ep *qep;
  1439. int ep_num = (ctrl.wIndex & 0x0f);
  1440. /* Support only HALT feature */
  1441. if (ctrl.wValue != 0 || ctrl.wLength != 0
  1442. || ep_num > 3 || ep_num < 1)
  1443. break;
  1444. qep = &dev->ep[ep_num];
  1445. spin_unlock(&dev->lock);
  1446. if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
  1447. DEBUG_SETUP("SET_FEATURE (%d)\n",
  1448. ep_num);
  1449. lh7a40x_set_halt(&qep->ep, 1);
  1450. } else {
  1451. DEBUG_SETUP("CLR_FEATURE (%d)\n",
  1452. ep_num);
  1453. lh7a40x_set_halt(&qep->ep, 0);
  1454. }
  1455. spin_lock(&dev->lock);
  1456. usb_set_index(0);
  1457. /* Reply with a ZLP on next IN token */
  1458. usb_set((EP0_CLR_OUT | EP0_DATA_END),
  1459. USB_EP0_CSR);
  1460. return;
  1461. }
  1462. break;
  1463. }
  1464. default:
  1465. break;
  1466. }
  1467. if (likely(dev->driver)) {
  1468. /* device-2-host (IN) or no data setup command, process immediately */
  1469. spin_unlock(&dev->lock);
  1470. i = dev->driver->setup(&dev->gadget, &ctrl);
  1471. spin_lock(&dev->lock);
  1472. if (i < 0) {
  1473. /* setup processing failed, force stall */
  1474. DEBUG_SETUP
  1475. (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
  1476. i);
  1477. usb_set_index(0);
  1478. usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
  1479. USB_EP0_CSR);
  1480. /* ep->stopped = 1; */
  1481. dev->ep0state = WAIT_FOR_SETUP;
  1482. }
  1483. }
  1484. }
  1485. /*
  1486. * DATA_STATE_NEED_ZLP
  1487. */
  1488. static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
  1489. {
  1490. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1491. /* c.f. Table 15-14 */
  1492. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1493. dev->ep0state = WAIT_FOR_SETUP;
  1494. }
  1495. /*
  1496. * handle ep0 interrupt
  1497. */
  1498. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
  1499. {
  1500. struct lh7a40x_ep *ep = &dev->ep[0];
  1501. u32 csr;
  1502. /* Set index 0 */
  1503. usb_set_index(0);
  1504. csr = usb_read(USB_EP0_CSR);
  1505. DEBUG_EP0("%s: csr = %x\n", __FUNCTION__, csr);
  1506. /*
  1507. * For overview of what we should be doing see c.f. Chapter 18.1.2.4
  1508. * We will follow that outline here modified by our own global state
  1509. * indication which provides hints as to what we think should be
  1510. * happening..
  1511. */
  1512. /*
  1513. * if SENT_STALL is set
  1514. * - clear the SENT_STALL bit
  1515. */
  1516. if (csr & EP0_SENT_STALL) {
  1517. DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __FUNCTION__, csr);
  1518. usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
  1519. nuke(ep, -ECONNABORTED);
  1520. dev->ep0state = WAIT_FOR_SETUP;
  1521. return;
  1522. }
  1523. /*
  1524. * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
  1525. * - fill EP0 FIFO
  1526. * - if last packet
  1527. * - set IN_PKT_RDY | DATA_END
  1528. * - else
  1529. * set IN_PKT_RDY
  1530. */
  1531. if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
  1532. DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
  1533. __FUNCTION__);
  1534. switch (dev->ep0state) {
  1535. case DATA_STATE_XMIT:
  1536. DEBUG_EP0("continue with DATA_STATE_XMIT\n");
  1537. lh7a40x_ep0_in(dev, csr);
  1538. return;
  1539. case DATA_STATE_NEED_ZLP:
  1540. DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
  1541. lh7a40x_ep0_in_zlp(dev, csr);
  1542. return;
  1543. default:
  1544. /* Stall? */
  1545. DEBUG_EP0("Odd state!! state = %s\n",
  1546. state_names[dev->ep0state]);
  1547. dev->ep0state = WAIT_FOR_SETUP;
  1548. /* nuke(ep, 0); */
  1549. /* usb_set(EP0_SEND_STALL, ep->csr1); */
  1550. break;
  1551. }
  1552. }
  1553. /*
  1554. * if SETUP_END is set
  1555. * - abort the last transfer
  1556. * - set SERVICED_SETUP_END_BIT
  1557. */
  1558. if (csr & EP0_SETUP_END) {
  1559. DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __FUNCTION__, csr);
  1560. usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
  1561. nuke(ep, 0);
  1562. dev->ep0state = WAIT_FOR_SETUP;
  1563. }
  1564. /*
  1565. * if EP0_OUT_PKT_RDY is set
  1566. * - read data packet from EP0 FIFO
  1567. * - decode command
  1568. * - if error
  1569. * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
  1570. * - else
  1571. * set SERVICED_OUT_PKT_RDY | DATA_END bits
  1572. */
  1573. if (csr & EP0_OUT_PKT_RDY) {
  1574. DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __FUNCTION__,
  1575. csr);
  1576. switch (dev->ep0state) {
  1577. case WAIT_FOR_SETUP:
  1578. DEBUG_EP0("WAIT_FOR_SETUP\n");
  1579. lh7a40x_ep0_setup(dev, csr);
  1580. break;
  1581. case DATA_STATE_RECV:
  1582. DEBUG_EP0("DATA_STATE_RECV\n");
  1583. lh7a40x_ep0_out(dev, csr);
  1584. break;
  1585. default:
  1586. /* send stall? */
  1587. DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
  1588. dev->ep0state);
  1589. break;
  1590. }
  1591. }
  1592. }
  1593. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
  1594. {
  1595. u32 csr;
  1596. usb_set_index(0);
  1597. csr = usb_read(USB_EP0_CSR);
  1598. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1599. /* Clear "out packet ready" */
  1600. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1601. if (ep_is_in(ep)) {
  1602. dev->ep0state = DATA_STATE_XMIT;
  1603. lh7a40x_ep0_in(dev, csr);
  1604. } else {
  1605. dev->ep0state = DATA_STATE_RECV;
  1606. lh7a40x_ep0_out(dev, csr);
  1607. }
  1608. }
  1609. /* ---------------------------------------------------------------------------
  1610. * device-scoped parts of the api to the usb controller hardware
  1611. * ---------------------------------------------------------------------------
  1612. */
  1613. static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
  1614. {
  1615. u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
  1616. u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
  1617. DEBUG("%s, %p\n", __FUNCTION__, _gadget);
  1618. return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
  1619. }
  1620. static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
  1621. {
  1622. /* host may not have enabled remote wakeup */
  1623. /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
  1624. return -EHOSTUNREACH;
  1625. udc_set_mask_UDCCR(UDCCR_RSM); */
  1626. return -ENOTSUPP;
  1627. }
  1628. static const struct usb_gadget_ops lh7a40x_udc_ops = {
  1629. .get_frame = lh7a40x_udc_get_frame,
  1630. .wakeup = lh7a40x_udc_wakeup,
  1631. /* current versions must always be self-powered */
  1632. };
  1633. static void nop_release(struct device *dev)
  1634. {
  1635. DEBUG("%s %s\n", __FUNCTION__, dev->bus_id);
  1636. }
  1637. static struct lh7a40x_udc memory = {
  1638. .usb_address = 0,
  1639. .gadget = {
  1640. .ops = &lh7a40x_udc_ops,
  1641. .ep0 = &memory.ep[0].ep,
  1642. .name = driver_name,
  1643. .dev = {
  1644. .bus_id = "gadget",
  1645. .release = nop_release,
  1646. },
  1647. },
  1648. /* control endpoint */
  1649. .ep[0] = {
  1650. .ep = {
  1651. .name = ep0name,
  1652. .ops = &lh7a40x_ep_ops,
  1653. .maxpacket = EP0_PACKETSIZE,
  1654. },
  1655. .dev = &memory,
  1656. .bEndpointAddress = 0,
  1657. .bmAttributes = 0,
  1658. .ep_type = ep_control,
  1659. .fifo = io_p2v(USB_EP0_FIFO),
  1660. .csr1 = USB_EP0_CSR,
  1661. .csr2 = USB_EP0_CSR,
  1662. },
  1663. /* first group of endpoints */
  1664. .ep[1] = {
  1665. .ep = {
  1666. .name = "ep1in-bulk",
  1667. .ops = &lh7a40x_ep_ops,
  1668. .maxpacket = 64,
  1669. },
  1670. .dev = &memory,
  1671. .bEndpointAddress = USB_DIR_IN | 1,
  1672. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1673. .ep_type = ep_bulk_in,
  1674. .fifo = io_p2v(USB_EP1_FIFO),
  1675. .csr1 = USB_IN_CSR1,
  1676. .csr2 = USB_IN_CSR2,
  1677. },
  1678. .ep[2] = {
  1679. .ep = {
  1680. .name = "ep2out-bulk",
  1681. .ops = &lh7a40x_ep_ops,
  1682. .maxpacket = 64,
  1683. },
  1684. .dev = &memory,
  1685. .bEndpointAddress = 2,
  1686. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1687. .ep_type = ep_bulk_out,
  1688. .fifo = io_p2v(USB_EP2_FIFO),
  1689. .csr1 = USB_OUT_CSR1,
  1690. .csr2 = USB_OUT_CSR2,
  1691. },
  1692. .ep[3] = {
  1693. .ep = {
  1694. .name = "ep3in-int",
  1695. .ops = &lh7a40x_ep_ops,
  1696. .maxpacket = 64,
  1697. },
  1698. .dev = &memory,
  1699. .bEndpointAddress = USB_DIR_IN | 3,
  1700. .bmAttributes = USB_ENDPOINT_XFER_INT,
  1701. .ep_type = ep_interrupt,
  1702. .fifo = io_p2v(USB_EP3_FIFO),
  1703. .csr1 = USB_IN_CSR1,
  1704. .csr2 = USB_IN_CSR2,
  1705. },
  1706. };
  1707. /*
  1708. * probe - binds to the platform device
  1709. */
  1710. static int lh7a40x_udc_probe(struct platform_device *pdev)
  1711. {
  1712. struct lh7a40x_udc *dev = &memory;
  1713. int retval;
  1714. DEBUG("%s: %p\n", __FUNCTION__, pdev);
  1715. spin_lock_init(&dev->lock);
  1716. dev->dev = &pdev->dev;
  1717. device_initialize(&dev->gadget.dev);
  1718. dev->gadget.dev.parent = &pdev->dev;
  1719. the_controller = dev;
  1720. platform_set_drvdata(pdev, dev);
  1721. udc_disable(dev);
  1722. udc_reinit(dev);
  1723. /* irq setup after old hardware state is cleaned up */
  1724. retval =
  1725. request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
  1726. dev);
  1727. if (retval != 0) {
  1728. DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
  1729. IRQ_USBINTR, retval);
  1730. return -EBUSY;
  1731. }
  1732. create_proc_files();
  1733. return retval;
  1734. }
  1735. static int lh7a40x_udc_remove(struct platform_device *pdev)
  1736. {
  1737. struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
  1738. DEBUG("%s: %p\n", __FUNCTION__, pdev);
  1739. udc_disable(dev);
  1740. remove_proc_files();
  1741. usb_gadget_unregister_driver(dev->driver);
  1742. free_irq(IRQ_USBINTR, dev);
  1743. platform_set_drvdata(pdev, 0);
  1744. the_controller = 0;
  1745. return 0;
  1746. }
  1747. /*-------------------------------------------------------------------------*/
  1748. static struct platform_driver udc_driver = {
  1749. .probe = lh7a40x_udc_probe,
  1750. .remove = lh7a40x_udc_remove,
  1751. /* FIXME power management support */
  1752. /* .suspend = ... disable UDC */
  1753. /* .resume = ... re-enable UDC */
  1754. .driver = {
  1755. .name = (char *)driver_name,
  1756. .owner = THIS_MODULE,
  1757. },
  1758. };
  1759. static int __init udc_init(void)
  1760. {
  1761. DEBUG("%s: %s version %s\n", __FUNCTION__, driver_name, DRIVER_VERSION);
  1762. return platform_driver_register(&udc_driver);
  1763. }
  1764. static void __exit udc_exit(void)
  1765. {
  1766. platform_driver_unregister(&udc_driver);
  1767. }
  1768. module_init(udc_init);
  1769. module_exit(udc_exit);
  1770. MODULE_DESCRIPTION(DRIVER_DESC);
  1771. MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
  1772. MODULE_LICENSE("GPL");