drm_edid.c 47 KB

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  1. /*
  2. * Copyright (c) 2006 Luc Verhaegen (quirks list)
  3. * Copyright (c) 2007-2008 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. * Copyright 2010 Red Hat, Inc.
  6. *
  7. * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
  8. * FB layer.
  9. * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
  10. *
  11. * Permission is hereby granted, free of charge, to any person obtaining a
  12. * copy of this software and associated documentation files (the "Software"),
  13. * to deal in the Software without restriction, including without limitation
  14. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  15. * and/or sell copies of the Software, and to permit persons to whom the
  16. * Software is furnished to do so, subject to the following conditions:
  17. *
  18. * The above copyright notice and this permission notice (including the
  19. * next paragraph) shall be included in all copies or substantial portions
  20. * of the Software.
  21. *
  22. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  23. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  24. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  25. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  26. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  27. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  28. * DEALINGS IN THE SOFTWARE.
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/i2c.h>
  32. #include <linux/i2c-algo-bit.h>
  33. #include "drmP.h"
  34. #include "drm_edid.h"
  35. /*
  36. * EDID blocks out in the wild have a variety of bugs, try to collect
  37. * them here (note that userspace may work around broken monitors first,
  38. * but fixes should make their way here so that the kernel "just works"
  39. * on as many displays as possible).
  40. */
  41. /* First detailed mode wrong, use largest 60Hz mode */
  42. #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
  43. /* Reported 135MHz pixel clock is too high, needs adjustment */
  44. #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
  45. /* Prefer the largest mode at 75 Hz */
  46. #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
  47. /* Detail timing is in cm not mm */
  48. #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
  49. /* Detailed timing descriptors have bogus size values, so just take the
  50. * maximum size and use that.
  51. */
  52. #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
  53. /* Monitor forgot to set the first detailed is preferred bit. */
  54. #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
  55. /* use +hsync +vsync for detailed mode */
  56. #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
  57. #define LEVEL_DMT 0
  58. #define LEVEL_GTF 1
  59. #define LEVEL_CVT 2
  60. static struct edid_quirk {
  61. char *vendor;
  62. int product_id;
  63. u32 quirks;
  64. } edid_quirk_list[] = {
  65. /* Acer AL1706 */
  66. { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
  67. /* Acer F51 */
  68. { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
  69. /* Unknown Acer */
  70. { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  71. /* Belinea 10 15 55 */
  72. { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
  73. { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
  74. /* Envision Peripherals, Inc. EN-7100e */
  75. { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
  76. /* Funai Electronics PM36B */
  77. { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
  78. EDID_QUIRK_DETAILED_IN_CM },
  79. /* LG Philips LCD LP154W01-A5 */
  80. { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  81. { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  82. /* Philips 107p5 CRT */
  83. { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  84. /* Proview AY765C */
  85. { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  86. /* Samsung SyncMaster 205BW. Note: irony */
  87. { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
  88. /* Samsung SyncMaster 22[5-6]BW */
  89. { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
  90. { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
  91. };
  92. /*** DDC fetch and block validation ***/
  93. static const u8 edid_header[] = {
  94. 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
  95. };
  96. /*
  97. * Sanity check the EDID block (base or extension). Return 0 if the block
  98. * doesn't check out, or 1 if it's valid.
  99. */
  100. static bool
  101. drm_edid_block_valid(u8 *raw_edid)
  102. {
  103. int i;
  104. u8 csum = 0;
  105. struct edid *edid = (struct edid *)raw_edid;
  106. if (raw_edid[0] == 0x00) {
  107. int score = 0;
  108. for (i = 0; i < sizeof(edid_header); i++)
  109. if (raw_edid[i] == edid_header[i])
  110. score++;
  111. if (score == 8) ;
  112. else if (score >= 6) {
  113. DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
  114. memcpy(raw_edid, edid_header, sizeof(edid_header));
  115. } else {
  116. goto bad;
  117. }
  118. }
  119. for (i = 0; i < EDID_LENGTH; i++)
  120. csum += raw_edid[i];
  121. if (csum) {
  122. DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
  123. goto bad;
  124. }
  125. /* per-block-type checks */
  126. switch (raw_edid[0]) {
  127. case 0: /* base */
  128. if (edid->version != 1) {
  129. DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
  130. goto bad;
  131. }
  132. if (edid->revision > 4)
  133. DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
  134. break;
  135. default:
  136. break;
  137. }
  138. return 1;
  139. bad:
  140. if (raw_edid) {
  141. DRM_ERROR("Raw EDID:\n");
  142. print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
  143. printk("\n");
  144. }
  145. return 0;
  146. }
  147. /**
  148. * drm_edid_is_valid - sanity check EDID data
  149. * @edid: EDID data
  150. *
  151. * Sanity-check an entire EDID record (including extensions)
  152. */
  153. bool drm_edid_is_valid(struct edid *edid)
  154. {
  155. int i;
  156. u8 *raw = (u8 *)edid;
  157. if (!edid)
  158. return false;
  159. for (i = 0; i <= edid->extensions; i++)
  160. if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
  161. return false;
  162. return true;
  163. }
  164. EXPORT_SYMBOL(drm_edid_is_valid);
  165. #define DDC_ADDR 0x50
  166. #define DDC_SEGMENT_ADDR 0x30
  167. /**
  168. * Get EDID information via I2C.
  169. *
  170. * \param adapter : i2c device adaptor
  171. * \param buf : EDID data buffer to be filled
  172. * \param len : EDID data buffer length
  173. * \return 0 on success or -1 on failure.
  174. *
  175. * Try to fetch EDID information by calling i2c driver function.
  176. */
  177. static int
  178. drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
  179. int block, int len)
  180. {
  181. unsigned char start = block * EDID_LENGTH;
  182. struct i2c_msg msgs[] = {
  183. {
  184. .addr = DDC_ADDR,
  185. .flags = 0,
  186. .len = 1,
  187. .buf = &start,
  188. }, {
  189. .addr = DDC_ADDR,
  190. .flags = I2C_M_RD,
  191. .len = len,
  192. .buf = buf + start,
  193. }
  194. };
  195. if (i2c_transfer(adapter, msgs, 2) == 2)
  196. return 0;
  197. return -1;
  198. }
  199. static u8 *
  200. drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
  201. {
  202. int i, j = 0;
  203. u8 *block, *new;
  204. if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
  205. return NULL;
  206. /* base block fetch */
  207. for (i = 0; i < 4; i++) {
  208. if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
  209. goto out;
  210. if (drm_edid_block_valid(block))
  211. break;
  212. }
  213. if (i == 4)
  214. goto carp;
  215. /* if there's no extensions, we're done */
  216. if (block[0x7e] == 0)
  217. return block;
  218. new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
  219. if (!new)
  220. goto out;
  221. block = new;
  222. for (j = 1; j <= block[0x7e]; j++) {
  223. for (i = 0; i < 4; i++) {
  224. if (drm_do_probe_ddc_edid(adapter, block, j,
  225. EDID_LENGTH))
  226. goto out;
  227. if (drm_edid_block_valid(block + j * EDID_LENGTH))
  228. break;
  229. }
  230. if (i == 4)
  231. goto carp;
  232. }
  233. return block;
  234. carp:
  235. dev_warn(&connector->dev->pdev->dev, "%s: EDID block %d invalid.\n",
  236. drm_get_connector_name(connector), j);
  237. out:
  238. kfree(block);
  239. return NULL;
  240. }
  241. /**
  242. * Probe DDC presence.
  243. *
  244. * \param adapter : i2c device adaptor
  245. * \return 1 on success
  246. */
  247. static bool
  248. drm_probe_ddc(struct i2c_adapter *adapter)
  249. {
  250. unsigned char out;
  251. return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
  252. }
  253. /**
  254. * drm_get_edid - get EDID data, if available
  255. * @connector: connector we're probing
  256. * @adapter: i2c adapter to use for DDC
  257. *
  258. * Poke the given i2c channel to grab EDID data if possible. If found,
  259. * attach it to the connector.
  260. *
  261. * Return edid data or NULL if we couldn't find any.
  262. */
  263. struct edid *drm_get_edid(struct drm_connector *connector,
  264. struct i2c_adapter *adapter)
  265. {
  266. struct edid *edid = NULL;
  267. if (drm_probe_ddc(adapter))
  268. edid = (struct edid *)drm_do_get_edid(connector, adapter);
  269. connector->display_info.raw_edid = (char *)edid;
  270. return edid;
  271. }
  272. EXPORT_SYMBOL(drm_get_edid);
  273. /*** EDID parsing ***/
  274. /**
  275. * edid_vendor - match a string against EDID's obfuscated vendor field
  276. * @edid: EDID to match
  277. * @vendor: vendor string
  278. *
  279. * Returns true if @vendor is in @edid, false otherwise
  280. */
  281. static bool edid_vendor(struct edid *edid, char *vendor)
  282. {
  283. char edid_vendor[3];
  284. edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
  285. edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
  286. ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
  287. edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
  288. return !strncmp(edid_vendor, vendor, 3);
  289. }
  290. /**
  291. * edid_get_quirks - return quirk flags for a given EDID
  292. * @edid: EDID to process
  293. *
  294. * This tells subsequent routines what fixes they need to apply.
  295. */
  296. static u32 edid_get_quirks(struct edid *edid)
  297. {
  298. struct edid_quirk *quirk;
  299. int i;
  300. for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
  301. quirk = &edid_quirk_list[i];
  302. if (edid_vendor(edid, quirk->vendor) &&
  303. (EDID_PRODUCT_ID(edid) == quirk->product_id))
  304. return quirk->quirks;
  305. }
  306. return 0;
  307. }
  308. #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
  309. #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
  310. /**
  311. * edid_fixup_preferred - set preferred modes based on quirk list
  312. * @connector: has mode list to fix up
  313. * @quirks: quirks list
  314. *
  315. * Walk the mode list for @connector, clearing the preferred status
  316. * on existing modes and setting it anew for the right mode ala @quirks.
  317. */
  318. static void edid_fixup_preferred(struct drm_connector *connector,
  319. u32 quirks)
  320. {
  321. struct drm_display_mode *t, *cur_mode, *preferred_mode;
  322. int target_refresh = 0;
  323. if (list_empty(&connector->probed_modes))
  324. return;
  325. if (quirks & EDID_QUIRK_PREFER_LARGE_60)
  326. target_refresh = 60;
  327. if (quirks & EDID_QUIRK_PREFER_LARGE_75)
  328. target_refresh = 75;
  329. preferred_mode = list_first_entry(&connector->probed_modes,
  330. struct drm_display_mode, head);
  331. list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
  332. cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
  333. if (cur_mode == preferred_mode)
  334. continue;
  335. /* Largest mode is preferred */
  336. if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
  337. preferred_mode = cur_mode;
  338. /* At a given size, try to get closest to target refresh */
  339. if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
  340. MODE_REFRESH_DIFF(cur_mode, target_refresh) <
  341. MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
  342. preferred_mode = cur_mode;
  343. }
  344. }
  345. preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
  346. }
  347. /*
  348. * Add the Autogenerated from the DMT spec.
  349. * This table is copied from xfree86/modes/xf86EdidModes.c.
  350. * But the mode with Reduced blank feature is deleted.
  351. */
  352. static struct drm_display_mode drm_dmt_modes[] = {
  353. /* 640x350@85Hz */
  354. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  355. 736, 832, 0, 350, 382, 385, 445, 0,
  356. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  357. /* 640x400@85Hz */
  358. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  359. 736, 832, 0, 400, 401, 404, 445, 0,
  360. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  361. /* 720x400@85Hz */
  362. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
  363. 828, 936, 0, 400, 401, 404, 446, 0,
  364. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  365. /* 640x480@60Hz */
  366. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  367. 752, 800, 0, 480, 489, 492, 525, 0,
  368. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  369. /* 640x480@72Hz */
  370. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  371. 704, 832, 0, 480, 489, 492, 520, 0,
  372. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  373. /* 640x480@75Hz */
  374. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  375. 720, 840, 0, 480, 481, 484, 500, 0,
  376. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  377. /* 640x480@85Hz */
  378. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
  379. 752, 832, 0, 480, 481, 484, 509, 0,
  380. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  381. /* 800x600@56Hz */
  382. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  383. 896, 1024, 0, 600, 601, 603, 625, 0,
  384. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  385. /* 800x600@60Hz */
  386. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  387. 968, 1056, 0, 600, 601, 605, 628, 0,
  388. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  389. /* 800x600@72Hz */
  390. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  391. 976, 1040, 0, 600, 637, 643, 666, 0,
  392. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  393. /* 800x600@75Hz */
  394. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  395. 896, 1056, 0, 600, 601, 604, 625, 0,
  396. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  397. /* 800x600@85Hz */
  398. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
  399. 896, 1048, 0, 600, 601, 604, 631, 0,
  400. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  401. /* 848x480@60Hz */
  402. { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
  403. 976, 1088, 0, 480, 486, 494, 517, 0,
  404. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  405. /* 1024x768@43Hz, interlace */
  406. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
  407. 1208, 1264, 0, 768, 768, 772, 817, 0,
  408. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  409. DRM_MODE_FLAG_INTERLACE) },
  410. /* 1024x768@60Hz */
  411. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  412. 1184, 1344, 0, 768, 771, 777, 806, 0,
  413. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  414. /* 1024x768@70Hz */
  415. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  416. 1184, 1328, 0, 768, 771, 777, 806, 0,
  417. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  418. /* 1024x768@75Hz */
  419. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
  420. 1136, 1312, 0, 768, 769, 772, 800, 0,
  421. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  422. /* 1024x768@85Hz */
  423. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
  424. 1072, 1376, 0, 768, 769, 772, 808, 0,
  425. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  426. /* 1152x864@75Hz */
  427. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  428. 1344, 1600, 0, 864, 865, 868, 900, 0,
  429. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  430. /* 1280x768@60Hz */
  431. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  432. 1472, 1664, 0, 768, 771, 778, 798, 0,
  433. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  434. /* 1280x768@75Hz */
  435. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
  436. 1488, 1696, 0, 768, 771, 778, 805, 0,
  437. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  438. /* 1280x768@85Hz */
  439. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
  440. 1496, 1712, 0, 768, 771, 778, 809, 0,
  441. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  442. /* 1280x800@60Hz */
  443. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  444. 1480, 1680, 0, 800, 803, 809, 831, 0,
  445. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  446. /* 1280x800@75Hz */
  447. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
  448. 1488, 1696, 0, 800, 803, 809, 838, 0,
  449. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  450. /* 1280x800@85Hz */
  451. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
  452. 1496, 1712, 0, 800, 803, 809, 843, 0,
  453. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  454. /* 1280x960@60Hz */
  455. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  456. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  457. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  458. /* 1280x960@85Hz */
  459. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
  460. 1504, 1728, 0, 960, 961, 964, 1011, 0,
  461. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  462. /* 1280x1024@60Hz */
  463. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  464. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  465. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  466. /* 1280x1024@75Hz */
  467. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  468. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  469. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  470. /* 1280x1024@85Hz */
  471. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
  472. 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
  473. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  474. /* 1360x768@60Hz */
  475. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  476. 1536, 1792, 0, 768, 771, 777, 795, 0,
  477. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  478. /* 1440x1050@60Hz */
  479. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  480. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  481. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  482. /* 1440x1050@75Hz */
  483. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
  484. 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
  485. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  486. /* 1440x1050@85Hz */
  487. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
  488. 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
  489. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  490. /* 1440x900@60Hz */
  491. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  492. 1672, 1904, 0, 900, 903, 909, 934, 0,
  493. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  494. /* 1440x900@75Hz */
  495. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
  496. 1688, 1936, 0, 900, 903, 909, 942, 0,
  497. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  498. /* 1440x900@85Hz */
  499. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
  500. 1696, 1952, 0, 900, 903, 909, 948, 0,
  501. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  502. /* 1600x1200@60Hz */
  503. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  504. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  505. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  506. /* 1600x1200@65Hz */
  507. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
  508. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  509. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  510. /* 1600x1200@70Hz */
  511. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
  512. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  513. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  514. /* 1600x1200@75Hz */
  515. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
  516. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  517. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  518. /* 1600x1200@85Hz */
  519. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
  520. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  521. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  522. /* 1680x1050@60Hz */
  523. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  524. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  525. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  526. /* 1680x1050@75Hz */
  527. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
  528. 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
  529. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  530. /* 1680x1050@85Hz */
  531. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
  532. 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
  533. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  534. /* 1792x1344@60Hz */
  535. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  536. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  537. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  538. /* 1729x1344@75Hz */
  539. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
  540. 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
  541. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  542. /* 1853x1392@60Hz */
  543. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  544. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  545. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  546. /* 1856x1392@75Hz */
  547. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
  548. 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
  549. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  550. /* 1920x1200@60Hz */
  551. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  552. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  553. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  554. /* 1920x1200@75Hz */
  555. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
  556. 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
  557. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  558. /* 1920x1200@85Hz */
  559. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
  560. 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
  561. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  562. /* 1920x1440@60Hz */
  563. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  564. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  565. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  566. /* 1920x1440@75Hz */
  567. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
  568. 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
  569. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  570. /* 2560x1600@60Hz */
  571. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  572. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  573. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  574. /* 2560x1600@75HZ */
  575. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
  576. 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
  577. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  578. /* 2560x1600@85HZ */
  579. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
  580. 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
  581. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  582. };
  583. static const int drm_num_dmt_modes =
  584. sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  585. static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
  586. int hsize, int vsize, int fresh)
  587. {
  588. int i;
  589. struct drm_display_mode *ptr, *mode;
  590. mode = NULL;
  591. for (i = 0; i < drm_num_dmt_modes; i++) {
  592. ptr = &drm_dmt_modes[i];
  593. if (hsize == ptr->hdisplay &&
  594. vsize == ptr->vdisplay &&
  595. fresh == drm_mode_vrefresh(ptr)) {
  596. /* get the expected default mode */
  597. mode = drm_mode_duplicate(dev, ptr);
  598. break;
  599. }
  600. }
  601. return mode;
  602. }
  603. /*
  604. * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
  605. * monitors fill with ascii space (0x20) instead.
  606. */
  607. static int
  608. bad_std_timing(u8 a, u8 b)
  609. {
  610. return (a == 0x00 && b == 0x00) ||
  611. (a == 0x01 && b == 0x01) ||
  612. (a == 0x20 && b == 0x20);
  613. }
  614. /**
  615. * drm_mode_std - convert standard mode info (width, height, refresh) into mode
  616. * @t: standard timing params
  617. * @timing_level: standard timing level
  618. *
  619. * Take the standard timing params (in this case width, aspect, and refresh)
  620. * and convert them into a real mode using CVT/GTF/DMT.
  621. */
  622. struct drm_display_mode *drm_mode_std(struct drm_device *dev,
  623. struct std_timing *t,
  624. int revision,
  625. int timing_level)
  626. {
  627. struct drm_display_mode *mode;
  628. int hsize, vsize;
  629. int vrefresh_rate;
  630. unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
  631. >> EDID_TIMING_ASPECT_SHIFT;
  632. unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
  633. >> EDID_TIMING_VFREQ_SHIFT;
  634. if (bad_std_timing(t->hsize, t->vfreq_aspect))
  635. return NULL;
  636. /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
  637. hsize = t->hsize * 8 + 248;
  638. /* vrefresh_rate = vfreq + 60 */
  639. vrefresh_rate = vfreq + 60;
  640. /* the vdisplay is calculated based on the aspect ratio */
  641. if (aspect_ratio == 0) {
  642. if (revision < 3)
  643. vsize = hsize;
  644. else
  645. vsize = (hsize * 10) / 16;
  646. } else if (aspect_ratio == 1)
  647. vsize = (hsize * 3) / 4;
  648. else if (aspect_ratio == 2)
  649. vsize = (hsize * 4) / 5;
  650. else
  651. vsize = (hsize * 9) / 16;
  652. /* HDTV hack */
  653. if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
  654. mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  655. false);
  656. mode->hdisplay = 1366;
  657. mode->vsync_start = mode->vsync_start - 1;
  658. mode->vsync_end = mode->vsync_end - 1;
  659. return mode;
  660. }
  661. mode = NULL;
  662. /* check whether it can be found in default mode table */
  663. mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
  664. if (mode)
  665. return mode;
  666. switch (timing_level) {
  667. case LEVEL_DMT:
  668. break;
  669. case LEVEL_GTF:
  670. mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
  671. break;
  672. case LEVEL_CVT:
  673. mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  674. false);
  675. break;
  676. }
  677. return mode;
  678. }
  679. /*
  680. * EDID is delightfully ambiguous about how interlaced modes are to be
  681. * encoded. Our internal representation is of frame height, but some
  682. * HDTV detailed timings are encoded as field height.
  683. *
  684. * The format list here is from CEA, in frame size. Technically we
  685. * should be checking refresh rate too. Whatever.
  686. */
  687. static void
  688. drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
  689. struct detailed_pixel_timing *pt)
  690. {
  691. int i;
  692. static const struct {
  693. int w, h;
  694. } cea_interlaced[] = {
  695. { 1920, 1080 },
  696. { 720, 480 },
  697. { 1440, 480 },
  698. { 2880, 480 },
  699. { 720, 576 },
  700. { 1440, 576 },
  701. { 2880, 576 },
  702. };
  703. static const int n_sizes =
  704. sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
  705. if (!(pt->misc & DRM_EDID_PT_INTERLACED))
  706. return;
  707. for (i = 0; i < n_sizes; i++) {
  708. if ((mode->hdisplay == cea_interlaced[i].w) &&
  709. (mode->vdisplay == cea_interlaced[i].h / 2)) {
  710. mode->vdisplay *= 2;
  711. mode->vsync_start *= 2;
  712. mode->vsync_end *= 2;
  713. mode->vtotal *= 2;
  714. mode->vtotal |= 1;
  715. }
  716. }
  717. mode->flags |= DRM_MODE_FLAG_INTERLACE;
  718. }
  719. /**
  720. * drm_mode_detailed - create a new mode from an EDID detailed timing section
  721. * @dev: DRM device (needed to create new mode)
  722. * @edid: EDID block
  723. * @timing: EDID detailed timing info
  724. * @quirks: quirks to apply
  725. *
  726. * An EDID detailed timing block contains enough info for us to create and
  727. * return a new struct drm_display_mode.
  728. */
  729. static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
  730. struct edid *edid,
  731. struct detailed_timing *timing,
  732. u32 quirks)
  733. {
  734. struct drm_display_mode *mode;
  735. struct detailed_pixel_timing *pt = &timing->data.pixel_data;
  736. unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
  737. unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
  738. unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
  739. unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
  740. unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
  741. unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
  742. unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
  743. unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
  744. /* ignore tiny modes */
  745. if (hactive < 64 || vactive < 64)
  746. return NULL;
  747. if (pt->misc & DRM_EDID_PT_STEREO) {
  748. printk(KERN_WARNING "stereo mode not supported\n");
  749. return NULL;
  750. }
  751. if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
  752. printk(KERN_WARNING "composite sync not supported\n");
  753. }
  754. /* it is incorrect if hsync/vsync width is zero */
  755. if (!hsync_pulse_width || !vsync_pulse_width) {
  756. DRM_DEBUG_KMS("Incorrect Detailed timing. "
  757. "Wrong Hsync/Vsync pulse width\n");
  758. return NULL;
  759. }
  760. mode = drm_mode_create(dev);
  761. if (!mode)
  762. return NULL;
  763. mode->type = DRM_MODE_TYPE_DRIVER;
  764. if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
  765. timing->pixel_clock = cpu_to_le16(1088);
  766. mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
  767. mode->hdisplay = hactive;
  768. mode->hsync_start = mode->hdisplay + hsync_offset;
  769. mode->hsync_end = mode->hsync_start + hsync_pulse_width;
  770. mode->htotal = mode->hdisplay + hblank;
  771. mode->vdisplay = vactive;
  772. mode->vsync_start = mode->vdisplay + vsync_offset;
  773. mode->vsync_end = mode->vsync_start + vsync_pulse_width;
  774. mode->vtotal = mode->vdisplay + vblank;
  775. /* Some EDIDs have bogus h/vtotal values */
  776. if (mode->hsync_end > mode->htotal)
  777. mode->htotal = mode->hsync_end + 1;
  778. if (mode->vsync_end > mode->vtotal)
  779. mode->vtotal = mode->vsync_end + 1;
  780. drm_mode_set_name(mode);
  781. drm_mode_do_interlace_quirk(mode, pt);
  782. if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
  783. pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
  784. }
  785. mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
  786. DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
  787. mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
  788. DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
  789. mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
  790. mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
  791. if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
  792. mode->width_mm *= 10;
  793. mode->height_mm *= 10;
  794. }
  795. if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
  796. mode->width_mm = edid->width_cm * 10;
  797. mode->height_mm = edid->height_cm * 10;
  798. }
  799. return mode;
  800. }
  801. /*
  802. * Detailed mode info for the EDID "established modes" data to use.
  803. */
  804. static struct drm_display_mode edid_est_modes[] = {
  805. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  806. 968, 1056, 0, 600, 601, 605, 628, 0,
  807. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
  808. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  809. 896, 1024, 0, 600, 601, 603, 625, 0,
  810. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
  811. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  812. 720, 840, 0, 480, 481, 484, 500, 0,
  813. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
  814. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  815. 704, 832, 0, 480, 489, 491, 520, 0,
  816. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
  817. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
  818. 768, 864, 0, 480, 483, 486, 525, 0,
  819. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
  820. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
  821. 752, 800, 0, 480, 490, 492, 525, 0,
  822. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
  823. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
  824. 846, 900, 0, 400, 421, 423, 449, 0,
  825. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
  826. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
  827. 846, 900, 0, 400, 412, 414, 449, 0,
  828. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
  829. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  830. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  831. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
  832. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
  833. 1136, 1312, 0, 768, 769, 772, 800, 0,
  834. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
  835. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  836. 1184, 1328, 0, 768, 771, 777, 806, 0,
  837. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
  838. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  839. 1184, 1344, 0, 768, 771, 777, 806, 0,
  840. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
  841. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
  842. 1208, 1264, 0, 768, 768, 776, 817, 0,
  843. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
  844. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
  845. 928, 1152, 0, 624, 625, 628, 667, 0,
  846. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
  847. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  848. 896, 1056, 0, 600, 601, 604, 625, 0,
  849. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
  850. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  851. 976, 1040, 0, 600, 637, 643, 666, 0,
  852. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
  853. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  854. 1344, 1600, 0, 864, 865, 868, 900, 0,
  855. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
  856. };
  857. #define EDID_EST_TIMINGS 16
  858. #define EDID_STD_TIMINGS 8
  859. #define EDID_DETAILED_TIMINGS 4
  860. /**
  861. * add_established_modes - get est. modes from EDID and add them
  862. * @edid: EDID block to scan
  863. *
  864. * Each EDID block contains a bitmap of the supported "established modes" list
  865. * (defined above). Tease them out and add them to the global modes list.
  866. */
  867. static int add_established_modes(struct drm_connector *connector, struct edid *edid)
  868. {
  869. struct drm_device *dev = connector->dev;
  870. unsigned long est_bits = edid->established_timings.t1 |
  871. (edid->established_timings.t2 << 8) |
  872. ((edid->established_timings.mfg_rsvd & 0x80) << 9);
  873. int i, modes = 0;
  874. for (i = 0; i <= EDID_EST_TIMINGS; i++)
  875. if (est_bits & (1<<i)) {
  876. struct drm_display_mode *newmode;
  877. newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
  878. if (newmode) {
  879. drm_mode_probed_add(connector, newmode);
  880. modes++;
  881. }
  882. }
  883. return modes;
  884. }
  885. /**
  886. * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
  887. * @edid: EDID block to scan
  888. */
  889. static int standard_timing_level(struct edid *edid)
  890. {
  891. if (edid->revision >= 2) {
  892. if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
  893. return LEVEL_CVT;
  894. return LEVEL_GTF;
  895. }
  896. return LEVEL_DMT;
  897. }
  898. /**
  899. * add_standard_modes - get std. modes from EDID and add them
  900. * @edid: EDID block to scan
  901. *
  902. * Standard modes can be calculated using the CVT standard. Grab them from
  903. * @edid, calculate them, and add them to the list.
  904. */
  905. static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
  906. {
  907. struct drm_device *dev = connector->dev;
  908. int i, modes = 0;
  909. int timing_level;
  910. timing_level = standard_timing_level(edid);
  911. for (i = 0; i < EDID_STD_TIMINGS; i++) {
  912. struct std_timing *t = &edid->standard_timings[i];
  913. struct drm_display_mode *newmode;
  914. newmode = drm_mode_std(dev, &edid->standard_timings[i],
  915. edid->revision, timing_level);
  916. if (newmode) {
  917. drm_mode_probed_add(connector, newmode);
  918. modes++;
  919. }
  920. }
  921. return modes;
  922. }
  923. /*
  924. * XXX fix this for:
  925. * - GTF secondary curve formula
  926. * - EDID 1.4 range offsets
  927. * - CVT extended bits
  928. */
  929. static bool
  930. mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
  931. {
  932. struct detailed_data_monitor_range *range;
  933. int hsync, vrefresh;
  934. range = &timing->data.other_data.data.range;
  935. hsync = drm_mode_hsync(mode);
  936. vrefresh = drm_mode_vrefresh(mode);
  937. if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
  938. return false;
  939. if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
  940. return false;
  941. if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
  942. /* be forgiving since it's in units of 10MHz */
  943. int max_clock = range->pixel_clock_mhz * 10 + 9;
  944. max_clock *= 1000;
  945. if (mode->clock > max_clock)
  946. return false;
  947. }
  948. return true;
  949. }
  950. /*
  951. * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
  952. * need to account for them.
  953. */
  954. static int drm_gtf_modes_for_range(struct drm_connector *connector,
  955. struct detailed_timing *timing)
  956. {
  957. int i, modes = 0;
  958. struct drm_display_mode *newmode;
  959. struct drm_device *dev = connector->dev;
  960. for (i = 0; i < drm_num_dmt_modes; i++) {
  961. if (mode_in_range(drm_dmt_modes + i, timing)) {
  962. newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
  963. if (newmode) {
  964. drm_mode_probed_add(connector, newmode);
  965. modes++;
  966. }
  967. }
  968. }
  969. return modes;
  970. }
  971. static int drm_cvt_modes(struct drm_connector *connector,
  972. struct detailed_timing *timing)
  973. {
  974. int i, j, modes = 0;
  975. struct drm_display_mode *newmode;
  976. struct drm_device *dev = connector->dev;
  977. struct cvt_timing *cvt;
  978. const int rates[] = { 60, 85, 75, 60, 50 };
  979. const u8 empty[3] = { 0, 0, 0 };
  980. for (i = 0; i < 4; i++) {
  981. int uninitialized_var(width), height;
  982. cvt = &(timing->data.other_data.data.cvt[i]);
  983. if (!memcmp(cvt->code, empty, 3))
  984. continue;
  985. height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
  986. switch (cvt->code[1] & 0x0c) {
  987. case 0x00:
  988. width = height * 4 / 3;
  989. break;
  990. case 0x04:
  991. width = height * 16 / 9;
  992. break;
  993. case 0x08:
  994. width = height * 16 / 10;
  995. break;
  996. case 0x0c:
  997. width = height * 15 / 9;
  998. break;
  999. }
  1000. for (j = 1; j < 5; j++) {
  1001. if (cvt->code[2] & (1 << j)) {
  1002. newmode = drm_cvt_mode(dev, width, height,
  1003. rates[j], j == 0,
  1004. false, false);
  1005. if (newmode) {
  1006. drm_mode_probed_add(connector, newmode);
  1007. modes++;
  1008. }
  1009. }
  1010. }
  1011. }
  1012. return modes;
  1013. }
  1014. static const struct {
  1015. short w;
  1016. short h;
  1017. short r;
  1018. short rb;
  1019. } est3_modes[] = {
  1020. /* byte 6 */
  1021. { 640, 350, 85, 0 },
  1022. { 640, 400, 85, 0 },
  1023. { 720, 400, 85, 0 },
  1024. { 640, 480, 85, 0 },
  1025. { 848, 480, 60, 0 },
  1026. { 800, 600, 85, 0 },
  1027. { 1024, 768, 85, 0 },
  1028. { 1152, 864, 75, 0 },
  1029. /* byte 7 */
  1030. { 1280, 768, 60, 1 },
  1031. { 1280, 768, 60, 0 },
  1032. { 1280, 768, 75, 0 },
  1033. { 1280, 768, 85, 0 },
  1034. { 1280, 960, 60, 0 },
  1035. { 1280, 960, 85, 0 },
  1036. { 1280, 1024, 60, 0 },
  1037. { 1280, 1024, 85, 0 },
  1038. /* byte 8 */
  1039. { 1360, 768, 60, 0 },
  1040. { 1440, 900, 60, 1 },
  1041. { 1440, 900, 60, 0 },
  1042. { 1440, 900, 75, 0 },
  1043. { 1440, 900, 85, 0 },
  1044. { 1400, 1050, 60, 1 },
  1045. { 1400, 1050, 60, 0 },
  1046. { 1400, 1050, 75, 0 },
  1047. /* byte 9 */
  1048. { 1400, 1050, 85, 0 },
  1049. { 1680, 1050, 60, 1 },
  1050. { 1680, 1050, 60, 0 },
  1051. { 1680, 1050, 75, 0 },
  1052. { 1680, 1050, 85, 0 },
  1053. { 1600, 1200, 60, 0 },
  1054. { 1600, 1200, 65, 0 },
  1055. { 1600, 1200, 70, 0 },
  1056. /* byte 10 */
  1057. { 1600, 1200, 75, 0 },
  1058. { 1600, 1200, 85, 0 },
  1059. { 1792, 1344, 60, 0 },
  1060. { 1792, 1344, 85, 0 },
  1061. { 1856, 1392, 60, 0 },
  1062. { 1856, 1392, 75, 0 },
  1063. { 1920, 1200, 60, 1 },
  1064. { 1920, 1200, 60, 0 },
  1065. /* byte 11 */
  1066. { 1920, 1200, 75, 0 },
  1067. { 1920, 1200, 85, 0 },
  1068. { 1920, 1440, 60, 0 },
  1069. { 1920, 1440, 75, 0 },
  1070. };
  1071. static const int num_est3_modes = sizeof(est3_modes) / sizeof(est3_modes[0]);
  1072. static int
  1073. drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
  1074. {
  1075. int i, j, m, modes = 0;
  1076. struct drm_display_mode *mode;
  1077. u8 *est = ((u8 *)timing) + 5;
  1078. for (i = 0; i < 6; i++) {
  1079. for (j = 7; j > 0; j--) {
  1080. m = (i * 8) + (7 - j);
  1081. if (m > num_est3_modes)
  1082. break;
  1083. if (est[i] & (1 << j)) {
  1084. mode = drm_find_dmt(connector->dev,
  1085. est3_modes[m].w,
  1086. est3_modes[m].h,
  1087. est3_modes[m].r
  1088. /*, est3_modes[m].rb */);
  1089. if (mode) {
  1090. drm_mode_probed_add(connector, mode);
  1091. modes++;
  1092. }
  1093. }
  1094. }
  1095. }
  1096. return modes;
  1097. }
  1098. static int add_detailed_modes(struct drm_connector *connector,
  1099. struct detailed_timing *timing,
  1100. struct edid *edid, u32 quirks, int preferred)
  1101. {
  1102. int i, modes = 0;
  1103. struct detailed_non_pixel *data = &timing->data.other_data;
  1104. int timing_level = standard_timing_level(edid);
  1105. int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
  1106. struct drm_display_mode *newmode;
  1107. struct drm_device *dev = connector->dev;
  1108. if (timing->pixel_clock) {
  1109. newmode = drm_mode_detailed(dev, edid, timing, quirks);
  1110. if (!newmode)
  1111. return 0;
  1112. if (preferred)
  1113. newmode->type |= DRM_MODE_TYPE_PREFERRED;
  1114. drm_mode_probed_add(connector, newmode);
  1115. return 1;
  1116. }
  1117. /* other timing types */
  1118. switch (data->type) {
  1119. case EDID_DETAIL_MONITOR_RANGE:
  1120. if (gtf)
  1121. modes += drm_gtf_modes_for_range(connector, timing);
  1122. break;
  1123. case EDID_DETAIL_STD_MODES:
  1124. /* Six modes per detailed section */
  1125. for (i = 0; i < 6; i++) {
  1126. struct std_timing *std;
  1127. struct drm_display_mode *newmode;
  1128. std = &data->data.timings[i];
  1129. newmode = drm_mode_std(dev, std, edid->revision,
  1130. timing_level);
  1131. if (newmode) {
  1132. drm_mode_probed_add(connector, newmode);
  1133. modes++;
  1134. }
  1135. }
  1136. break;
  1137. case EDID_DETAIL_CVT_3BYTE:
  1138. modes += drm_cvt_modes(connector, timing);
  1139. break;
  1140. case EDID_DETAIL_EST_TIMINGS:
  1141. modes += drm_est3_modes(connector, timing);
  1142. break;
  1143. default:
  1144. break;
  1145. }
  1146. return modes;
  1147. }
  1148. /**
  1149. * add_detailed_info - get detailed mode info from EDID data
  1150. * @connector: attached connector
  1151. * @edid: EDID block to scan
  1152. * @quirks: quirks to apply
  1153. *
  1154. * Some of the detailed timing sections may contain mode information. Grab
  1155. * it and add it to the list.
  1156. */
  1157. static int add_detailed_info(struct drm_connector *connector,
  1158. struct edid *edid, u32 quirks)
  1159. {
  1160. int i, modes = 0;
  1161. for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
  1162. struct detailed_timing *timing = &edid->detailed_timings[i];
  1163. int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
  1164. /* In 1.0, only timings are allowed */
  1165. if (!timing->pixel_clock && edid->version == 1 &&
  1166. edid->revision == 0)
  1167. continue;
  1168. modes += add_detailed_modes(connector, timing, edid, quirks,
  1169. preferred);
  1170. }
  1171. return modes;
  1172. }
  1173. /**
  1174. * add_detailed_mode_eedid - get detailed mode info from addtional timing
  1175. * EDID block
  1176. * @connector: attached connector
  1177. * @edid: EDID block to scan(It is only to get addtional timing EDID block)
  1178. * @quirks: quirks to apply
  1179. *
  1180. * Some of the detailed timing sections may contain mode information. Grab
  1181. * it and add it to the list.
  1182. */
  1183. static int add_detailed_info_eedid(struct drm_connector *connector,
  1184. struct edid *edid, u32 quirks)
  1185. {
  1186. int i, modes = 0;
  1187. char *edid_ext = NULL;
  1188. struct detailed_timing *timing;
  1189. int start_offset, end_offset;
  1190. int timing_level;
  1191. if (edid->version == 1 && edid->revision < 3) {
  1192. /* If the EDID version is less than 1.3, there is no
  1193. * extension EDID.
  1194. */
  1195. return 0;
  1196. }
  1197. if (!edid->extensions) {
  1198. /* if there is no extension EDID, it is unnecessary to
  1199. * parse the E-EDID to get detailed info
  1200. */
  1201. return 0;
  1202. }
  1203. /* Find CEA extension */
  1204. for (i = 0; i < edid->extensions; i++) {
  1205. edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  1206. /* This block is CEA extension */
  1207. if (edid_ext[0] == 0x02)
  1208. break;
  1209. }
  1210. if (i == edid->extensions) {
  1211. /* if there is no additional timing EDID block, return */
  1212. return 0;
  1213. }
  1214. /* Get the start offset of detailed timing block */
  1215. start_offset = edid_ext[2];
  1216. if (start_offset == 0) {
  1217. /* If the start_offset is zero, it means that neither detailed
  1218. * info nor data block exist. In such case it is also
  1219. * unnecessary to parse the detailed timing info.
  1220. */
  1221. return 0;
  1222. }
  1223. timing_level = standard_timing_level(edid);
  1224. end_offset = EDID_LENGTH;
  1225. end_offset -= sizeof(struct detailed_timing);
  1226. for (i = start_offset; i < end_offset;
  1227. i += sizeof(struct detailed_timing)) {
  1228. timing = (struct detailed_timing *)(edid_ext + i);
  1229. modes += add_detailed_modes(connector, timing, edid, quirks, 0);
  1230. }
  1231. return modes;
  1232. }
  1233. #define HDMI_IDENTIFIER 0x000C03
  1234. #define VENDOR_BLOCK 0x03
  1235. /**
  1236. * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
  1237. * @edid: monitor EDID information
  1238. *
  1239. * Parse the CEA extension according to CEA-861-B.
  1240. * Return true if HDMI, false if not or unknown.
  1241. */
  1242. bool drm_detect_hdmi_monitor(struct edid *edid)
  1243. {
  1244. char *edid_ext = NULL;
  1245. int i, hdmi_id;
  1246. int start_offset, end_offset;
  1247. bool is_hdmi = false;
  1248. /* No EDID or EDID extensions */
  1249. if (edid == NULL || edid->extensions == 0)
  1250. goto end;
  1251. /* Find CEA extension */
  1252. for (i = 0; i < edid->extensions; i++) {
  1253. edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  1254. /* This block is CEA extension */
  1255. if (edid_ext[0] == 0x02)
  1256. break;
  1257. }
  1258. if (i == edid->extensions)
  1259. goto end;
  1260. /* Data block offset in CEA extension block */
  1261. start_offset = 4;
  1262. end_offset = edid_ext[2];
  1263. /*
  1264. * Because HDMI identifier is in Vendor Specific Block,
  1265. * search it from all data blocks of CEA extension.
  1266. */
  1267. for (i = start_offset; i < end_offset;
  1268. /* Increased by data block len */
  1269. i += ((edid_ext[i] & 0x1f) + 1)) {
  1270. /* Find vendor specific block */
  1271. if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
  1272. hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
  1273. edid_ext[i + 3] << 16;
  1274. /* Find HDMI identifier */
  1275. if (hdmi_id == HDMI_IDENTIFIER)
  1276. is_hdmi = true;
  1277. break;
  1278. }
  1279. }
  1280. end:
  1281. return is_hdmi;
  1282. }
  1283. EXPORT_SYMBOL(drm_detect_hdmi_monitor);
  1284. /**
  1285. * drm_add_edid_modes - add modes from EDID data, if available
  1286. * @connector: connector we're probing
  1287. * @edid: edid data
  1288. *
  1289. * Add the specified modes to the connector's mode list.
  1290. *
  1291. * Return number of modes added or 0 if we couldn't find any.
  1292. */
  1293. int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
  1294. {
  1295. int num_modes = 0;
  1296. u32 quirks;
  1297. if (edid == NULL) {
  1298. return 0;
  1299. }
  1300. if (!drm_edid_is_valid(edid)) {
  1301. dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
  1302. drm_get_connector_name(connector));
  1303. return 0;
  1304. }
  1305. quirks = edid_get_quirks(edid);
  1306. /*
  1307. * EDID spec says modes should be preferred in this order:
  1308. * - preferred detailed mode
  1309. * - other detailed modes from base block
  1310. * - detailed modes from extension blocks
  1311. * - CVT 3-byte code modes
  1312. * - standard timing codes
  1313. * - established timing codes
  1314. * - modes inferred from GTF or CVT range information
  1315. *
  1316. * We don't quite implement this yet, but we're close.
  1317. *
  1318. * XXX order for additional mode types in extension blocks?
  1319. */
  1320. num_modes += add_detailed_info(connector, edid, quirks);
  1321. num_modes += add_detailed_info_eedid(connector, edid, quirks);
  1322. num_modes += add_standard_modes(connector, edid);
  1323. num_modes += add_established_modes(connector, edid);
  1324. if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
  1325. edid_fixup_preferred(connector, quirks);
  1326. connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
  1327. connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
  1328. connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
  1329. connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
  1330. connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
  1331. connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
  1332. connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
  1333. connector->display_info.width_mm = edid->width_cm * 10;
  1334. connector->display_info.height_mm = edid->height_cm * 10;
  1335. connector->display_info.gamma = edid->gamma;
  1336. connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
  1337. connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
  1338. connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
  1339. connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
  1340. connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
  1341. connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
  1342. connector->display_info.gamma = edid->gamma;
  1343. return num_modes;
  1344. }
  1345. EXPORT_SYMBOL(drm_add_edid_modes);
  1346. /**
  1347. * drm_add_modes_noedid - add modes for the connectors without EDID
  1348. * @connector: connector we're probing
  1349. * @hdisplay: the horizontal display limit
  1350. * @vdisplay: the vertical display limit
  1351. *
  1352. * Add the specified modes to the connector's mode list. Only when the
  1353. * hdisplay/vdisplay is not beyond the given limit, it will be added.
  1354. *
  1355. * Return number of modes added or 0 if we couldn't find any.
  1356. */
  1357. int drm_add_modes_noedid(struct drm_connector *connector,
  1358. int hdisplay, int vdisplay)
  1359. {
  1360. int i, count, num_modes = 0;
  1361. struct drm_display_mode *mode, *ptr;
  1362. struct drm_device *dev = connector->dev;
  1363. count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  1364. if (hdisplay < 0)
  1365. hdisplay = 0;
  1366. if (vdisplay < 0)
  1367. vdisplay = 0;
  1368. for (i = 0; i < count; i++) {
  1369. ptr = &drm_dmt_modes[i];
  1370. if (hdisplay && vdisplay) {
  1371. /*
  1372. * Only when two are valid, they will be used to check
  1373. * whether the mode should be added to the mode list of
  1374. * the connector.
  1375. */
  1376. if (ptr->hdisplay > hdisplay ||
  1377. ptr->vdisplay > vdisplay)
  1378. continue;
  1379. }
  1380. if (drm_mode_vrefresh(ptr) > 61)
  1381. continue;
  1382. mode = drm_mode_duplicate(dev, ptr);
  1383. if (mode) {
  1384. drm_mode_probed_add(connector, mode);
  1385. num_modes++;
  1386. }
  1387. }
  1388. return num_modes;
  1389. }
  1390. EXPORT_SYMBOL(drm_add_modes_noedid);