ice1724.c 68 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <sound/driver.h>
  25. #include <asm/io.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/moduleparam.h>
  32. #include <linux/mutex.h>
  33. #include <sound/core.h>
  34. #include <sound/info.h>
  35. #include <sound/mpu401.h>
  36. #include <sound/initval.h>
  37. #include <sound/asoundef.h>
  38. #include "ice1712.h"
  39. #include "envy24ht.h"
  40. /* lowlevel routines */
  41. #include "amp.h"
  42. #include "revo.h"
  43. #include "aureon.h"
  44. #include "vt1720_mobo.h"
  45. #include "pontis.h"
  46. #include "prodigy192.h"
  47. #include "juli.h"
  48. #include "phase.h"
  49. #include "wtm.h"
  50. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  51. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  52. MODULE_LICENSE("GPL");
  53. MODULE_SUPPORTED_DEVICE("{"
  54. REVO_DEVICE_DESC
  55. AMP_AUDIO2000_DEVICE_DESC
  56. AUREON_DEVICE_DESC
  57. VT1720_MOBO_DEVICE_DESC
  58. PONTIS_DEVICE_DESC
  59. PRODIGY192_DEVICE_DESC
  60. JULI_DEVICE_DESC
  61. PHASE_DEVICE_DESC
  62. WTM_DEVICE_DESC
  63. "{VIA,VT1720},"
  64. "{VIA,VT1724},"
  65. "{ICEnsemble,Generic ICE1724},"
  66. "{ICEnsemble,Generic Envy24HT}"
  67. "{ICEnsemble,Generic Envy24PT}}");
  68. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  69. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  70. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  71. static char *model[SNDRV_CARDS];
  72. module_param_array(index, int, NULL, 0444);
  73. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  74. module_param_array(id, charp, NULL, 0444);
  75. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  76. module_param_array(enable, bool, NULL, 0444);
  77. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  78. module_param_array(model, charp, NULL, 0444);
  79. MODULE_PARM_DESC(model, "Use the given board model.");
  80. /* Both VT1720 and VT1724 have the same PCI IDs */
  81. static const struct pci_device_id snd_vt1724_ids[] = {
  82. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  83. { 0, }
  84. };
  85. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  86. static int PRO_RATE_LOCKED;
  87. static int PRO_RATE_RESET = 1;
  88. static unsigned int PRO_RATE_DEFAULT = 44100;
  89. /*
  90. * Basic I/O
  91. */
  92. /* check whether the clock mode is spdif-in */
  93. static inline int is_spdif_master(struct snd_ice1712 *ice)
  94. {
  95. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  96. }
  97. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  98. {
  99. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  100. }
  101. /*
  102. * ac97 section
  103. */
  104. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  105. {
  106. unsigned char old_cmd;
  107. int tm;
  108. for (tm = 0; tm < 0x10000; tm++) {
  109. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  110. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  111. continue;
  112. if (!(old_cmd & VT1724_AC97_READY))
  113. continue;
  114. return old_cmd;
  115. }
  116. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  117. return old_cmd;
  118. }
  119. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  120. {
  121. int tm;
  122. for (tm = 0; tm < 0x10000; tm++)
  123. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  124. return 0;
  125. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  126. return -EIO;
  127. }
  128. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  129. unsigned short reg,
  130. unsigned short val)
  131. {
  132. struct snd_ice1712 *ice = ac97->private_data;
  133. unsigned char old_cmd;
  134. old_cmd = snd_vt1724_ac97_ready(ice);
  135. old_cmd &= ~VT1724_AC97_ID_MASK;
  136. old_cmd |= ac97->num;
  137. outb(reg, ICEMT1724(ice, AC97_INDEX));
  138. outw(val, ICEMT1724(ice, AC97_DATA));
  139. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  140. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  141. }
  142. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  143. {
  144. struct snd_ice1712 *ice = ac97->private_data;
  145. unsigned char old_cmd;
  146. old_cmd = snd_vt1724_ac97_ready(ice);
  147. old_cmd &= ~VT1724_AC97_ID_MASK;
  148. old_cmd |= ac97->num;
  149. outb(reg, ICEMT1724(ice, AC97_INDEX));
  150. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  151. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  152. return ~0;
  153. return inw(ICEMT1724(ice, AC97_DATA));
  154. }
  155. /*
  156. * GPIO operations
  157. */
  158. /* set gpio direction 0 = read, 1 = write */
  159. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  160. {
  161. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  162. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  163. }
  164. /* set the gpio mask (0 = writable) */
  165. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  166. {
  167. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  168. if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  169. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  170. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  171. }
  172. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  173. {
  174. outw(data, ICEREG1724(ice, GPIO_DATA));
  175. if (! ice->vt1720)
  176. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  177. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  178. }
  179. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  180. {
  181. unsigned int data;
  182. if (! ice->vt1720)
  183. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  184. else
  185. data = 0;
  186. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  187. return data;
  188. }
  189. /*
  190. * Interrupt handler
  191. */
  192. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  193. {
  194. struct snd_ice1712 *ice = dev_id;
  195. unsigned char status;
  196. int handled = 0;
  197. while (1) {
  198. status = inb(ICEREG1724(ice, IRQSTAT));
  199. if (status == 0)
  200. break;
  201. handled = 1;
  202. /* these should probably be separated at some point,
  203. * but as we don't currently have MPU support on the board
  204. * I will leave it
  205. */
  206. if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
  207. if (ice->rmidi[0])
  208. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
  209. outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
  210. status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
  211. }
  212. if (status & VT1724_IRQ_MTPCM) {
  213. /*
  214. * Multi-track PCM
  215. * PCM assignment are:
  216. * Playback DMA0 (M/C) = playback_pro_substream
  217. * Playback DMA1 = playback_con_substream_ds[0]
  218. * Playback DMA2 = playback_con_substream_ds[1]
  219. * Playback DMA3 = playback_con_substream_ds[2]
  220. * Playback DMA4 (SPDIF) = playback_con_substream
  221. * Record DMA0 = capture_pro_substream
  222. * Record DMA1 = capture_con_substream
  223. */
  224. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  225. if (mtstat & VT1724_MULTI_PDMA0) {
  226. if (ice->playback_pro_substream)
  227. snd_pcm_period_elapsed(ice->playback_pro_substream);
  228. }
  229. if (mtstat & VT1724_MULTI_RDMA0) {
  230. if (ice->capture_pro_substream)
  231. snd_pcm_period_elapsed(ice->capture_pro_substream);
  232. }
  233. if (mtstat & VT1724_MULTI_PDMA1) {
  234. if (ice->playback_con_substream_ds[0])
  235. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  236. }
  237. if (mtstat & VT1724_MULTI_PDMA2) {
  238. if (ice->playback_con_substream_ds[1])
  239. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  240. }
  241. if (mtstat & VT1724_MULTI_PDMA3) {
  242. if (ice->playback_con_substream_ds[2])
  243. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  244. }
  245. if (mtstat & VT1724_MULTI_PDMA4) {
  246. if (ice->playback_con_substream)
  247. snd_pcm_period_elapsed(ice->playback_con_substream);
  248. }
  249. if (mtstat & VT1724_MULTI_RDMA1) {
  250. if (ice->capture_con_substream)
  251. snd_pcm_period_elapsed(ice->capture_con_substream);
  252. }
  253. /* ack anyway to avoid freeze */
  254. outb(mtstat, ICEMT1724(ice, IRQ));
  255. /* ought to really handle this properly */
  256. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  257. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  258. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  259. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  260. /* If I don't do this, I get machine lockup due to continual interrupts */
  261. }
  262. }
  263. }
  264. return IRQ_RETVAL(handled);
  265. }
  266. /*
  267. * PCM code - professional part (multitrack)
  268. */
  269. static unsigned int rates[] = {
  270. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  271. 32000, 44100, 48000, 64000, 88200, 96000,
  272. 176400, 192000,
  273. };
  274. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  275. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  276. .list = rates,
  277. .mask = 0,
  278. };
  279. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  280. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  281. .list = rates,
  282. .mask = 0,
  283. };
  284. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  285. .count = ARRAY_SIZE(rates),
  286. .list = rates,
  287. .mask = 0,
  288. };
  289. struct vt1724_pcm_reg {
  290. unsigned int addr; /* ADDR register offset */
  291. unsigned int size; /* SIZE register offset */
  292. unsigned int count; /* COUNT register offset */
  293. unsigned int start; /* start & pause bit */
  294. };
  295. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  296. {
  297. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  298. unsigned char what;
  299. unsigned char old;
  300. struct snd_pcm_substream *s;
  301. what = 0;
  302. snd_pcm_group_for_each_entry(s, substream) {
  303. const struct vt1724_pcm_reg *reg;
  304. reg = s->runtime->private_data;
  305. what |= reg->start;
  306. snd_pcm_trigger_done(s, substream);
  307. }
  308. switch (cmd) {
  309. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  310. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  311. spin_lock(&ice->reg_lock);
  312. old = inb(ICEMT1724(ice, DMA_PAUSE));
  313. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  314. old |= what;
  315. else
  316. old &= ~what;
  317. outb(old, ICEMT1724(ice, DMA_PAUSE));
  318. spin_unlock(&ice->reg_lock);
  319. break;
  320. case SNDRV_PCM_TRIGGER_START:
  321. case SNDRV_PCM_TRIGGER_STOP:
  322. spin_lock(&ice->reg_lock);
  323. old = inb(ICEMT1724(ice, DMA_CONTROL));
  324. if (cmd == SNDRV_PCM_TRIGGER_START)
  325. old |= what;
  326. else
  327. old &= ~what;
  328. outb(old, ICEMT1724(ice, DMA_CONTROL));
  329. spin_unlock(&ice->reg_lock);
  330. break;
  331. default:
  332. return -EINVAL;
  333. }
  334. return 0;
  335. }
  336. /*
  337. */
  338. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  339. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  340. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  341. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  342. static int get_max_rate(struct snd_ice1712 *ice)
  343. {
  344. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  345. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  346. return 192000;
  347. else
  348. return 96000;
  349. } else
  350. return 48000;
  351. }
  352. static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  353. int force)
  354. {
  355. unsigned long flags;
  356. unsigned char val, old;
  357. unsigned int i, mclk_change;
  358. if (rate > get_max_rate(ice))
  359. return;
  360. switch (rate) {
  361. case 8000: val = 6; break;
  362. case 9600: val = 3; break;
  363. case 11025: val = 10; break;
  364. case 12000: val = 2; break;
  365. case 16000: val = 5; break;
  366. case 22050: val = 9; break;
  367. case 24000: val = 1; break;
  368. case 32000: val = 4; break;
  369. case 44100: val = 8; break;
  370. case 48000: val = 0; break;
  371. case 64000: val = 15; break;
  372. case 88200: val = 11; break;
  373. case 96000: val = 7; break;
  374. case 176400: val = 12; break;
  375. case 192000: val = 14; break;
  376. default:
  377. snd_BUG();
  378. val = 0;
  379. break;
  380. }
  381. spin_lock_irqsave(&ice->reg_lock, flags);
  382. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  383. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  384. /* running? we cannot change the rate now... */
  385. spin_unlock_irqrestore(&ice->reg_lock, flags);
  386. return;
  387. }
  388. if (!force && is_pro_rate_locked(ice)) {
  389. spin_unlock_irqrestore(&ice->reg_lock, flags);
  390. return;
  391. }
  392. old = inb(ICEMT1724(ice, RATE));
  393. if (force || old != val)
  394. outb(val, ICEMT1724(ice, RATE));
  395. else if (rate == ice->cur_rate) {
  396. spin_unlock_irqrestore(&ice->reg_lock, flags);
  397. return;
  398. }
  399. ice->cur_rate = rate;
  400. /* check MT02 */
  401. mclk_change = 0;
  402. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  403. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  404. if (rate > 96000)
  405. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  406. else
  407. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  408. if (val != old) {
  409. outb(val, ICEMT1724(ice, I2S_FORMAT));
  410. mclk_change = 1;
  411. }
  412. }
  413. spin_unlock_irqrestore(&ice->reg_lock, flags);
  414. if (mclk_change && ice->gpio.i2s_mclk_changed)
  415. ice->gpio.i2s_mclk_changed(ice);
  416. if (ice->gpio.set_pro_rate)
  417. ice->gpio.set_pro_rate(ice, rate);
  418. /* set up codecs */
  419. for (i = 0; i < ice->akm_codecs; i++) {
  420. if (ice->akm[i].ops.set_rate_val)
  421. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  422. }
  423. if (ice->spdif.ops.setup_rate)
  424. ice->spdif.ops.setup_rate(ice, rate);
  425. }
  426. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  427. struct snd_pcm_hw_params *hw_params)
  428. {
  429. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  430. int i, chs;
  431. chs = params_channels(hw_params);
  432. mutex_lock(&ice->open_mutex);
  433. /* mark surround channels */
  434. if (substream == ice->playback_pro_substream) {
  435. /* PDMA0 can be multi-channel up to 8 */
  436. chs = chs / 2 - 1;
  437. for (i = 0; i < chs; i++) {
  438. if (ice->pcm_reserved[i] &&
  439. ice->pcm_reserved[i] != substream) {
  440. mutex_unlock(&ice->open_mutex);
  441. return -EBUSY;
  442. }
  443. ice->pcm_reserved[i] = substream;
  444. }
  445. for (; i < 3; i++) {
  446. if (ice->pcm_reserved[i] == substream)
  447. ice->pcm_reserved[i] = NULL;
  448. }
  449. } else {
  450. for (i = 0; i < 3; i++) {
  451. /* check individual playback stream */
  452. if (ice->playback_con_substream_ds[i] == substream) {
  453. if (ice->pcm_reserved[i] &&
  454. ice->pcm_reserved[i] != substream) {
  455. mutex_unlock(&ice->open_mutex);
  456. return -EBUSY;
  457. }
  458. ice->pcm_reserved[i] = substream;
  459. break;
  460. }
  461. }
  462. }
  463. mutex_unlock(&ice->open_mutex);
  464. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  465. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  466. }
  467. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  468. {
  469. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  470. int i;
  471. mutex_lock(&ice->open_mutex);
  472. /* unmark surround channels */
  473. for (i = 0; i < 3; i++)
  474. if (ice->pcm_reserved[i] == substream)
  475. ice->pcm_reserved[i] = NULL;
  476. mutex_unlock(&ice->open_mutex);
  477. return snd_pcm_lib_free_pages(substream);
  478. }
  479. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  480. {
  481. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  482. unsigned char val;
  483. unsigned int size;
  484. spin_lock_irq(&ice->reg_lock);
  485. val = (8 - substream->runtime->channels) >> 1;
  486. outb(val, ICEMT1724(ice, BURST));
  487. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  488. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  489. // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
  490. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  491. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  492. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  493. // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
  494. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  495. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  496. spin_unlock_irq(&ice->reg_lock);
  497. // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
  498. return 0;
  499. }
  500. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  501. {
  502. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  503. size_t ptr;
  504. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  505. return 0;
  506. #if 0 /* read PLAYBACK_ADDR */
  507. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  508. if (ptr < substream->runtime->dma_addr) {
  509. snd_printd("ice1724: invalid negative ptr\n");
  510. return 0;
  511. }
  512. ptr -= substream->runtime->dma_addr;
  513. ptr = bytes_to_frames(substream->runtime, ptr);
  514. if (ptr >= substream->runtime->buffer_size) {
  515. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  516. (int)ptr, (int)substream->runtime->period_size);
  517. return 0;
  518. }
  519. #else /* read PLAYBACK_SIZE */
  520. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  521. ptr = (ptr + 1) << 2;
  522. ptr = bytes_to_frames(substream->runtime, ptr);
  523. if (! ptr)
  524. ;
  525. else if (ptr <= substream->runtime->buffer_size)
  526. ptr = substream->runtime->buffer_size - ptr;
  527. else {
  528. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  529. (int)ptr, (int)substream->runtime->buffer_size);
  530. ptr = 0;
  531. }
  532. #endif
  533. return ptr;
  534. }
  535. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  536. {
  537. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  538. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  539. spin_lock_irq(&ice->reg_lock);
  540. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  541. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  542. ice->profi_port + reg->size);
  543. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  544. ice->profi_port + reg->count);
  545. spin_unlock_irq(&ice->reg_lock);
  546. return 0;
  547. }
  548. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  549. {
  550. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  551. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  552. size_t ptr;
  553. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  554. return 0;
  555. #if 0 /* use ADDR register */
  556. ptr = inl(ice->profi_port + reg->addr);
  557. ptr -= substream->runtime->dma_addr;
  558. return bytes_to_frames(substream->runtime, ptr);
  559. #else /* use SIZE register */
  560. ptr = inw(ice->profi_port + reg->size);
  561. ptr = (ptr + 1) << 2;
  562. ptr = bytes_to_frames(substream->runtime, ptr);
  563. if (! ptr)
  564. ;
  565. else if (ptr <= substream->runtime->buffer_size)
  566. ptr = substream->runtime->buffer_size - ptr;
  567. else {
  568. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  569. (int)ptr, (int)substream->runtime->buffer_size);
  570. ptr = 0;
  571. }
  572. return ptr;
  573. #endif
  574. }
  575. static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  576. .addr = VT1724_MT_PLAYBACK_ADDR,
  577. .size = VT1724_MT_PLAYBACK_SIZE,
  578. .count = VT1724_MT_PLAYBACK_COUNT,
  579. .start = VT1724_PDMA0_START,
  580. };
  581. static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  582. .addr = VT1724_MT_CAPTURE_ADDR,
  583. .size = VT1724_MT_CAPTURE_SIZE,
  584. .count = VT1724_MT_CAPTURE_COUNT,
  585. .start = VT1724_RDMA0_START,
  586. };
  587. static const struct snd_pcm_hardware snd_vt1724_playback_pro =
  588. {
  589. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  590. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  591. SNDRV_PCM_INFO_MMAP_VALID |
  592. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  593. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  594. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  595. .rate_min = 8000,
  596. .rate_max = 192000,
  597. .channels_min = 2,
  598. .channels_max = 8,
  599. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  600. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  601. .period_bytes_max = (1UL << 21),
  602. .periods_min = 2,
  603. .periods_max = 1024,
  604. };
  605. static const struct snd_pcm_hardware snd_vt1724_spdif =
  606. {
  607. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  608. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  609. SNDRV_PCM_INFO_MMAP_VALID |
  610. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  611. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  612. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  613. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  614. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  615. SNDRV_PCM_RATE_192000),
  616. .rate_min = 32000,
  617. .rate_max = 192000,
  618. .channels_min = 2,
  619. .channels_max = 2,
  620. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  621. .period_bytes_min = 2 * 4 * 2,
  622. .period_bytes_max = (1UL << 18),
  623. .periods_min = 2,
  624. .periods_max = 1024,
  625. };
  626. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo =
  627. {
  628. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  629. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  630. SNDRV_PCM_INFO_MMAP_VALID |
  631. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  632. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  633. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  634. .rate_min = 8000,
  635. .rate_max = 192000,
  636. .channels_min = 2,
  637. .channels_max = 2,
  638. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  639. .period_bytes_min = 2 * 4 * 2,
  640. .period_bytes_max = (1UL << 18),
  641. .periods_min = 2,
  642. .periods_max = 1024,
  643. };
  644. /*
  645. * set rate constraints
  646. */
  647. static int set_rate_constraints(struct snd_ice1712 *ice,
  648. struct snd_pcm_substream *substream)
  649. {
  650. struct snd_pcm_runtime *runtime = substream->runtime;
  651. if (ice->hw_rates) {
  652. /* hardware specific */
  653. runtime->hw.rate_min = ice->hw_rates->list[0];
  654. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  655. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  656. return snd_pcm_hw_constraint_list(runtime, 0,
  657. SNDRV_PCM_HW_PARAM_RATE,
  658. ice->hw_rates);
  659. }
  660. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  661. /* I2S */
  662. /* VT1720 doesn't support more than 96kHz */
  663. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  664. return snd_pcm_hw_constraint_list(runtime, 0,
  665. SNDRV_PCM_HW_PARAM_RATE,
  666. &hw_constraints_rates_192);
  667. else {
  668. runtime->hw.rates = SNDRV_PCM_RATE_KNOT |
  669. SNDRV_PCM_RATE_8000_96000;
  670. runtime->hw.rate_max = 96000;
  671. return snd_pcm_hw_constraint_list(runtime, 0,
  672. SNDRV_PCM_HW_PARAM_RATE,
  673. &hw_constraints_rates_96);
  674. }
  675. } else if (ice->ac97) {
  676. /* ACLINK */
  677. runtime->hw.rate_max = 48000;
  678. runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
  679. return snd_pcm_hw_constraint_list(runtime, 0,
  680. SNDRV_PCM_HW_PARAM_RATE,
  681. &hw_constraints_rates_48);
  682. }
  683. return 0;
  684. }
  685. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  686. * actually used
  687. */
  688. #define VT1724_BUFFER_ALIGN 0x20
  689. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  690. {
  691. struct snd_pcm_runtime *runtime = substream->runtime;
  692. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  693. int chs;
  694. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  695. ice->playback_pro_substream = substream;
  696. runtime->hw = snd_vt1724_playback_pro;
  697. snd_pcm_set_sync(substream);
  698. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  699. set_rate_constraints(ice, substream);
  700. mutex_lock(&ice->open_mutex);
  701. /* calculate the currently available channels */
  702. for (chs = 0; chs < 3; chs++) {
  703. if (ice->pcm_reserved[chs])
  704. break;
  705. }
  706. chs = (chs + 1) * 2;
  707. runtime->hw.channels_max = chs;
  708. if (chs > 2) /* channels must be even */
  709. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  710. mutex_unlock(&ice->open_mutex);
  711. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  712. VT1724_BUFFER_ALIGN);
  713. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  714. VT1724_BUFFER_ALIGN);
  715. return 0;
  716. }
  717. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  718. {
  719. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  720. struct snd_pcm_runtime *runtime = substream->runtime;
  721. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  722. ice->capture_pro_substream = substream;
  723. runtime->hw = snd_vt1724_2ch_stereo;
  724. snd_pcm_set_sync(substream);
  725. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  726. set_rate_constraints(ice, substream);
  727. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  728. VT1724_BUFFER_ALIGN);
  729. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  730. VT1724_BUFFER_ALIGN);
  731. return 0;
  732. }
  733. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  734. {
  735. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  736. if (PRO_RATE_RESET)
  737. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  738. ice->playback_pro_substream = NULL;
  739. return 0;
  740. }
  741. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  742. {
  743. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  744. if (PRO_RATE_RESET)
  745. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  746. ice->capture_pro_substream = NULL;
  747. return 0;
  748. }
  749. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  750. .open = snd_vt1724_playback_pro_open,
  751. .close = snd_vt1724_playback_pro_close,
  752. .ioctl = snd_pcm_lib_ioctl,
  753. .hw_params = snd_vt1724_pcm_hw_params,
  754. .hw_free = snd_vt1724_pcm_hw_free,
  755. .prepare = snd_vt1724_playback_pro_prepare,
  756. .trigger = snd_vt1724_pcm_trigger,
  757. .pointer = snd_vt1724_playback_pro_pointer,
  758. };
  759. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  760. .open = snd_vt1724_capture_pro_open,
  761. .close = snd_vt1724_capture_pro_close,
  762. .ioctl = snd_pcm_lib_ioctl,
  763. .hw_params = snd_vt1724_pcm_hw_params,
  764. .hw_free = snd_vt1724_pcm_hw_free,
  765. .prepare = snd_vt1724_pcm_prepare,
  766. .trigger = snd_vt1724_pcm_trigger,
  767. .pointer = snd_vt1724_pcm_pointer,
  768. };
  769. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device)
  770. {
  771. struct snd_pcm *pcm;
  772. int err;
  773. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  774. if (err < 0)
  775. return err;
  776. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  777. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  778. pcm->private_data = ice;
  779. pcm->info_flags = 0;
  780. strcpy(pcm->name, "ICE1724");
  781. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  782. snd_dma_pci_data(ice->pci),
  783. 256*1024, 256*1024);
  784. ice->pcm_pro = pcm;
  785. return 0;
  786. }
  787. /*
  788. * SPDIF PCM
  789. */
  790. static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  791. .addr = VT1724_MT_PDMA4_ADDR,
  792. .size = VT1724_MT_PDMA4_SIZE,
  793. .count = VT1724_MT_PDMA4_COUNT,
  794. .start = VT1724_PDMA4_START,
  795. };
  796. static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  797. .addr = VT1724_MT_RDMA1_ADDR,
  798. .size = VT1724_MT_RDMA1_SIZE,
  799. .count = VT1724_MT_RDMA1_COUNT,
  800. .start = VT1724_RDMA1_START,
  801. };
  802. /* update spdif control bits; call with reg_lock */
  803. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  804. {
  805. unsigned char cbit, disabled;
  806. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  807. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  808. if (cbit != disabled)
  809. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  810. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  811. if (cbit != disabled)
  812. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  813. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  814. }
  815. /* update SPDIF control bits according to the given rate */
  816. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  817. {
  818. unsigned int val, nval;
  819. unsigned long flags;
  820. spin_lock_irqsave(&ice->reg_lock, flags);
  821. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  822. nval &= ~(7 << 12);
  823. switch (rate) {
  824. case 44100: break;
  825. case 48000: nval |= 2 << 12; break;
  826. case 32000: nval |= 3 << 12; break;
  827. case 88200: nval |= 4 << 12; break;
  828. case 96000: nval |= 5 << 12; break;
  829. case 192000: nval |= 6 << 12; break;
  830. case 176400: nval |= 7 << 12; break;
  831. }
  832. if (val != nval)
  833. update_spdif_bits(ice, nval);
  834. spin_unlock_irqrestore(&ice->reg_lock, flags);
  835. }
  836. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  837. {
  838. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  839. if (! ice->force_pdma4)
  840. update_spdif_rate(ice, substream->runtime->rate);
  841. return snd_vt1724_pcm_prepare(substream);
  842. }
  843. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  844. {
  845. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  846. struct snd_pcm_runtime *runtime = substream->runtime;
  847. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  848. ice->playback_con_substream = substream;
  849. if (ice->force_pdma4) {
  850. runtime->hw = snd_vt1724_2ch_stereo;
  851. set_rate_constraints(ice, substream);
  852. } else
  853. runtime->hw = snd_vt1724_spdif;
  854. snd_pcm_set_sync(substream);
  855. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  856. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  857. VT1724_BUFFER_ALIGN);
  858. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  859. VT1724_BUFFER_ALIGN);
  860. return 0;
  861. }
  862. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  863. {
  864. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  865. if (PRO_RATE_RESET)
  866. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  867. ice->playback_con_substream = NULL;
  868. return 0;
  869. }
  870. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  871. {
  872. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  873. struct snd_pcm_runtime *runtime = substream->runtime;
  874. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  875. ice->capture_con_substream = substream;
  876. if (ice->force_rdma1) {
  877. runtime->hw = snd_vt1724_2ch_stereo;
  878. set_rate_constraints(ice, substream);
  879. } else
  880. runtime->hw = snd_vt1724_spdif;
  881. snd_pcm_set_sync(substream);
  882. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  883. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  884. VT1724_BUFFER_ALIGN);
  885. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  886. VT1724_BUFFER_ALIGN);
  887. return 0;
  888. }
  889. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  890. {
  891. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  892. if (PRO_RATE_RESET)
  893. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  894. ice->capture_con_substream = NULL;
  895. return 0;
  896. }
  897. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  898. .open = snd_vt1724_playback_spdif_open,
  899. .close = snd_vt1724_playback_spdif_close,
  900. .ioctl = snd_pcm_lib_ioctl,
  901. .hw_params = snd_vt1724_pcm_hw_params,
  902. .hw_free = snd_vt1724_pcm_hw_free,
  903. .prepare = snd_vt1724_playback_spdif_prepare,
  904. .trigger = snd_vt1724_pcm_trigger,
  905. .pointer = snd_vt1724_pcm_pointer,
  906. };
  907. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  908. .open = snd_vt1724_capture_spdif_open,
  909. .close = snd_vt1724_capture_spdif_close,
  910. .ioctl = snd_pcm_lib_ioctl,
  911. .hw_params = snd_vt1724_pcm_hw_params,
  912. .hw_free = snd_vt1724_pcm_hw_free,
  913. .prepare = snd_vt1724_pcm_prepare,
  914. .trigger = snd_vt1724_pcm_trigger,
  915. .pointer = snd_vt1724_pcm_pointer,
  916. };
  917. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device)
  918. {
  919. char *name;
  920. struct snd_pcm *pcm;
  921. int play, capt;
  922. int err;
  923. if (ice->force_pdma4 ||
  924. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  925. play = 1;
  926. ice->has_spdif = 1;
  927. } else
  928. play = 0;
  929. if (ice->force_rdma1 ||
  930. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  931. capt = 1;
  932. ice->has_spdif = 1;
  933. } else
  934. capt = 0;
  935. if (! play && ! capt)
  936. return 0; /* no spdif device */
  937. if (ice->force_pdma4 || ice->force_rdma1)
  938. name = "ICE1724 Secondary";
  939. else
  940. name = "IEC1724 IEC958";
  941. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  942. if (err < 0)
  943. return err;
  944. if (play)
  945. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  946. &snd_vt1724_playback_spdif_ops);
  947. if (capt)
  948. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  949. &snd_vt1724_capture_spdif_ops);
  950. pcm->private_data = ice;
  951. pcm->info_flags = 0;
  952. strcpy(pcm->name, name);
  953. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  954. snd_dma_pci_data(ice->pci),
  955. 64*1024, 64*1024);
  956. ice->pcm = pcm;
  957. return 0;
  958. }
  959. /*
  960. * independent surround PCMs
  961. */
  962. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  963. {
  964. .addr = VT1724_MT_PDMA1_ADDR,
  965. .size = VT1724_MT_PDMA1_SIZE,
  966. .count = VT1724_MT_PDMA1_COUNT,
  967. .start = VT1724_PDMA1_START,
  968. },
  969. {
  970. .addr = VT1724_MT_PDMA2_ADDR,
  971. .size = VT1724_MT_PDMA2_SIZE,
  972. .count = VT1724_MT_PDMA2_COUNT,
  973. .start = VT1724_PDMA2_START,
  974. },
  975. {
  976. .addr = VT1724_MT_PDMA3_ADDR,
  977. .size = VT1724_MT_PDMA3_SIZE,
  978. .count = VT1724_MT_PDMA3_COUNT,
  979. .start = VT1724_PDMA3_START,
  980. },
  981. };
  982. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  983. {
  984. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  985. unsigned char val;
  986. spin_lock_irq(&ice->reg_lock);
  987. val = 3 - substream->number;
  988. if (inb(ICEMT1724(ice, BURST)) < val)
  989. outb(val, ICEMT1724(ice, BURST));
  990. spin_unlock_irq(&ice->reg_lock);
  991. return snd_vt1724_pcm_prepare(substream);
  992. }
  993. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  994. {
  995. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  996. struct snd_pcm_runtime *runtime = substream->runtime;
  997. mutex_lock(&ice->open_mutex);
  998. /* already used by PDMA0? */
  999. if (ice->pcm_reserved[substream->number]) {
  1000. mutex_unlock(&ice->open_mutex);
  1001. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1002. }
  1003. mutex_unlock(&ice->open_mutex);
  1004. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1005. ice->playback_con_substream_ds[substream->number] = substream;
  1006. runtime->hw = snd_vt1724_2ch_stereo;
  1007. snd_pcm_set_sync(substream);
  1008. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1009. set_rate_constraints(ice, substream);
  1010. return 0;
  1011. }
  1012. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1013. {
  1014. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1015. if (PRO_RATE_RESET)
  1016. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1017. ice->playback_con_substream_ds[substream->number] = NULL;
  1018. ice->pcm_reserved[substream->number] = NULL;
  1019. return 0;
  1020. }
  1021. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1022. .open = snd_vt1724_playback_indep_open,
  1023. .close = snd_vt1724_playback_indep_close,
  1024. .ioctl = snd_pcm_lib_ioctl,
  1025. .hw_params = snd_vt1724_pcm_hw_params,
  1026. .hw_free = snd_vt1724_pcm_hw_free,
  1027. .prepare = snd_vt1724_playback_indep_prepare,
  1028. .trigger = snd_vt1724_pcm_trigger,
  1029. .pointer = snd_vt1724_pcm_pointer,
  1030. };
  1031. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device)
  1032. {
  1033. struct snd_pcm *pcm;
  1034. int play;
  1035. int err;
  1036. play = ice->num_total_dacs / 2 - 1;
  1037. if (play <= 0)
  1038. return 0;
  1039. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1040. if (err < 0)
  1041. return err;
  1042. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1043. &snd_vt1724_playback_indep_ops);
  1044. pcm->private_data = ice;
  1045. pcm->info_flags = 0;
  1046. strcpy(pcm->name, "ICE1724 Surround PCM");
  1047. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1048. snd_dma_pci_data(ice->pci),
  1049. 64*1024, 64*1024);
  1050. ice->pcm_ds = pcm;
  1051. return 0;
  1052. }
  1053. /*
  1054. * Mixer section
  1055. */
  1056. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice)
  1057. {
  1058. int err;
  1059. if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1060. struct snd_ac97_bus *pbus;
  1061. struct snd_ac97_template ac97;
  1062. static struct snd_ac97_bus_ops ops = {
  1063. .write = snd_vt1724_ac97_write,
  1064. .read = snd_vt1724_ac97_read,
  1065. };
  1066. /* cold reset */
  1067. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1068. mdelay(5); /* FIXME */
  1069. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1070. if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
  1071. return err;
  1072. memset(&ac97, 0, sizeof(ac97));
  1073. ac97.private_data = ice;
  1074. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1075. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1076. else
  1077. return 0;
  1078. }
  1079. /* I2S mixer only */
  1080. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1081. return 0;
  1082. }
  1083. /*
  1084. *
  1085. */
  1086. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1087. {
  1088. return (unsigned int)ice->eeprom.data[idx] | \
  1089. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1090. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1091. }
  1092. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1093. struct snd_info_buffer *buffer)
  1094. {
  1095. struct snd_ice1712 *ice = entry->private_data;
  1096. unsigned int idx;
  1097. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1098. snd_iprintf(buffer, "EEPROM:\n");
  1099. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1100. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1101. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1102. snd_iprintf(buffer, " System Config : 0x%x\n",
  1103. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1104. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1105. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1106. snd_iprintf(buffer, " I2S : 0x%x\n",
  1107. ice->eeprom.data[ICE_EEP2_I2S]);
  1108. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1109. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1110. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1111. ice->eeprom.gpiodir);
  1112. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1113. ice->eeprom.gpiomask);
  1114. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1115. ice->eeprom.gpiostate);
  1116. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1117. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1118. idx, ice->eeprom.data[idx]);
  1119. snd_iprintf(buffer, "\nRegisters:\n");
  1120. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1121. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1122. for (idx = 0x0; idx < 0x20 ; idx++)
  1123. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1124. idx, inb(ice->port+idx));
  1125. for (idx = 0x0; idx < 0x30 ; idx++)
  1126. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1127. idx, inb(ice->profi_port+idx));
  1128. }
  1129. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice)
  1130. {
  1131. struct snd_info_entry *entry;
  1132. if (! snd_card_proc_new(ice->card, "ice1724", &entry))
  1133. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1134. }
  1135. /*
  1136. *
  1137. */
  1138. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1139. struct snd_ctl_elem_info *uinfo)
  1140. {
  1141. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1142. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1143. return 0;
  1144. }
  1145. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1146. struct snd_ctl_elem_value *ucontrol)
  1147. {
  1148. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1149. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1150. return 0;
  1151. }
  1152. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1153. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1154. .name = "ICE1724 EEPROM",
  1155. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1156. .info = snd_vt1724_eeprom_info,
  1157. .get = snd_vt1724_eeprom_get
  1158. };
  1159. /*
  1160. */
  1161. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1162. struct snd_ctl_elem_info *uinfo)
  1163. {
  1164. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1165. uinfo->count = 1;
  1166. return 0;
  1167. }
  1168. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1169. {
  1170. unsigned int val, rbits;
  1171. val = diga->status[0] & 0x03; /* professional, non-audio */
  1172. if (val & 0x01) {
  1173. /* professional */
  1174. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1175. IEC958_AES0_PRO_EMPHASIS_5015)
  1176. val |= 1U << 3;
  1177. rbits = (diga->status[4] >> 3) & 0x0f;
  1178. if (rbits) {
  1179. switch (rbits) {
  1180. case 2: val |= 5 << 12; break; /* 96k */
  1181. case 3: val |= 6 << 12; break; /* 192k */
  1182. case 10: val |= 4 << 12; break; /* 88.2k */
  1183. case 11: val |= 7 << 12; break; /* 176.4k */
  1184. }
  1185. } else {
  1186. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1187. case IEC958_AES0_PRO_FS_44100:
  1188. break;
  1189. case IEC958_AES0_PRO_FS_32000:
  1190. val |= 3U << 12;
  1191. break;
  1192. default:
  1193. val |= 2U << 12;
  1194. break;
  1195. }
  1196. }
  1197. } else {
  1198. /* consumer */
  1199. val |= diga->status[1] & 0x04; /* copyright */
  1200. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1201. IEC958_AES0_CON_EMPHASIS_5015)
  1202. val |= 1U << 3;
  1203. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1204. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1205. }
  1206. return val;
  1207. }
  1208. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1209. {
  1210. memset(diga->status, 0, sizeof(diga->status));
  1211. diga->status[0] = val & 0x03; /* professional, non-audio */
  1212. if (val & 0x01) {
  1213. /* professional */
  1214. if (val & (1U << 3))
  1215. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1216. switch ((val >> 12) & 0x7) {
  1217. case 0:
  1218. break;
  1219. case 2:
  1220. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1221. break;
  1222. default:
  1223. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1224. break;
  1225. }
  1226. } else {
  1227. /* consumer */
  1228. diga->status[0] |= val & (1U << 2); /* copyright */
  1229. if (val & (1U << 3))
  1230. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1231. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1232. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1233. }
  1234. }
  1235. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1236. struct snd_ctl_elem_value *ucontrol)
  1237. {
  1238. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1239. unsigned int val;
  1240. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1241. decode_spdif_bits(&ucontrol->value.iec958, val);
  1242. return 0;
  1243. }
  1244. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1245. struct snd_ctl_elem_value *ucontrol)
  1246. {
  1247. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1248. unsigned int val, old;
  1249. val = encode_spdif_bits(&ucontrol->value.iec958);
  1250. spin_lock_irq(&ice->reg_lock);
  1251. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1252. if (val != old)
  1253. update_spdif_bits(ice, val);
  1254. spin_unlock_irq(&ice->reg_lock);
  1255. return (val != old);
  1256. }
  1257. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1258. {
  1259. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1260. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1261. .info = snd_vt1724_spdif_info,
  1262. .get = snd_vt1724_spdif_default_get,
  1263. .put = snd_vt1724_spdif_default_put
  1264. };
  1265. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1266. struct snd_ctl_elem_value *ucontrol)
  1267. {
  1268. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1269. IEC958_AES0_PROFESSIONAL |
  1270. IEC958_AES0_CON_NOT_COPYRIGHT |
  1271. IEC958_AES0_CON_EMPHASIS;
  1272. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1273. IEC958_AES1_CON_CATEGORY;
  1274. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1275. return 0;
  1276. }
  1277. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1278. struct snd_ctl_elem_value *ucontrol)
  1279. {
  1280. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1281. IEC958_AES0_PROFESSIONAL |
  1282. IEC958_AES0_PRO_FS |
  1283. IEC958_AES0_PRO_EMPHASIS;
  1284. return 0;
  1285. }
  1286. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1287. {
  1288. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1289. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1290. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1291. .info = snd_vt1724_spdif_info,
  1292. .get = snd_vt1724_spdif_maskc_get,
  1293. };
  1294. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1295. {
  1296. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1297. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1298. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1299. .info = snd_vt1724_spdif_info,
  1300. .get = snd_vt1724_spdif_maskp_get,
  1301. };
  1302. static int snd_vt1724_spdif_sw_info(struct snd_kcontrol *kcontrol,
  1303. struct snd_ctl_elem_info *uinfo)
  1304. {
  1305. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1306. uinfo->count = 1;
  1307. uinfo->value.integer.min = 0;
  1308. uinfo->value.integer.max = 1;
  1309. return 0;
  1310. }
  1311. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1312. struct snd_ctl_elem_value *ucontrol)
  1313. {
  1314. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1315. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1316. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1317. return 0;
  1318. }
  1319. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1320. struct snd_ctl_elem_value *ucontrol)
  1321. {
  1322. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1323. unsigned char old, val;
  1324. spin_lock_irq(&ice->reg_lock);
  1325. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1326. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1327. if (ucontrol->value.integer.value[0])
  1328. val |= VT1724_CFG_SPDIF_OUT_EN;
  1329. if (old != val)
  1330. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1331. spin_unlock_irq(&ice->reg_lock);
  1332. return old != val;
  1333. }
  1334. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1335. {
  1336. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1337. /* FIXME: the following conflict with IEC958 Playback Route */
  1338. // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
  1339. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1340. .info = snd_vt1724_spdif_sw_info,
  1341. .get = snd_vt1724_spdif_sw_get,
  1342. .put = snd_vt1724_spdif_sw_put
  1343. };
  1344. #if 0 /* NOT USED YET */
  1345. /*
  1346. * GPIO access from extern
  1347. */
  1348. int snd_vt1724_gpio_info(struct snd_kcontrol *kcontrol,
  1349. struct snd_ctl_elem_info *uinfo)
  1350. {
  1351. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1352. uinfo->count = 1;
  1353. uinfo->value.integer.min = 0;
  1354. uinfo->value.integer.max = 1;
  1355. return 0;
  1356. }
  1357. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1358. struct snd_ctl_elem_value *ucontrol)
  1359. {
  1360. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1361. int shift = kcontrol->private_value & 0xff;
  1362. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1363. snd_ice1712_save_gpio_status(ice);
  1364. ucontrol->value.integer.value[0] =
  1365. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1366. snd_ice1712_restore_gpio_status(ice);
  1367. return 0;
  1368. }
  1369. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1370. struct snd_ctl_elem_value *ucontrol)
  1371. {
  1372. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1373. int shift = kcontrol->private_value & 0xff;
  1374. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1375. unsigned int val, nval;
  1376. if (kcontrol->private_value & (1 << 31))
  1377. return -EPERM;
  1378. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1379. snd_ice1712_save_gpio_status(ice);
  1380. val = snd_ice1712_gpio_read(ice);
  1381. nval |= val & ~(1 << shift);
  1382. if (val != nval)
  1383. snd_ice1712_gpio_write(ice, nval);
  1384. snd_ice1712_restore_gpio_status(ice);
  1385. return val != nval;
  1386. }
  1387. #endif /* NOT USED YET */
  1388. /*
  1389. * rate
  1390. */
  1391. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1392. struct snd_ctl_elem_info *uinfo)
  1393. {
  1394. static const char * const texts_1724[] = {
  1395. "8000", /* 0: 6 */
  1396. "9600", /* 1: 3 */
  1397. "11025", /* 2: 10 */
  1398. "12000", /* 3: 2 */
  1399. "16000", /* 4: 5 */
  1400. "22050", /* 5: 9 */
  1401. "24000", /* 6: 1 */
  1402. "32000", /* 7: 4 */
  1403. "44100", /* 8: 8 */
  1404. "48000", /* 9: 0 */
  1405. "64000", /* 10: 15 */
  1406. "88200", /* 11: 11 */
  1407. "96000", /* 12: 7 */
  1408. "176400", /* 13: 12 */
  1409. "192000", /* 14: 14 */
  1410. "IEC958 Input", /* 15: -- */
  1411. };
  1412. static const char * const texts_1720[] = {
  1413. "8000", /* 0: 6 */
  1414. "9600", /* 1: 3 */
  1415. "11025", /* 2: 10 */
  1416. "12000", /* 3: 2 */
  1417. "16000", /* 4: 5 */
  1418. "22050", /* 5: 9 */
  1419. "24000", /* 6: 1 */
  1420. "32000", /* 7: 4 */
  1421. "44100", /* 8: 8 */
  1422. "48000", /* 9: 0 */
  1423. "64000", /* 10: 15 */
  1424. "88200", /* 11: 11 */
  1425. "96000", /* 12: 7 */
  1426. "IEC958 Input", /* 13: -- */
  1427. };
  1428. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1429. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1430. uinfo->count = 1;
  1431. uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
  1432. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1433. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1434. strcpy(uinfo->value.enumerated.name,
  1435. ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
  1436. texts_1724[uinfo->value.enumerated.item]);
  1437. return 0;
  1438. }
  1439. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1440. struct snd_ctl_elem_value *ucontrol)
  1441. {
  1442. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1443. static const unsigned char xlate[16] = {
  1444. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
  1445. };
  1446. unsigned char val;
  1447. spin_lock_irq(&ice->reg_lock);
  1448. if (is_spdif_master(ice)) {
  1449. ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
  1450. } else {
  1451. val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
  1452. if (val == 255) {
  1453. snd_BUG();
  1454. val = 0;
  1455. }
  1456. ucontrol->value.enumerated.item[0] = val;
  1457. }
  1458. spin_unlock_irq(&ice->reg_lock);
  1459. return 0;
  1460. }
  1461. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1462. struct snd_ctl_elem_value *ucontrol)
  1463. {
  1464. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1465. unsigned char oval;
  1466. int rate;
  1467. int change = 0;
  1468. int spdif = ice->vt1720 ? 13 : 15;
  1469. spin_lock_irq(&ice->reg_lock);
  1470. oval = inb(ICEMT1724(ice, RATE));
  1471. if (ucontrol->value.enumerated.item[0] == spdif) {
  1472. unsigned char i2s_oval;
  1473. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1474. /* setting 256fs */
  1475. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1476. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X,
  1477. ICEMT1724(ice, I2S_FORMAT));
  1478. } else {
  1479. rate = rates[ucontrol->value.integer.value[0] % 15];
  1480. if (rate <= get_max_rate(ice)) {
  1481. PRO_RATE_DEFAULT = rate;
  1482. spin_unlock_irq(&ice->reg_lock);
  1483. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1484. spin_lock_irq(&ice->reg_lock);
  1485. }
  1486. }
  1487. change = inb(ICEMT1724(ice, RATE)) != oval;
  1488. spin_unlock_irq(&ice->reg_lock);
  1489. if ((oval & VT1724_SPDIF_MASTER) !=
  1490. (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
  1491. /* notify akm chips as well */
  1492. if (is_spdif_master(ice)) {
  1493. unsigned int i;
  1494. for (i = 0; i < ice->akm_codecs; i++) {
  1495. if (ice->akm[i].ops.set_rate_val)
  1496. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1497. }
  1498. }
  1499. }
  1500. return change;
  1501. }
  1502. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1503. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1504. .name = "Multi Track Internal Clock",
  1505. .info = snd_vt1724_pro_internal_clock_info,
  1506. .get = snd_vt1724_pro_internal_clock_get,
  1507. .put = snd_vt1724_pro_internal_clock_put
  1508. };
  1509. static int snd_vt1724_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
  1510. struct snd_ctl_elem_info *uinfo)
  1511. {
  1512. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1513. uinfo->count = 1;
  1514. uinfo->value.integer.min = 0;
  1515. uinfo->value.integer.max = 1;
  1516. return 0;
  1517. }
  1518. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1519. struct snd_ctl_elem_value *ucontrol)
  1520. {
  1521. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1522. return 0;
  1523. }
  1524. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1525. struct snd_ctl_elem_value *ucontrol)
  1526. {
  1527. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1528. int change = 0, nval;
  1529. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1530. spin_lock_irq(&ice->reg_lock);
  1531. change = PRO_RATE_LOCKED != nval;
  1532. PRO_RATE_LOCKED = nval;
  1533. spin_unlock_irq(&ice->reg_lock);
  1534. return change;
  1535. }
  1536. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1537. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1538. .name = "Multi Track Rate Locking",
  1539. .info = snd_vt1724_pro_rate_locking_info,
  1540. .get = snd_vt1724_pro_rate_locking_get,
  1541. .put = snd_vt1724_pro_rate_locking_put
  1542. };
  1543. static int snd_vt1724_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
  1544. struct snd_ctl_elem_info *uinfo)
  1545. {
  1546. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1547. uinfo->count = 1;
  1548. uinfo->value.integer.min = 0;
  1549. uinfo->value.integer.max = 1;
  1550. return 0;
  1551. }
  1552. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1553. struct snd_ctl_elem_value *ucontrol)
  1554. {
  1555. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1556. return 0;
  1557. }
  1558. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1559. struct snd_ctl_elem_value *ucontrol)
  1560. {
  1561. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1562. int change = 0, nval;
  1563. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1564. spin_lock_irq(&ice->reg_lock);
  1565. change = PRO_RATE_RESET != nval;
  1566. PRO_RATE_RESET = nval;
  1567. spin_unlock_irq(&ice->reg_lock);
  1568. return change;
  1569. }
  1570. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1571. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1572. .name = "Multi Track Rate Reset",
  1573. .info = snd_vt1724_pro_rate_reset_info,
  1574. .get = snd_vt1724_pro_rate_reset_get,
  1575. .put = snd_vt1724_pro_rate_reset_put
  1576. };
  1577. /*
  1578. * routing
  1579. */
  1580. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1581. struct snd_ctl_elem_info *uinfo)
  1582. {
  1583. static char *texts[] = {
  1584. "PCM Out", /* 0 */
  1585. "H/W In 0", "H/W In 1", /* 1-2 */
  1586. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1587. };
  1588. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1589. uinfo->count = 1;
  1590. uinfo->value.enumerated.items = 5;
  1591. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1592. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1593. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1594. return 0;
  1595. }
  1596. static inline int analog_route_shift(int idx)
  1597. {
  1598. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1599. }
  1600. static inline int digital_route_shift(int idx)
  1601. {
  1602. return idx * 3;
  1603. }
  1604. static int get_route_val(struct snd_ice1712 *ice, int shift)
  1605. {
  1606. unsigned long val;
  1607. unsigned char eitem;
  1608. static const unsigned char xlate[8] = {
  1609. 0, 255, 1, 2, 255, 255, 3, 4,
  1610. };
  1611. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1612. val >>= shift;
  1613. val &= 7; //we now have 3 bits per output
  1614. eitem = xlate[val];
  1615. if (eitem == 255) {
  1616. snd_BUG();
  1617. return 0;
  1618. }
  1619. return eitem;
  1620. }
  1621. static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
  1622. {
  1623. unsigned int old_val, nval;
  1624. int change;
  1625. static const unsigned char xroute[8] = {
  1626. 0, /* PCM */
  1627. 2, /* PSDIN0 Left */
  1628. 3, /* PSDIN0 Right */
  1629. 6, /* SPDIN Left */
  1630. 7, /* SPDIN Right */
  1631. };
  1632. nval = xroute[val % 5];
  1633. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1634. val &= ~(0x07 << shift);
  1635. val |= nval << shift;
  1636. change = val != old_val;
  1637. if (change)
  1638. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1639. return change;
  1640. }
  1641. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1642. struct snd_ctl_elem_value *ucontrol)
  1643. {
  1644. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1645. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1646. ucontrol->value.enumerated.item[0] =
  1647. get_route_val(ice, analog_route_shift(idx));
  1648. return 0;
  1649. }
  1650. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1651. struct snd_ctl_elem_value *ucontrol)
  1652. {
  1653. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1654. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1655. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1656. analog_route_shift(idx));
  1657. }
  1658. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1659. struct snd_ctl_elem_value *ucontrol)
  1660. {
  1661. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1662. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1663. ucontrol->value.enumerated.item[0] =
  1664. get_route_val(ice, digital_route_shift(idx));
  1665. return 0;
  1666. }
  1667. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1668. struct snd_ctl_elem_value *ucontrol)
  1669. {
  1670. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1671. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1672. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1673. digital_route_shift(idx));
  1674. }
  1675. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1676. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1677. .name = "H/W Playback Route",
  1678. .info = snd_vt1724_pro_route_info,
  1679. .get = snd_vt1724_pro_route_analog_get,
  1680. .put = snd_vt1724_pro_route_analog_put,
  1681. };
  1682. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1683. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1684. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1685. .info = snd_vt1724_pro_route_info,
  1686. .get = snd_vt1724_pro_route_spdif_get,
  1687. .put = snd_vt1724_pro_route_spdif_put,
  1688. .count = 2,
  1689. };
  1690. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1691. struct snd_ctl_elem_info *uinfo)
  1692. {
  1693. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1694. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1695. uinfo->value.integer.min = 0;
  1696. uinfo->value.integer.max = 255;
  1697. return 0;
  1698. }
  1699. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1700. struct snd_ctl_elem_value *ucontrol)
  1701. {
  1702. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1703. int idx;
  1704. spin_lock_irq(&ice->reg_lock);
  1705. for (idx = 0; idx < 22; idx++) {
  1706. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1707. ucontrol->value.integer.value[idx] =
  1708. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1709. }
  1710. spin_unlock_irq(&ice->reg_lock);
  1711. return 0;
  1712. }
  1713. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1714. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1715. .name = "Multi Track Peak",
  1716. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1717. .info = snd_vt1724_pro_peak_info,
  1718. .get = snd_vt1724_pro_peak_get
  1719. };
  1720. /*
  1721. *
  1722. */
  1723. static struct snd_ice1712_card_info no_matched __devinitdata;
  1724. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1725. snd_vt1724_revo_cards,
  1726. snd_vt1724_amp_cards,
  1727. snd_vt1724_aureon_cards,
  1728. snd_vt1720_mobo_cards,
  1729. snd_vt1720_pontis_cards,
  1730. snd_vt1724_prodigy192_cards,
  1731. snd_vt1724_juli_cards,
  1732. snd_vt1724_phase_cards,
  1733. snd_vt1724_wtm_cards,
  1734. NULL,
  1735. };
  1736. /*
  1737. */
  1738. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1739. {
  1740. int t = 0x10000;
  1741. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1742. ;
  1743. if (t == -1)
  1744. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1745. }
  1746. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1747. unsigned char dev, unsigned char addr)
  1748. {
  1749. unsigned char val;
  1750. mutex_lock(&ice->i2c_mutex);
  1751. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1752. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1753. wait_i2c_busy(ice);
  1754. val = inb(ICEREG1724(ice, I2C_DATA));
  1755. mutex_unlock(&ice->i2c_mutex);
  1756. //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1757. return val;
  1758. }
  1759. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1760. unsigned char dev, unsigned char addr, unsigned char data)
  1761. {
  1762. mutex_lock(&ice->i2c_mutex);
  1763. wait_i2c_busy(ice);
  1764. //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1765. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1766. outb(data, ICEREG1724(ice, I2C_DATA));
  1767. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1768. wait_i2c_busy(ice);
  1769. mutex_unlock(&ice->i2c_mutex);
  1770. }
  1771. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1772. const char *modelname)
  1773. {
  1774. const int dev = 0xa0; /* EEPROM device address */
  1775. unsigned int i, size;
  1776. struct snd_ice1712_card_info * const *tbl, *c;
  1777. if (! modelname || ! *modelname) {
  1778. ice->eeprom.subvendor = 0;
  1779. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1780. ice->eeprom.subvendor =
  1781. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1782. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1783. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1784. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1785. if (ice->eeprom.subvendor == 0 ||
  1786. ice->eeprom.subvendor == (unsigned int)-1) {
  1787. /* invalid subvendor from EEPROM, try the PCI
  1788. * subststem ID instead
  1789. */
  1790. u16 vendor, device;
  1791. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1792. &vendor);
  1793. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1794. ice->eeprom.subvendor =
  1795. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1796. if (ice->eeprom.subvendor == 0 ||
  1797. ice->eeprom.subvendor == (unsigned int)-1) {
  1798. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1799. return -ENXIO;
  1800. }
  1801. }
  1802. }
  1803. for (tbl = card_tables; *tbl; tbl++) {
  1804. for (c = *tbl; c->subvendor; c++) {
  1805. if (modelname && c->model &&
  1806. ! strcmp(modelname, c->model)) {
  1807. printk(KERN_INFO "ice1724: Using board model %s\n",
  1808. c->name);
  1809. ice->eeprom.subvendor = c->subvendor;
  1810. } else if (c->subvendor != ice->eeprom.subvendor)
  1811. continue;
  1812. if (! c->eeprom_size || ! c->eeprom_data)
  1813. goto found;
  1814. /* if the EEPROM is given by the driver, use it */
  1815. snd_printdd("using the defined eeprom..\n");
  1816. ice->eeprom.version = 2;
  1817. ice->eeprom.size = c->eeprom_size + 6;
  1818. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1819. goto read_skipped;
  1820. }
  1821. }
  1822. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1823. ice->eeprom.subvendor);
  1824. found:
  1825. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1826. if (ice->eeprom.size < 6)
  1827. ice->eeprom.size = 32;
  1828. else if (ice->eeprom.size > 32) {
  1829. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1830. ice->eeprom.size);
  1831. return -EIO;
  1832. }
  1833. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1834. if (ice->eeprom.version != 2)
  1835. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1836. ice->eeprom.version);
  1837. size = ice->eeprom.size - 6;
  1838. for (i = 0; i < size; i++)
  1839. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1840. read_skipped:
  1841. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1842. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1843. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1844. return 0;
  1845. }
  1846. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1847. {
  1848. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1849. udelay(200);
  1850. outb(0, ICEREG1724(ice, CONTROL));
  1851. udelay(200);
  1852. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1853. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1854. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1855. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1856. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1857. ice->gpio.direction = ice->eeprom.gpiodir;
  1858. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1859. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1860. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1861. outb(0, ICEREG1724(ice, POWERDOWN));
  1862. return 0;
  1863. }
  1864. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  1865. {
  1866. int err;
  1867. struct snd_kcontrol *kctl;
  1868. snd_assert(ice->pcm != NULL, return -EIO);
  1869. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1870. if (err < 0)
  1871. return err;
  1872. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1873. if (err < 0)
  1874. return err;
  1875. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1876. if (err < 0)
  1877. return err;
  1878. kctl->id.device = ice->pcm->device;
  1879. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1880. if (err < 0)
  1881. return err;
  1882. kctl->id.device = ice->pcm->device;
  1883. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1884. if (err < 0)
  1885. return err;
  1886. kctl->id.device = ice->pcm->device;
  1887. #if 0 /* use default only */
  1888. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1889. if (err < 0)
  1890. return err;
  1891. kctl->id.device = ice->pcm->device;
  1892. ice->spdif.stream_ctl = kctl;
  1893. #endif
  1894. return 0;
  1895. }
  1896. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  1897. {
  1898. int err;
  1899. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  1900. if (err < 0)
  1901. return err;
  1902. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  1903. if (err < 0)
  1904. return err;
  1905. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  1906. if (err < 0)
  1907. return err;
  1908. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  1909. if (err < 0)
  1910. return err;
  1911. if (ice->num_total_dacs > 0) {
  1912. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  1913. tmp.count = ice->num_total_dacs;
  1914. if (ice->vt1720 && tmp.count > 2)
  1915. tmp.count = 2;
  1916. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  1917. if (err < 0)
  1918. return err;
  1919. }
  1920. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  1921. if (err < 0)
  1922. return err;
  1923. return 0;
  1924. }
  1925. static int snd_vt1724_free(struct snd_ice1712 *ice)
  1926. {
  1927. if (! ice->port)
  1928. goto __hw_end;
  1929. /* mask all interrupts */
  1930. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  1931. outb(0xff, ICEREG1724(ice, IRQMASK));
  1932. /* --- */
  1933. __hw_end:
  1934. if (ice->irq >= 0) {
  1935. synchronize_irq(ice->irq);
  1936. free_irq(ice->irq, ice);
  1937. }
  1938. pci_release_regions(ice->pci);
  1939. snd_ice1712_akm4xxx_free(ice);
  1940. pci_disable_device(ice->pci);
  1941. kfree(ice);
  1942. return 0;
  1943. }
  1944. static int snd_vt1724_dev_free(struct snd_device *device)
  1945. {
  1946. struct snd_ice1712 *ice = device->device_data;
  1947. return snd_vt1724_free(ice);
  1948. }
  1949. static int __devinit snd_vt1724_create(struct snd_card *card,
  1950. struct pci_dev *pci,
  1951. const char *modelname,
  1952. struct snd_ice1712 ** r_ice1712)
  1953. {
  1954. struct snd_ice1712 *ice;
  1955. int err;
  1956. unsigned char mask;
  1957. static struct snd_device_ops ops = {
  1958. .dev_free = snd_vt1724_dev_free,
  1959. };
  1960. *r_ice1712 = NULL;
  1961. /* enable PCI device */
  1962. if ((err = pci_enable_device(pci)) < 0)
  1963. return err;
  1964. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  1965. if (ice == NULL) {
  1966. pci_disable_device(pci);
  1967. return -ENOMEM;
  1968. }
  1969. ice->vt1724 = 1;
  1970. spin_lock_init(&ice->reg_lock);
  1971. mutex_init(&ice->gpio_mutex);
  1972. mutex_init(&ice->open_mutex);
  1973. mutex_init(&ice->i2c_mutex);
  1974. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  1975. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  1976. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  1977. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  1978. ice->card = card;
  1979. ice->pci = pci;
  1980. ice->irq = -1;
  1981. pci_set_master(pci);
  1982. snd_vt1724_proc_init(ice);
  1983. synchronize_irq(pci->irq);
  1984. if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
  1985. kfree(ice);
  1986. pci_disable_device(pci);
  1987. return err;
  1988. }
  1989. ice->port = pci_resource_start(pci, 0);
  1990. ice->profi_port = pci_resource_start(pci, 1);
  1991. if (request_irq(pci->irq, snd_vt1724_interrupt,
  1992. IRQF_SHARED, "ICE1724", ice)) {
  1993. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1994. snd_vt1724_free(ice);
  1995. return -EIO;
  1996. }
  1997. ice->irq = pci->irq;
  1998. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  1999. snd_vt1724_free(ice);
  2000. return -EIO;
  2001. }
  2002. if (snd_vt1724_chip_init(ice) < 0) {
  2003. snd_vt1724_free(ice);
  2004. return -EIO;
  2005. }
  2006. /* unmask used interrupts */
  2007. if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
  2008. mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
  2009. else
  2010. mask = 0;
  2011. outb(mask, ICEREG1724(ice, IRQMASK));
  2012. /* don't handle FIFO overrun/underruns (just yet),
  2013. * since they cause machine lockups
  2014. */
  2015. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2016. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  2017. snd_vt1724_free(ice);
  2018. return err;
  2019. }
  2020. snd_card_set_dev(card, &pci->dev);
  2021. *r_ice1712 = ice;
  2022. return 0;
  2023. }
  2024. /*
  2025. *
  2026. * Registration
  2027. *
  2028. */
  2029. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2030. const struct pci_device_id *pci_id)
  2031. {
  2032. static int dev;
  2033. struct snd_card *card;
  2034. struct snd_ice1712 *ice;
  2035. int pcm_dev = 0, err;
  2036. struct snd_ice1712_card_info * const *tbl, *c;
  2037. if (dev >= SNDRV_CARDS)
  2038. return -ENODEV;
  2039. if (!enable[dev]) {
  2040. dev++;
  2041. return -ENOENT;
  2042. }
  2043. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2044. if (card == NULL)
  2045. return -ENOMEM;
  2046. strcpy(card->driver, "ICE1724");
  2047. strcpy(card->shortname, "ICEnsemble ICE1724");
  2048. if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
  2049. snd_card_free(card);
  2050. return err;
  2051. }
  2052. for (tbl = card_tables; *tbl; tbl++) {
  2053. for (c = *tbl; c->subvendor; c++) {
  2054. if (c->subvendor == ice->eeprom.subvendor) {
  2055. strcpy(card->shortname, c->name);
  2056. if (c->driver) /* specific driver? */
  2057. strcpy(card->driver, c->driver);
  2058. if (c->chip_init) {
  2059. if ((err = c->chip_init(ice)) < 0) {
  2060. snd_card_free(card);
  2061. return err;
  2062. }
  2063. }
  2064. goto __found;
  2065. }
  2066. }
  2067. }
  2068. c = &no_matched;
  2069. __found:
  2070. /*
  2071. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2072. * ICE1712 has only one for both (mixed up).
  2073. *
  2074. * Confusingly the analog PCM is named "professional" here because it
  2075. * was called so in ice1712 driver, and vt1724 driver is derived from
  2076. * ice1712 driver.
  2077. */
  2078. if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
  2079. snd_card_free(card);
  2080. return err;
  2081. }
  2082. if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
  2083. snd_card_free(card);
  2084. return err;
  2085. }
  2086. if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
  2087. snd_card_free(card);
  2088. return err;
  2089. }
  2090. if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
  2091. snd_card_free(card);
  2092. return err;
  2093. }
  2094. if ((err = snd_vt1724_build_controls(ice)) < 0) {
  2095. snd_card_free(card);
  2096. return err;
  2097. }
  2098. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2099. if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
  2100. snd_card_free(card);
  2101. return err;
  2102. }
  2103. }
  2104. if (c->build_controls) {
  2105. if ((err = c->build_controls(ice)) < 0) {
  2106. snd_card_free(card);
  2107. return err;
  2108. }
  2109. }
  2110. if (! c->no_mpu401) {
  2111. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2112. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2113. ICEREG1724(ice, MPU_CTRL),
  2114. MPU401_INFO_INTEGRATED,
  2115. ice->irq, 0,
  2116. &ice->rmidi[0])) < 0) {
  2117. snd_card_free(card);
  2118. return err;
  2119. }
  2120. }
  2121. }
  2122. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2123. card->shortname, ice->port, ice->irq);
  2124. if ((err = snd_card_register(card)) < 0) {
  2125. snd_card_free(card);
  2126. return err;
  2127. }
  2128. pci_set_drvdata(pci, card);
  2129. dev++;
  2130. return 0;
  2131. }
  2132. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2133. {
  2134. snd_card_free(pci_get_drvdata(pci));
  2135. pci_set_drvdata(pci, NULL);
  2136. }
  2137. static struct pci_driver driver = {
  2138. .name = "ICE1724",
  2139. .id_table = snd_vt1724_ids,
  2140. .probe = snd_vt1724_probe,
  2141. .remove = __devexit_p(snd_vt1724_remove),
  2142. };
  2143. static int __init alsa_card_ice1724_init(void)
  2144. {
  2145. return pci_register_driver(&driver);
  2146. }
  2147. static void __exit alsa_card_ice1724_exit(void)
  2148. {
  2149. pci_unregister_driver(&driver);
  2150. }
  2151. module_init(alsa_card_ice1724_init)
  2152. module_exit(alsa_card_ice1724_exit)