sync_bitops.h 4.3 KB

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  1. #ifndef _I386_SYNC_BITOPS_H
  2. #define _I386_SYNC_BITOPS_H
  3. /*
  4. * Copyright 1992, Linus Torvalds.
  5. */
  6. /*
  7. * These have to be done with inline assembly: that way the bit-setting
  8. * is guaranteed to be atomic. All bit operations return 0 if the bit
  9. * was cleared before the operation and != 0 if it was not.
  10. *
  11. * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
  12. */
  13. #define ADDR (*(volatile long *) addr)
  14. /**
  15. * sync_set_bit - Atomically set a bit in memory
  16. * @nr: the bit to set
  17. * @addr: the address to start counting from
  18. *
  19. * This function is atomic and may not be reordered. See __set_bit()
  20. * if you do not require the atomic guarantees.
  21. *
  22. * Note: there are no guarantees that this function will not be reordered
  23. * on non-x86 architectures, so if you are writing portable code,
  24. * make sure not to rely on its reordering guarantees.
  25. *
  26. * Note that @nr may be almost arbitrarily large; this function is not
  27. * restricted to acting on a single-word quantity.
  28. */
  29. static inline void sync_set_bit(int nr, volatile unsigned long * addr)
  30. {
  31. __asm__ __volatile__("lock; btsl %1,%0"
  32. :"+m" (ADDR)
  33. :"Ir" (nr)
  34. : "memory");
  35. }
  36. /**
  37. * sync_clear_bit - Clears a bit in memory
  38. * @nr: Bit to clear
  39. * @addr: Address to start counting from
  40. *
  41. * sync_clear_bit() is atomic and may not be reordered. However, it does
  42. * not contain a memory barrier, so if it is used for locking purposes,
  43. * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
  44. * in order to ensure changes are visible on other processors.
  45. */
  46. static inline void sync_clear_bit(int nr, volatile unsigned long * addr)
  47. {
  48. __asm__ __volatile__("lock; btrl %1,%0"
  49. :"+m" (ADDR)
  50. :"Ir" (nr)
  51. : "memory");
  52. }
  53. /**
  54. * sync_change_bit - Toggle a bit in memory
  55. * @nr: Bit to change
  56. * @addr: Address to start counting from
  57. *
  58. * change_bit() is atomic and may not be reordered. It may be
  59. * reordered on other architectures than x86.
  60. * Note that @nr may be almost arbitrarily large; this function is not
  61. * restricted to acting on a single-word quantity.
  62. */
  63. static inline void sync_change_bit(int nr, volatile unsigned long * addr)
  64. {
  65. __asm__ __volatile__("lock; btcl %1,%0"
  66. :"+m" (ADDR)
  67. :"Ir" (nr)
  68. : "memory");
  69. }
  70. /**
  71. * sync_test_and_set_bit - Set a bit and return its old value
  72. * @nr: Bit to set
  73. * @addr: Address to count from
  74. *
  75. * This operation is atomic and cannot be reordered.
  76. * It may be reordered on other architectures than x86.
  77. * It also implies a memory barrier.
  78. */
  79. static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr)
  80. {
  81. int oldbit;
  82. __asm__ __volatile__("lock; btsl %2,%1\n\tsbbl %0,%0"
  83. :"=r" (oldbit),"+m" (ADDR)
  84. :"Ir" (nr) : "memory");
  85. return oldbit;
  86. }
  87. /**
  88. * sync_test_and_clear_bit - Clear a bit and return its old value
  89. * @nr: Bit to clear
  90. * @addr: Address to count from
  91. *
  92. * This operation is atomic and cannot be reordered.
  93. * It can be reorderdered on other architectures other than x86.
  94. * It also implies a memory barrier.
  95. */
  96. static inline int sync_test_and_clear_bit(int nr, volatile unsigned long * addr)
  97. {
  98. int oldbit;
  99. __asm__ __volatile__("lock; btrl %2,%1\n\tsbbl %0,%0"
  100. :"=r" (oldbit),"+m" (ADDR)
  101. :"Ir" (nr) : "memory");
  102. return oldbit;
  103. }
  104. /**
  105. * sync_test_and_change_bit - Change a bit and return its old value
  106. * @nr: Bit to change
  107. * @addr: Address to count from
  108. *
  109. * This operation is atomic and cannot be reordered.
  110. * It also implies a memory barrier.
  111. */
  112. static inline int sync_test_and_change_bit(int nr, volatile unsigned long* addr)
  113. {
  114. int oldbit;
  115. __asm__ __volatile__("lock; btcl %2,%1\n\tsbbl %0,%0"
  116. :"=r" (oldbit),"+m" (ADDR)
  117. :"Ir" (nr) : "memory");
  118. return oldbit;
  119. }
  120. static __always_inline int sync_constant_test_bit(int nr, const volatile unsigned long *addr)
  121. {
  122. return ((1UL << (nr & 31)) &
  123. (((const volatile unsigned int *)addr)[nr >> 5])) != 0;
  124. }
  125. static inline int sync_var_test_bit(int nr, const volatile unsigned long * addr)
  126. {
  127. int oldbit;
  128. __asm__ __volatile__("btl %2,%1\n\tsbbl %0,%0"
  129. :"=r" (oldbit)
  130. :"m" (ADDR),"Ir" (nr));
  131. return oldbit;
  132. }
  133. #define sync_test_bit(nr,addr) \
  134. (__builtin_constant_p(nr) ? \
  135. sync_constant_test_bit((nr),(addr)) : \
  136. sync_var_test_bit((nr),(addr)))
  137. #undef ADDR
  138. #endif /* _I386_SYNC_BITOPS_H */