smp_64.h 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117
  1. #ifndef __ASM_SMP_H
  2. #define __ASM_SMP_H
  3. /*
  4. * We need the APIC definitions automatically as part of 'smp.h'
  5. */
  6. #include <linux/threads.h>
  7. #include <linux/cpumask.h>
  8. #include <linux/bitops.h>
  9. #include <linux/init.h>
  10. extern int disable_apic;
  11. #include <asm/mpspec.h>
  12. #include <asm/apic.h>
  13. #include <asm/io_apic.h>
  14. #include <asm/thread_info.h>
  15. #ifdef CONFIG_SMP
  16. #include <asm/pda.h>
  17. struct pt_regs;
  18. extern cpumask_t cpu_present_mask;
  19. extern cpumask_t cpu_possible_map;
  20. extern cpumask_t cpu_online_map;
  21. extern cpumask_t cpu_callout_map;
  22. extern cpumask_t cpu_initialized;
  23. /*
  24. * Private routines/data
  25. */
  26. extern void smp_alloc_memory(void);
  27. extern volatile unsigned long smp_invalidate_needed;
  28. extern void lock_ipi_call_lock(void);
  29. extern void unlock_ipi_call_lock(void);
  30. extern int smp_num_siblings;
  31. extern void smp_send_reschedule(int cpu);
  32. extern cpumask_t cpu_sibling_map[NR_CPUS];
  33. extern cpumask_t cpu_core_map[NR_CPUS];
  34. extern u8 cpu_llc_id[NR_CPUS];
  35. #define SMP_TRAMPOLINE_BASE 0x6000
  36. /*
  37. * On x86 all CPUs are mapped 1:1 to the APIC space.
  38. * This simplifies scheduling and IPI sending and
  39. * compresses data structures.
  40. */
  41. static inline int num_booting_cpus(void)
  42. {
  43. return cpus_weight(cpu_callout_map);
  44. }
  45. #define raw_smp_processor_id() read_pda(cpunumber)
  46. extern int __cpu_disable(void);
  47. extern void __cpu_die(unsigned int cpu);
  48. extern void prefill_possible_map(void);
  49. extern unsigned num_processors;
  50. extern unsigned __cpuinitdata disabled_cpus;
  51. #define NO_PROC_ID 0xFF /* No processor magic marker */
  52. #endif /* CONFIG_SMP */
  53. static inline int hard_smp_processor_id(void)
  54. {
  55. /* we don't want to mark this access volatile - bad code generation */
  56. return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
  57. }
  58. /*
  59. * Some lowlevel functions might want to know about
  60. * the real APIC ID <-> CPU # mapping.
  61. */
  62. extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
  63. extern u8 x86_cpu_to_log_apicid[NR_CPUS];
  64. extern u8 bios_cpu_apicid[];
  65. static inline int cpu_present_to_apicid(int mps_cpu)
  66. {
  67. if (mps_cpu < NR_CPUS)
  68. return (int)bios_cpu_apicid[mps_cpu];
  69. else
  70. return BAD_APICID;
  71. }
  72. #ifndef CONFIG_SMP
  73. #define stack_smp_processor_id() 0
  74. #define cpu_logical_map(x) (x)
  75. #else
  76. #include <asm/thread_info.h>
  77. #define stack_smp_processor_id() \
  78. ({ \
  79. struct thread_info *ti; \
  80. __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
  81. ti->cpu; \
  82. })
  83. #endif
  84. static __inline int logical_smp_processor_id(void)
  85. {
  86. /* we don't want to mark this access volatile - bad code generation */
  87. return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
  88. }
  89. #ifdef CONFIG_SMP
  90. #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
  91. #else
  92. #define cpu_physical_id(cpu) boot_cpu_id
  93. #endif /* !CONFIG_SMP */
  94. #endif