mpspec_32.h 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081
  1. #ifndef __ASM_MPSPEC_H
  2. #define __ASM_MPSPEC_H
  3. #include <linux/cpumask.h>
  4. #include <asm/mpspec_def.h>
  5. #include <mach_mpspec.h>
  6. extern int mp_bus_id_to_type [MAX_MP_BUSSES];
  7. extern int mp_bus_id_to_node [MAX_MP_BUSSES];
  8. extern int mp_bus_id_to_local [MAX_MP_BUSSES];
  9. extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
  10. extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
  11. extern unsigned int def_to_bigsmp;
  12. extern unsigned int boot_cpu_physical_apicid;
  13. extern int smp_found_config;
  14. extern void find_smp_config (void);
  15. extern void get_smp_config (void);
  16. extern int nr_ioapics;
  17. extern int apic_version [MAX_APICS];
  18. extern int mp_irq_entries;
  19. extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES];
  20. extern int mpc_default_type;
  21. extern unsigned long mp_lapic_addr;
  22. extern int pic_mode;
  23. #ifdef CONFIG_ACPI
  24. extern void mp_register_lapic (u8 id, u8 enabled);
  25. extern void mp_register_lapic_address (u64 address);
  26. extern void mp_register_ioapic (u8 id, u32 address, u32 gsi_base);
  27. extern void mp_override_legacy_irq (u8 bus_irq, u8 polarity, u8 trigger, u32 gsi);
  28. extern void mp_config_acpi_legacy_irqs (void);
  29. extern int mp_register_gsi (u32 gsi, int edge_level, int active_high_low);
  30. #endif /* CONFIG_ACPI */
  31. #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
  32. struct physid_mask
  33. {
  34. unsigned long mask[PHYSID_ARRAY_SIZE];
  35. };
  36. typedef struct physid_mask physid_mask_t;
  37. #define physid_set(physid, map) set_bit(physid, (map).mask)
  38. #define physid_clear(physid, map) clear_bit(physid, (map).mask)
  39. #define physid_isset(physid, map) test_bit(physid, (map).mask)
  40. #define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask)
  41. #define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
  42. #define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
  43. #define physids_clear(map) bitmap_zero((map).mask, MAX_APICS)
  44. #define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS)
  45. #define physids_empty(map) bitmap_empty((map).mask, MAX_APICS)
  46. #define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
  47. #define physids_weight(map) bitmap_weight((map).mask, MAX_APICS)
  48. #define physids_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
  49. #define physids_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
  50. #define physids_coerce(map) ((map).mask[0])
  51. #define physids_promote(physids) \
  52. ({ \
  53. physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
  54. __physid_mask.mask[0] = physids; \
  55. __physid_mask; \
  56. })
  57. #define physid_mask_of_physid(physid) \
  58. ({ \
  59. physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
  60. physid_set(physid, __physid_mask); \
  61. __physid_mask; \
  62. })
  63. #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
  64. #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
  65. extern physid_mask_t phys_cpu_present_map;
  66. #endif