mbus.h 3.1 KB

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  1. /* $Id: mbus.h,v 1.9 1997/06/24 15:48:12 jj Exp $
  2. * mbus.h: Various defines for MBUS modules.
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. */
  6. #ifndef _SPARC_MBUS_H
  7. #define _SPARC_MBUS_H
  8. #include <asm/ross.h> /* HyperSparc stuff */
  9. #include <asm/cypress.h> /* Cypress Chips */
  10. #include <asm/viking.h> /* Ugh, bug city... */
  11. enum mbus_module {
  12. HyperSparc = 0,
  13. Cypress = 1,
  14. Cypress_vE = 2,
  15. Cypress_vD = 3,
  16. Swift_ok = 4,
  17. Swift_bad_c = 5,
  18. Swift_lots_o_bugs = 6,
  19. Tsunami = 7,
  20. Viking_12 = 8,
  21. Viking_2x = 9,
  22. Viking_30 = 10,
  23. Viking_35 = 11,
  24. Viking_new = 12,
  25. TurboSparc = 13,
  26. SRMMU_INVAL_MOD = 14,
  27. };
  28. extern enum mbus_module srmmu_modtype;
  29. extern unsigned int viking_rev, swift_rev, cypress_rev;
  30. /* HW Mbus module bugs we have to deal with */
  31. #define HWBUG_COPYBACK_BROKEN 0x00000001
  32. #define HWBUG_ASIFLUSH_BROKEN 0x00000002
  33. #define HWBUG_VACFLUSH_BITROT 0x00000004
  34. #define HWBUG_KERN_ACCBROKEN 0x00000008
  35. #define HWBUG_KERN_CBITBROKEN 0x00000010
  36. #define HWBUG_MODIFIED_BITROT 0x00000020
  37. #define HWBUG_PC_BADFAULT_ADDR 0x00000040
  38. #define HWBUG_SUPERSCALAR_BAD 0x00000080
  39. #define HWBUG_PACINIT_BITROT 0x00000100
  40. extern unsigned int hwbug_bitmask;
  41. /* First the module type values. To find out which you have, just load
  42. * the mmu control register from ASI_M_MMUREG alternate address space and
  43. * shift the value right 28 bits.
  44. */
  45. /* IMPL field means the company which produced the chip. */
  46. #define MBUS_VIKING 0x4 /* bleech, Texas Instruments Module */
  47. #define MBUS_LSI 0x3 /* LSI Logics */
  48. #define MBUS_ROSS 0x1 /* Ross is nice */
  49. #define MBUS_FMI 0x0 /* Fujitsu Microelectronics/Swift */
  50. /* Ross Module versions */
  51. #define ROSS_604_REV_CDE 0x0 /* revisions c, d, and e */
  52. #define ROSS_604_REV_F 0x1 /* revision f */
  53. #define ROSS_605 0xf /* revision a, a.1, and a.2 */
  54. #define ROSS_605_REV_B 0xe /* revision b */
  55. /* TI Viking Module versions */
  56. #define VIKING_REV_12 0x1 /* Version 1.2 or SPARCclassic's CPU */
  57. #define VIKING_REV_2 0x2 /* Version 2.1, 2.2, 2.3, and 2.4 */
  58. #define VIKING_REV_30 0x3 /* Version 3.0 */
  59. #define VIKING_REV_35 0x4 /* Version 3.5 */
  60. /* LSI Logics. */
  61. #define LSI_L64815 0x0
  62. /* Fujitsu */
  63. #define FMI_AURORA 0x4 /* MB8690x, a Swift module... */
  64. #define FMI_TURBO 0x5 /* MB86907, a TurboSparc module... */
  65. /* For multiprocessor support we need to be able to obtain the CPU id and
  66. * the MBUS Module id.
  67. */
  68. /* The CPU ID is encoded in the trap base register, 20 bits to the left of
  69. * bit zero, with 2 bits being significant.
  70. */
  71. #define TBR_ID_SHIFT 20
  72. static inline int get_cpuid(void)
  73. {
  74. register int retval;
  75. __asm__ __volatile__("rd %%tbr, %0\n\t"
  76. "srl %0, %1, %0\n\t" :
  77. "=r" (retval) :
  78. "i" (TBR_ID_SHIFT));
  79. return (retval & 3);
  80. }
  81. static inline int get_modid(void)
  82. {
  83. return (get_cpuid() | 0x8);
  84. }
  85. #endif /* !(_SPARC_MBUS_H) */