cache.h 1020 B

123456789101112131415161718192021222324252627282930313233343536373839
  1. /*
  2. * include/asm-sh/cpu-sh2a/cache.h
  3. *
  4. * Copyright (C) 2004 Paul Mundt
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #ifndef __ASM_CPU_SH2A_CACHE_H
  11. #define __ASM_CPU_SH2A_CACHE_H
  12. #define L1_CACHE_SHIFT 4
  13. #define CCR1 0xfffc1000
  14. #define CCR2 0xfffc1004
  15. /* CCR1 behaves more like the traditional CCR */
  16. #define CCR CCR1
  17. /*
  18. * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not
  19. * listed here are reserved.
  20. */
  21. #define CCR_CACHE_CB 0x0000 /* Hack */
  22. #define CCR_CACHE_OCE 0x0001
  23. #define CCR_CACHE_WT 0x0002
  24. #define CCR_CACHE_OCI 0x0008 /* OCF */
  25. #define CCR_CACHE_ICE 0x0100
  26. #define CCR_CACHE_ICI 0x0800 /* ICF */
  27. #define CACHE_IC_ADDRESS_ARRAY 0xf0000000
  28. #define CACHE_OC_ADDRESS_ARRAY 0xf0800000
  29. #define CCR_CACHE_ENABLE (CCR_CACHE_OCE | CCR_CACHE_ICE)
  30. #define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI)
  31. #endif /* __ASM_CPU_SH2A_CACHE_H */