mmu_context.h 7.8 KB

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  1. #ifndef __ASM_POWERPC_MMU_CONTEXT_H
  2. #define __ASM_POWERPC_MMU_CONTEXT_H
  3. #ifdef __KERNEL__
  4. #include <asm/mmu.h>
  5. #include <asm/cputable.h>
  6. #include <asm-generic/mm_hooks.h>
  7. #ifndef CONFIG_PPC64
  8. #include <asm/atomic.h>
  9. #include <asm/bitops.h>
  10. /*
  11. * On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs
  12. * (virtual segment identifiers) for each context. Although the
  13. * hardware supports 24-bit VSIDs, and thus >1 million contexts,
  14. * we only use 32,768 of them. That is ample, since there can be
  15. * at most around 30,000 tasks in the system anyway, and it means
  16. * that we can use a bitmap to indicate which contexts are in use.
  17. * Using a bitmap means that we entirely avoid all of the problems
  18. * that we used to have when the context number overflowed,
  19. * particularly on SMP systems.
  20. * -- paulus.
  21. */
  22. /*
  23. * This function defines the mapping from contexts to VSIDs (virtual
  24. * segment IDs). We use a skew on both the context and the high 4 bits
  25. * of the 32-bit virtual address (the "effective segment ID") in order
  26. * to spread out the entries in the MMU hash table. Note, if this
  27. * function is changed then arch/ppc/mm/hashtable.S will have to be
  28. * changed to correspond.
  29. */
  30. #define CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \
  31. & 0xffffff)
  32. /*
  33. The MPC8xx has only 16 contexts. We rotate through them on each
  34. task switch. A better way would be to keep track of tasks that
  35. own contexts, and implement an LRU usage. That way very active
  36. tasks don't always have to pay the TLB reload overhead. The
  37. kernel pages are mapped shared, so the kernel can run on behalf
  38. of any task that makes a kernel entry. Shared does not mean they
  39. are not protected, just that the ASID comparison is not performed.
  40. -- Dan
  41. The IBM4xx has 256 contexts, so we can just rotate through these
  42. as a way of "switching" contexts. If the TID of the TLB is zero,
  43. the PID/TID comparison is disabled, so we can use a TID of zero
  44. to represent all kernel pages as shared among all contexts.
  45. -- Dan
  46. */
  47. static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
  48. {
  49. }
  50. #ifdef CONFIG_8xx
  51. #define NO_CONTEXT 16
  52. #define LAST_CONTEXT 15
  53. #define FIRST_CONTEXT 0
  54. #elif defined(CONFIG_4xx)
  55. #define NO_CONTEXT 256
  56. #define LAST_CONTEXT 255
  57. #define FIRST_CONTEXT 1
  58. #elif defined(CONFIG_E200) || defined(CONFIG_E500)
  59. #define NO_CONTEXT 256
  60. #define LAST_CONTEXT 255
  61. #define FIRST_CONTEXT 1
  62. #else
  63. /* PPC 6xx, 7xx CPUs */
  64. #define NO_CONTEXT ((unsigned long) -1)
  65. #define LAST_CONTEXT 32767
  66. #define FIRST_CONTEXT 1
  67. #endif
  68. /*
  69. * Set the current MMU context.
  70. * On 32-bit PowerPCs (other than the 8xx embedded chips), this is done by
  71. * loading up the segment registers for the user part of the address space.
  72. *
  73. * Since the PGD is immediately available, it is much faster to simply
  74. * pass this along as a second parameter, which is required for 8xx and
  75. * can be used for debugging on all processors (if you happen to have
  76. * an Abatron).
  77. */
  78. extern void set_context(unsigned long contextid, pgd_t *pgd);
  79. /*
  80. * Bitmap of contexts in use.
  81. * The size of this bitmap is LAST_CONTEXT + 1 bits.
  82. */
  83. extern unsigned long context_map[];
  84. /*
  85. * This caches the next context number that we expect to be free.
  86. * Its use is an optimization only, we can't rely on this context
  87. * number to be free, but it usually will be.
  88. */
  89. extern unsigned long next_mmu_context;
  90. /*
  91. * If we don't have sufficient contexts to give one to every task
  92. * that could be in the system, we need to be able to steal contexts.
  93. * These variables support that.
  94. */
  95. #if LAST_CONTEXT < 30000
  96. #define FEW_CONTEXTS 1
  97. extern atomic_t nr_free_contexts;
  98. extern struct mm_struct *context_mm[LAST_CONTEXT+1];
  99. extern void steal_context(void);
  100. #endif
  101. /*
  102. * Get a new mmu context for the address space described by `mm'.
  103. */
  104. static inline void get_mmu_context(struct mm_struct *mm)
  105. {
  106. unsigned long ctx;
  107. if (mm->context.id != NO_CONTEXT)
  108. return;
  109. #ifdef FEW_CONTEXTS
  110. while (atomic_dec_if_positive(&nr_free_contexts) < 0)
  111. steal_context();
  112. #endif
  113. ctx = next_mmu_context;
  114. while (test_and_set_bit(ctx, context_map)) {
  115. ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
  116. if (ctx > LAST_CONTEXT)
  117. ctx = 0;
  118. }
  119. next_mmu_context = (ctx + 1) & LAST_CONTEXT;
  120. mm->context.id = ctx;
  121. #ifdef FEW_CONTEXTS
  122. context_mm[ctx] = mm;
  123. #endif
  124. }
  125. /*
  126. * Set up the context for a new address space.
  127. */
  128. static inline int init_new_context(struct task_struct *t, struct mm_struct *mm)
  129. {
  130. mm->context.id = NO_CONTEXT;
  131. mm->context.vdso_base = 0;
  132. return 0;
  133. }
  134. /*
  135. * We're finished using the context for an address space.
  136. */
  137. static inline void destroy_context(struct mm_struct *mm)
  138. {
  139. preempt_disable();
  140. if (mm->context.id != NO_CONTEXT) {
  141. clear_bit(mm->context.id, context_map);
  142. mm->context.id = NO_CONTEXT;
  143. #ifdef FEW_CONTEXTS
  144. atomic_inc(&nr_free_contexts);
  145. #endif
  146. }
  147. preempt_enable();
  148. }
  149. static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  150. struct task_struct *tsk)
  151. {
  152. #ifdef CONFIG_ALTIVEC
  153. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  154. asm volatile ("dssall;\n"
  155. #ifndef CONFIG_POWER4
  156. "sync;\n" /* G4 needs a sync here, G5 apparently not */
  157. #endif
  158. : : );
  159. #endif /* CONFIG_ALTIVEC */
  160. tsk->thread.pgdir = next->pgd;
  161. /* No need to flush userspace segments if the mm doesnt change */
  162. if (prev == next)
  163. return;
  164. /* Setup new userspace context */
  165. get_mmu_context(next);
  166. set_context(next->context.id, next->pgd);
  167. }
  168. #define deactivate_mm(tsk,mm) do { } while (0)
  169. /*
  170. * After we have set current->mm to a new value, this activates
  171. * the context for the new mm so we see the new mappings.
  172. */
  173. #define activate_mm(active_mm, mm) switch_mm(active_mm, mm, current)
  174. extern void mmu_context_init(void);
  175. #else
  176. #include <linux/kernel.h>
  177. #include <linux/mm.h>
  178. #include <linux/sched.h>
  179. /*
  180. * Copyright (C) 2001 PPC 64 Team, IBM Corp
  181. *
  182. * This program is free software; you can redistribute it and/or
  183. * modify it under the terms of the GNU General Public License
  184. * as published by the Free Software Foundation; either version
  185. * 2 of the License, or (at your option) any later version.
  186. */
  187. static inline void enter_lazy_tlb(struct mm_struct *mm,
  188. struct task_struct *tsk)
  189. {
  190. }
  191. /*
  192. * The proto-VSID space has 2^35 - 1 segments available for user mappings.
  193. * Each segment contains 2^28 bytes. Each context maps 2^44 bytes,
  194. * so we can support 2^19-1 contexts (19 == 35 + 28 - 44).
  195. */
  196. #define NO_CONTEXT 0
  197. #define MAX_CONTEXT ((1UL << 19) - 1)
  198. extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
  199. extern void destroy_context(struct mm_struct *mm);
  200. extern void switch_stab(struct task_struct *tsk, struct mm_struct *mm);
  201. extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
  202. /*
  203. * switch_mm is the entry point called from the architecture independent
  204. * code in kernel/sched.c
  205. */
  206. static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  207. struct task_struct *tsk)
  208. {
  209. if (!cpu_isset(smp_processor_id(), next->cpu_vm_mask))
  210. cpu_set(smp_processor_id(), next->cpu_vm_mask);
  211. /* No need to flush userspace segments if the mm doesnt change */
  212. if (prev == next)
  213. return;
  214. #ifdef CONFIG_ALTIVEC
  215. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  216. asm volatile ("dssall");
  217. #endif /* CONFIG_ALTIVEC */
  218. if (cpu_has_feature(CPU_FTR_SLB))
  219. switch_slb(tsk, next);
  220. else
  221. switch_stab(tsk, next);
  222. }
  223. #define deactivate_mm(tsk,mm) do { } while (0)
  224. /*
  225. * After we have set current->mm to a new value, this activates
  226. * the context for the new mm so we see the new mappings.
  227. */
  228. static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
  229. {
  230. unsigned long flags;
  231. local_irq_save(flags);
  232. switch_mm(prev, next, current);
  233. local_irq_restore(flags);
  234. }
  235. #endif /* CONFIG_PPC64 */
  236. #endif /* __KERNEL__ */
  237. #endif /* __ASM_POWERPC_MMU_CONTEXT_H */