mmu-hash32.h 2.4 KB

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  1. #ifndef _ASM_POWERPC_MMU_HASH32_H_
  2. #define _ASM_POWERPC_MMU_HASH32_H_
  3. /*
  4. * 32-bit hash table MMU support
  5. */
  6. /*
  7. * BATs
  8. */
  9. /* Block size masks */
  10. #define BL_128K 0x000
  11. #define BL_256K 0x001
  12. #define BL_512K 0x003
  13. #define BL_1M 0x007
  14. #define BL_2M 0x00F
  15. #define BL_4M 0x01F
  16. #define BL_8M 0x03F
  17. #define BL_16M 0x07F
  18. #define BL_32M 0x0FF
  19. #define BL_64M 0x1FF
  20. #define BL_128M 0x3FF
  21. #define BL_256M 0x7FF
  22. /* BAT Access Protection */
  23. #define BPP_XX 0x00 /* No access */
  24. #define BPP_RX 0x01 /* Read only */
  25. #define BPP_RW 0x02 /* Read/write */
  26. #ifndef __ASSEMBLY__
  27. struct ppc_bat {
  28. struct {
  29. unsigned long bepi:15; /* Effective page index (virtual address) */
  30. unsigned long :4; /* Unused */
  31. unsigned long bl:11; /* Block size mask */
  32. unsigned long vs:1; /* Supervisor valid */
  33. unsigned long vp:1; /* User valid */
  34. } batu; /* Upper register */
  35. struct {
  36. unsigned long brpn:15; /* Real page index (physical address) */
  37. unsigned long :10; /* Unused */
  38. unsigned long w:1; /* Write-thru cache */
  39. unsigned long i:1; /* Cache inhibit */
  40. unsigned long m:1; /* Memory coherence */
  41. unsigned long g:1; /* Guarded (MBZ in IBAT) */
  42. unsigned long :1; /* Unused */
  43. unsigned long pp:2; /* Page access protections */
  44. } batl; /* Lower register */
  45. };
  46. #endif /* !__ASSEMBLY__ */
  47. /*
  48. * Hash table
  49. */
  50. /* Values for PP (assumes Ks=0, Kp=1) */
  51. #define PP_RWXX 0 /* Supervisor read/write, User none */
  52. #define PP_RWRX 1 /* Supervisor read/write, User read */
  53. #define PP_RWRW 2 /* Supervisor read/write, User read/write */
  54. #define PP_RXRX 3 /* Supervisor read, User read */
  55. #ifndef __ASSEMBLY__
  56. /* Hardware Page Table Entry */
  57. struct hash_pte {
  58. unsigned long v:1; /* Entry is valid */
  59. unsigned long vsid:24; /* Virtual segment identifier */
  60. unsigned long h:1; /* Hash algorithm indicator */
  61. unsigned long api:6; /* Abbreviated page index */
  62. unsigned long rpn:20; /* Real (physical) page number */
  63. unsigned long :3; /* Unused */
  64. unsigned long r:1; /* Referenced */
  65. unsigned long c:1; /* Changed */
  66. unsigned long w:1; /* Write-thru cache mode */
  67. unsigned long i:1; /* Cache inhibited */
  68. unsigned long m:1; /* Memory coherence */
  69. unsigned long g:1; /* Guarded */
  70. unsigned long :1; /* Unused */
  71. unsigned long pp:2; /* Page protection */
  72. };
  73. typedef struct {
  74. unsigned long id;
  75. unsigned long vdso_base;
  76. } mm_context_t;
  77. typedef unsigned long phys_addr_t;
  78. #endif /* !__ASSEMBLY__ */
  79. #endif /* _ASM_POWERPC_MMU_HASH32_H_ */