bitops.h 6.0 KB

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  1. #ifndef _PARISC_BITOPS_H
  2. #define _PARISC_BITOPS_H
  3. #include <linux/compiler.h>
  4. #include <asm/types.h> /* for BITS_PER_LONG/SHIFT_PER_LONG */
  5. #include <asm/byteorder.h>
  6. #include <asm/atomic.h>
  7. /*
  8. * HP-PARISC specific bit operations
  9. * for a detailed description of the functions please refer
  10. * to include/asm-i386/bitops.h or kerneldoc
  11. */
  12. #define CHOP_SHIFTCOUNT(x) (((unsigned long) (x)) & (BITS_PER_LONG - 1))
  13. #define smp_mb__before_clear_bit() smp_mb()
  14. #define smp_mb__after_clear_bit() smp_mb()
  15. /* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion
  16. * on use of volatile and __*_bit() (set/clear/change):
  17. * *_bit() want use of volatile.
  18. * __*_bit() are "relaxed" and don't use spinlock or volatile.
  19. */
  20. static __inline__ void set_bit(int nr, volatile unsigned long * addr)
  21. {
  22. unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
  23. unsigned long flags;
  24. addr += (nr >> SHIFT_PER_LONG);
  25. _atomic_spin_lock_irqsave(addr, flags);
  26. *addr |= mask;
  27. _atomic_spin_unlock_irqrestore(addr, flags);
  28. }
  29. static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
  30. {
  31. unsigned long mask = ~(1UL << CHOP_SHIFTCOUNT(nr));
  32. unsigned long flags;
  33. addr += (nr >> SHIFT_PER_LONG);
  34. _atomic_spin_lock_irqsave(addr, flags);
  35. *addr &= mask;
  36. _atomic_spin_unlock_irqrestore(addr, flags);
  37. }
  38. static __inline__ void change_bit(int nr, volatile unsigned long * addr)
  39. {
  40. unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
  41. unsigned long flags;
  42. addr += (nr >> SHIFT_PER_LONG);
  43. _atomic_spin_lock_irqsave(addr, flags);
  44. *addr ^= mask;
  45. _atomic_spin_unlock_irqrestore(addr, flags);
  46. }
  47. static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
  48. {
  49. unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
  50. unsigned long old;
  51. unsigned long flags;
  52. int set;
  53. addr += (nr >> SHIFT_PER_LONG);
  54. _atomic_spin_lock_irqsave(addr, flags);
  55. old = *addr;
  56. set = (old & mask) ? 1 : 0;
  57. if (!set)
  58. *addr = old | mask;
  59. _atomic_spin_unlock_irqrestore(addr, flags);
  60. return set;
  61. }
  62. static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
  63. {
  64. unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
  65. unsigned long old;
  66. unsigned long flags;
  67. int set;
  68. addr += (nr >> SHIFT_PER_LONG);
  69. _atomic_spin_lock_irqsave(addr, flags);
  70. old = *addr;
  71. set = (old & mask) ? 1 : 0;
  72. if (set)
  73. *addr = old & ~mask;
  74. _atomic_spin_unlock_irqrestore(addr, flags);
  75. return set;
  76. }
  77. static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
  78. {
  79. unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
  80. unsigned long oldbit;
  81. unsigned long flags;
  82. addr += (nr >> SHIFT_PER_LONG);
  83. _atomic_spin_lock_irqsave(addr, flags);
  84. oldbit = *addr;
  85. *addr = oldbit ^ mask;
  86. _atomic_spin_unlock_irqrestore(addr, flags);
  87. return (oldbit & mask) ? 1 : 0;
  88. }
  89. #include <asm-generic/bitops/non-atomic.h>
  90. #ifdef __KERNEL__
  91. /**
  92. * __ffs - find first bit in word. returns 0 to "BITS_PER_LONG-1".
  93. * @word: The word to search
  94. *
  95. * __ffs() return is undefined if no bit is set.
  96. *
  97. * 32-bit fast __ffs by LaMont Jones "lamont At hp com".
  98. * 64-bit enhancement by Grant Grundler "grundler At parisc-linux org".
  99. * (with help from willy/jejb to get the semantics right)
  100. *
  101. * This algorithm avoids branches by making use of nullification.
  102. * One side effect of "extr" instructions is it sets PSW[N] bit.
  103. * How PSW[N] (nullify next insn) gets set is determined by the
  104. * "condition" field (eg "<>" or "TR" below) in the extr* insn.
  105. * Only the 1st and one of either the 2cd or 3rd insn will get executed.
  106. * Each set of 3 insn will get executed in 2 cycles on PA8x00 vs 16 or so
  107. * cycles for each mispredicted branch.
  108. */
  109. static __inline__ unsigned long __ffs(unsigned long x)
  110. {
  111. unsigned long ret;
  112. __asm__(
  113. #ifdef CONFIG_64BIT
  114. " ldi 63,%1\n"
  115. " extrd,u,*<> %0,63,32,%%r0\n"
  116. " extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */
  117. " addi -32,%1,%1\n"
  118. #else
  119. " ldi 31,%1\n"
  120. #endif
  121. " extru,<> %0,31,16,%%r0\n"
  122. " extru,TR %0,15,16,%0\n" /* xxxx0000 -> 0000xxxx */
  123. " addi -16,%1,%1\n"
  124. " extru,<> %0,31,8,%%r0\n"
  125. " extru,TR %0,23,8,%0\n" /* 0000xx00 -> 000000xx */
  126. " addi -8,%1,%1\n"
  127. " extru,<> %0,31,4,%%r0\n"
  128. " extru,TR %0,27,4,%0\n" /* 000000x0 -> 0000000x */
  129. " addi -4,%1,%1\n"
  130. " extru,<> %0,31,2,%%r0\n"
  131. " extru,TR %0,29,2,%0\n" /* 0000000y, 1100b -> 0011b */
  132. " addi -2,%1,%1\n"
  133. " extru,= %0,31,1,%%r0\n" /* check last bit */
  134. " addi -1,%1,%1\n"
  135. : "+r" (x), "=r" (ret) );
  136. return ret;
  137. }
  138. #include <asm-generic/bitops/ffz.h>
  139. /*
  140. * ffs: find first bit set. returns 1 to BITS_PER_LONG or 0 (if none set)
  141. * This is defined the same way as the libc and compiler builtin
  142. * ffs routines, therefore differs in spirit from the above ffz (man ffs).
  143. */
  144. static __inline__ int ffs(int x)
  145. {
  146. return x ? (__ffs((unsigned long)x) + 1) : 0;
  147. }
  148. /*
  149. * fls: find last (most significant) bit set.
  150. * fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
  151. */
  152. static __inline__ int fls(int x)
  153. {
  154. int ret;
  155. if (!x)
  156. return 0;
  157. __asm__(
  158. " ldi 1,%1\n"
  159. " extru,<> %0,15,16,%%r0\n"
  160. " zdep,TR %0,15,16,%0\n" /* xxxx0000 */
  161. " addi 16,%1,%1\n"
  162. " extru,<> %0,7,8,%%r0\n"
  163. " zdep,TR %0,23,24,%0\n" /* xx000000 */
  164. " addi 8,%1,%1\n"
  165. " extru,<> %0,3,4,%%r0\n"
  166. " zdep,TR %0,27,28,%0\n" /* x0000000 */
  167. " addi 4,%1,%1\n"
  168. " extru,<> %0,1,2,%%r0\n"
  169. " zdep,TR %0,29,30,%0\n" /* y0000000 (y&3 = 0) */
  170. " addi 2,%1,%1\n"
  171. " extru,= %0,0,1,%%r0\n"
  172. " addi 1,%1,%1\n" /* if y & 8, add 1 */
  173. : "+r" (x), "=r" (ret) );
  174. return ret;
  175. }
  176. #include <asm-generic/bitops/fls64.h>
  177. #include <asm-generic/bitops/hweight.h>
  178. #include <asm-generic/bitops/sched.h>
  179. #endif /* __KERNEL__ */
  180. #include <asm-generic/bitops/find.h>
  181. #ifdef __KERNEL__
  182. #include <asm-generic/bitops/ext2-non-atomic.h>
  183. /* '3' is bits per byte */
  184. #define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3)
  185. #define ext2_set_bit_atomic(l,nr,addr) \
  186. test_and_set_bit((nr) ^ LE_BYTE_ADDR, (unsigned long *)addr)
  187. #define ext2_clear_bit_atomic(l,nr,addr) \
  188. test_and_clear_bit( (nr) ^ LE_BYTE_ADDR, (unsigned long *)addr)
  189. #endif /* __KERNEL__ */
  190. #include <asm-generic/bitops/minix-le.h>
  191. #endif /* _PARISC_BITOPS_H */