qlogicpti.c 43 KB

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  1. /* qlogicpti.c: Performance Technologies QlogicISP sbus card driver.
  2. *
  3. * Copyright (C) 1996, 2006 David S. Miller (davem@davemloft.net)
  4. *
  5. * A lot of this driver was directly stolen from Erik H. Moe's PCI
  6. * Qlogic ISP driver. Mucho kudos to him for this code.
  7. *
  8. * An even bigger kudos to John Grana at Performance Technologies
  9. * for providing me with the hardware to write this driver, you rule
  10. * John you really do.
  11. *
  12. * May, 2, 1997: Added support for QLGC,isp --jj
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/delay.h>
  16. #include <linux/types.h>
  17. #include <linux/string.h>
  18. #include <linux/slab.h>
  19. #include <linux/blkdev.h>
  20. #include <linux/proc_fs.h>
  21. #include <linux/stat.h>
  22. #include <linux/init.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/module.h>
  26. #include <linux/jiffies.h>
  27. #include <asm/byteorder.h>
  28. #include "qlogicpti.h"
  29. #include <asm/sbus.h>
  30. #include <asm/dma.h>
  31. #include <asm/system.h>
  32. #include <asm/ptrace.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/oplib.h>
  35. #include <asm/io.h>
  36. #include <asm/irq.h>
  37. #include <scsi/scsi.h>
  38. #include <scsi/scsi_cmnd.h>
  39. #include <scsi/scsi_device.h>
  40. #include <scsi/scsi_eh.h>
  41. #include <scsi/scsi_tcq.h>
  42. #include <scsi/scsi_host.h>
  43. #define MAX_TARGETS 16
  44. #define MAX_LUNS 8 /* 32 for 1.31 F/W */
  45. #define DEFAULT_LOOP_COUNT 10000
  46. #include "qlogicpti_asm.c"
  47. static struct qlogicpti *qptichain = NULL;
  48. static DEFINE_SPINLOCK(qptichain_lock);
  49. #define PACKB(a, b) (((a)<<4)|(b))
  50. static const u_char mbox_param[] = {
  51. PACKB(1, 1), /* MBOX_NO_OP */
  52. PACKB(5, 5), /* MBOX_LOAD_RAM */
  53. PACKB(2, 0), /* MBOX_EXEC_FIRMWARE */
  54. PACKB(5, 5), /* MBOX_DUMP_RAM */
  55. PACKB(3, 3), /* MBOX_WRITE_RAM_WORD */
  56. PACKB(2, 3), /* MBOX_READ_RAM_WORD */
  57. PACKB(6, 6), /* MBOX_MAILBOX_REG_TEST */
  58. PACKB(2, 3), /* MBOX_VERIFY_CHECKSUM */
  59. PACKB(1, 3), /* MBOX_ABOUT_FIRMWARE */
  60. PACKB(0, 0), /* 0x0009 */
  61. PACKB(0, 0), /* 0x000a */
  62. PACKB(0, 0), /* 0x000b */
  63. PACKB(0, 0), /* 0x000c */
  64. PACKB(0, 0), /* 0x000d */
  65. PACKB(1, 2), /* MBOX_CHECK_FIRMWARE */
  66. PACKB(0, 0), /* 0x000f */
  67. PACKB(5, 5), /* MBOX_INIT_REQ_QUEUE */
  68. PACKB(6, 6), /* MBOX_INIT_RES_QUEUE */
  69. PACKB(4, 4), /* MBOX_EXECUTE_IOCB */
  70. PACKB(2, 2), /* MBOX_WAKE_UP */
  71. PACKB(1, 6), /* MBOX_STOP_FIRMWARE */
  72. PACKB(4, 4), /* MBOX_ABORT */
  73. PACKB(2, 2), /* MBOX_ABORT_DEVICE */
  74. PACKB(3, 3), /* MBOX_ABORT_TARGET */
  75. PACKB(2, 2), /* MBOX_BUS_RESET */
  76. PACKB(2, 3), /* MBOX_STOP_QUEUE */
  77. PACKB(2, 3), /* MBOX_START_QUEUE */
  78. PACKB(2, 3), /* MBOX_SINGLE_STEP_QUEUE */
  79. PACKB(2, 3), /* MBOX_ABORT_QUEUE */
  80. PACKB(2, 4), /* MBOX_GET_DEV_QUEUE_STATUS */
  81. PACKB(0, 0), /* 0x001e */
  82. PACKB(1, 3), /* MBOX_GET_FIRMWARE_STATUS */
  83. PACKB(1, 2), /* MBOX_GET_INIT_SCSI_ID */
  84. PACKB(1, 2), /* MBOX_GET_SELECT_TIMEOUT */
  85. PACKB(1, 3), /* MBOX_GET_RETRY_COUNT */
  86. PACKB(1, 2), /* MBOX_GET_TAG_AGE_LIMIT */
  87. PACKB(1, 2), /* MBOX_GET_CLOCK_RATE */
  88. PACKB(1, 2), /* MBOX_GET_ACT_NEG_STATE */
  89. PACKB(1, 2), /* MBOX_GET_ASYNC_DATA_SETUP_TIME */
  90. PACKB(1, 3), /* MBOX_GET_SBUS_PARAMS */
  91. PACKB(2, 4), /* MBOX_GET_TARGET_PARAMS */
  92. PACKB(2, 4), /* MBOX_GET_DEV_QUEUE_PARAMS */
  93. PACKB(0, 0), /* 0x002a */
  94. PACKB(0, 0), /* 0x002b */
  95. PACKB(0, 0), /* 0x002c */
  96. PACKB(0, 0), /* 0x002d */
  97. PACKB(0, 0), /* 0x002e */
  98. PACKB(0, 0), /* 0x002f */
  99. PACKB(2, 2), /* MBOX_SET_INIT_SCSI_ID */
  100. PACKB(2, 2), /* MBOX_SET_SELECT_TIMEOUT */
  101. PACKB(3, 3), /* MBOX_SET_RETRY_COUNT */
  102. PACKB(2, 2), /* MBOX_SET_TAG_AGE_LIMIT */
  103. PACKB(2, 2), /* MBOX_SET_CLOCK_RATE */
  104. PACKB(2, 2), /* MBOX_SET_ACTIVE_NEG_STATE */
  105. PACKB(2, 2), /* MBOX_SET_ASYNC_DATA_SETUP_TIME */
  106. PACKB(3, 3), /* MBOX_SET_SBUS_CONTROL_PARAMS */
  107. PACKB(4, 4), /* MBOX_SET_TARGET_PARAMS */
  108. PACKB(4, 4), /* MBOX_SET_DEV_QUEUE_PARAMS */
  109. PACKB(0, 0), /* 0x003a */
  110. PACKB(0, 0), /* 0x003b */
  111. PACKB(0, 0), /* 0x003c */
  112. PACKB(0, 0), /* 0x003d */
  113. PACKB(0, 0), /* 0x003e */
  114. PACKB(0, 0), /* 0x003f */
  115. PACKB(0, 0), /* 0x0040 */
  116. PACKB(0, 0), /* 0x0041 */
  117. PACKB(0, 0) /* 0x0042 */
  118. };
  119. #define MAX_MBOX_COMMAND ARRAY_SIZE(mbox_param)
  120. /* queue length's _must_ be power of two: */
  121. #define QUEUE_DEPTH(in, out, ql) ((in - out) & (ql))
  122. #define REQ_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, \
  123. QLOGICPTI_REQ_QUEUE_LEN)
  124. #define RES_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, RES_QUEUE_LEN)
  125. static inline void qlogicpti_enable_irqs(struct qlogicpti *qpti)
  126. {
  127. sbus_writew(SBUS_CTRL_ERIRQ | SBUS_CTRL_GENAB,
  128. qpti->qregs + SBUS_CTRL);
  129. }
  130. static inline void qlogicpti_disable_irqs(struct qlogicpti *qpti)
  131. {
  132. sbus_writew(0, qpti->qregs + SBUS_CTRL);
  133. }
  134. static inline void set_sbus_cfg1(struct qlogicpti *qpti)
  135. {
  136. u16 val;
  137. u8 bursts = qpti->bursts;
  138. #if 0 /* It appears that at least PTI cards do not support
  139. * 64-byte bursts and that setting the B64 bit actually
  140. * is a nop and the chip ends up using the smallest burst
  141. * size. -DaveM
  142. */
  143. if (sbus_can_burst64(qpti->sdev) && (bursts & DMA_BURST64)) {
  144. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B64);
  145. } else
  146. #endif
  147. if (bursts & DMA_BURST32) {
  148. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B32);
  149. } else if (bursts & DMA_BURST16) {
  150. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B16);
  151. } else if (bursts & DMA_BURST8) {
  152. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B8);
  153. } else {
  154. val = 0; /* No sbus bursts for you... */
  155. }
  156. sbus_writew(val, qpti->qregs + SBUS_CFG1);
  157. }
  158. static int qlogicpti_mbox_command(struct qlogicpti *qpti, u_short param[], int force)
  159. {
  160. int loop_count;
  161. u16 tmp;
  162. if (mbox_param[param[0]] == 0)
  163. return 1;
  164. /* Set SBUS semaphore. */
  165. tmp = sbus_readw(qpti->qregs + SBUS_SEMAPHORE);
  166. tmp |= SBUS_SEMAPHORE_LCK;
  167. sbus_writew(tmp, qpti->qregs + SBUS_SEMAPHORE);
  168. /* Wait for host IRQ bit to clear. */
  169. loop_count = DEFAULT_LOOP_COUNT;
  170. while (--loop_count && (sbus_readw(qpti->qregs + HCCTRL) & HCCTRL_HIRQ)) {
  171. barrier();
  172. cpu_relax();
  173. }
  174. if (!loop_count)
  175. printk(KERN_EMERG "qlogicpti%d: mbox_command loop timeout #1\n",
  176. qpti->qpti_id);
  177. /* Write mailbox command registers. */
  178. switch (mbox_param[param[0]] >> 4) {
  179. case 6: sbus_writew(param[5], qpti->qregs + MBOX5);
  180. case 5: sbus_writew(param[4], qpti->qregs + MBOX4);
  181. case 4: sbus_writew(param[3], qpti->qregs + MBOX3);
  182. case 3: sbus_writew(param[2], qpti->qregs + MBOX2);
  183. case 2: sbus_writew(param[1], qpti->qregs + MBOX1);
  184. case 1: sbus_writew(param[0], qpti->qregs + MBOX0);
  185. }
  186. /* Clear RISC interrupt. */
  187. tmp = sbus_readw(qpti->qregs + HCCTRL);
  188. tmp |= HCCTRL_CRIRQ;
  189. sbus_writew(tmp, qpti->qregs + HCCTRL);
  190. /* Clear SBUS semaphore. */
  191. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  192. /* Set HOST interrupt. */
  193. tmp = sbus_readw(qpti->qregs + HCCTRL);
  194. tmp |= HCCTRL_SHIRQ;
  195. sbus_writew(tmp, qpti->qregs + HCCTRL);
  196. /* Wait for HOST interrupt clears. */
  197. loop_count = DEFAULT_LOOP_COUNT;
  198. while (--loop_count &&
  199. (sbus_readw(qpti->qregs + HCCTRL) & HCCTRL_CRIRQ))
  200. udelay(20);
  201. if (!loop_count)
  202. printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #2\n",
  203. qpti->qpti_id, param[0]);
  204. /* Wait for SBUS semaphore to get set. */
  205. loop_count = DEFAULT_LOOP_COUNT;
  206. while (--loop_count &&
  207. !(sbus_readw(qpti->qregs + SBUS_SEMAPHORE) & SBUS_SEMAPHORE_LCK)) {
  208. udelay(20);
  209. /* Workaround for some buggy chips. */
  210. if (sbus_readw(qpti->qregs + MBOX0) & 0x4000)
  211. break;
  212. }
  213. if (!loop_count)
  214. printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #3\n",
  215. qpti->qpti_id, param[0]);
  216. /* Wait for MBOX busy condition to go away. */
  217. loop_count = DEFAULT_LOOP_COUNT;
  218. while (--loop_count && (sbus_readw(qpti->qregs + MBOX0) == 0x04))
  219. udelay(20);
  220. if (!loop_count)
  221. printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #4\n",
  222. qpti->qpti_id, param[0]);
  223. /* Read back output parameters. */
  224. switch (mbox_param[param[0]] & 0xf) {
  225. case 6: param[5] = sbus_readw(qpti->qregs + MBOX5);
  226. case 5: param[4] = sbus_readw(qpti->qregs + MBOX4);
  227. case 4: param[3] = sbus_readw(qpti->qregs + MBOX3);
  228. case 3: param[2] = sbus_readw(qpti->qregs + MBOX2);
  229. case 2: param[1] = sbus_readw(qpti->qregs + MBOX1);
  230. case 1: param[0] = sbus_readw(qpti->qregs + MBOX0);
  231. }
  232. /* Clear RISC interrupt. */
  233. tmp = sbus_readw(qpti->qregs + HCCTRL);
  234. tmp |= HCCTRL_CRIRQ;
  235. sbus_writew(tmp, qpti->qregs + HCCTRL);
  236. /* Release SBUS semaphore. */
  237. tmp = sbus_readw(qpti->qregs + SBUS_SEMAPHORE);
  238. tmp &= ~(SBUS_SEMAPHORE_LCK);
  239. sbus_writew(tmp, qpti->qregs + SBUS_SEMAPHORE);
  240. /* We're done. */
  241. return 0;
  242. }
  243. static inline void qlogicpti_set_hostdev_defaults(struct qlogicpti *qpti)
  244. {
  245. int i;
  246. qpti->host_param.initiator_scsi_id = qpti->scsi_id;
  247. qpti->host_param.bus_reset_delay = 3;
  248. qpti->host_param.retry_count = 0;
  249. qpti->host_param.retry_delay = 5;
  250. qpti->host_param.async_data_setup_time = 3;
  251. qpti->host_param.req_ack_active_negation = 1;
  252. qpti->host_param.data_line_active_negation = 1;
  253. qpti->host_param.data_dma_burst_enable = 1;
  254. qpti->host_param.command_dma_burst_enable = 1;
  255. qpti->host_param.tag_aging = 8;
  256. qpti->host_param.selection_timeout = 250;
  257. qpti->host_param.max_queue_depth = 256;
  258. for(i = 0; i < MAX_TARGETS; i++) {
  259. /*
  260. * disconnect, parity, arq, reneg on reset, and, oddly enough
  261. * tags...the midlayer's notion of tagged support has to match
  262. * our device settings, and since we base whether we enable a
  263. * tag on a per-cmnd basis upon what the midlayer sez, we
  264. * actually enable the capability here.
  265. */
  266. qpti->dev_param[i].device_flags = 0xcd;
  267. qpti->dev_param[i].execution_throttle = 16;
  268. if (qpti->ultra) {
  269. qpti->dev_param[i].synchronous_period = 12;
  270. qpti->dev_param[i].synchronous_offset = 8;
  271. } else {
  272. qpti->dev_param[i].synchronous_period = 25;
  273. qpti->dev_param[i].synchronous_offset = 12;
  274. }
  275. qpti->dev_param[i].device_enable = 1;
  276. }
  277. /* this is very important to set! */
  278. qpti->sbits = 1 << qpti->scsi_id;
  279. }
  280. static int qlogicpti_reset_hardware(struct Scsi_Host *host)
  281. {
  282. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  283. u_short param[6];
  284. unsigned short risc_code_addr;
  285. int loop_count, i;
  286. unsigned long flags;
  287. risc_code_addr = 0x1000; /* all load addresses are at 0x1000 */
  288. spin_lock_irqsave(host->host_lock, flags);
  289. sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
  290. /* Only reset the scsi bus if it is not free. */
  291. if (sbus_readw(qpti->qregs + CPU_PCTRL) & CPU_PCTRL_BSY) {
  292. sbus_writew(CPU_ORIDE_RMOD, qpti->qregs + CPU_ORIDE);
  293. sbus_writew(CPU_CMD_BRESET, qpti->qregs + CPU_CMD);
  294. udelay(400);
  295. }
  296. sbus_writew(SBUS_CTRL_RESET, qpti->qregs + SBUS_CTRL);
  297. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + CMD_DMA_CTRL);
  298. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + DATA_DMA_CTRL);
  299. loop_count = DEFAULT_LOOP_COUNT;
  300. while (--loop_count && ((sbus_readw(qpti->qregs + MBOX0) & 0xff) == 0x04))
  301. udelay(20);
  302. if (!loop_count)
  303. printk(KERN_EMERG "qlogicpti%d: reset_hardware loop timeout\n",
  304. qpti->qpti_id);
  305. sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
  306. set_sbus_cfg1(qpti);
  307. qlogicpti_enable_irqs(qpti);
  308. if (sbus_readw(qpti->qregs + RISC_PSR) & RISC_PSR_ULTRA) {
  309. qpti->ultra = 1;
  310. sbus_writew((RISC_MTREG_P0ULTRA | RISC_MTREG_P1ULTRA),
  311. qpti->qregs + RISC_MTREG);
  312. } else {
  313. qpti->ultra = 0;
  314. sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT),
  315. qpti->qregs + RISC_MTREG);
  316. }
  317. /* reset adapter and per-device default values. */
  318. /* do it after finding out whether we're ultra mode capable */
  319. qlogicpti_set_hostdev_defaults(qpti);
  320. /* Release the RISC processor. */
  321. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  322. /* Get RISC to start executing the firmware code. */
  323. param[0] = MBOX_EXEC_FIRMWARE;
  324. param[1] = risc_code_addr;
  325. if (qlogicpti_mbox_command(qpti, param, 1)) {
  326. printk(KERN_EMERG "qlogicpti%d: Cannot execute ISP firmware.\n",
  327. qpti->qpti_id);
  328. spin_unlock_irqrestore(host->host_lock, flags);
  329. return 1;
  330. }
  331. /* Set initiator scsi ID. */
  332. param[0] = MBOX_SET_INIT_SCSI_ID;
  333. param[1] = qpti->host_param.initiator_scsi_id;
  334. if (qlogicpti_mbox_command(qpti, param, 1) ||
  335. (param[0] != MBOX_COMMAND_COMPLETE)) {
  336. printk(KERN_EMERG "qlogicpti%d: Cannot set initiator SCSI ID.\n",
  337. qpti->qpti_id);
  338. spin_unlock_irqrestore(host->host_lock, flags);
  339. return 1;
  340. }
  341. /* Initialize state of the queues, both hw and sw. */
  342. qpti->req_in_ptr = qpti->res_out_ptr = 0;
  343. param[0] = MBOX_INIT_RES_QUEUE;
  344. param[1] = RES_QUEUE_LEN + 1;
  345. param[2] = (u_short) (qpti->res_dvma >> 16);
  346. param[3] = (u_short) (qpti->res_dvma & 0xffff);
  347. param[4] = param[5] = 0;
  348. if (qlogicpti_mbox_command(qpti, param, 1)) {
  349. printk(KERN_EMERG "qlogicpti%d: Cannot init response queue.\n",
  350. qpti->qpti_id);
  351. spin_unlock_irqrestore(host->host_lock, flags);
  352. return 1;
  353. }
  354. param[0] = MBOX_INIT_REQ_QUEUE;
  355. param[1] = QLOGICPTI_REQ_QUEUE_LEN + 1;
  356. param[2] = (u_short) (qpti->req_dvma >> 16);
  357. param[3] = (u_short) (qpti->req_dvma & 0xffff);
  358. param[4] = param[5] = 0;
  359. if (qlogicpti_mbox_command(qpti, param, 1)) {
  360. printk(KERN_EMERG "qlogicpti%d: Cannot init request queue.\n",
  361. qpti->qpti_id);
  362. spin_unlock_irqrestore(host->host_lock, flags);
  363. return 1;
  364. }
  365. param[0] = MBOX_SET_RETRY_COUNT;
  366. param[1] = qpti->host_param.retry_count;
  367. param[2] = qpti->host_param.retry_delay;
  368. qlogicpti_mbox_command(qpti, param, 0);
  369. param[0] = MBOX_SET_TAG_AGE_LIMIT;
  370. param[1] = qpti->host_param.tag_aging;
  371. qlogicpti_mbox_command(qpti, param, 0);
  372. for (i = 0; i < MAX_TARGETS; i++) {
  373. param[0] = MBOX_GET_DEV_QUEUE_PARAMS;
  374. param[1] = (i << 8);
  375. qlogicpti_mbox_command(qpti, param, 0);
  376. }
  377. param[0] = MBOX_GET_FIRMWARE_STATUS;
  378. qlogicpti_mbox_command(qpti, param, 0);
  379. param[0] = MBOX_SET_SELECT_TIMEOUT;
  380. param[1] = qpti->host_param.selection_timeout;
  381. qlogicpti_mbox_command(qpti, param, 0);
  382. for (i = 0; i < MAX_TARGETS; i++) {
  383. param[0] = MBOX_SET_TARGET_PARAMS;
  384. param[1] = (i << 8);
  385. param[2] = (qpti->dev_param[i].device_flags << 8);
  386. /*
  387. * Since we're now loading 1.31 f/w, force narrow/async.
  388. */
  389. param[2] |= 0xc0;
  390. param[3] = 0; /* no offset, we do not have sync mode yet */
  391. qlogicpti_mbox_command(qpti, param, 0);
  392. }
  393. /*
  394. * Always (sigh) do an initial bus reset (kicks f/w).
  395. */
  396. param[0] = MBOX_BUS_RESET;
  397. param[1] = qpti->host_param.bus_reset_delay;
  398. qlogicpti_mbox_command(qpti, param, 0);
  399. qpti->send_marker = 1;
  400. spin_unlock_irqrestore(host->host_lock, flags);
  401. return 0;
  402. }
  403. #define PTI_RESET_LIMIT 400
  404. static int __devinit qlogicpti_load_firmware(struct qlogicpti *qpti)
  405. {
  406. struct Scsi_Host *host = qpti->qhost;
  407. unsigned short csum = 0;
  408. unsigned short param[6];
  409. unsigned short *risc_code, risc_code_addr, risc_code_length;
  410. unsigned long flags;
  411. int i, timeout;
  412. risc_code = &sbus_risc_code01[0];
  413. risc_code_addr = 0x1000; /* all f/w modules load at 0x1000 */
  414. risc_code_length = sbus_risc_code_length01;
  415. spin_lock_irqsave(host->host_lock, flags);
  416. /* Verify the checksum twice, one before loading it, and once
  417. * afterwards via the mailbox commands.
  418. */
  419. for (i = 0; i < risc_code_length; i++)
  420. csum += risc_code[i];
  421. if (csum) {
  422. spin_unlock_irqrestore(host->host_lock, flags);
  423. printk(KERN_EMERG "qlogicpti%d: Aieee, firmware checksum failed!",
  424. qpti->qpti_id);
  425. return 1;
  426. }
  427. sbus_writew(SBUS_CTRL_RESET, qpti->qregs + SBUS_CTRL);
  428. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + CMD_DMA_CTRL);
  429. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + DATA_DMA_CTRL);
  430. timeout = PTI_RESET_LIMIT;
  431. while (--timeout && (sbus_readw(qpti->qregs + SBUS_CTRL) & SBUS_CTRL_RESET))
  432. udelay(20);
  433. if (!timeout) {
  434. spin_unlock_irqrestore(host->host_lock, flags);
  435. printk(KERN_EMERG "qlogicpti%d: Cannot reset the ISP.", qpti->qpti_id);
  436. return 1;
  437. }
  438. sbus_writew(HCCTRL_RESET, qpti->qregs + HCCTRL);
  439. mdelay(1);
  440. sbus_writew((SBUS_CTRL_GENAB | SBUS_CTRL_ERIRQ), qpti->qregs + SBUS_CTRL);
  441. set_sbus_cfg1(qpti);
  442. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  443. if (sbus_readw(qpti->qregs + RISC_PSR) & RISC_PSR_ULTRA) {
  444. qpti->ultra = 1;
  445. sbus_writew((RISC_MTREG_P0ULTRA | RISC_MTREG_P1ULTRA),
  446. qpti->qregs + RISC_MTREG);
  447. } else {
  448. qpti->ultra = 0;
  449. sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT),
  450. qpti->qregs + RISC_MTREG);
  451. }
  452. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  453. /* Pin lines are only stable while RISC is paused. */
  454. sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
  455. if (sbus_readw(qpti->qregs + CPU_PDIFF) & CPU_PDIFF_MODE)
  456. qpti->differential = 1;
  457. else
  458. qpti->differential = 0;
  459. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  460. /* This shouldn't be necessary- we've reset things so we should be
  461. running from the ROM now.. */
  462. param[0] = MBOX_STOP_FIRMWARE;
  463. param[1] = param[2] = param[3] = param[4] = param[5] = 0;
  464. if (qlogicpti_mbox_command(qpti, param, 1)) {
  465. printk(KERN_EMERG "qlogicpti%d: Cannot stop firmware for reload.\n",
  466. qpti->qpti_id);
  467. spin_unlock_irqrestore(host->host_lock, flags);
  468. return 1;
  469. }
  470. /* Load it up.. */
  471. for (i = 0; i < risc_code_length; i++) {
  472. param[0] = MBOX_WRITE_RAM_WORD;
  473. param[1] = risc_code_addr + i;
  474. param[2] = risc_code[i];
  475. if (qlogicpti_mbox_command(qpti, param, 1) ||
  476. param[0] != MBOX_COMMAND_COMPLETE) {
  477. printk("qlogicpti%d: Firmware dload failed, I'm bolixed!\n",
  478. qpti->qpti_id);
  479. spin_unlock_irqrestore(host->host_lock, flags);
  480. return 1;
  481. }
  482. }
  483. /* Reset the ISP again. */
  484. sbus_writew(HCCTRL_RESET, qpti->qregs + HCCTRL);
  485. mdelay(1);
  486. qlogicpti_enable_irqs(qpti);
  487. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  488. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  489. /* Ask ISP to verify the checksum of the new code. */
  490. param[0] = MBOX_VERIFY_CHECKSUM;
  491. param[1] = risc_code_addr;
  492. if (qlogicpti_mbox_command(qpti, param, 1) ||
  493. (param[0] != MBOX_COMMAND_COMPLETE)) {
  494. printk(KERN_EMERG "qlogicpti%d: New firmware csum failure!\n",
  495. qpti->qpti_id);
  496. spin_unlock_irqrestore(host->host_lock, flags);
  497. return 1;
  498. }
  499. /* Start using newly downloaded firmware. */
  500. param[0] = MBOX_EXEC_FIRMWARE;
  501. param[1] = risc_code_addr;
  502. qlogicpti_mbox_command(qpti, param, 1);
  503. param[0] = MBOX_ABOUT_FIRMWARE;
  504. if (qlogicpti_mbox_command(qpti, param, 1) ||
  505. (param[0] != MBOX_COMMAND_COMPLETE)) {
  506. printk(KERN_EMERG "qlogicpti%d: AboutFirmware cmd fails.\n",
  507. qpti->qpti_id);
  508. spin_unlock_irqrestore(host->host_lock, flags);
  509. return 1;
  510. }
  511. /* Snag the major and minor revisions from the result. */
  512. qpti->fware_majrev = param[1];
  513. qpti->fware_minrev = param[2];
  514. qpti->fware_micrev = param[3];
  515. /* Set the clock rate */
  516. param[0] = MBOX_SET_CLOCK_RATE;
  517. param[1] = qpti->clock;
  518. if (qlogicpti_mbox_command(qpti, param, 1) ||
  519. (param[0] != MBOX_COMMAND_COMPLETE)) {
  520. printk(KERN_EMERG "qlogicpti%d: could not set clock rate.\n",
  521. qpti->qpti_id);
  522. spin_unlock_irqrestore(host->host_lock, flags);
  523. return 1;
  524. }
  525. if (qpti->is_pti != 0) {
  526. /* Load scsi initiator ID and interrupt level into sbus static ram. */
  527. param[0] = MBOX_WRITE_RAM_WORD;
  528. param[1] = 0xff80;
  529. param[2] = (unsigned short) qpti->scsi_id;
  530. qlogicpti_mbox_command(qpti, param, 1);
  531. param[0] = MBOX_WRITE_RAM_WORD;
  532. param[1] = 0xff00;
  533. param[2] = (unsigned short) 3;
  534. qlogicpti_mbox_command(qpti, param, 1);
  535. }
  536. spin_unlock_irqrestore(host->host_lock, flags);
  537. return 0;
  538. }
  539. static int qlogicpti_verify_tmon(struct qlogicpti *qpti)
  540. {
  541. int curstat = sbus_readb(qpti->sreg);
  542. curstat &= 0xf0;
  543. if (!(curstat & SREG_FUSE) && (qpti->swsreg & SREG_FUSE))
  544. printk("qlogicpti%d: Fuse returned to normal state.\n", qpti->qpti_id);
  545. if (!(curstat & SREG_TPOWER) && (qpti->swsreg & SREG_TPOWER))
  546. printk("qlogicpti%d: termpwr back to normal state.\n", qpti->qpti_id);
  547. if (curstat != qpti->swsreg) {
  548. int error = 0;
  549. if (curstat & SREG_FUSE) {
  550. error++;
  551. printk("qlogicpti%d: Fuse is open!\n", qpti->qpti_id);
  552. }
  553. if (curstat & SREG_TPOWER) {
  554. error++;
  555. printk("qlogicpti%d: termpwr failure\n", qpti->qpti_id);
  556. }
  557. if (qpti->differential &&
  558. (curstat & SREG_DSENSE) != SREG_DSENSE) {
  559. error++;
  560. printk("qlogicpti%d: You have a single ended device on a "
  561. "differential bus! Please fix!\n", qpti->qpti_id);
  562. }
  563. qpti->swsreg = curstat;
  564. return error;
  565. }
  566. return 0;
  567. }
  568. static irqreturn_t qpti_intr(int irq, void *dev_id);
  569. static void __init qpti_chain_add(struct qlogicpti *qpti)
  570. {
  571. spin_lock_irq(&qptichain_lock);
  572. if (qptichain != NULL) {
  573. struct qlogicpti *qlink = qptichain;
  574. while(qlink->next)
  575. qlink = qlink->next;
  576. qlink->next = qpti;
  577. } else {
  578. qptichain = qpti;
  579. }
  580. qpti->next = NULL;
  581. spin_unlock_irq(&qptichain_lock);
  582. }
  583. static void __init qpti_chain_del(struct qlogicpti *qpti)
  584. {
  585. spin_lock_irq(&qptichain_lock);
  586. if (qptichain == qpti) {
  587. qptichain = qpti->next;
  588. } else {
  589. struct qlogicpti *qlink = qptichain;
  590. while(qlink->next != qpti)
  591. qlink = qlink->next;
  592. qlink->next = qpti->next;
  593. }
  594. qpti->next = NULL;
  595. spin_unlock_irq(&qptichain_lock);
  596. }
  597. static int __init qpti_map_regs(struct qlogicpti *qpti)
  598. {
  599. struct sbus_dev *sdev = qpti->sdev;
  600. qpti->qregs = sbus_ioremap(&sdev->resource[0], 0,
  601. sdev->reg_addrs[0].reg_size,
  602. "PTI Qlogic/ISP");
  603. if (!qpti->qregs) {
  604. printk("PTI: Qlogic/ISP registers are unmappable\n");
  605. return -1;
  606. }
  607. if (qpti->is_pti) {
  608. qpti->sreg = sbus_ioremap(&sdev->resource[0], (16 * 4096),
  609. sizeof(unsigned char),
  610. "PTI Qlogic/ISP statreg");
  611. if (!qpti->sreg) {
  612. printk("PTI: Qlogic/ISP status register is unmappable\n");
  613. return -1;
  614. }
  615. }
  616. return 0;
  617. }
  618. static int __init qpti_register_irq(struct qlogicpti *qpti)
  619. {
  620. struct sbus_dev *sdev = qpti->sdev;
  621. qpti->qhost->irq = qpti->irq = sdev->irqs[0];
  622. /* We used to try various overly-clever things to
  623. * reduce the interrupt processing overhead on
  624. * sun4c/sun4m when multiple PTI's shared the
  625. * same IRQ. It was too complex and messy to
  626. * sanely maintain.
  627. */
  628. if (request_irq(qpti->irq, qpti_intr,
  629. IRQF_SHARED, "Qlogic/PTI", qpti))
  630. goto fail;
  631. printk("qlogicpti%d: IRQ %d ", qpti->qpti_id, qpti->irq);
  632. return 0;
  633. fail:
  634. printk("qlogicpti%d: Cannot acquire irq line\n", qpti->qpti_id);
  635. return -1;
  636. }
  637. static void __init qpti_get_scsi_id(struct qlogicpti *qpti)
  638. {
  639. qpti->scsi_id = prom_getintdefault(qpti->prom_node,
  640. "initiator-id",
  641. -1);
  642. if (qpti->scsi_id == -1)
  643. qpti->scsi_id = prom_getintdefault(qpti->prom_node,
  644. "scsi-initiator-id",
  645. -1);
  646. if (qpti->scsi_id == -1)
  647. qpti->scsi_id =
  648. prom_getintdefault(qpti->sdev->bus->prom_node,
  649. "scsi-initiator-id", 7);
  650. qpti->qhost->this_id = qpti->scsi_id;
  651. qpti->qhost->max_sectors = 64;
  652. printk("SCSI ID %d ", qpti->scsi_id);
  653. }
  654. static void qpti_get_bursts(struct qlogicpti *qpti)
  655. {
  656. struct sbus_dev *sdev = qpti->sdev;
  657. u8 bursts, bmask;
  658. bursts = prom_getintdefault(qpti->prom_node, "burst-sizes", 0xff);
  659. bmask = prom_getintdefault(sdev->bus->prom_node,
  660. "burst-sizes", 0xff);
  661. if (bmask != 0xff)
  662. bursts &= bmask;
  663. if (bursts == 0xff ||
  664. (bursts & DMA_BURST16) == 0 ||
  665. (bursts & DMA_BURST32) == 0)
  666. bursts = (DMA_BURST32 - 1);
  667. qpti->bursts = bursts;
  668. }
  669. static void qpti_get_clock(struct qlogicpti *qpti)
  670. {
  671. unsigned int cfreq;
  672. /* Check for what the clock input to this card is.
  673. * Default to 40Mhz.
  674. */
  675. cfreq = prom_getintdefault(qpti->prom_node,"clock-frequency",40000000);
  676. qpti->clock = (cfreq + 500000)/1000000;
  677. if (qpti->clock == 0) /* bullshit */
  678. qpti->clock = 40;
  679. }
  680. /* The request and response queues must each be aligned
  681. * on a page boundary.
  682. */
  683. static int __init qpti_map_queues(struct qlogicpti *qpti)
  684. {
  685. struct sbus_dev *sdev = qpti->sdev;
  686. #define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
  687. qpti->res_cpu = sbus_alloc_consistent(sdev,
  688. QSIZE(RES_QUEUE_LEN),
  689. &qpti->res_dvma);
  690. if (qpti->res_cpu == NULL ||
  691. qpti->res_dvma == 0) {
  692. printk("QPTI: Cannot map response queue.\n");
  693. return -1;
  694. }
  695. qpti->req_cpu = sbus_alloc_consistent(sdev,
  696. QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
  697. &qpti->req_dvma);
  698. if (qpti->req_cpu == NULL ||
  699. qpti->req_dvma == 0) {
  700. sbus_free_consistent(sdev, QSIZE(RES_QUEUE_LEN),
  701. qpti->res_cpu, qpti->res_dvma);
  702. printk("QPTI: Cannot map request queue.\n");
  703. return -1;
  704. }
  705. memset(qpti->res_cpu, 0, QSIZE(RES_QUEUE_LEN));
  706. memset(qpti->req_cpu, 0, QSIZE(QLOGICPTI_REQ_QUEUE_LEN));
  707. return 0;
  708. }
  709. const char *qlogicpti_info(struct Scsi_Host *host)
  710. {
  711. static char buf[80];
  712. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  713. sprintf(buf, "PTI Qlogic,ISP SBUS SCSI irq %d regs at %p",
  714. qpti->qhost->irq, qpti->qregs);
  715. return buf;
  716. }
  717. /* I am a certified frobtronicist. */
  718. static inline void marker_frob(struct Command_Entry *cmd)
  719. {
  720. struct Marker_Entry *marker = (struct Marker_Entry *) cmd;
  721. memset(marker, 0, sizeof(struct Marker_Entry));
  722. marker->hdr.entry_cnt = 1;
  723. marker->hdr.entry_type = ENTRY_MARKER;
  724. marker->modifier = SYNC_ALL;
  725. marker->rsvd = 0;
  726. }
  727. static inline void cmd_frob(struct Command_Entry *cmd, struct scsi_cmnd *Cmnd,
  728. struct qlogicpti *qpti)
  729. {
  730. memset(cmd, 0, sizeof(struct Command_Entry));
  731. cmd->hdr.entry_cnt = 1;
  732. cmd->hdr.entry_type = ENTRY_COMMAND;
  733. cmd->target_id = Cmnd->device->id;
  734. cmd->target_lun = Cmnd->device->lun;
  735. cmd->cdb_length = Cmnd->cmd_len;
  736. cmd->control_flags = 0;
  737. if (Cmnd->device->tagged_supported) {
  738. if (qpti->cmd_count[Cmnd->device->id] == 0)
  739. qpti->tag_ages[Cmnd->device->id] = jiffies;
  740. if (time_after(jiffies, qpti->tag_ages[Cmnd->device->id] + (5*HZ))) {
  741. cmd->control_flags = CFLAG_ORDERED_TAG;
  742. qpti->tag_ages[Cmnd->device->id] = jiffies;
  743. } else
  744. cmd->control_flags = CFLAG_SIMPLE_TAG;
  745. }
  746. if ((Cmnd->cmnd[0] == WRITE_6) ||
  747. (Cmnd->cmnd[0] == WRITE_10) ||
  748. (Cmnd->cmnd[0] == WRITE_12))
  749. cmd->control_flags |= CFLAG_WRITE;
  750. else
  751. cmd->control_flags |= CFLAG_READ;
  752. cmd->time_out = 30;
  753. memcpy(cmd->cdb, Cmnd->cmnd, Cmnd->cmd_len);
  754. }
  755. /* Do it to it baby. */
  756. static inline int load_cmd(struct scsi_cmnd *Cmnd, struct Command_Entry *cmd,
  757. struct qlogicpti *qpti, u_int in_ptr, u_int out_ptr)
  758. {
  759. struct dataseg *ds;
  760. struct scatterlist *sg;
  761. int i, n;
  762. if (Cmnd->use_sg) {
  763. int sg_count;
  764. sg = (struct scatterlist *) Cmnd->request_buffer;
  765. sg_count = sbus_map_sg(qpti->sdev, sg, Cmnd->use_sg, Cmnd->sc_data_direction);
  766. ds = cmd->dataseg;
  767. cmd->segment_cnt = sg_count;
  768. /* Fill in first four sg entries: */
  769. n = sg_count;
  770. if (n > 4)
  771. n = 4;
  772. for (i = 0; i < n; i++, sg++) {
  773. ds[i].d_base = sg_dma_address(sg);
  774. ds[i].d_count = sg_dma_len(sg);
  775. }
  776. sg_count -= 4;
  777. while (sg_count > 0) {
  778. struct Continuation_Entry *cont;
  779. ++cmd->hdr.entry_cnt;
  780. cont = (struct Continuation_Entry *) &qpti->req_cpu[in_ptr];
  781. in_ptr = NEXT_REQ_PTR(in_ptr);
  782. if (in_ptr == out_ptr)
  783. return -1;
  784. cont->hdr.entry_type = ENTRY_CONTINUATION;
  785. cont->hdr.entry_cnt = 0;
  786. cont->hdr.sys_def_1 = 0;
  787. cont->hdr.flags = 0;
  788. cont->reserved = 0;
  789. ds = cont->dataseg;
  790. n = sg_count;
  791. if (n > 7)
  792. n = 7;
  793. for (i = 0; i < n; i++, sg++) {
  794. ds[i].d_base = sg_dma_address(sg);
  795. ds[i].d_count = sg_dma_len(sg);
  796. }
  797. sg_count -= n;
  798. }
  799. } else if (Cmnd->request_bufflen) {
  800. Cmnd->SCp.ptr = (char *)(unsigned long)
  801. sbus_map_single(qpti->sdev,
  802. Cmnd->request_buffer,
  803. Cmnd->request_bufflen,
  804. Cmnd->sc_data_direction);
  805. cmd->dataseg[0].d_base = (u32) ((unsigned long)Cmnd->SCp.ptr);
  806. cmd->dataseg[0].d_count = Cmnd->request_bufflen;
  807. cmd->segment_cnt = 1;
  808. } else {
  809. cmd->dataseg[0].d_base = 0;
  810. cmd->dataseg[0].d_count = 0;
  811. cmd->segment_cnt = 1; /* Shouldn't this be 0? */
  812. }
  813. /* Committed, record Scsi_Cmd so we can find it later. */
  814. cmd->handle = in_ptr;
  815. qpti->cmd_slots[in_ptr] = Cmnd;
  816. qpti->cmd_count[Cmnd->device->id]++;
  817. sbus_writew(in_ptr, qpti->qregs + MBOX4);
  818. qpti->req_in_ptr = in_ptr;
  819. return in_ptr;
  820. }
  821. static inline void update_can_queue(struct Scsi_Host *host, u_int in_ptr, u_int out_ptr)
  822. {
  823. /* Temporary workaround until bug is found and fixed (one bug has been found
  824. already, but fixing it makes things even worse) -jj */
  825. int num_free = QLOGICPTI_REQ_QUEUE_LEN - REQ_QUEUE_DEPTH(in_ptr, out_ptr) - 64;
  826. host->can_queue = host->host_busy + num_free;
  827. host->sg_tablesize = QLOGICPTI_MAX_SG(num_free);
  828. }
  829. static unsigned int scsi_rbuf_get(struct scsi_cmnd *cmd, unsigned char **buf_out)
  830. {
  831. unsigned char *buf;
  832. unsigned int buflen;
  833. if (cmd->use_sg) {
  834. struct scatterlist *sg;
  835. sg = (struct scatterlist *) cmd->request_buffer;
  836. buf = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
  837. buflen = sg->length;
  838. } else {
  839. buf = cmd->request_buffer;
  840. buflen = cmd->request_bufflen;
  841. }
  842. *buf_out = buf;
  843. return buflen;
  844. }
  845. static void scsi_rbuf_put(struct scsi_cmnd *cmd, unsigned char *buf)
  846. {
  847. if (cmd->use_sg) {
  848. struct scatterlist *sg;
  849. sg = (struct scatterlist *) cmd->request_buffer;
  850. kunmap_atomic(buf - sg->offset, KM_IRQ0);
  851. }
  852. }
  853. /*
  854. * Until we scan the entire bus with inquiries, go throught this fella...
  855. */
  856. static void ourdone(struct scsi_cmnd *Cmnd)
  857. {
  858. struct qlogicpti *qpti = (struct qlogicpti *) Cmnd->device->host->hostdata;
  859. int tgt = Cmnd->device->id;
  860. void (*done) (struct scsi_cmnd *);
  861. /* This grot added by DaveM, blame him for ugliness.
  862. * The issue is that in the 2.3.x driver we use the
  863. * host_scribble portion of the scsi command as a
  864. * completion linked list at interrupt service time,
  865. * so we have to store the done function pointer elsewhere.
  866. */
  867. done = (void (*)(struct scsi_cmnd *))
  868. (((unsigned long) Cmnd->SCp.Message)
  869. #ifdef __sparc_v9__
  870. | ((unsigned long) Cmnd->SCp.Status << 32UL)
  871. #endif
  872. );
  873. if ((qpti->sbits & (1 << tgt)) == 0) {
  874. int ok = host_byte(Cmnd->result) == DID_OK;
  875. if (Cmnd->cmnd[0] == 0x12 && ok) {
  876. unsigned char *iqd;
  877. unsigned int iqd_len;
  878. iqd_len = scsi_rbuf_get(Cmnd, &iqd);
  879. /* tags handled in midlayer */
  880. /* enable sync mode? */
  881. if (iqd[7] & 0x10) {
  882. qpti->dev_param[tgt].device_flags |= 0x10;
  883. } else {
  884. qpti->dev_param[tgt].synchronous_offset = 0;
  885. qpti->dev_param[tgt].synchronous_period = 0;
  886. }
  887. /* are we wide capable? */
  888. if (iqd[7] & 0x20) {
  889. qpti->dev_param[tgt].device_flags |= 0x20;
  890. }
  891. scsi_rbuf_put(Cmnd, iqd);
  892. qpti->sbits |= (1 << tgt);
  893. } else if (!ok) {
  894. qpti->sbits |= (1 << tgt);
  895. }
  896. }
  897. done(Cmnd);
  898. }
  899. static int qlogicpti_queuecommand(struct scsi_cmnd *Cmnd, void (*done)(struct scsi_cmnd *));
  900. static int qlogicpti_queuecommand_slow(struct scsi_cmnd *Cmnd,
  901. void (*done)(struct scsi_cmnd *))
  902. {
  903. struct qlogicpti *qpti = (struct qlogicpti *) Cmnd->device->host->hostdata;
  904. /*
  905. * done checking this host adapter?
  906. * If not, then rewrite the command
  907. * to finish through ourdone so we
  908. * can peek at Inquiry data results.
  909. */
  910. if (qpti->sbits && qpti->sbits != 0xffff) {
  911. /* See above about in ourdone this ugliness... */
  912. Cmnd->SCp.Message = ((unsigned long)done) & 0xffffffff;
  913. #ifdef CONFIG_SPARC64
  914. Cmnd->SCp.Status = ((unsigned long)done >> 32UL) & 0xffffffff;
  915. #endif
  916. return qlogicpti_queuecommand(Cmnd, ourdone);
  917. }
  918. /*
  919. * We've peeked at all targets for this bus- time
  920. * to set parameters for devices for real now.
  921. */
  922. if (qpti->sbits == 0xffff) {
  923. int i;
  924. for(i = 0; i < MAX_TARGETS; i++) {
  925. u_short param[6];
  926. param[0] = MBOX_SET_TARGET_PARAMS;
  927. param[1] = (i << 8);
  928. param[2] = (qpti->dev_param[i].device_flags << 8);
  929. if (qpti->dev_param[i].device_flags & 0x10) {
  930. param[3] = (qpti->dev_param[i].synchronous_offset << 8) |
  931. qpti->dev_param[i].synchronous_period;
  932. } else {
  933. param[3] = 0;
  934. }
  935. (void) qlogicpti_mbox_command(qpti, param, 0);
  936. }
  937. /*
  938. * set to zero so any traverse through ourdone
  939. * doesn't start the whole process again,
  940. */
  941. qpti->sbits = 0;
  942. }
  943. /* check to see if we're done with all adapters... */
  944. for (qpti = qptichain; qpti != NULL; qpti = qpti->next) {
  945. if (qpti->sbits) {
  946. break;
  947. }
  948. }
  949. /*
  950. * if we hit the end of the chain w/o finding adapters still
  951. * capability-configuring, then we're done with all adapters
  952. * and can rock on..
  953. */
  954. if (qpti == NULL)
  955. Cmnd->device->host->hostt->queuecommand = qlogicpti_queuecommand;
  956. return qlogicpti_queuecommand(Cmnd, done);
  957. }
  958. /*
  959. * The middle SCSI layer ensures that queuecommand never gets invoked
  960. * concurrently with itself or the interrupt handler (though the
  961. * interrupt handler may call this routine as part of
  962. * request-completion handling).
  963. *
  964. * "This code must fly." -davem
  965. */
  966. static int qlogicpti_queuecommand(struct scsi_cmnd *Cmnd, void (*done)(struct scsi_cmnd *))
  967. {
  968. struct Scsi_Host *host = Cmnd->device->host;
  969. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  970. struct Command_Entry *cmd;
  971. u_int out_ptr;
  972. int in_ptr;
  973. Cmnd->scsi_done = done;
  974. in_ptr = qpti->req_in_ptr;
  975. cmd = (struct Command_Entry *) &qpti->req_cpu[in_ptr];
  976. out_ptr = sbus_readw(qpti->qregs + MBOX4);
  977. in_ptr = NEXT_REQ_PTR(in_ptr);
  978. if (in_ptr == out_ptr)
  979. goto toss_command;
  980. if (qpti->send_marker) {
  981. marker_frob(cmd);
  982. qpti->send_marker = 0;
  983. if (NEXT_REQ_PTR(in_ptr) == out_ptr) {
  984. sbus_writew(in_ptr, qpti->qregs + MBOX4);
  985. qpti->req_in_ptr = in_ptr;
  986. goto toss_command;
  987. }
  988. cmd = (struct Command_Entry *) &qpti->req_cpu[in_ptr];
  989. in_ptr = NEXT_REQ_PTR(in_ptr);
  990. }
  991. cmd_frob(cmd, Cmnd, qpti);
  992. if ((in_ptr = load_cmd(Cmnd, cmd, qpti, in_ptr, out_ptr)) == -1)
  993. goto toss_command;
  994. update_can_queue(host, in_ptr, out_ptr);
  995. return 0;
  996. toss_command:
  997. printk(KERN_EMERG "qlogicpti%d: request queue overflow\n",
  998. qpti->qpti_id);
  999. /* Unfortunately, unless you use the new EH code, which
  1000. * we don't, the midlayer will ignore the return value,
  1001. * which is insane. We pick up the pieces like this.
  1002. */
  1003. Cmnd->result = DID_BUS_BUSY;
  1004. done(Cmnd);
  1005. return 1;
  1006. }
  1007. static int qlogicpti_return_status(struct Status_Entry *sts, int id)
  1008. {
  1009. int host_status = DID_ERROR;
  1010. switch (sts->completion_status) {
  1011. case CS_COMPLETE:
  1012. host_status = DID_OK;
  1013. break;
  1014. case CS_INCOMPLETE:
  1015. if (!(sts->state_flags & SF_GOT_BUS))
  1016. host_status = DID_NO_CONNECT;
  1017. else if (!(sts->state_flags & SF_GOT_TARGET))
  1018. host_status = DID_BAD_TARGET;
  1019. else if (!(sts->state_flags & SF_SENT_CDB))
  1020. host_status = DID_ERROR;
  1021. else if (!(sts->state_flags & SF_TRANSFERRED_DATA))
  1022. host_status = DID_ERROR;
  1023. else if (!(sts->state_flags & SF_GOT_STATUS))
  1024. host_status = DID_ERROR;
  1025. else if (!(sts->state_flags & SF_GOT_SENSE))
  1026. host_status = DID_ERROR;
  1027. break;
  1028. case CS_DMA_ERROR:
  1029. case CS_TRANSPORT_ERROR:
  1030. host_status = DID_ERROR;
  1031. break;
  1032. case CS_RESET_OCCURRED:
  1033. case CS_BUS_RESET:
  1034. host_status = DID_RESET;
  1035. break;
  1036. case CS_ABORTED:
  1037. host_status = DID_ABORT;
  1038. break;
  1039. case CS_TIMEOUT:
  1040. host_status = DID_TIME_OUT;
  1041. break;
  1042. case CS_DATA_OVERRUN:
  1043. case CS_COMMAND_OVERRUN:
  1044. case CS_STATUS_OVERRUN:
  1045. case CS_BAD_MESSAGE:
  1046. case CS_NO_MESSAGE_OUT:
  1047. case CS_EXT_ID_FAILED:
  1048. case CS_IDE_MSG_FAILED:
  1049. case CS_ABORT_MSG_FAILED:
  1050. case CS_NOP_MSG_FAILED:
  1051. case CS_PARITY_ERROR_MSG_FAILED:
  1052. case CS_DEVICE_RESET_MSG_FAILED:
  1053. case CS_ID_MSG_FAILED:
  1054. case CS_UNEXP_BUS_FREE:
  1055. host_status = DID_ERROR;
  1056. break;
  1057. case CS_DATA_UNDERRUN:
  1058. host_status = DID_OK;
  1059. break;
  1060. default:
  1061. printk(KERN_EMERG "qlogicpti%d: unknown completion status 0x%04x\n",
  1062. id, sts->completion_status);
  1063. host_status = DID_ERROR;
  1064. break;
  1065. }
  1066. return (sts->scsi_status & STATUS_MASK) | (host_status << 16);
  1067. }
  1068. static struct scsi_cmnd *qlogicpti_intr_handler(struct qlogicpti *qpti)
  1069. {
  1070. struct scsi_cmnd *Cmnd, *done_queue = NULL;
  1071. struct Status_Entry *sts;
  1072. u_int in_ptr, out_ptr;
  1073. if (!(sbus_readw(qpti->qregs + SBUS_STAT) & SBUS_STAT_RINT))
  1074. return NULL;
  1075. in_ptr = sbus_readw(qpti->qregs + MBOX5);
  1076. sbus_writew(HCCTRL_CRIRQ, qpti->qregs + HCCTRL);
  1077. if (sbus_readw(qpti->qregs + SBUS_SEMAPHORE) & SBUS_SEMAPHORE_LCK) {
  1078. switch (sbus_readw(qpti->qregs + MBOX0)) {
  1079. case ASYNC_SCSI_BUS_RESET:
  1080. case EXECUTION_TIMEOUT_RESET:
  1081. qpti->send_marker = 1;
  1082. break;
  1083. case INVALID_COMMAND:
  1084. case HOST_INTERFACE_ERROR:
  1085. case COMMAND_ERROR:
  1086. case COMMAND_PARAM_ERROR:
  1087. break;
  1088. };
  1089. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  1090. }
  1091. /* This looks like a network driver! */
  1092. out_ptr = qpti->res_out_ptr;
  1093. while (out_ptr != in_ptr) {
  1094. u_int cmd_slot;
  1095. sts = (struct Status_Entry *) &qpti->res_cpu[out_ptr];
  1096. out_ptr = NEXT_RES_PTR(out_ptr);
  1097. /* We store an index in the handle, not the pointer in
  1098. * some form. This avoids problems due to the fact
  1099. * that the handle provided is only 32-bits. -DaveM
  1100. */
  1101. cmd_slot = sts->handle;
  1102. Cmnd = qpti->cmd_slots[cmd_slot];
  1103. qpti->cmd_slots[cmd_slot] = NULL;
  1104. if (sts->completion_status == CS_RESET_OCCURRED ||
  1105. sts->completion_status == CS_ABORTED ||
  1106. (sts->status_flags & STF_BUS_RESET))
  1107. qpti->send_marker = 1;
  1108. if (sts->state_flags & SF_GOT_SENSE)
  1109. memcpy(Cmnd->sense_buffer, sts->req_sense_data,
  1110. sizeof(Cmnd->sense_buffer));
  1111. if (sts->hdr.entry_type == ENTRY_STATUS)
  1112. Cmnd->result =
  1113. qlogicpti_return_status(sts, qpti->qpti_id);
  1114. else
  1115. Cmnd->result = DID_ERROR << 16;
  1116. if (Cmnd->use_sg) {
  1117. sbus_unmap_sg(qpti->sdev,
  1118. (struct scatterlist *)Cmnd->request_buffer,
  1119. Cmnd->use_sg,
  1120. Cmnd->sc_data_direction);
  1121. } else if (Cmnd->request_bufflen) {
  1122. sbus_unmap_single(qpti->sdev,
  1123. (__u32)((unsigned long)Cmnd->SCp.ptr),
  1124. Cmnd->request_bufflen,
  1125. Cmnd->sc_data_direction);
  1126. }
  1127. qpti->cmd_count[Cmnd->device->id]--;
  1128. sbus_writew(out_ptr, qpti->qregs + MBOX5);
  1129. Cmnd->host_scribble = (unsigned char *) done_queue;
  1130. done_queue = Cmnd;
  1131. }
  1132. qpti->res_out_ptr = out_ptr;
  1133. return done_queue;
  1134. }
  1135. static irqreturn_t qpti_intr(int irq, void *dev_id)
  1136. {
  1137. struct qlogicpti *qpti = dev_id;
  1138. unsigned long flags;
  1139. struct scsi_cmnd *dq;
  1140. spin_lock_irqsave(qpti->qhost->host_lock, flags);
  1141. dq = qlogicpti_intr_handler(qpti);
  1142. if (dq != NULL) {
  1143. do {
  1144. struct scsi_cmnd *next;
  1145. next = (struct scsi_cmnd *) dq->host_scribble;
  1146. dq->scsi_done(dq);
  1147. dq = next;
  1148. } while (dq != NULL);
  1149. }
  1150. spin_unlock_irqrestore(qpti->qhost->host_lock, flags);
  1151. return IRQ_HANDLED;
  1152. }
  1153. static int qlogicpti_abort(struct scsi_cmnd *Cmnd)
  1154. {
  1155. u_short param[6];
  1156. struct Scsi_Host *host = Cmnd->device->host;
  1157. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  1158. int return_status = SUCCESS;
  1159. u32 cmd_cookie;
  1160. int i;
  1161. printk(KERN_WARNING "qlogicpti%d: Aborting cmd for tgt[%d] lun[%d]\n",
  1162. qpti->qpti_id, (int)Cmnd->device->id, (int)Cmnd->device->lun);
  1163. qlogicpti_disable_irqs(qpti);
  1164. /* Find the 32-bit cookie we gave to the firmware for
  1165. * this command.
  1166. */
  1167. for (i = 0; i < QLOGICPTI_REQ_QUEUE_LEN + 1; i++)
  1168. if (qpti->cmd_slots[i] == Cmnd)
  1169. break;
  1170. cmd_cookie = i;
  1171. param[0] = MBOX_ABORT;
  1172. param[1] = (((u_short) Cmnd->device->id) << 8) | Cmnd->device->lun;
  1173. param[2] = cmd_cookie >> 16;
  1174. param[3] = cmd_cookie & 0xffff;
  1175. if (qlogicpti_mbox_command(qpti, param, 0) ||
  1176. (param[0] != MBOX_COMMAND_COMPLETE)) {
  1177. printk(KERN_EMERG "qlogicpti%d: scsi abort failure: %x\n",
  1178. qpti->qpti_id, param[0]);
  1179. return_status = FAILED;
  1180. }
  1181. qlogicpti_enable_irqs(qpti);
  1182. return return_status;
  1183. }
  1184. static int qlogicpti_reset(struct scsi_cmnd *Cmnd)
  1185. {
  1186. u_short param[6];
  1187. struct Scsi_Host *host = Cmnd->device->host;
  1188. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  1189. int return_status = SUCCESS;
  1190. printk(KERN_WARNING "qlogicpti%d: Resetting SCSI bus!\n",
  1191. qpti->qpti_id);
  1192. qlogicpti_disable_irqs(qpti);
  1193. param[0] = MBOX_BUS_RESET;
  1194. param[1] = qpti->host_param.bus_reset_delay;
  1195. if (qlogicpti_mbox_command(qpti, param, 0) ||
  1196. (param[0] != MBOX_COMMAND_COMPLETE)) {
  1197. printk(KERN_EMERG "qlogicisp%d: scsi bus reset failure: %x\n",
  1198. qpti->qpti_id, param[0]);
  1199. return_status = FAILED;
  1200. }
  1201. qlogicpti_enable_irqs(qpti);
  1202. return return_status;
  1203. }
  1204. static struct scsi_host_template qpti_template = {
  1205. .module = THIS_MODULE,
  1206. .name = "qlogicpti",
  1207. .info = qlogicpti_info,
  1208. .queuecommand = qlogicpti_queuecommand_slow,
  1209. .eh_abort_handler = qlogicpti_abort,
  1210. .eh_bus_reset_handler = qlogicpti_reset,
  1211. .can_queue = QLOGICPTI_REQ_QUEUE_LEN,
  1212. .this_id = 7,
  1213. .sg_tablesize = QLOGICPTI_MAX_SG(QLOGICPTI_REQ_QUEUE_LEN),
  1214. .cmd_per_lun = 1,
  1215. .use_clustering = ENABLE_CLUSTERING,
  1216. };
  1217. static int __devinit qpti_sbus_probe(struct of_device *dev, const struct of_device_id *match)
  1218. {
  1219. static int nqptis;
  1220. struct sbus_dev *sdev = to_sbus_device(&dev->dev);
  1221. struct device_node *dp = dev->node;
  1222. struct scsi_host_template *tpnt = match->data;
  1223. struct Scsi_Host *host;
  1224. struct qlogicpti *qpti;
  1225. const char *fcode;
  1226. /* Sometimes Antares cards come up not completely
  1227. * setup, and we get a report of a zero IRQ.
  1228. */
  1229. if (sdev->irqs[0] == 0)
  1230. return -ENODEV;
  1231. host = scsi_host_alloc(tpnt, sizeof(struct qlogicpti));
  1232. if (!host)
  1233. return -ENOMEM;
  1234. qpti = (struct qlogicpti *) host->hostdata;
  1235. host->max_id = MAX_TARGETS;
  1236. qpti->qhost = host;
  1237. qpti->sdev = sdev;
  1238. qpti->qpti_id = nqptis;
  1239. qpti->prom_node = sdev->prom_node;
  1240. strcpy(qpti->prom_name, sdev->ofdev.node->name);
  1241. qpti->is_pti = strcmp(qpti->prom_name, "QLGC,isp");
  1242. if (qpti_map_regs(qpti) < 0)
  1243. goto fail_unlink;
  1244. if (qpti_register_irq(qpti) < 0)
  1245. goto fail_unmap_regs;
  1246. qpti_get_scsi_id(qpti);
  1247. qpti_get_bursts(qpti);
  1248. qpti_get_clock(qpti);
  1249. /* Clear out scsi_cmnd array. */
  1250. memset(qpti->cmd_slots, 0, sizeof(qpti->cmd_slots));
  1251. if (qpti_map_queues(qpti) < 0)
  1252. goto fail_free_irq;
  1253. /* Load the firmware. */
  1254. if (qlogicpti_load_firmware(qpti))
  1255. goto fail_unmap_queues;
  1256. if (qpti->is_pti) {
  1257. /* Check the PTI status reg. */
  1258. if (qlogicpti_verify_tmon(qpti))
  1259. goto fail_unmap_queues;
  1260. }
  1261. /* Reset the ISP and init res/req queues. */
  1262. if (qlogicpti_reset_hardware(host))
  1263. goto fail_unmap_queues;
  1264. printk("(Firmware v%d.%d.%d)", qpti->fware_majrev,
  1265. qpti->fware_minrev, qpti->fware_micrev);
  1266. fcode = of_get_property(dp, "isp-fcode", NULL);
  1267. if (fcode && fcode[0])
  1268. printk("(FCode %s)", fcode);
  1269. if (of_find_property(dp, "differential", NULL) != NULL)
  1270. qpti->differential = 1;
  1271. printk("\nqlogicpti%d: [%s Wide, using %s interface]\n",
  1272. qpti->qpti_id,
  1273. (qpti->ultra ? "Ultra" : "Fast"),
  1274. (qpti->differential ? "differential" : "single ended"));
  1275. if (scsi_add_host(host, &dev->dev)) {
  1276. printk("qlogicpti%d: Failed scsi_add_host\n", qpti->qpti_id);
  1277. goto fail_unmap_queues;
  1278. }
  1279. dev_set_drvdata(&sdev->ofdev.dev, qpti);
  1280. qpti_chain_add(qpti);
  1281. scsi_scan_host(host);
  1282. nqptis++;
  1283. return 0;
  1284. fail_unmap_queues:
  1285. #define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
  1286. sbus_free_consistent(qpti->sdev,
  1287. QSIZE(RES_QUEUE_LEN),
  1288. qpti->res_cpu, qpti->res_dvma);
  1289. sbus_free_consistent(qpti->sdev,
  1290. QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
  1291. qpti->req_cpu, qpti->req_dvma);
  1292. #undef QSIZE
  1293. fail_unmap_regs:
  1294. sbus_iounmap(qpti->qregs,
  1295. qpti->sdev->reg_addrs[0].reg_size);
  1296. if (qpti->is_pti)
  1297. sbus_iounmap(qpti->sreg, sizeof(unsigned char));
  1298. fail_free_irq:
  1299. free_irq(qpti->irq, qpti);
  1300. fail_unlink:
  1301. scsi_host_put(host);
  1302. return -ENODEV;
  1303. }
  1304. static int __devexit qpti_sbus_remove(struct of_device *dev)
  1305. {
  1306. struct qlogicpti *qpti = dev_get_drvdata(&dev->dev);
  1307. qpti_chain_del(qpti);
  1308. scsi_remove_host(qpti->qhost);
  1309. /* Shut up the card. */
  1310. sbus_writew(0, qpti->qregs + SBUS_CTRL);
  1311. /* Free IRQ handler and unmap Qlogic,ISP and PTI status regs. */
  1312. free_irq(qpti->irq, qpti);
  1313. #define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
  1314. sbus_free_consistent(qpti->sdev,
  1315. QSIZE(RES_QUEUE_LEN),
  1316. qpti->res_cpu, qpti->res_dvma);
  1317. sbus_free_consistent(qpti->sdev,
  1318. QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
  1319. qpti->req_cpu, qpti->req_dvma);
  1320. #undef QSIZE
  1321. sbus_iounmap(qpti->qregs, qpti->sdev->reg_addrs[0].reg_size);
  1322. if (qpti->is_pti)
  1323. sbus_iounmap(qpti->sreg, sizeof(unsigned char));
  1324. scsi_host_put(qpti->qhost);
  1325. return 0;
  1326. }
  1327. static struct of_device_id qpti_match[] = {
  1328. {
  1329. .name = "ptisp",
  1330. .data = &qpti_template,
  1331. },
  1332. {
  1333. .name = "PTI,ptisp",
  1334. .data = &qpti_template,
  1335. },
  1336. {
  1337. .name = "QLGC,isp",
  1338. .data = &qpti_template,
  1339. },
  1340. {
  1341. .name = "SUNW,isp",
  1342. .data = &qpti_template,
  1343. },
  1344. {},
  1345. };
  1346. MODULE_DEVICE_TABLE(of, qpti_match);
  1347. static struct of_platform_driver qpti_sbus_driver = {
  1348. .name = "qpti",
  1349. .match_table = qpti_match,
  1350. .probe = qpti_sbus_probe,
  1351. .remove = __devexit_p(qpti_sbus_remove),
  1352. };
  1353. static int __init qpti_init(void)
  1354. {
  1355. return of_register_driver(&qpti_sbus_driver, &sbus_bus_type);
  1356. }
  1357. static void __exit qpti_exit(void)
  1358. {
  1359. of_unregister_driver(&qpti_sbus_driver);
  1360. }
  1361. MODULE_DESCRIPTION("QlogicISP SBUS driver");
  1362. MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
  1363. MODULE_LICENSE("GPL");
  1364. MODULE_VERSION("2.0");
  1365. module_init(qpti_init);
  1366. module_exit(qpti_exit);