lpfc_sli.c 104 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2007 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. #include "lpfc_debugfs.h"
  39. /*
  40. * Define macro to log: Mailbox command x%x cannot issue Data
  41. * This allows multiple uses of lpfc_msgBlk0311
  42. * w/o perturbing log msg utility.
  43. */
  44. #define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
  45. lpfc_printf_log(phba, \
  46. KERN_INFO, \
  47. LOG_MBOX | LOG_SLI, \
  48. "(%d):0311 Mailbox command x%x cannot " \
  49. "issue Data: x%x x%x x%x\n", \
  50. pmbox->vport ? pmbox->vport->vpi : 0, \
  51. pmbox->mb.mbxCommand, \
  52. phba->pport->port_state, \
  53. psli->sli_flag, \
  54. flag)
  55. /* There are only four IOCB completion types. */
  56. typedef enum _lpfc_iocb_type {
  57. LPFC_UNKNOWN_IOCB,
  58. LPFC_UNSOL_IOCB,
  59. LPFC_SOL_IOCB,
  60. LPFC_ABORT_IOCB
  61. } lpfc_iocb_type;
  62. /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
  63. * to the start of the ring, and the slot number of the
  64. * desired iocb entry, calc a pointer to that entry.
  65. */
  66. static inline IOCB_t *
  67. lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  68. {
  69. return (IOCB_t *) (((char *) pring->cmdringaddr) +
  70. pring->cmdidx * phba->iocb_cmd_size);
  71. }
  72. static inline IOCB_t *
  73. lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  74. {
  75. return (IOCB_t *) (((char *) pring->rspringaddr) +
  76. pring->rspidx * phba->iocb_rsp_size);
  77. }
  78. static struct lpfc_iocbq *
  79. __lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  80. {
  81. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  82. struct lpfc_iocbq * iocbq = NULL;
  83. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  84. return iocbq;
  85. }
  86. struct lpfc_iocbq *
  87. lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  88. {
  89. struct lpfc_iocbq * iocbq = NULL;
  90. unsigned long iflags;
  91. spin_lock_irqsave(&phba->hbalock, iflags);
  92. iocbq = __lpfc_sli_get_iocbq(phba);
  93. spin_unlock_irqrestore(&phba->hbalock, iflags);
  94. return iocbq;
  95. }
  96. void
  97. __lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  98. {
  99. size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
  100. /*
  101. * Clean all volatile data fields, preserve iotag and node struct.
  102. */
  103. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  104. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  105. }
  106. void
  107. lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  108. {
  109. unsigned long iflags;
  110. /*
  111. * Clean all volatile data fields, preserve iotag and node struct.
  112. */
  113. spin_lock_irqsave(&phba->hbalock, iflags);
  114. __lpfc_sli_release_iocbq(phba, iocbq);
  115. spin_unlock_irqrestore(&phba->hbalock, iflags);
  116. }
  117. /*
  118. * Translate the iocb command to an iocb command type used to decide the final
  119. * disposition of each completed IOCB.
  120. */
  121. static lpfc_iocb_type
  122. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  123. {
  124. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  125. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  126. return 0;
  127. switch (iocb_cmnd) {
  128. case CMD_XMIT_SEQUENCE_CR:
  129. case CMD_XMIT_SEQUENCE_CX:
  130. case CMD_XMIT_BCAST_CN:
  131. case CMD_XMIT_BCAST_CX:
  132. case CMD_ELS_REQUEST_CR:
  133. case CMD_ELS_REQUEST_CX:
  134. case CMD_CREATE_XRI_CR:
  135. case CMD_CREATE_XRI_CX:
  136. case CMD_GET_RPI_CN:
  137. case CMD_XMIT_ELS_RSP_CX:
  138. case CMD_GET_RPI_CR:
  139. case CMD_FCP_IWRITE_CR:
  140. case CMD_FCP_IWRITE_CX:
  141. case CMD_FCP_IREAD_CR:
  142. case CMD_FCP_IREAD_CX:
  143. case CMD_FCP_ICMND_CR:
  144. case CMD_FCP_ICMND_CX:
  145. case CMD_FCP_TSEND_CX:
  146. case CMD_FCP_TRSP_CX:
  147. case CMD_FCP_TRECEIVE_CX:
  148. case CMD_FCP_AUTO_TRSP_CX:
  149. case CMD_ADAPTER_MSG:
  150. case CMD_ADAPTER_DUMP:
  151. case CMD_XMIT_SEQUENCE64_CR:
  152. case CMD_XMIT_SEQUENCE64_CX:
  153. case CMD_XMIT_BCAST64_CN:
  154. case CMD_XMIT_BCAST64_CX:
  155. case CMD_ELS_REQUEST64_CR:
  156. case CMD_ELS_REQUEST64_CX:
  157. case CMD_FCP_IWRITE64_CR:
  158. case CMD_FCP_IWRITE64_CX:
  159. case CMD_FCP_IREAD64_CR:
  160. case CMD_FCP_IREAD64_CX:
  161. case CMD_FCP_ICMND64_CR:
  162. case CMD_FCP_ICMND64_CX:
  163. case CMD_FCP_TSEND64_CX:
  164. case CMD_FCP_TRSP64_CX:
  165. case CMD_FCP_TRECEIVE64_CX:
  166. case CMD_GEN_REQUEST64_CR:
  167. case CMD_GEN_REQUEST64_CX:
  168. case CMD_XMIT_ELS_RSP64_CX:
  169. type = LPFC_SOL_IOCB;
  170. break;
  171. case CMD_ABORT_XRI_CN:
  172. case CMD_ABORT_XRI_CX:
  173. case CMD_CLOSE_XRI_CN:
  174. case CMD_CLOSE_XRI_CX:
  175. case CMD_XRI_ABORTED_CX:
  176. case CMD_ABORT_MXRI64_CN:
  177. type = LPFC_ABORT_IOCB;
  178. break;
  179. case CMD_RCV_SEQUENCE_CX:
  180. case CMD_RCV_ELS_REQ_CX:
  181. case CMD_RCV_SEQUENCE64_CX:
  182. case CMD_RCV_ELS_REQ64_CX:
  183. case CMD_IOCB_RCV_SEQ64_CX:
  184. case CMD_IOCB_RCV_ELS64_CX:
  185. case CMD_IOCB_RCV_CONT64_CX:
  186. type = LPFC_UNSOL_IOCB;
  187. break;
  188. default:
  189. type = LPFC_UNKNOWN_IOCB;
  190. break;
  191. }
  192. return type;
  193. }
  194. static int
  195. lpfc_sli_ring_map(struct lpfc_hba *phba)
  196. {
  197. struct lpfc_sli *psli = &phba->sli;
  198. LPFC_MBOXQ_t *pmb;
  199. MAILBOX_t *pmbox;
  200. int i, rc, ret = 0;
  201. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  202. if (!pmb)
  203. return -ENOMEM;
  204. pmbox = &pmb->mb;
  205. phba->link_state = LPFC_INIT_MBX_CMDS;
  206. for (i = 0; i < psli->num_rings; i++) {
  207. lpfc_config_ring(phba, i, pmb);
  208. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  209. if (rc != MBX_SUCCESS) {
  210. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  211. "0446 Adapter failed to init (%d), "
  212. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  213. "ring %d\n",
  214. rc, pmbox->mbxCommand,
  215. pmbox->mbxStatus, i);
  216. phba->link_state = LPFC_HBA_ERROR;
  217. ret = -ENXIO;
  218. break;
  219. }
  220. }
  221. mempool_free(pmb, phba->mbox_mem_pool);
  222. return ret;
  223. }
  224. static int
  225. lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  226. struct lpfc_iocbq *piocb)
  227. {
  228. list_add_tail(&piocb->list, &pring->txcmplq);
  229. pring->txcmplq_cnt++;
  230. if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
  231. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  232. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  233. if (!piocb->vport)
  234. BUG();
  235. else
  236. mod_timer(&piocb->vport->els_tmofunc,
  237. jiffies + HZ * (phba->fc_ratov << 1));
  238. }
  239. return 0;
  240. }
  241. static struct lpfc_iocbq *
  242. lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  243. {
  244. struct lpfc_iocbq *cmd_iocb;
  245. list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
  246. if (cmd_iocb != NULL)
  247. pring->txq_cnt--;
  248. return cmd_iocb;
  249. }
  250. static IOCB_t *
  251. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  252. {
  253. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  254. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  255. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  256. uint32_t max_cmd_idx = pring->numCiocb;
  257. if ((pring->next_cmdidx == pring->cmdidx) &&
  258. (++pring->next_cmdidx >= max_cmd_idx))
  259. pring->next_cmdidx = 0;
  260. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  261. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  262. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  263. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  264. "0315 Ring %d issue: portCmdGet %d "
  265. "is bigger then cmd ring %d\n",
  266. pring->ringno,
  267. pring->local_getidx, max_cmd_idx);
  268. phba->link_state = LPFC_HBA_ERROR;
  269. /*
  270. * All error attention handlers are posted to
  271. * worker thread
  272. */
  273. phba->work_ha |= HA_ERATT;
  274. phba->work_hs = HS_FFER3;
  275. /* hbalock should already be held */
  276. if (phba->work_wait)
  277. lpfc_worker_wake_up(phba);
  278. return NULL;
  279. }
  280. if (pring->local_getidx == pring->next_cmdidx)
  281. return NULL;
  282. }
  283. return lpfc_cmd_iocb(phba, pring);
  284. }
  285. uint16_t
  286. lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  287. {
  288. struct lpfc_iocbq **new_arr;
  289. struct lpfc_iocbq **old_arr;
  290. size_t new_len;
  291. struct lpfc_sli *psli = &phba->sli;
  292. uint16_t iotag;
  293. spin_lock_irq(&phba->hbalock);
  294. iotag = psli->last_iotag;
  295. if(++iotag < psli->iocbq_lookup_len) {
  296. psli->last_iotag = iotag;
  297. psli->iocbq_lookup[iotag] = iocbq;
  298. spin_unlock_irq(&phba->hbalock);
  299. iocbq->iotag = iotag;
  300. return iotag;
  301. } else if (psli->iocbq_lookup_len < (0xffff
  302. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  303. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  304. spin_unlock_irq(&phba->hbalock);
  305. new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
  306. GFP_KERNEL);
  307. if (new_arr) {
  308. spin_lock_irq(&phba->hbalock);
  309. old_arr = psli->iocbq_lookup;
  310. if (new_len <= psli->iocbq_lookup_len) {
  311. /* highly unprobable case */
  312. kfree(new_arr);
  313. iotag = psli->last_iotag;
  314. if(++iotag < psli->iocbq_lookup_len) {
  315. psli->last_iotag = iotag;
  316. psli->iocbq_lookup[iotag] = iocbq;
  317. spin_unlock_irq(&phba->hbalock);
  318. iocbq->iotag = iotag;
  319. return iotag;
  320. }
  321. spin_unlock_irq(&phba->hbalock);
  322. return 0;
  323. }
  324. if (psli->iocbq_lookup)
  325. memcpy(new_arr, old_arr,
  326. ((psli->last_iotag + 1) *
  327. sizeof (struct lpfc_iocbq *)));
  328. psli->iocbq_lookup = new_arr;
  329. psli->iocbq_lookup_len = new_len;
  330. psli->last_iotag = iotag;
  331. psli->iocbq_lookup[iotag] = iocbq;
  332. spin_unlock_irq(&phba->hbalock);
  333. iocbq->iotag = iotag;
  334. kfree(old_arr);
  335. return iotag;
  336. }
  337. } else
  338. spin_unlock_irq(&phba->hbalock);
  339. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  340. "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  341. psli->last_iotag);
  342. return 0;
  343. }
  344. static void
  345. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  346. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  347. {
  348. /*
  349. * Set up an iotag
  350. */
  351. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  352. if (pring->ringno == LPFC_ELS_RING) {
  353. lpfc_debugfs_slow_ring_trc(phba,
  354. "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  355. *(((uint32_t *) &nextiocb->iocb) + 4),
  356. *(((uint32_t *) &nextiocb->iocb) + 6),
  357. *(((uint32_t *) &nextiocb->iocb) + 7));
  358. }
  359. /*
  360. * Issue iocb command to adapter
  361. */
  362. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
  363. wmb();
  364. pring->stats.iocb_cmd++;
  365. /*
  366. * If there is no completion routine to call, we can release the
  367. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  368. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  369. */
  370. if (nextiocb->iocb_cmpl)
  371. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  372. else
  373. __lpfc_sli_release_iocbq(phba, nextiocb);
  374. /*
  375. * Let the HBA know what IOCB slot will be the next one the
  376. * driver will put a command into.
  377. */
  378. pring->cmdidx = pring->next_cmdidx;
  379. writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
  380. }
  381. static void
  382. lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  383. {
  384. int ringno = pring->ringno;
  385. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  386. wmb();
  387. /*
  388. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  389. * The HBA will tell us when an IOCB entry is available.
  390. */
  391. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  392. readl(phba->CAregaddr); /* flush */
  393. pring->stats.iocb_cmd_full++;
  394. }
  395. static void
  396. lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  397. {
  398. int ringno = pring->ringno;
  399. /*
  400. * Tell the HBA that there is work to do in this ring.
  401. */
  402. wmb();
  403. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  404. readl(phba->CAregaddr); /* flush */
  405. }
  406. static void
  407. lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  408. {
  409. IOCB_t *iocb;
  410. struct lpfc_iocbq *nextiocb;
  411. /*
  412. * Check to see if:
  413. * (a) there is anything on the txq to send
  414. * (b) link is up
  415. * (c) link attention events can be processed (fcp ring only)
  416. * (d) IOCB processing is not blocked by the outstanding mbox command.
  417. */
  418. if (pring->txq_cnt &&
  419. lpfc_is_link_up(phba) &&
  420. (pring->ringno != phba->sli.fcp_ring ||
  421. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  422. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  423. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  424. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  425. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  426. if (iocb)
  427. lpfc_sli_update_ring(phba, pring);
  428. else
  429. lpfc_sli_update_full_ring(phba, pring);
  430. }
  431. return;
  432. }
  433. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  434. static void
  435. lpfc_sli_turn_on_ring(struct lpfc_hba *phba, int ringno)
  436. {
  437. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  438. &phba->slim2p->mbx.us.s3_pgp.port[ringno] :
  439. &phba->slim2p->mbx.us.s2.port[ringno];
  440. unsigned long iflags;
  441. /* If the ring is active, flag it */
  442. spin_lock_irqsave(&phba->hbalock, iflags);
  443. if (phba->sli.ring[ringno].cmdringaddr) {
  444. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  445. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  446. /*
  447. * Force update of the local copy of cmdGetInx
  448. */
  449. phba->sli.ring[ringno].local_getidx
  450. = le32_to_cpu(pgp->cmdGetInx);
  451. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  452. }
  453. }
  454. spin_unlock_irqrestore(&phba->hbalock, iflags);
  455. }
  456. struct lpfc_hbq_entry *
  457. lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
  458. {
  459. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  460. if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
  461. ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
  462. hbqp->next_hbqPutIdx = 0;
  463. if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
  464. uint32_t raw_index = phba->hbq_get[hbqno];
  465. uint32_t getidx = le32_to_cpu(raw_index);
  466. hbqp->local_hbqGetIdx = getidx;
  467. if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
  468. lpfc_printf_log(phba, KERN_ERR,
  469. LOG_SLI | LOG_VPORT,
  470. "1802 HBQ %d: local_hbqGetIdx "
  471. "%u is > than hbqp->entry_count %u\n",
  472. hbqno, hbqp->local_hbqGetIdx,
  473. hbqp->entry_count);
  474. phba->link_state = LPFC_HBA_ERROR;
  475. return NULL;
  476. }
  477. if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
  478. return NULL;
  479. }
  480. return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
  481. hbqp->hbqPutIdx;
  482. }
  483. void
  484. lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
  485. {
  486. struct lpfc_dmabuf *dmabuf, *next_dmabuf;
  487. struct hbq_dmabuf *hbq_buf;
  488. int i, hbq_count;
  489. hbq_count = lpfc_sli_hbq_count();
  490. /* Return all memory used by all HBQs */
  491. for (i = 0; i < hbq_count; ++i) {
  492. list_for_each_entry_safe(dmabuf, next_dmabuf,
  493. &phba->hbqs[i].hbq_buffer_list, list) {
  494. hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
  495. list_del(&hbq_buf->dbuf.list);
  496. (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
  497. }
  498. }
  499. }
  500. static struct lpfc_hbq_entry *
  501. lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
  502. struct hbq_dmabuf *hbq_buf)
  503. {
  504. struct lpfc_hbq_entry *hbqe;
  505. dma_addr_t physaddr = hbq_buf->dbuf.phys;
  506. /* Get next HBQ entry slot to use */
  507. hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
  508. if (hbqe) {
  509. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  510. hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
  511. hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
  512. hbqe->bde.tus.f.bdeSize = hbq_buf->size;
  513. hbqe->bde.tus.f.bdeFlags = 0;
  514. hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
  515. hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
  516. /* Sync SLIM */
  517. hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
  518. writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
  519. /* flush */
  520. readl(phba->hbq_put + hbqno);
  521. list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
  522. }
  523. return hbqe;
  524. }
  525. static struct lpfc_hbq_init lpfc_els_hbq = {
  526. .rn = 1,
  527. .entry_count = 200,
  528. .mask_count = 0,
  529. .profile = 0,
  530. .ring_mask = (1 << LPFC_ELS_RING),
  531. .buffer_count = 0,
  532. .init_count = 20,
  533. .add_count = 5,
  534. };
  535. static struct lpfc_hbq_init lpfc_extra_hbq = {
  536. .rn = 1,
  537. .entry_count = 200,
  538. .mask_count = 0,
  539. .profile = 0,
  540. .ring_mask = (1 << LPFC_EXTRA_RING),
  541. .buffer_count = 0,
  542. .init_count = 0,
  543. .add_count = 5,
  544. };
  545. struct lpfc_hbq_init *lpfc_hbq_defs[] = {
  546. &lpfc_els_hbq,
  547. &lpfc_extra_hbq,
  548. };
  549. static int
  550. lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
  551. {
  552. uint32_t i, start, end;
  553. struct hbq_dmabuf *hbq_buffer;
  554. if (!phba->hbqs[hbqno].hbq_alloc_buffer) {
  555. return 0;
  556. }
  557. start = lpfc_hbq_defs[hbqno]->buffer_count;
  558. end = count + lpfc_hbq_defs[hbqno]->buffer_count;
  559. if (end > lpfc_hbq_defs[hbqno]->entry_count) {
  560. end = lpfc_hbq_defs[hbqno]->entry_count;
  561. }
  562. /* Populate HBQ entries */
  563. for (i = start; i < end; i++) {
  564. hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  565. if (!hbq_buffer)
  566. return 1;
  567. hbq_buffer->tag = (i | (hbqno << 16));
  568. if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
  569. lpfc_hbq_defs[hbqno]->buffer_count++;
  570. else
  571. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  572. }
  573. return 0;
  574. }
  575. int
  576. lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
  577. {
  578. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  579. lpfc_hbq_defs[qno]->add_count));
  580. }
  581. int
  582. lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
  583. {
  584. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  585. lpfc_hbq_defs[qno]->init_count));
  586. }
  587. struct hbq_dmabuf *
  588. lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
  589. {
  590. struct lpfc_dmabuf *d_buf;
  591. struct hbq_dmabuf *hbq_buf;
  592. uint32_t hbqno;
  593. hbqno = tag >> 16;
  594. if (hbqno > LPFC_MAX_HBQS)
  595. return NULL;
  596. list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
  597. hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
  598. if (hbq_buf->tag == tag) {
  599. return hbq_buf;
  600. }
  601. }
  602. lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
  603. "1803 Bad hbq tag. Data: x%x x%x\n",
  604. tag, lpfc_hbq_defs[tag >> 16]->buffer_count);
  605. return NULL;
  606. }
  607. void
  608. lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
  609. {
  610. uint32_t hbqno;
  611. if (hbq_buffer) {
  612. hbqno = hbq_buffer->tag >> 16;
  613. if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
  614. (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
  615. }
  616. }
  617. }
  618. static int
  619. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  620. {
  621. uint8_t ret;
  622. switch (mbxCommand) {
  623. case MBX_LOAD_SM:
  624. case MBX_READ_NV:
  625. case MBX_WRITE_NV:
  626. case MBX_RUN_BIU_DIAG:
  627. case MBX_INIT_LINK:
  628. case MBX_DOWN_LINK:
  629. case MBX_CONFIG_LINK:
  630. case MBX_CONFIG_RING:
  631. case MBX_RESET_RING:
  632. case MBX_READ_CONFIG:
  633. case MBX_READ_RCONFIG:
  634. case MBX_READ_SPARM:
  635. case MBX_READ_STATUS:
  636. case MBX_READ_RPI:
  637. case MBX_READ_XRI:
  638. case MBX_READ_REV:
  639. case MBX_READ_LNK_STAT:
  640. case MBX_REG_LOGIN:
  641. case MBX_UNREG_LOGIN:
  642. case MBX_READ_LA:
  643. case MBX_CLEAR_LA:
  644. case MBX_DUMP_MEMORY:
  645. case MBX_DUMP_CONTEXT:
  646. case MBX_RUN_DIAGS:
  647. case MBX_RESTART:
  648. case MBX_UPDATE_CFG:
  649. case MBX_DOWN_LOAD:
  650. case MBX_DEL_LD_ENTRY:
  651. case MBX_RUN_PROGRAM:
  652. case MBX_SET_MASK:
  653. case MBX_SET_SLIM:
  654. case MBX_UNREG_D_ID:
  655. case MBX_KILL_BOARD:
  656. case MBX_CONFIG_FARP:
  657. case MBX_BEACON:
  658. case MBX_LOAD_AREA:
  659. case MBX_RUN_BIU_DIAG64:
  660. case MBX_CONFIG_PORT:
  661. case MBX_READ_SPARM64:
  662. case MBX_READ_RPI64:
  663. case MBX_REG_LOGIN64:
  664. case MBX_READ_LA64:
  665. case MBX_FLASH_WR_ULA:
  666. case MBX_SET_DEBUG:
  667. case MBX_LOAD_EXP_ROM:
  668. case MBX_REG_VPI:
  669. case MBX_UNREG_VPI:
  670. case MBX_HEARTBEAT:
  671. ret = mbxCommand;
  672. break;
  673. default:
  674. ret = MBX_SHUTDOWN;
  675. break;
  676. }
  677. return ret;
  678. }
  679. static void
  680. lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
  681. {
  682. wait_queue_head_t *pdone_q;
  683. unsigned long drvr_flag;
  684. /*
  685. * If pdone_q is empty, the driver thread gave up waiting and
  686. * continued running.
  687. */
  688. pmboxq->mbox_flag |= LPFC_MBX_WAKE;
  689. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  690. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  691. if (pdone_q)
  692. wake_up_interruptible(pdone_q);
  693. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  694. return;
  695. }
  696. void
  697. lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
  698. {
  699. struct lpfc_dmabuf *mp;
  700. uint16_t rpi;
  701. int rc;
  702. mp = (struct lpfc_dmabuf *) (pmb->context1);
  703. if (mp) {
  704. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  705. kfree(mp);
  706. }
  707. /*
  708. * If a REG_LOGIN succeeded after node is destroyed or node
  709. * is in re-discovery driver need to cleanup the RPI.
  710. */
  711. if (!(phba->pport->load_flag & FC_UNLOADING) &&
  712. pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
  713. !pmb->mb.mbxStatus) {
  714. rpi = pmb->mb.un.varWords[0];
  715. lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
  716. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  717. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  718. if (rc != MBX_NOT_FINISHED)
  719. return;
  720. }
  721. mempool_free(pmb, phba->mbox_mem_pool);
  722. return;
  723. }
  724. int
  725. lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
  726. {
  727. MAILBOX_t *pmbox;
  728. LPFC_MBOXQ_t *pmb;
  729. int rc;
  730. LIST_HEAD(cmplq);
  731. phba->sli.slistat.mbox_event++;
  732. /* Get all completed mailboxe buffers into the cmplq */
  733. spin_lock_irq(&phba->hbalock);
  734. list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
  735. spin_unlock_irq(&phba->hbalock);
  736. /* Get a Mailbox buffer to setup mailbox commands for callback */
  737. do {
  738. list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
  739. if (pmb == NULL)
  740. break;
  741. pmbox = &pmb->mb;
  742. if (pmbox->mbxCommand != MBX_HEARTBEAT) {
  743. if (pmb->vport) {
  744. lpfc_debugfs_disc_trc(pmb->vport,
  745. LPFC_DISC_TRC_MBOX_VPORT,
  746. "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
  747. (uint32_t)pmbox->mbxCommand,
  748. pmbox->un.varWords[0],
  749. pmbox->un.varWords[1]);
  750. }
  751. else {
  752. lpfc_debugfs_disc_trc(phba->pport,
  753. LPFC_DISC_TRC_MBOX,
  754. "MBOX cmpl: cmd:x%x mb:x%x x%x",
  755. (uint32_t)pmbox->mbxCommand,
  756. pmbox->un.varWords[0],
  757. pmbox->un.varWords[1]);
  758. }
  759. }
  760. /*
  761. * It is a fatal error if unknown mbox command completion.
  762. */
  763. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  764. MBX_SHUTDOWN) {
  765. /* Unknow mailbox command compl */
  766. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  767. "(%d):0323 Unknown Mailbox command "
  768. "%x Cmpl\n",
  769. pmb->vport ? pmb->vport->vpi : 0,
  770. pmbox->mbxCommand);
  771. phba->link_state = LPFC_HBA_ERROR;
  772. phba->work_hs = HS_FFER3;
  773. lpfc_handle_eratt(phba);
  774. continue;
  775. }
  776. if (pmbox->mbxStatus) {
  777. phba->sli.slistat.mbox_stat_err++;
  778. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  779. /* Mbox cmd cmpl error - RETRYing */
  780. lpfc_printf_log(phba, KERN_INFO,
  781. LOG_MBOX | LOG_SLI,
  782. "(%d):0305 Mbox cmd cmpl "
  783. "error - RETRYing Data: x%x "
  784. "x%x x%x x%x\n",
  785. pmb->vport ? pmb->vport->vpi :0,
  786. pmbox->mbxCommand,
  787. pmbox->mbxStatus,
  788. pmbox->un.varWords[0],
  789. pmb->vport->port_state);
  790. pmbox->mbxStatus = 0;
  791. pmbox->mbxOwner = OWN_HOST;
  792. spin_lock_irq(&phba->hbalock);
  793. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  794. spin_unlock_irq(&phba->hbalock);
  795. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  796. if (rc == MBX_SUCCESS)
  797. continue;
  798. }
  799. }
  800. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  801. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  802. "(%d):0307 Mailbox cmd x%x Cmpl x%p "
  803. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  804. pmb->vport ? pmb->vport->vpi : 0,
  805. pmbox->mbxCommand,
  806. pmb->mbox_cmpl,
  807. *((uint32_t *) pmbox),
  808. pmbox->un.varWords[0],
  809. pmbox->un.varWords[1],
  810. pmbox->un.varWords[2],
  811. pmbox->un.varWords[3],
  812. pmbox->un.varWords[4],
  813. pmbox->un.varWords[5],
  814. pmbox->un.varWords[6],
  815. pmbox->un.varWords[7]);
  816. if (pmb->mbox_cmpl)
  817. pmb->mbox_cmpl(phba,pmb);
  818. } while (1);
  819. return 0;
  820. }
  821. static struct lpfc_dmabuf *
  822. lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
  823. {
  824. struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
  825. uint32_t hbqno;
  826. void *virt; /* virtual address ptr */
  827. dma_addr_t phys; /* mapped address */
  828. hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
  829. if (hbq_entry == NULL)
  830. return NULL;
  831. list_del(&hbq_entry->dbuf.list);
  832. hbqno = tag >> 16;
  833. new_hbq_entry = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
  834. if (new_hbq_entry == NULL)
  835. return &hbq_entry->dbuf;
  836. new_hbq_entry->tag = -1;
  837. phys = new_hbq_entry->dbuf.phys;
  838. virt = new_hbq_entry->dbuf.virt;
  839. new_hbq_entry->dbuf.phys = hbq_entry->dbuf.phys;
  840. new_hbq_entry->dbuf.virt = hbq_entry->dbuf.virt;
  841. hbq_entry->dbuf.phys = phys;
  842. hbq_entry->dbuf.virt = virt;
  843. lpfc_sli_free_hbq(phba, hbq_entry);
  844. return &new_hbq_entry->dbuf;
  845. }
  846. static int
  847. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  848. struct lpfc_iocbq *saveq)
  849. {
  850. IOCB_t * irsp;
  851. WORD5 * w5p;
  852. uint32_t Rctl, Type;
  853. uint32_t match, i;
  854. match = 0;
  855. irsp = &(saveq->iocb);
  856. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  857. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
  858. || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
  859. || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
  860. Rctl = FC_ELS_REQ;
  861. Type = FC_ELS_DATA;
  862. } else {
  863. w5p =
  864. (WORD5 *) & (saveq->iocb.un.
  865. ulpWord[5]);
  866. Rctl = w5p->hcsw.Rctl;
  867. Type = w5p->hcsw.Type;
  868. /* Firmware Workaround */
  869. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  870. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
  871. irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
  872. Rctl = FC_ELS_REQ;
  873. Type = FC_ELS_DATA;
  874. w5p->hcsw.Rctl = Rctl;
  875. w5p->hcsw.Type = Type;
  876. }
  877. }
  878. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  879. if (irsp->ulpBdeCount != 0)
  880. saveq->context2 = lpfc_sli_replace_hbqbuff(phba,
  881. irsp->un.ulpWord[3]);
  882. if (irsp->ulpBdeCount == 2)
  883. saveq->context3 = lpfc_sli_replace_hbqbuff(phba,
  884. irsp->unsli3.sli3Words[7]);
  885. }
  886. /* unSolicited Responses */
  887. if (pring->prt[0].profile) {
  888. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  889. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  890. saveq);
  891. match = 1;
  892. } else {
  893. /* We must search, based on rctl / type
  894. for the right routine */
  895. for (i = 0; i < pring->num_mask;
  896. i++) {
  897. if ((pring->prt[i].rctl ==
  898. Rctl)
  899. && (pring->prt[i].
  900. type == Type)) {
  901. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  902. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  903. (phba, pring, saveq);
  904. match = 1;
  905. break;
  906. }
  907. }
  908. }
  909. if (match == 0) {
  910. /* Unexpected Rctl / Type received */
  911. /* Ring <ringno> handler: unexpected
  912. Rctl <Rctl> Type <Type> received */
  913. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  914. "0313 Ring %d handler: unexpected Rctl x%x "
  915. "Type x%x received\n",
  916. pring->ringno, Rctl, Type);
  917. }
  918. return 1;
  919. }
  920. static struct lpfc_iocbq *
  921. lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
  922. struct lpfc_sli_ring *pring,
  923. struct lpfc_iocbq *prspiocb)
  924. {
  925. struct lpfc_iocbq *cmd_iocb = NULL;
  926. uint16_t iotag;
  927. iotag = prspiocb->iocb.ulpIoTag;
  928. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  929. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  930. list_del_init(&cmd_iocb->list);
  931. pring->txcmplq_cnt--;
  932. return cmd_iocb;
  933. }
  934. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  935. "0317 iotag x%x is out off "
  936. "range: max iotag x%x wd0 x%x\n",
  937. iotag, phba->sli.last_iotag,
  938. *(((uint32_t *) &prspiocb->iocb) + 7));
  939. return NULL;
  940. }
  941. static int
  942. lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  943. struct lpfc_iocbq *saveq)
  944. {
  945. struct lpfc_iocbq *cmdiocbp;
  946. int rc = 1;
  947. unsigned long iflag;
  948. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  949. spin_lock_irqsave(&phba->hbalock, iflag);
  950. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  951. spin_unlock_irqrestore(&phba->hbalock, iflag);
  952. if (cmdiocbp) {
  953. if (cmdiocbp->iocb_cmpl) {
  954. /*
  955. * Post all ELS completions to the worker thread.
  956. * All other are passed to the completion callback.
  957. */
  958. if (pring->ringno == LPFC_ELS_RING) {
  959. if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
  960. cmdiocbp->iocb_flag &=
  961. ~LPFC_DRIVER_ABORTED;
  962. saveq->iocb.ulpStatus =
  963. IOSTAT_LOCAL_REJECT;
  964. saveq->iocb.un.ulpWord[4] =
  965. IOERR_SLI_ABORTED;
  966. }
  967. }
  968. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  969. } else
  970. lpfc_sli_release_iocbq(phba, cmdiocbp);
  971. } else {
  972. /*
  973. * Unknown initiating command based on the response iotag.
  974. * This could be the case on the ELS ring because of
  975. * lpfc_els_abort().
  976. */
  977. if (pring->ringno != LPFC_ELS_RING) {
  978. /*
  979. * Ring <ringno> handler: unexpected completion IoTag
  980. * <IoTag>
  981. */
  982. lpfc_printf_vlog(cmdiocbp->vport, KERN_WARNING, LOG_SLI,
  983. "0322 Ring %d handler: "
  984. "unexpected completion IoTag x%x "
  985. "Data: x%x x%x x%x x%x\n",
  986. pring->ringno,
  987. saveq->iocb.ulpIoTag,
  988. saveq->iocb.ulpStatus,
  989. saveq->iocb.un.ulpWord[4],
  990. saveq->iocb.ulpCommand,
  991. saveq->iocb.ulpContext);
  992. }
  993. }
  994. return rc;
  995. }
  996. static void
  997. lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  998. {
  999. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1000. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1001. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1002. /*
  1003. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1004. * rsp ring <portRspMax>
  1005. */
  1006. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1007. "0312 Ring %d handler: portRspPut %d "
  1008. "is bigger then rsp ring %d\n",
  1009. pring->ringno, le32_to_cpu(pgp->rspPutInx),
  1010. pring->numRiocb);
  1011. phba->link_state = LPFC_HBA_ERROR;
  1012. /*
  1013. * All error attention handlers are posted to
  1014. * worker thread
  1015. */
  1016. phba->work_ha |= HA_ERATT;
  1017. phba->work_hs = HS_FFER3;
  1018. /* hbalock should already be held */
  1019. if (phba->work_wait)
  1020. lpfc_worker_wake_up(phba);
  1021. return;
  1022. }
  1023. void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
  1024. {
  1025. struct lpfc_sli *psli = &phba->sli;
  1026. struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
  1027. IOCB_t *irsp = NULL;
  1028. IOCB_t *entry = NULL;
  1029. struct lpfc_iocbq *cmdiocbq = NULL;
  1030. struct lpfc_iocbq rspiocbq;
  1031. struct lpfc_pgp *pgp;
  1032. uint32_t status;
  1033. uint32_t portRspPut, portRspMax;
  1034. int type;
  1035. uint32_t rsp_cmpl = 0;
  1036. uint32_t ha_copy;
  1037. unsigned long iflags;
  1038. pring->stats.iocb_event++;
  1039. pgp = (phba->sli_rev == 3) ?
  1040. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1041. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1042. /*
  1043. * The next available response entry should never exceed the maximum
  1044. * entries. If it does, treat it as an adapter hardware error.
  1045. */
  1046. portRspMax = pring->numRiocb;
  1047. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1048. if (unlikely(portRspPut >= portRspMax)) {
  1049. lpfc_sli_rsp_pointers_error(phba, pring);
  1050. return;
  1051. }
  1052. rmb();
  1053. while (pring->rspidx != portRspPut) {
  1054. entry = lpfc_resp_iocb(phba, pring);
  1055. if (++pring->rspidx >= portRspMax)
  1056. pring->rspidx = 0;
  1057. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1058. (uint32_t *) &rspiocbq.iocb,
  1059. phba->iocb_rsp_size);
  1060. irsp = &rspiocbq.iocb;
  1061. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1062. pring->stats.iocb_rsp++;
  1063. rsp_cmpl++;
  1064. if (unlikely(irsp->ulpStatus)) {
  1065. /* Rsp ring <ringno> error: IOCB */
  1066. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1067. "0326 Rsp Ring %d error: IOCB Data: "
  1068. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1069. pring->ringno,
  1070. irsp->un.ulpWord[0],
  1071. irsp->un.ulpWord[1],
  1072. irsp->un.ulpWord[2],
  1073. irsp->un.ulpWord[3],
  1074. irsp->un.ulpWord[4],
  1075. irsp->un.ulpWord[5],
  1076. *(((uint32_t *) irsp) + 6),
  1077. *(((uint32_t *) irsp) + 7));
  1078. }
  1079. switch (type) {
  1080. case LPFC_ABORT_IOCB:
  1081. case LPFC_SOL_IOCB:
  1082. /*
  1083. * Idle exchange closed via ABTS from port. No iocb
  1084. * resources need to be recovered.
  1085. */
  1086. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1087. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1088. "0314 IOCB cmd 0x%x "
  1089. "processed. Skipping "
  1090. "completion",
  1091. irsp->ulpCommand);
  1092. break;
  1093. }
  1094. spin_lock_irqsave(&phba->hbalock, iflags);
  1095. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1096. &rspiocbq);
  1097. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1098. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1099. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1100. &rspiocbq);
  1101. }
  1102. break;
  1103. default:
  1104. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1105. char adaptermsg[LPFC_MAX_ADPTMSG];
  1106. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1107. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1108. MAX_MSG_DATA);
  1109. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1110. phba->brd_no, adaptermsg);
  1111. } else {
  1112. /* Unknown IOCB command */
  1113. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1114. "0321 Unknown IOCB command "
  1115. "Data: x%x, x%x x%x x%x x%x\n",
  1116. type, irsp->ulpCommand,
  1117. irsp->ulpStatus,
  1118. irsp->ulpIoTag,
  1119. irsp->ulpContext);
  1120. }
  1121. break;
  1122. }
  1123. /*
  1124. * The response IOCB has been processed. Update the ring
  1125. * pointer in SLIM. If the port response put pointer has not
  1126. * been updated, sync the pgp->rspPutInx and fetch the new port
  1127. * response put pointer.
  1128. */
  1129. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1130. if (pring->rspidx == portRspPut)
  1131. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1132. }
  1133. ha_copy = readl(phba->HAregaddr);
  1134. ha_copy >>= (LPFC_FCP_RING * 4);
  1135. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  1136. spin_lock_irqsave(&phba->hbalock, iflags);
  1137. pring->stats.iocb_rsp_full++;
  1138. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  1139. writel(status, phba->CAregaddr);
  1140. readl(phba->CAregaddr);
  1141. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1142. }
  1143. if ((ha_copy & HA_R0CE_RSP) &&
  1144. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1145. spin_lock_irqsave(&phba->hbalock, iflags);
  1146. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1147. pring->stats.iocb_cmd_empty++;
  1148. /* Force update of the local copy of cmdGetInx */
  1149. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1150. lpfc_sli_resume_iocb(phba, pring);
  1151. if ((pring->lpfc_sli_cmd_available))
  1152. (pring->lpfc_sli_cmd_available) (phba, pring);
  1153. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1154. }
  1155. return;
  1156. }
  1157. /*
  1158. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  1159. * to check it explicitly.
  1160. */
  1161. static int
  1162. lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
  1163. struct lpfc_sli_ring *pring, uint32_t mask)
  1164. {
  1165. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1166. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1167. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1168. IOCB_t *irsp = NULL;
  1169. IOCB_t *entry = NULL;
  1170. struct lpfc_iocbq *cmdiocbq = NULL;
  1171. struct lpfc_iocbq rspiocbq;
  1172. uint32_t status;
  1173. uint32_t portRspPut, portRspMax;
  1174. int rc = 1;
  1175. lpfc_iocb_type type;
  1176. unsigned long iflag;
  1177. uint32_t rsp_cmpl = 0;
  1178. spin_lock_irqsave(&phba->hbalock, iflag);
  1179. pring->stats.iocb_event++;
  1180. /*
  1181. * The next available response entry should never exceed the maximum
  1182. * entries. If it does, treat it as an adapter hardware error.
  1183. */
  1184. portRspMax = pring->numRiocb;
  1185. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1186. if (unlikely(portRspPut >= portRspMax)) {
  1187. lpfc_sli_rsp_pointers_error(phba, pring);
  1188. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1189. return 1;
  1190. }
  1191. rmb();
  1192. while (pring->rspidx != portRspPut) {
  1193. /*
  1194. * Fetch an entry off the ring and copy it into a local data
  1195. * structure. The copy involves a byte-swap since the
  1196. * network byte order and pci byte orders are different.
  1197. */
  1198. entry = lpfc_resp_iocb(phba, pring);
  1199. phba->last_completion_time = jiffies;
  1200. if (++pring->rspidx >= portRspMax)
  1201. pring->rspidx = 0;
  1202. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1203. (uint32_t *) &rspiocbq.iocb,
  1204. phba->iocb_rsp_size);
  1205. INIT_LIST_HEAD(&(rspiocbq.list));
  1206. irsp = &rspiocbq.iocb;
  1207. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1208. pring->stats.iocb_rsp++;
  1209. rsp_cmpl++;
  1210. if (unlikely(irsp->ulpStatus)) {
  1211. /*
  1212. * If resource errors reported from HBA, reduce
  1213. * queuedepths of the SCSI device.
  1214. */
  1215. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1216. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1217. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1218. lpfc_adjust_queue_depth(phba);
  1219. spin_lock_irqsave(&phba->hbalock, iflag);
  1220. }
  1221. /* Rsp ring <ringno> error: IOCB */
  1222. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1223. "0336 Rsp Ring %d error: IOCB Data: "
  1224. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1225. pring->ringno,
  1226. irsp->un.ulpWord[0],
  1227. irsp->un.ulpWord[1],
  1228. irsp->un.ulpWord[2],
  1229. irsp->un.ulpWord[3],
  1230. irsp->un.ulpWord[4],
  1231. irsp->un.ulpWord[5],
  1232. *(((uint32_t *) irsp) + 6),
  1233. *(((uint32_t *) irsp) + 7));
  1234. }
  1235. switch (type) {
  1236. case LPFC_ABORT_IOCB:
  1237. case LPFC_SOL_IOCB:
  1238. /*
  1239. * Idle exchange closed via ABTS from port. No iocb
  1240. * resources need to be recovered.
  1241. */
  1242. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1243. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1244. "0333 IOCB cmd 0x%x"
  1245. " processed. Skipping"
  1246. " completion\n",
  1247. irsp->ulpCommand);
  1248. break;
  1249. }
  1250. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1251. &rspiocbq);
  1252. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1253. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1254. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1255. &rspiocbq);
  1256. } else {
  1257. spin_unlock_irqrestore(&phba->hbalock,
  1258. iflag);
  1259. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1260. &rspiocbq);
  1261. spin_lock_irqsave(&phba->hbalock,
  1262. iflag);
  1263. }
  1264. }
  1265. break;
  1266. case LPFC_UNSOL_IOCB:
  1267. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1268. lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
  1269. spin_lock_irqsave(&phba->hbalock, iflag);
  1270. break;
  1271. default:
  1272. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1273. char adaptermsg[LPFC_MAX_ADPTMSG];
  1274. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1275. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1276. MAX_MSG_DATA);
  1277. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1278. phba->brd_no, adaptermsg);
  1279. } else {
  1280. /* Unknown IOCB command */
  1281. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1282. "0334 Unknown IOCB command "
  1283. "Data: x%x, x%x x%x x%x x%x\n",
  1284. type, irsp->ulpCommand,
  1285. irsp->ulpStatus,
  1286. irsp->ulpIoTag,
  1287. irsp->ulpContext);
  1288. }
  1289. break;
  1290. }
  1291. /*
  1292. * The response IOCB has been processed. Update the ring
  1293. * pointer in SLIM. If the port response put pointer has not
  1294. * been updated, sync the pgp->rspPutInx and fetch the new port
  1295. * response put pointer.
  1296. */
  1297. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1298. if (pring->rspidx == portRspPut)
  1299. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1300. }
  1301. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1302. pring->stats.iocb_rsp_full++;
  1303. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1304. writel(status, phba->CAregaddr);
  1305. readl(phba->CAregaddr);
  1306. }
  1307. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1308. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1309. pring->stats.iocb_cmd_empty++;
  1310. /* Force update of the local copy of cmdGetInx */
  1311. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1312. lpfc_sli_resume_iocb(phba, pring);
  1313. if ((pring->lpfc_sli_cmd_available))
  1314. (pring->lpfc_sli_cmd_available) (phba, pring);
  1315. }
  1316. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1317. return rc;
  1318. }
  1319. int
  1320. lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
  1321. struct lpfc_sli_ring *pring, uint32_t mask)
  1322. {
  1323. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1324. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1325. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1326. IOCB_t *entry;
  1327. IOCB_t *irsp = NULL;
  1328. struct lpfc_iocbq *rspiocbp = NULL;
  1329. struct lpfc_iocbq *next_iocb;
  1330. struct lpfc_iocbq *cmdiocbp;
  1331. struct lpfc_iocbq *saveq;
  1332. uint8_t iocb_cmd_type;
  1333. lpfc_iocb_type type;
  1334. uint32_t status, free_saveq;
  1335. uint32_t portRspPut, portRspMax;
  1336. int rc = 1;
  1337. unsigned long iflag;
  1338. spin_lock_irqsave(&phba->hbalock, iflag);
  1339. pring->stats.iocb_event++;
  1340. /*
  1341. * The next available response entry should never exceed the maximum
  1342. * entries. If it does, treat it as an adapter hardware error.
  1343. */
  1344. portRspMax = pring->numRiocb;
  1345. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1346. if (portRspPut >= portRspMax) {
  1347. /*
  1348. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1349. * rsp ring <portRspMax>
  1350. */
  1351. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1352. "0303 Ring %d handler: portRspPut %d "
  1353. "is bigger then rsp ring %d\n",
  1354. pring->ringno, portRspPut, portRspMax);
  1355. phba->link_state = LPFC_HBA_ERROR;
  1356. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1357. phba->work_hs = HS_FFER3;
  1358. lpfc_handle_eratt(phba);
  1359. return 1;
  1360. }
  1361. rmb();
  1362. while (pring->rspidx != portRspPut) {
  1363. /*
  1364. * Build a completion list and call the appropriate handler.
  1365. * The process is to get the next available response iocb, get
  1366. * a free iocb from the list, copy the response data into the
  1367. * free iocb, insert to the continuation list, and update the
  1368. * next response index to slim. This process makes response
  1369. * iocb's in the ring available to DMA as fast as possible but
  1370. * pays a penalty for a copy operation. Since the iocb is
  1371. * only 32 bytes, this penalty is considered small relative to
  1372. * the PCI reads for register values and a slim write. When
  1373. * the ulpLe field is set, the entire Command has been
  1374. * received.
  1375. */
  1376. entry = lpfc_resp_iocb(phba, pring);
  1377. phba->last_completion_time = jiffies;
  1378. rspiocbp = __lpfc_sli_get_iocbq(phba);
  1379. if (rspiocbp == NULL) {
  1380. printk(KERN_ERR "%s: out of buffers! Failing "
  1381. "completion.\n", __FUNCTION__);
  1382. break;
  1383. }
  1384. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
  1385. phba->iocb_rsp_size);
  1386. irsp = &rspiocbp->iocb;
  1387. if (++pring->rspidx >= portRspMax)
  1388. pring->rspidx = 0;
  1389. if (pring->ringno == LPFC_ELS_RING) {
  1390. lpfc_debugfs_slow_ring_trc(phba,
  1391. "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
  1392. *(((uint32_t *) irsp) + 4),
  1393. *(((uint32_t *) irsp) + 6),
  1394. *(((uint32_t *) irsp) + 7));
  1395. }
  1396. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1397. if (list_empty(&(pring->iocb_continueq))) {
  1398. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1399. } else {
  1400. list_add_tail(&rspiocbp->list,
  1401. &(pring->iocb_continueq));
  1402. }
  1403. pring->iocb_continueq_cnt++;
  1404. if (irsp->ulpLe) {
  1405. /*
  1406. * By default, the driver expects to free all resources
  1407. * associated with this iocb completion.
  1408. */
  1409. free_saveq = 1;
  1410. saveq = list_get_first(&pring->iocb_continueq,
  1411. struct lpfc_iocbq, list);
  1412. irsp = &(saveq->iocb);
  1413. list_del_init(&pring->iocb_continueq);
  1414. pring->iocb_continueq_cnt = 0;
  1415. pring->stats.iocb_rsp++;
  1416. /*
  1417. * If resource errors reported from HBA, reduce
  1418. * queuedepths of the SCSI device.
  1419. */
  1420. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1421. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1422. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1423. lpfc_adjust_queue_depth(phba);
  1424. spin_lock_irqsave(&phba->hbalock, iflag);
  1425. }
  1426. if (irsp->ulpStatus) {
  1427. /* Rsp ring <ringno> error: IOCB */
  1428. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1429. "0328 Rsp Ring %d error: "
  1430. "IOCB Data: "
  1431. "x%x x%x x%x x%x "
  1432. "x%x x%x x%x x%x "
  1433. "x%x x%x x%x x%x "
  1434. "x%x x%x x%x x%x\n",
  1435. pring->ringno,
  1436. irsp->un.ulpWord[0],
  1437. irsp->un.ulpWord[1],
  1438. irsp->un.ulpWord[2],
  1439. irsp->un.ulpWord[3],
  1440. irsp->un.ulpWord[4],
  1441. irsp->un.ulpWord[5],
  1442. *(((uint32_t *) irsp) + 6),
  1443. *(((uint32_t *) irsp) + 7),
  1444. *(((uint32_t *) irsp) + 8),
  1445. *(((uint32_t *) irsp) + 9),
  1446. *(((uint32_t *) irsp) + 10),
  1447. *(((uint32_t *) irsp) + 11),
  1448. *(((uint32_t *) irsp) + 12),
  1449. *(((uint32_t *) irsp) + 13),
  1450. *(((uint32_t *) irsp) + 14),
  1451. *(((uint32_t *) irsp) + 15));
  1452. }
  1453. /*
  1454. * Fetch the IOCB command type and call the correct
  1455. * completion routine. Solicited and Unsolicited
  1456. * IOCBs on the ELS ring get freed back to the
  1457. * lpfc_iocb_list by the discovery kernel thread.
  1458. */
  1459. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1460. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1461. if (type == LPFC_SOL_IOCB) {
  1462. spin_unlock_irqrestore(&phba->hbalock,
  1463. iflag);
  1464. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1465. saveq);
  1466. spin_lock_irqsave(&phba->hbalock, iflag);
  1467. } else if (type == LPFC_UNSOL_IOCB) {
  1468. spin_unlock_irqrestore(&phba->hbalock,
  1469. iflag);
  1470. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1471. saveq);
  1472. spin_lock_irqsave(&phba->hbalock, iflag);
  1473. } else if (type == LPFC_ABORT_IOCB) {
  1474. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1475. ((cmdiocbp =
  1476. lpfc_sli_iocbq_lookup(phba, pring,
  1477. saveq)))) {
  1478. /* Call the specified completion
  1479. routine */
  1480. if (cmdiocbp->iocb_cmpl) {
  1481. spin_unlock_irqrestore(
  1482. &phba->hbalock,
  1483. iflag);
  1484. (cmdiocbp->iocb_cmpl) (phba,
  1485. cmdiocbp, saveq);
  1486. spin_lock_irqsave(
  1487. &phba->hbalock,
  1488. iflag);
  1489. } else
  1490. __lpfc_sli_release_iocbq(phba,
  1491. cmdiocbp);
  1492. }
  1493. } else if (type == LPFC_UNKNOWN_IOCB) {
  1494. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1495. char adaptermsg[LPFC_MAX_ADPTMSG];
  1496. memset(adaptermsg, 0,
  1497. LPFC_MAX_ADPTMSG);
  1498. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1499. MAX_MSG_DATA);
  1500. dev_warn(&((phba->pcidev)->dev),
  1501. "lpfc%d: %s",
  1502. phba->brd_no, adaptermsg);
  1503. } else {
  1504. /* Unknown IOCB command */
  1505. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1506. "0335 Unknown IOCB "
  1507. "command Data: x%x "
  1508. "x%x x%x x%x\n",
  1509. irsp->ulpCommand,
  1510. irsp->ulpStatus,
  1511. irsp->ulpIoTag,
  1512. irsp->ulpContext);
  1513. }
  1514. }
  1515. if (free_saveq) {
  1516. list_for_each_entry_safe(rspiocbp, next_iocb,
  1517. &saveq->list, list) {
  1518. list_del(&rspiocbp->list);
  1519. __lpfc_sli_release_iocbq(phba,
  1520. rspiocbp);
  1521. }
  1522. __lpfc_sli_release_iocbq(phba, saveq);
  1523. }
  1524. rspiocbp = NULL;
  1525. }
  1526. /*
  1527. * If the port response put pointer has not been updated, sync
  1528. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1529. * response put pointer.
  1530. */
  1531. if (pring->rspidx == portRspPut) {
  1532. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1533. }
  1534. } /* while (pring->rspidx != portRspPut) */
  1535. if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
  1536. /* At least one response entry has been freed */
  1537. pring->stats.iocb_rsp_full++;
  1538. /* SET RxRE_RSP in Chip Att register */
  1539. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1540. writel(status, phba->CAregaddr);
  1541. readl(phba->CAregaddr); /* flush */
  1542. }
  1543. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1544. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1545. pring->stats.iocb_cmd_empty++;
  1546. /* Force update of the local copy of cmdGetInx */
  1547. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1548. lpfc_sli_resume_iocb(phba, pring);
  1549. if ((pring->lpfc_sli_cmd_available))
  1550. (pring->lpfc_sli_cmd_available) (phba, pring);
  1551. }
  1552. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1553. return rc;
  1554. }
  1555. void
  1556. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1557. {
  1558. LIST_HEAD(completions);
  1559. struct lpfc_iocbq *iocb, *next_iocb;
  1560. IOCB_t *cmd = NULL;
  1561. if (pring->ringno == LPFC_ELS_RING) {
  1562. lpfc_fabric_abort_hba(phba);
  1563. }
  1564. /* Error everything on txq and txcmplq
  1565. * First do the txq.
  1566. */
  1567. spin_lock_irq(&phba->hbalock);
  1568. list_splice_init(&pring->txq, &completions);
  1569. pring->txq_cnt = 0;
  1570. /* Next issue ABTS for everything on the txcmplq */
  1571. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
  1572. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  1573. spin_unlock_irq(&phba->hbalock);
  1574. while (!list_empty(&completions)) {
  1575. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  1576. cmd = &iocb->iocb;
  1577. list_del_init(&iocb->list);
  1578. if (!iocb->iocb_cmpl)
  1579. lpfc_sli_release_iocbq(phba, iocb);
  1580. else {
  1581. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1582. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1583. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1584. }
  1585. }
  1586. }
  1587. int
  1588. lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
  1589. {
  1590. uint32_t status;
  1591. int i = 0;
  1592. int retval = 0;
  1593. /* Read the HBA Host Status Register */
  1594. status = readl(phba->HSregaddr);
  1595. /*
  1596. * Check status register every 100ms for 5 retries, then every
  1597. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1598. * every 2.5 sec for 4.
  1599. * Break our of the loop if errors occurred during init.
  1600. */
  1601. while (((status & mask) != mask) &&
  1602. !(status & HS_FFERM) &&
  1603. i++ < 20) {
  1604. if (i <= 5)
  1605. msleep(10);
  1606. else if (i <= 10)
  1607. msleep(500);
  1608. else
  1609. msleep(2500);
  1610. if (i == 15) {
  1611. /* Do post */
  1612. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1613. lpfc_sli_brdrestart(phba);
  1614. }
  1615. /* Read the HBA Host Status Register */
  1616. status = readl(phba->HSregaddr);
  1617. }
  1618. /* Check to see if any errors occurred during init */
  1619. if ((status & HS_FFERM) || (i >= 20)) {
  1620. phba->link_state = LPFC_HBA_ERROR;
  1621. retval = 1;
  1622. }
  1623. return retval;
  1624. }
  1625. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1626. void lpfc_reset_barrier(struct lpfc_hba *phba)
  1627. {
  1628. uint32_t __iomem *resp_buf;
  1629. uint32_t __iomem *mbox_buf;
  1630. volatile uint32_t mbox;
  1631. uint32_t hc_copy;
  1632. int i;
  1633. uint8_t hdrtype;
  1634. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1635. if (hdrtype != 0x80 ||
  1636. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1637. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1638. return;
  1639. /*
  1640. * Tell the other part of the chip to suspend temporarily all
  1641. * its DMA activity.
  1642. */
  1643. resp_buf = phba->MBslimaddr;
  1644. /* Disable the error attention */
  1645. hc_copy = readl(phba->HCregaddr);
  1646. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1647. readl(phba->HCregaddr); /* flush */
  1648. phba->link_flag |= LS_IGNORE_ERATT;
  1649. if (readl(phba->HAregaddr) & HA_ERATT) {
  1650. /* Clear Chip error bit */
  1651. writel(HA_ERATT, phba->HAregaddr);
  1652. phba->pport->stopped = 1;
  1653. }
  1654. mbox = 0;
  1655. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1656. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1657. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1658. mbox_buf = phba->MBslimaddr;
  1659. writel(mbox, mbox_buf);
  1660. for (i = 0;
  1661. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1662. mdelay(1);
  1663. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1664. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1665. phba->pport->stopped)
  1666. goto restore_hc;
  1667. else
  1668. goto clear_errat;
  1669. }
  1670. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1671. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1672. mdelay(1);
  1673. clear_errat:
  1674. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1675. mdelay(1);
  1676. if (readl(phba->HAregaddr) & HA_ERATT) {
  1677. writel(HA_ERATT, phba->HAregaddr);
  1678. phba->pport->stopped = 1;
  1679. }
  1680. restore_hc:
  1681. phba->link_flag &= ~LS_IGNORE_ERATT;
  1682. writel(hc_copy, phba->HCregaddr);
  1683. readl(phba->HCregaddr); /* flush */
  1684. }
  1685. int
  1686. lpfc_sli_brdkill(struct lpfc_hba *phba)
  1687. {
  1688. struct lpfc_sli *psli;
  1689. LPFC_MBOXQ_t *pmb;
  1690. uint32_t status;
  1691. uint32_t ha_copy;
  1692. int retval;
  1693. int i = 0;
  1694. psli = &phba->sli;
  1695. /* Kill HBA */
  1696. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1697. "0329 Kill HBA Data: x%x x%x\n",
  1698. phba->pport->port_state, psli->sli_flag);
  1699. if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
  1700. GFP_KERNEL)) == 0)
  1701. return 1;
  1702. /* Disable the error attention */
  1703. spin_lock_irq(&phba->hbalock);
  1704. status = readl(phba->HCregaddr);
  1705. status &= ~HC_ERINT_ENA;
  1706. writel(status, phba->HCregaddr);
  1707. readl(phba->HCregaddr); /* flush */
  1708. phba->link_flag |= LS_IGNORE_ERATT;
  1709. spin_unlock_irq(&phba->hbalock);
  1710. lpfc_kill_board(phba, pmb);
  1711. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1712. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1713. if (retval != MBX_SUCCESS) {
  1714. if (retval != MBX_BUSY)
  1715. mempool_free(pmb, phba->mbox_mem_pool);
  1716. spin_lock_irq(&phba->hbalock);
  1717. phba->link_flag &= ~LS_IGNORE_ERATT;
  1718. spin_unlock_irq(&phba->hbalock);
  1719. return 1;
  1720. }
  1721. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1722. mempool_free(pmb, phba->mbox_mem_pool);
  1723. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1724. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1725. * 3 seconds we still set HBA_ERROR state because the status of the
  1726. * board is now undefined.
  1727. */
  1728. ha_copy = readl(phba->HAregaddr);
  1729. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1730. mdelay(100);
  1731. ha_copy = readl(phba->HAregaddr);
  1732. }
  1733. del_timer_sync(&psli->mbox_tmo);
  1734. if (ha_copy & HA_ERATT) {
  1735. writel(HA_ERATT, phba->HAregaddr);
  1736. phba->pport->stopped = 1;
  1737. }
  1738. spin_lock_irq(&phba->hbalock);
  1739. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1740. phba->link_flag &= ~LS_IGNORE_ERATT;
  1741. spin_unlock_irq(&phba->hbalock);
  1742. psli->mbox_active = NULL;
  1743. lpfc_hba_down_post(phba);
  1744. phba->link_state = LPFC_HBA_ERROR;
  1745. return ha_copy & HA_ERATT ? 0 : 1;
  1746. }
  1747. int
  1748. lpfc_sli_brdreset(struct lpfc_hba *phba)
  1749. {
  1750. struct lpfc_sli *psli;
  1751. struct lpfc_sli_ring *pring;
  1752. uint16_t cfg_value;
  1753. int i;
  1754. psli = &phba->sli;
  1755. /* Reset HBA */
  1756. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1757. "0325 Reset HBA Data: x%x x%x\n",
  1758. phba->pport->port_state, psli->sli_flag);
  1759. /* perform board reset */
  1760. phba->fc_eventTag = 0;
  1761. phba->pport->fc_myDID = 0;
  1762. phba->pport->fc_prevDID = 0;
  1763. /* Turn off parity checking and serr during the physical reset */
  1764. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1765. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1766. (cfg_value &
  1767. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1768. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1769. /* Now toggle INITFF bit in the Host Control Register */
  1770. writel(HC_INITFF, phba->HCregaddr);
  1771. mdelay(1);
  1772. readl(phba->HCregaddr); /* flush */
  1773. writel(0, phba->HCregaddr);
  1774. readl(phba->HCregaddr); /* flush */
  1775. /* Restore PCI cmd register */
  1776. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1777. /* Initialize relevant SLI info */
  1778. for (i = 0; i < psli->num_rings; i++) {
  1779. pring = &psli->ring[i];
  1780. pring->flag = 0;
  1781. pring->rspidx = 0;
  1782. pring->next_cmdidx = 0;
  1783. pring->local_getidx = 0;
  1784. pring->cmdidx = 0;
  1785. pring->missbufcnt = 0;
  1786. }
  1787. phba->link_state = LPFC_WARM_START;
  1788. return 0;
  1789. }
  1790. int
  1791. lpfc_sli_brdrestart(struct lpfc_hba *phba)
  1792. {
  1793. MAILBOX_t *mb;
  1794. struct lpfc_sli *psli;
  1795. uint16_t skip_post;
  1796. volatile uint32_t word0;
  1797. void __iomem *to_slim;
  1798. spin_lock_irq(&phba->hbalock);
  1799. psli = &phba->sli;
  1800. /* Restart HBA */
  1801. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1802. "0337 Restart HBA Data: x%x x%x\n",
  1803. phba->pport->port_state, psli->sli_flag);
  1804. word0 = 0;
  1805. mb = (MAILBOX_t *) &word0;
  1806. mb->mbxCommand = MBX_RESTART;
  1807. mb->mbxHc = 1;
  1808. lpfc_reset_barrier(phba);
  1809. to_slim = phba->MBslimaddr;
  1810. writel(*(uint32_t *) mb, to_slim);
  1811. readl(to_slim); /* flush */
  1812. /* Only skip post after fc_ffinit is completed */
  1813. if (phba->pport->port_state) {
  1814. skip_post = 1;
  1815. word0 = 1; /* This is really setting up word1 */
  1816. } else {
  1817. skip_post = 0;
  1818. word0 = 0; /* This is really setting up word1 */
  1819. }
  1820. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1821. writel(*(uint32_t *) mb, to_slim);
  1822. readl(to_slim); /* flush */
  1823. lpfc_sli_brdreset(phba);
  1824. phba->pport->stopped = 0;
  1825. phba->link_state = LPFC_INIT_START;
  1826. spin_unlock_irq(&phba->hbalock);
  1827. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1828. psli->stats_start = get_seconds();
  1829. if (skip_post)
  1830. mdelay(100);
  1831. else
  1832. mdelay(2000);
  1833. lpfc_hba_down_post(phba);
  1834. return 0;
  1835. }
  1836. static int
  1837. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1838. {
  1839. uint32_t status, i = 0;
  1840. /* Read the HBA Host Status Register */
  1841. status = readl(phba->HSregaddr);
  1842. /* Check status register to see what current state is */
  1843. i = 0;
  1844. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1845. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1846. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1847. * 4.
  1848. */
  1849. if (i++ >= 20) {
  1850. /* Adapter failed to init, timeout, status reg
  1851. <status> */
  1852. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1853. "0436 Adapter failed to init, "
  1854. "timeout, status reg x%x\n", status);
  1855. phba->link_state = LPFC_HBA_ERROR;
  1856. return -ETIMEDOUT;
  1857. }
  1858. /* Check to see if any errors occurred during init */
  1859. if (status & HS_FFERM) {
  1860. /* ERROR: During chipset initialization */
  1861. /* Adapter failed to init, chipset, status reg
  1862. <status> */
  1863. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1864. "0437 Adapter failed to init, "
  1865. "chipset, status reg x%x\n", status);
  1866. phba->link_state = LPFC_HBA_ERROR;
  1867. return -EIO;
  1868. }
  1869. if (i <= 5) {
  1870. msleep(10);
  1871. } else if (i <= 10) {
  1872. msleep(500);
  1873. } else {
  1874. msleep(2500);
  1875. }
  1876. if (i == 15) {
  1877. /* Do post */
  1878. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1879. lpfc_sli_brdrestart(phba);
  1880. }
  1881. /* Read the HBA Host Status Register */
  1882. status = readl(phba->HSregaddr);
  1883. }
  1884. /* Check to see if any errors occurred during init */
  1885. if (status & HS_FFERM) {
  1886. /* ERROR: During chipset initialization */
  1887. /* Adapter failed to init, chipset, status reg <status> */
  1888. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1889. "0438 Adapter failed to init, chipset, "
  1890. "status reg x%x\n", status);
  1891. phba->link_state = LPFC_HBA_ERROR;
  1892. return -EIO;
  1893. }
  1894. /* Clear all interrupt enable conditions */
  1895. writel(0, phba->HCregaddr);
  1896. readl(phba->HCregaddr); /* flush */
  1897. /* setup host attn register */
  1898. writel(0xffffffff, phba->HAregaddr);
  1899. readl(phba->HAregaddr); /* flush */
  1900. return 0;
  1901. }
  1902. int
  1903. lpfc_sli_hbq_count(void)
  1904. {
  1905. return ARRAY_SIZE(lpfc_hbq_defs);
  1906. }
  1907. static int
  1908. lpfc_sli_hbq_entry_count(void)
  1909. {
  1910. int hbq_count = lpfc_sli_hbq_count();
  1911. int count = 0;
  1912. int i;
  1913. for (i = 0; i < hbq_count; ++i)
  1914. count += lpfc_hbq_defs[i]->entry_count;
  1915. return count;
  1916. }
  1917. int
  1918. lpfc_sli_hbq_size(void)
  1919. {
  1920. return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
  1921. }
  1922. static int
  1923. lpfc_sli_hbq_setup(struct lpfc_hba *phba)
  1924. {
  1925. int hbq_count = lpfc_sli_hbq_count();
  1926. LPFC_MBOXQ_t *pmb;
  1927. MAILBOX_t *pmbox;
  1928. uint32_t hbqno;
  1929. uint32_t hbq_entry_index;
  1930. /* Get a Mailbox buffer to setup mailbox
  1931. * commands for HBA initialization
  1932. */
  1933. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1934. if (!pmb)
  1935. return -ENOMEM;
  1936. pmbox = &pmb->mb;
  1937. /* Initialize the struct lpfc_sli_hbq structure for each hbq */
  1938. phba->link_state = LPFC_INIT_MBX_CMDS;
  1939. hbq_entry_index = 0;
  1940. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  1941. phba->hbqs[hbqno].next_hbqPutIdx = 0;
  1942. phba->hbqs[hbqno].hbqPutIdx = 0;
  1943. phba->hbqs[hbqno].local_hbqGetIdx = 0;
  1944. phba->hbqs[hbqno].entry_count =
  1945. lpfc_hbq_defs[hbqno]->entry_count;
  1946. lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
  1947. hbq_entry_index, pmb);
  1948. hbq_entry_index += phba->hbqs[hbqno].entry_count;
  1949. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  1950. /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
  1951. mbxStatus <status>, ring <num> */
  1952. lpfc_printf_log(phba, KERN_ERR,
  1953. LOG_SLI | LOG_VPORT,
  1954. "1805 Adapter failed to init. "
  1955. "Data: x%x x%x x%x\n",
  1956. pmbox->mbxCommand,
  1957. pmbox->mbxStatus, hbqno);
  1958. phba->link_state = LPFC_HBA_ERROR;
  1959. mempool_free(pmb, phba->mbox_mem_pool);
  1960. return ENXIO;
  1961. }
  1962. }
  1963. phba->hbq_count = hbq_count;
  1964. mempool_free(pmb, phba->mbox_mem_pool);
  1965. /* Initially populate or replenish the HBQs */
  1966. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  1967. if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
  1968. return -ENOMEM;
  1969. }
  1970. return 0;
  1971. }
  1972. static int
  1973. lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
  1974. {
  1975. LPFC_MBOXQ_t *pmb;
  1976. uint32_t resetcount = 0, rc = 0, done = 0;
  1977. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1978. if (!pmb) {
  1979. phba->link_state = LPFC_HBA_ERROR;
  1980. return -ENOMEM;
  1981. }
  1982. phba->sli_rev = sli_mode;
  1983. while (resetcount < 2 && !done) {
  1984. spin_lock_irq(&phba->hbalock);
  1985. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1986. spin_unlock_irq(&phba->hbalock);
  1987. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1988. lpfc_sli_brdrestart(phba);
  1989. msleep(2500);
  1990. rc = lpfc_sli_chipset_init(phba);
  1991. if (rc)
  1992. break;
  1993. spin_lock_irq(&phba->hbalock);
  1994. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1995. spin_unlock_irq(&phba->hbalock);
  1996. resetcount++;
  1997. /* Call pre CONFIG_PORT mailbox command initialization. A
  1998. * value of 0 means the call was successful. Any other
  1999. * nonzero value is a failure, but if ERESTART is returned,
  2000. * the driver may reset the HBA and try again.
  2001. */
  2002. rc = lpfc_config_port_prep(phba);
  2003. if (rc == -ERESTART) {
  2004. phba->link_state = LPFC_LINK_UNKNOWN;
  2005. continue;
  2006. } else if (rc) {
  2007. break;
  2008. }
  2009. phba->link_state = LPFC_INIT_MBX_CMDS;
  2010. lpfc_config_port(phba, pmb);
  2011. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  2012. if (rc != MBX_SUCCESS) {
  2013. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2014. "0442 Adapter failed to init, mbxCmd x%x "
  2015. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  2016. pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0);
  2017. spin_lock_irq(&phba->hbalock);
  2018. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  2019. spin_unlock_irq(&phba->hbalock);
  2020. rc = -ENXIO;
  2021. } else {
  2022. done = 1;
  2023. phba->max_vpi = (phba->max_vpi &&
  2024. pmb->mb.un.varCfgPort.gmv) != 0
  2025. ? pmb->mb.un.varCfgPort.max_vpi
  2026. : 0;
  2027. }
  2028. }
  2029. if (!done) {
  2030. rc = -EINVAL;
  2031. goto do_prep_failed;
  2032. }
  2033. if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
  2034. (!pmb->mb.un.varCfgPort.cMA)) {
  2035. rc = -ENXIO;
  2036. goto do_prep_failed;
  2037. }
  2038. return rc;
  2039. do_prep_failed:
  2040. mempool_free(pmb, phba->mbox_mem_pool);
  2041. return rc;
  2042. }
  2043. int
  2044. lpfc_sli_hba_setup(struct lpfc_hba *phba)
  2045. {
  2046. uint32_t rc;
  2047. int mode = 3;
  2048. switch (lpfc_sli_mode) {
  2049. case 2:
  2050. if (phba->cfg_enable_npiv) {
  2051. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2052. "1824 NPIV enabled: Override lpfc_sli_mode "
  2053. "parameter (%d) to auto (0).\n",
  2054. lpfc_sli_mode);
  2055. break;
  2056. }
  2057. mode = 2;
  2058. break;
  2059. case 0:
  2060. case 3:
  2061. break;
  2062. default:
  2063. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2064. "1819 Unrecognized lpfc_sli_mode "
  2065. "parameter: %d.\n", lpfc_sli_mode);
  2066. break;
  2067. }
  2068. rc = lpfc_do_config_port(phba, mode);
  2069. if (rc && lpfc_sli_mode == 3)
  2070. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2071. "1820 Unable to select SLI-3. "
  2072. "Not supported by adapter.\n");
  2073. if (rc && mode != 2)
  2074. rc = lpfc_do_config_port(phba, 2);
  2075. if (rc)
  2076. goto lpfc_sli_hba_setup_error;
  2077. if (phba->sli_rev == 3) {
  2078. phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
  2079. phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
  2080. phba->sli3_options |= LPFC_SLI3_ENABLED;
  2081. phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
  2082. } else {
  2083. phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
  2084. phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
  2085. phba->sli3_options = 0;
  2086. }
  2087. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2088. "0444 Firmware in SLI %x mode. Max_vpi %d\n",
  2089. phba->sli_rev, phba->max_vpi);
  2090. rc = lpfc_sli_ring_map(phba);
  2091. if (rc)
  2092. goto lpfc_sli_hba_setup_error;
  2093. /* Init HBQs */
  2094. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  2095. rc = lpfc_sli_hbq_setup(phba);
  2096. if (rc)
  2097. goto lpfc_sli_hba_setup_error;
  2098. }
  2099. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  2100. rc = lpfc_config_port_post(phba);
  2101. if (rc)
  2102. goto lpfc_sli_hba_setup_error;
  2103. return rc;
  2104. lpfc_sli_hba_setup_error:
  2105. phba->link_state = LPFC_HBA_ERROR;
  2106. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2107. "0445 Firmware initialization failed\n");
  2108. return rc;
  2109. }
  2110. /*! lpfc_mbox_timeout
  2111. *
  2112. * \pre
  2113. * \post
  2114. * \param hba Pointer to per struct lpfc_hba structure
  2115. * \param l1 Pointer to the driver's mailbox queue.
  2116. * \return
  2117. * void
  2118. *
  2119. * \b Description:
  2120. *
  2121. * This routine handles mailbox timeout events at timer interrupt context.
  2122. */
  2123. void
  2124. lpfc_mbox_timeout(unsigned long ptr)
  2125. {
  2126. struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
  2127. unsigned long iflag;
  2128. uint32_t tmo_posted;
  2129. spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
  2130. tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
  2131. if (!tmo_posted)
  2132. phba->pport->work_port_events |= WORKER_MBOX_TMO;
  2133. spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
  2134. if (!tmo_posted) {
  2135. spin_lock_irqsave(&phba->hbalock, iflag);
  2136. if (phba->work_wait)
  2137. lpfc_worker_wake_up(phba);
  2138. spin_unlock_irqrestore(&phba->hbalock, iflag);
  2139. }
  2140. }
  2141. void
  2142. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  2143. {
  2144. LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
  2145. MAILBOX_t *mb = &pmbox->mb;
  2146. struct lpfc_sli *psli = &phba->sli;
  2147. struct lpfc_sli_ring *pring;
  2148. if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
  2149. return;
  2150. }
  2151. /* Mbox cmd <mbxCommand> timeout */
  2152. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2153. "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  2154. mb->mbxCommand,
  2155. phba->pport->port_state,
  2156. phba->sli.sli_flag,
  2157. phba->sli.mbox_active);
  2158. /* Setting state unknown so lpfc_sli_abort_iocb_ring
  2159. * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
  2160. * it to fail all oustanding SCSI IO.
  2161. */
  2162. spin_lock_irq(&phba->pport->work_port_lock);
  2163. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2164. spin_unlock_irq(&phba->pport->work_port_lock);
  2165. spin_lock_irq(&phba->hbalock);
  2166. phba->link_state = LPFC_LINK_UNKNOWN;
  2167. phba->pport->fc_flag |= FC_ESTABLISH_LINK;
  2168. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  2169. spin_unlock_irq(&phba->hbalock);
  2170. pring = &psli->ring[psli->fcp_ring];
  2171. lpfc_sli_abort_iocb_ring(phba, pring);
  2172. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2173. "0316 Resetting board due to mailbox timeout\n");
  2174. /*
  2175. * lpfc_offline calls lpfc_sli_hba_down which will clean up
  2176. * on oustanding mailbox commands.
  2177. */
  2178. lpfc_offline_prep(phba);
  2179. lpfc_offline(phba);
  2180. lpfc_sli_brdrestart(phba);
  2181. if (lpfc_online(phba) == 0) /* Initialize the HBA */
  2182. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  2183. lpfc_unblock_mgmt_io(phba);
  2184. return;
  2185. }
  2186. int
  2187. lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
  2188. {
  2189. MAILBOX_t *mb;
  2190. struct lpfc_sli *psli = &phba->sli;
  2191. uint32_t status, evtctr;
  2192. uint32_t ha_copy;
  2193. int i;
  2194. unsigned long drvr_flag = 0;
  2195. volatile uint32_t word0, ldata;
  2196. void __iomem *to_slim;
  2197. if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
  2198. pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
  2199. if(!pmbox->vport) {
  2200. lpfc_printf_log(phba, KERN_ERR,
  2201. LOG_MBOX | LOG_VPORT,
  2202. "1806 Mbox x%x failed. No vport\n",
  2203. pmbox->mb.mbxCommand);
  2204. dump_stack();
  2205. return MBXERR_ERROR;
  2206. }
  2207. }
  2208. /* If the PCI channel is in offline state, do not post mbox. */
  2209. if (unlikely(pci_channel_offline(phba->pcidev)))
  2210. return MBX_NOT_FINISHED;
  2211. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2212. psli = &phba->sli;
  2213. mb = &pmbox->mb;
  2214. status = MBX_SUCCESS;
  2215. if (phba->link_state == LPFC_HBA_ERROR) {
  2216. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2217. /* Mbox command <mbxCommand> cannot issue */
  2218. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2219. return MBX_NOT_FINISHED;
  2220. }
  2221. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  2222. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  2223. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2224. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2225. return MBX_NOT_FINISHED;
  2226. }
  2227. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  2228. /* Polling for a mbox command when another one is already active
  2229. * is not allowed in SLI. Also, the driver must have established
  2230. * SLI2 mode to queue and process multiple mbox commands.
  2231. */
  2232. if (flag & MBX_POLL) {
  2233. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2234. /* Mbox command <mbxCommand> cannot issue */
  2235. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2236. return MBX_NOT_FINISHED;
  2237. }
  2238. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  2239. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2240. /* Mbox command <mbxCommand> cannot issue */
  2241. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2242. return MBX_NOT_FINISHED;
  2243. }
  2244. /* Handle STOP IOCB processing flag. This is only meaningful
  2245. * if we are not polling for mbox completion.
  2246. */
  2247. if (flag & MBX_STOP_IOCB) {
  2248. flag &= ~MBX_STOP_IOCB;
  2249. /* Now flag each ring */
  2250. for (i = 0; i < psli->num_rings; i++) {
  2251. /* If the ring is active, flag it */
  2252. if (psli->ring[i].cmdringaddr) {
  2253. psli->ring[i].flag |=
  2254. LPFC_STOP_IOCB_MBX;
  2255. }
  2256. }
  2257. }
  2258. /* Another mailbox command is still being processed, queue this
  2259. * command to be processed later.
  2260. */
  2261. lpfc_mbox_put(phba, pmbox);
  2262. /* Mbox cmd issue - BUSY */
  2263. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2264. "(%d):0308 Mbox cmd issue - BUSY Data: "
  2265. "x%x x%x x%x x%x\n",
  2266. pmbox->vport ? pmbox->vport->vpi : 0xffffff,
  2267. mb->mbxCommand, phba->pport->port_state,
  2268. psli->sli_flag, flag);
  2269. psli->slistat.mbox_busy++;
  2270. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2271. if (pmbox->vport) {
  2272. lpfc_debugfs_disc_trc(pmbox->vport,
  2273. LPFC_DISC_TRC_MBOX_VPORT,
  2274. "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
  2275. (uint32_t)mb->mbxCommand,
  2276. mb->un.varWords[0], mb->un.varWords[1]);
  2277. }
  2278. else {
  2279. lpfc_debugfs_disc_trc(phba->pport,
  2280. LPFC_DISC_TRC_MBOX,
  2281. "MBOX Bsy: cmd:x%x mb:x%x x%x",
  2282. (uint32_t)mb->mbxCommand,
  2283. mb->un.varWords[0], mb->un.varWords[1]);
  2284. }
  2285. return MBX_BUSY;
  2286. }
  2287. /* Handle STOP IOCB processing flag. This is only meaningful
  2288. * if we are not polling for mbox completion.
  2289. */
  2290. if (flag & MBX_STOP_IOCB) {
  2291. flag &= ~MBX_STOP_IOCB;
  2292. if (flag == MBX_NOWAIT) {
  2293. /* Now flag each ring */
  2294. for (i = 0; i < psli->num_rings; i++) {
  2295. /* If the ring is active, flag it */
  2296. if (psli->ring[i].cmdringaddr) {
  2297. psli->ring[i].flag |=
  2298. LPFC_STOP_IOCB_MBX;
  2299. }
  2300. }
  2301. }
  2302. }
  2303. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2304. /* If we are not polling, we MUST be in SLI2 mode */
  2305. if (flag != MBX_POLL) {
  2306. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  2307. (mb->mbxCommand != MBX_KILL_BOARD)) {
  2308. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2309. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2310. /* Mbox command <mbxCommand> cannot issue */
  2311. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2312. return MBX_NOT_FINISHED;
  2313. }
  2314. /* timeout active mbox command */
  2315. mod_timer(&psli->mbox_tmo, (jiffies +
  2316. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  2317. }
  2318. /* Mailbox cmd <cmd> issue */
  2319. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2320. "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
  2321. "x%x\n",
  2322. pmbox->vport ? pmbox->vport->vpi : 0,
  2323. mb->mbxCommand, phba->pport->port_state,
  2324. psli->sli_flag, flag);
  2325. if (mb->mbxCommand != MBX_HEARTBEAT) {
  2326. if (pmbox->vport) {
  2327. lpfc_debugfs_disc_trc(pmbox->vport,
  2328. LPFC_DISC_TRC_MBOX_VPORT,
  2329. "MBOX Send vport: cmd:x%x mb:x%x x%x",
  2330. (uint32_t)mb->mbxCommand,
  2331. mb->un.varWords[0], mb->un.varWords[1]);
  2332. }
  2333. else {
  2334. lpfc_debugfs_disc_trc(phba->pport,
  2335. LPFC_DISC_TRC_MBOX,
  2336. "MBOX Send: cmd:x%x mb:x%x x%x",
  2337. (uint32_t)mb->mbxCommand,
  2338. mb->un.varWords[0], mb->un.varWords[1]);
  2339. }
  2340. }
  2341. psli->slistat.mbox_cmd++;
  2342. evtctr = psli->slistat.mbox_event;
  2343. /* next set own bit for the adapter and copy over command word */
  2344. mb->mbxOwner = OWN_CHIP;
  2345. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2346. /* First copy command data to host SLIM area */
  2347. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  2348. } else {
  2349. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2350. /* copy command data into host mbox for cmpl */
  2351. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  2352. MAILBOX_CMD_SIZE);
  2353. }
  2354. /* First copy mbox command data to HBA SLIM, skip past first
  2355. word */
  2356. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  2357. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  2358. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  2359. /* Next copy over first word, with mbxOwner set */
  2360. ldata = *((volatile uint32_t *)mb);
  2361. to_slim = phba->MBslimaddr;
  2362. writel(ldata, to_slim);
  2363. readl(to_slim); /* flush */
  2364. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2365. /* switch over to host mailbox */
  2366. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  2367. }
  2368. }
  2369. wmb();
  2370. /* interrupt board to doit right away */
  2371. writel(CA_MBATT, phba->CAregaddr);
  2372. readl(phba->CAregaddr); /* flush */
  2373. switch (flag) {
  2374. case MBX_NOWAIT:
  2375. /* Don't wait for it to finish, just return */
  2376. psli->mbox_active = pmbox;
  2377. break;
  2378. case MBX_POLL:
  2379. psli->mbox_active = NULL;
  2380. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2381. /* First read mbox status word */
  2382. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  2383. word0 = le32_to_cpu(word0);
  2384. } else {
  2385. /* First read mbox status word */
  2386. word0 = readl(phba->MBslimaddr);
  2387. }
  2388. /* Read the HBA Host Attention Register */
  2389. ha_copy = readl(phba->HAregaddr);
  2390. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  2391. i *= 1000; /* Convert to ms */
  2392. /* Wait for command to complete */
  2393. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2394. (!(ha_copy & HA_MBATT) &&
  2395. (phba->link_state > LPFC_WARM_START))) {
  2396. if (i-- <= 0) {
  2397. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2398. spin_unlock_irqrestore(&phba->hbalock,
  2399. drvr_flag);
  2400. return MBX_NOT_FINISHED;
  2401. }
  2402. /* Check if we took a mbox interrupt while we were
  2403. polling */
  2404. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2405. && (evtctr != psli->slistat.mbox_event))
  2406. break;
  2407. spin_unlock_irqrestore(&phba->hbalock,
  2408. drvr_flag);
  2409. msleep(1);
  2410. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2411. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2412. /* First copy command data */
  2413. word0 = *((volatile uint32_t *)
  2414. &phba->slim2p->mbx);
  2415. word0 = le32_to_cpu(word0);
  2416. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2417. MAILBOX_t *slimmb;
  2418. volatile uint32_t slimword0;
  2419. /* Check real SLIM for any errors */
  2420. slimword0 = readl(phba->MBslimaddr);
  2421. slimmb = (MAILBOX_t *) & slimword0;
  2422. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2423. && slimmb->mbxStatus) {
  2424. psli->sli_flag &=
  2425. ~LPFC_SLI2_ACTIVE;
  2426. word0 = slimword0;
  2427. }
  2428. }
  2429. } else {
  2430. /* First copy command data */
  2431. word0 = readl(phba->MBslimaddr);
  2432. }
  2433. /* Read the HBA Host Attention Register */
  2434. ha_copy = readl(phba->HAregaddr);
  2435. }
  2436. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2437. /* copy results back to user */
  2438. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2439. MAILBOX_CMD_SIZE);
  2440. } else {
  2441. /* First copy command data */
  2442. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2443. MAILBOX_CMD_SIZE);
  2444. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2445. pmbox->context2) {
  2446. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2447. phba->MBslimaddr + DMP_RSP_OFFSET,
  2448. mb->un.varDmp.word_cnt);
  2449. }
  2450. }
  2451. writel(HA_MBATT, phba->HAregaddr);
  2452. readl(phba->HAregaddr); /* flush */
  2453. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2454. status = mb->mbxStatus;
  2455. }
  2456. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2457. return status;
  2458. }
  2459. /*
  2460. * Caller needs to hold lock.
  2461. */
  2462. static void
  2463. __lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2464. struct lpfc_iocbq *piocb)
  2465. {
  2466. /* Insert the caller's iocb in the txq tail for later processing. */
  2467. list_add_tail(&piocb->list, &pring->txq);
  2468. pring->txq_cnt++;
  2469. }
  2470. static struct lpfc_iocbq *
  2471. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2472. struct lpfc_iocbq **piocb)
  2473. {
  2474. struct lpfc_iocbq * nextiocb;
  2475. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2476. if (!nextiocb) {
  2477. nextiocb = *piocb;
  2478. *piocb = NULL;
  2479. }
  2480. return nextiocb;
  2481. }
  2482. /*
  2483. * Lockless version of lpfc_sli_issue_iocb.
  2484. */
  2485. int
  2486. __lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2487. struct lpfc_iocbq *piocb, uint32_t flag)
  2488. {
  2489. struct lpfc_iocbq *nextiocb;
  2490. IOCB_t *iocb;
  2491. if (piocb->iocb_cmpl && (!piocb->vport) &&
  2492. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  2493. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  2494. lpfc_printf_log(phba, KERN_ERR,
  2495. LOG_SLI | LOG_VPORT,
  2496. "1807 IOCB x%x failed. No vport\n",
  2497. piocb->iocb.ulpCommand);
  2498. dump_stack();
  2499. return IOCB_ERROR;
  2500. }
  2501. /* If the PCI channel is in offline state, do not post iocbs. */
  2502. if (unlikely(pci_channel_offline(phba->pcidev)))
  2503. return IOCB_ERROR;
  2504. /*
  2505. * We should never get an IOCB if we are in a < LINK_DOWN state
  2506. */
  2507. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  2508. return IOCB_ERROR;
  2509. /*
  2510. * Check to see if we are blocking IOCB processing because of a
  2511. * outstanding mbox command.
  2512. */
  2513. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  2514. goto iocb_busy;
  2515. if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
  2516. /*
  2517. * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
  2518. * can be issued if the link is not up.
  2519. */
  2520. switch (piocb->iocb.ulpCommand) {
  2521. case CMD_QUE_RING_BUF_CN:
  2522. case CMD_QUE_RING_BUF64_CN:
  2523. /*
  2524. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2525. * completion, iocb_cmpl MUST be 0.
  2526. */
  2527. if (piocb->iocb_cmpl)
  2528. piocb->iocb_cmpl = NULL;
  2529. /*FALLTHROUGH*/
  2530. case CMD_CREATE_XRI_CR:
  2531. case CMD_CLOSE_XRI_CN:
  2532. case CMD_CLOSE_XRI_CX:
  2533. break;
  2534. default:
  2535. goto iocb_busy;
  2536. }
  2537. /*
  2538. * For FCP commands, we must be in a state where we can process link
  2539. * attention events.
  2540. */
  2541. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2542. !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
  2543. goto iocb_busy;
  2544. }
  2545. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2546. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2547. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2548. if (iocb)
  2549. lpfc_sli_update_ring(phba, pring);
  2550. else
  2551. lpfc_sli_update_full_ring(phba, pring);
  2552. if (!piocb)
  2553. return IOCB_SUCCESS;
  2554. goto out_busy;
  2555. iocb_busy:
  2556. pring->stats.iocb_cmd_delay++;
  2557. out_busy:
  2558. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2559. __lpfc_sli_ringtx_put(phba, pring, piocb);
  2560. return IOCB_SUCCESS;
  2561. }
  2562. return IOCB_BUSY;
  2563. }
  2564. int
  2565. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2566. struct lpfc_iocbq *piocb, uint32_t flag)
  2567. {
  2568. unsigned long iflags;
  2569. int rc;
  2570. spin_lock_irqsave(&phba->hbalock, iflags);
  2571. rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
  2572. spin_unlock_irqrestore(&phba->hbalock, iflags);
  2573. return rc;
  2574. }
  2575. static int
  2576. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2577. {
  2578. struct lpfc_sli *psli;
  2579. struct lpfc_sli_ring *pring;
  2580. psli = &phba->sli;
  2581. /* Adjust cmd/rsp ring iocb entries more evenly */
  2582. /* Take some away from the FCP ring */
  2583. pring = &psli->ring[psli->fcp_ring];
  2584. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2585. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2586. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2587. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2588. /* and give them to the extra ring */
  2589. pring = &psli->ring[psli->extra_ring];
  2590. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2591. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2592. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2593. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2594. /* Setup default profile for this ring */
  2595. pring->iotag_max = 4096;
  2596. pring->num_mask = 1;
  2597. pring->prt[0].profile = 0; /* Mask 0 */
  2598. pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
  2599. pring->prt[0].type = phba->cfg_multi_ring_type;
  2600. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2601. return 0;
  2602. }
  2603. int
  2604. lpfc_sli_setup(struct lpfc_hba *phba)
  2605. {
  2606. int i, totiocbsize = 0;
  2607. struct lpfc_sli *psli = &phba->sli;
  2608. struct lpfc_sli_ring *pring;
  2609. psli->num_rings = MAX_CONFIGURED_RINGS;
  2610. psli->sli_flag = 0;
  2611. psli->fcp_ring = LPFC_FCP_RING;
  2612. psli->next_ring = LPFC_FCP_NEXT_RING;
  2613. psli->extra_ring = LPFC_EXTRA_RING;
  2614. psli->iocbq_lookup = NULL;
  2615. psli->iocbq_lookup_len = 0;
  2616. psli->last_iotag = 0;
  2617. for (i = 0; i < psli->num_rings; i++) {
  2618. pring = &psli->ring[i];
  2619. switch (i) {
  2620. case LPFC_FCP_RING: /* ring 0 - FCP */
  2621. /* numCiocb and numRiocb are used in config_port */
  2622. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2623. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2624. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2625. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2626. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2627. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2628. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2629. SLI3_IOCB_CMD_SIZE :
  2630. SLI2_IOCB_CMD_SIZE;
  2631. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2632. SLI3_IOCB_RSP_SIZE :
  2633. SLI2_IOCB_RSP_SIZE;
  2634. pring->iotag_ctr = 0;
  2635. pring->iotag_max =
  2636. (phba->cfg_hba_queue_depth * 2);
  2637. pring->fast_iotag = pring->iotag_max;
  2638. pring->num_mask = 0;
  2639. break;
  2640. case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
  2641. /* numCiocb and numRiocb are used in config_port */
  2642. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2643. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2644. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2645. SLI3_IOCB_CMD_SIZE :
  2646. SLI2_IOCB_CMD_SIZE;
  2647. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2648. SLI3_IOCB_RSP_SIZE :
  2649. SLI2_IOCB_RSP_SIZE;
  2650. pring->iotag_max = phba->cfg_hba_queue_depth;
  2651. pring->num_mask = 0;
  2652. break;
  2653. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2654. /* numCiocb and numRiocb are used in config_port */
  2655. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2656. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2657. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2658. SLI3_IOCB_CMD_SIZE :
  2659. SLI2_IOCB_CMD_SIZE;
  2660. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2661. SLI3_IOCB_RSP_SIZE :
  2662. SLI2_IOCB_RSP_SIZE;
  2663. pring->fast_iotag = 0;
  2664. pring->iotag_ctr = 0;
  2665. pring->iotag_max = 4096;
  2666. pring->num_mask = 4;
  2667. pring->prt[0].profile = 0; /* Mask 0 */
  2668. pring->prt[0].rctl = FC_ELS_REQ;
  2669. pring->prt[0].type = FC_ELS_DATA;
  2670. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2671. lpfc_els_unsol_event;
  2672. pring->prt[1].profile = 0; /* Mask 1 */
  2673. pring->prt[1].rctl = FC_ELS_RSP;
  2674. pring->prt[1].type = FC_ELS_DATA;
  2675. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2676. lpfc_els_unsol_event;
  2677. pring->prt[2].profile = 0; /* Mask 2 */
  2678. /* NameServer Inquiry */
  2679. pring->prt[2].rctl = FC_UNSOL_CTL;
  2680. /* NameServer */
  2681. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2682. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2683. lpfc_ct_unsol_event;
  2684. pring->prt[3].profile = 0; /* Mask 3 */
  2685. /* NameServer response */
  2686. pring->prt[3].rctl = FC_SOL_CTL;
  2687. /* NameServer */
  2688. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2689. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2690. lpfc_ct_unsol_event;
  2691. break;
  2692. }
  2693. totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
  2694. (pring->numRiocb * pring->sizeRiocb);
  2695. }
  2696. if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
  2697. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2698. printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
  2699. "SLI2 SLIM Data: x%x x%lx\n",
  2700. phba->brd_no, totiocbsize,
  2701. (unsigned long) MAX_SLIM_IOCB_SIZE);
  2702. }
  2703. if (phba->cfg_multi_ring_support == 2)
  2704. lpfc_extra_ring_setup(phba);
  2705. return 0;
  2706. }
  2707. int
  2708. lpfc_sli_queue_setup(struct lpfc_hba *phba)
  2709. {
  2710. struct lpfc_sli *psli;
  2711. struct lpfc_sli_ring *pring;
  2712. int i;
  2713. psli = &phba->sli;
  2714. spin_lock_irq(&phba->hbalock);
  2715. INIT_LIST_HEAD(&psli->mboxq);
  2716. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2717. /* Initialize list headers for txq and txcmplq as double linked lists */
  2718. for (i = 0; i < psli->num_rings; i++) {
  2719. pring = &psli->ring[i];
  2720. pring->ringno = i;
  2721. pring->next_cmdidx = 0;
  2722. pring->local_getidx = 0;
  2723. pring->cmdidx = 0;
  2724. INIT_LIST_HEAD(&pring->txq);
  2725. INIT_LIST_HEAD(&pring->txcmplq);
  2726. INIT_LIST_HEAD(&pring->iocb_continueq);
  2727. INIT_LIST_HEAD(&pring->postbufq);
  2728. }
  2729. spin_unlock_irq(&phba->hbalock);
  2730. return 1;
  2731. }
  2732. int
  2733. lpfc_sli_host_down(struct lpfc_vport *vport)
  2734. {
  2735. LIST_HEAD(completions);
  2736. struct lpfc_hba *phba = vport->phba;
  2737. struct lpfc_sli *psli = &phba->sli;
  2738. struct lpfc_sli_ring *pring;
  2739. struct lpfc_iocbq *iocb, *next_iocb;
  2740. int i;
  2741. unsigned long flags = 0;
  2742. uint16_t prev_pring_flag;
  2743. lpfc_cleanup_discovery_resources(vport);
  2744. spin_lock_irqsave(&phba->hbalock, flags);
  2745. for (i = 0; i < psli->num_rings; i++) {
  2746. pring = &psli->ring[i];
  2747. prev_pring_flag = pring->flag;
  2748. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2749. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2750. /*
  2751. * Error everything on the txq since these iocbs have not been
  2752. * given to the FW yet.
  2753. */
  2754. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2755. if (iocb->vport != vport)
  2756. continue;
  2757. list_move_tail(&iocb->list, &completions);
  2758. pring->txq_cnt--;
  2759. }
  2760. /* Next issue ABTS for everything on the txcmplq */
  2761. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
  2762. list) {
  2763. if (iocb->vport != vport)
  2764. continue;
  2765. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  2766. }
  2767. pring->flag = prev_pring_flag;
  2768. }
  2769. spin_unlock_irqrestore(&phba->hbalock, flags);
  2770. while (!list_empty(&completions)) {
  2771. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2772. if (!iocb->iocb_cmpl)
  2773. lpfc_sli_release_iocbq(phba, iocb);
  2774. else {
  2775. iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2776. iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
  2777. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2778. }
  2779. }
  2780. return 1;
  2781. }
  2782. int
  2783. lpfc_sli_hba_down(struct lpfc_hba *phba)
  2784. {
  2785. LIST_HEAD(completions);
  2786. struct lpfc_sli *psli = &phba->sli;
  2787. struct lpfc_sli_ring *pring;
  2788. LPFC_MBOXQ_t *pmb;
  2789. struct lpfc_iocbq *iocb;
  2790. IOCB_t *cmd = NULL;
  2791. int i;
  2792. unsigned long flags = 0;
  2793. lpfc_hba_down_prep(phba);
  2794. lpfc_fabric_abort_hba(phba);
  2795. spin_lock_irqsave(&phba->hbalock, flags);
  2796. for (i = 0; i < psli->num_rings; i++) {
  2797. pring = &psli->ring[i];
  2798. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2799. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2800. /*
  2801. * Error everything on the txq since these iocbs have not been
  2802. * given to the FW yet.
  2803. */
  2804. list_splice_init(&pring->txq, &completions);
  2805. pring->txq_cnt = 0;
  2806. }
  2807. spin_unlock_irqrestore(&phba->hbalock, flags);
  2808. while (!list_empty(&completions)) {
  2809. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2810. cmd = &iocb->iocb;
  2811. if (!iocb->iocb_cmpl)
  2812. lpfc_sli_release_iocbq(phba, iocb);
  2813. else {
  2814. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2815. cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2816. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2817. }
  2818. }
  2819. /* Return any active mbox cmds */
  2820. del_timer_sync(&psli->mbox_tmo);
  2821. spin_lock_irqsave(&phba->hbalock, flags);
  2822. spin_lock(&phba->pport->work_port_lock);
  2823. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2824. spin_unlock(&phba->pport->work_port_lock);
  2825. if (psli->mbox_active) {
  2826. list_add_tail(&psli->mbox_active->list, &completions);
  2827. psli->mbox_active = NULL;
  2828. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2829. }
  2830. /* Return any pending or completed mbox cmds */
  2831. list_splice_init(&phba->sli.mboxq, &completions);
  2832. list_splice_init(&phba->sli.mboxq_cmpl, &completions);
  2833. INIT_LIST_HEAD(&psli->mboxq);
  2834. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2835. spin_unlock_irqrestore(&phba->hbalock, flags);
  2836. while (!list_empty(&completions)) {
  2837. list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
  2838. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2839. if (pmb->mbox_cmpl) {
  2840. pmb->mbox_cmpl(phba,pmb);
  2841. }
  2842. }
  2843. return 1;
  2844. }
  2845. void
  2846. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2847. {
  2848. uint32_t *src = srcp;
  2849. uint32_t *dest = destp;
  2850. uint32_t ldata;
  2851. int i;
  2852. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2853. ldata = *src;
  2854. ldata = le32_to_cpu(ldata);
  2855. *dest = ldata;
  2856. src++;
  2857. dest++;
  2858. }
  2859. }
  2860. int
  2861. lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2862. struct lpfc_dmabuf *mp)
  2863. {
  2864. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2865. later */
  2866. spin_lock_irq(&phba->hbalock);
  2867. list_add_tail(&mp->list, &pring->postbufq);
  2868. pring->postbufq_cnt++;
  2869. spin_unlock_irq(&phba->hbalock);
  2870. return 0;
  2871. }
  2872. struct lpfc_dmabuf *
  2873. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2874. dma_addr_t phys)
  2875. {
  2876. struct lpfc_dmabuf *mp, *next_mp;
  2877. struct list_head *slp = &pring->postbufq;
  2878. /* Search postbufq, from the begining, looking for a match on phys */
  2879. spin_lock_irq(&phba->hbalock);
  2880. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2881. if (mp->phys == phys) {
  2882. list_del_init(&mp->list);
  2883. pring->postbufq_cnt--;
  2884. spin_unlock_irq(&phba->hbalock);
  2885. return mp;
  2886. }
  2887. }
  2888. spin_unlock_irq(&phba->hbalock);
  2889. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2890. "0410 Cannot find virtual addr for mapped buf on "
  2891. "ring %d Data x%llx x%p x%p x%x\n",
  2892. pring->ringno, (unsigned long long)phys,
  2893. slp->next, slp->prev, pring->postbufq_cnt);
  2894. return NULL;
  2895. }
  2896. static void
  2897. lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  2898. struct lpfc_iocbq *rspiocb)
  2899. {
  2900. IOCB_t *irsp = &rspiocb->iocb;
  2901. uint16_t abort_iotag, abort_context;
  2902. struct lpfc_iocbq *abort_iocb;
  2903. struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
  2904. abort_iocb = NULL;
  2905. if (irsp->ulpStatus) {
  2906. abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
  2907. abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
  2908. spin_lock_irq(&phba->hbalock);
  2909. if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
  2910. abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
  2911. lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
  2912. "0327 Cannot abort els iocb %p "
  2913. "with tag %x context %x, abort status %x, "
  2914. "abort code %x\n",
  2915. abort_iocb, abort_iotag, abort_context,
  2916. irsp->ulpStatus, irsp->un.ulpWord[4]);
  2917. /*
  2918. * make sure we have the right iocbq before taking it
  2919. * off the txcmplq and try to call completion routine.
  2920. */
  2921. if (!abort_iocb ||
  2922. abort_iocb->iocb.ulpContext != abort_context ||
  2923. (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
  2924. spin_unlock_irq(&phba->hbalock);
  2925. else {
  2926. list_del_init(&abort_iocb->list);
  2927. pring->txcmplq_cnt--;
  2928. spin_unlock_irq(&phba->hbalock);
  2929. abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
  2930. abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2931. abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
  2932. (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
  2933. }
  2934. }
  2935. lpfc_sli_release_iocbq(phba, cmdiocb);
  2936. return;
  2937. }
  2938. static void
  2939. lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  2940. struct lpfc_iocbq *rspiocb)
  2941. {
  2942. IOCB_t *irsp = &rspiocb->iocb;
  2943. /* ELS cmd tag <ulpIoTag> completes */
  2944. lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
  2945. "0133 Ignoring ELS cmd tag x%x completion Data: "
  2946. "x%x x%x x%x\n",
  2947. irsp->ulpIoTag, irsp->ulpStatus,
  2948. irsp->un.ulpWord[4], irsp->ulpTimeout);
  2949. if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
  2950. lpfc_ct_free_iocb(phba, cmdiocb);
  2951. else
  2952. lpfc_els_free_iocb(phba, cmdiocb);
  2953. return;
  2954. }
  2955. int
  2956. lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2957. struct lpfc_iocbq *cmdiocb)
  2958. {
  2959. struct lpfc_vport *vport = cmdiocb->vport;
  2960. struct lpfc_iocbq *abtsiocbp;
  2961. IOCB_t *icmd = NULL;
  2962. IOCB_t *iabt = NULL;
  2963. int retval = IOCB_ERROR;
  2964. /*
  2965. * There are certain command types we don't want to abort. And we
  2966. * don't want to abort commands that are already in the process of
  2967. * being aborted.
  2968. */
  2969. icmd = &cmdiocb->iocb;
  2970. if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
  2971. icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
  2972. (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
  2973. return 0;
  2974. /* If we're unloading, don't abort iocb on the ELS ring, but change the
  2975. * callback so that nothing happens when it finishes.
  2976. */
  2977. if ((vport->load_flag & FC_UNLOADING) &&
  2978. (pring->ringno == LPFC_ELS_RING)) {
  2979. if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
  2980. cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
  2981. else
  2982. cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
  2983. goto abort_iotag_exit;
  2984. }
  2985. /* issue ABTS for this IOCB based on iotag */
  2986. abtsiocbp = __lpfc_sli_get_iocbq(phba);
  2987. if (abtsiocbp == NULL)
  2988. return 0;
  2989. /* This signals the response to set the correct status
  2990. * before calling the completion handler.
  2991. */
  2992. cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
  2993. iabt = &abtsiocbp->iocb;
  2994. iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
  2995. iabt->un.acxri.abortContextTag = icmd->ulpContext;
  2996. iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
  2997. iabt->ulpLe = 1;
  2998. iabt->ulpClass = icmd->ulpClass;
  2999. if (phba->link_state >= LPFC_LINK_UP)
  3000. iabt->ulpCommand = CMD_ABORT_XRI_CN;
  3001. else
  3002. iabt->ulpCommand = CMD_CLOSE_XRI_CN;
  3003. abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
  3004. lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
  3005. "0339 Abort xri x%x, original iotag x%x, "
  3006. "abort cmd iotag x%x\n",
  3007. iabt->un.acxri.abortContextTag,
  3008. iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
  3009. retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
  3010. abort_iotag_exit:
  3011. /*
  3012. * Caller to this routine should check for IOCB_ERROR
  3013. * and handle it properly. This routine no longer removes
  3014. * iocb off txcmplq and call compl in case of IOCB_ERROR.
  3015. */
  3016. return retval;
  3017. }
  3018. static int
  3019. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
  3020. uint16_t tgt_id, uint64_t lun_id,
  3021. lpfc_ctx_cmd ctx_cmd)
  3022. {
  3023. struct lpfc_scsi_buf *lpfc_cmd;
  3024. struct scsi_cmnd *cmnd;
  3025. int rc = 1;
  3026. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  3027. return rc;
  3028. if (iocbq->vport != vport)
  3029. return rc;
  3030. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  3031. cmnd = lpfc_cmd->pCmd;
  3032. if (cmnd == NULL)
  3033. return rc;
  3034. switch (ctx_cmd) {
  3035. case LPFC_CTX_LUN:
  3036. if ((cmnd->device->id == tgt_id) &&
  3037. (cmnd->device->lun == lun_id))
  3038. rc = 0;
  3039. break;
  3040. case LPFC_CTX_TGT:
  3041. if (cmnd->device->id == tgt_id)
  3042. rc = 0;
  3043. break;
  3044. case LPFC_CTX_HOST:
  3045. rc = 0;
  3046. break;
  3047. default:
  3048. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  3049. __FUNCTION__, ctx_cmd);
  3050. break;
  3051. }
  3052. return rc;
  3053. }
  3054. int
  3055. lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
  3056. lpfc_ctx_cmd ctx_cmd)
  3057. {
  3058. struct lpfc_hba *phba = vport->phba;
  3059. struct lpfc_iocbq *iocbq;
  3060. int sum, i;
  3061. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  3062. iocbq = phba->sli.iocbq_lookup[i];
  3063. if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
  3064. ctx_cmd) == 0)
  3065. sum++;
  3066. }
  3067. return sum;
  3068. }
  3069. void
  3070. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3071. struct lpfc_iocbq *rspiocb)
  3072. {
  3073. lpfc_sli_release_iocbq(phba, cmdiocb);
  3074. return;
  3075. }
  3076. int
  3077. lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
  3078. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
  3079. {
  3080. struct lpfc_hba *phba = vport->phba;
  3081. struct lpfc_iocbq *iocbq;
  3082. struct lpfc_iocbq *abtsiocb;
  3083. IOCB_t *cmd = NULL;
  3084. int errcnt = 0, ret_val = 0;
  3085. int i;
  3086. for (i = 1; i <= phba->sli.last_iotag; i++) {
  3087. iocbq = phba->sli.iocbq_lookup[i];
  3088. if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
  3089. abort_cmd) != 0)
  3090. continue;
  3091. /* issue ABTS for this IOCB based on iotag */
  3092. abtsiocb = lpfc_sli_get_iocbq(phba);
  3093. if (abtsiocb == NULL) {
  3094. errcnt++;
  3095. continue;
  3096. }
  3097. cmd = &iocbq->iocb;
  3098. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  3099. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  3100. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  3101. abtsiocb->iocb.ulpLe = 1;
  3102. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  3103. abtsiocb->vport = phba->pport;
  3104. if (lpfc_is_link_up(phba))
  3105. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  3106. else
  3107. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  3108. /* Setup callback routine and issue the command. */
  3109. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  3110. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  3111. if (ret_val == IOCB_ERROR) {
  3112. lpfc_sli_release_iocbq(phba, abtsiocb);
  3113. errcnt++;
  3114. continue;
  3115. }
  3116. }
  3117. return errcnt;
  3118. }
  3119. static void
  3120. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  3121. struct lpfc_iocbq *cmdiocbq,
  3122. struct lpfc_iocbq *rspiocbq)
  3123. {
  3124. wait_queue_head_t *pdone_q;
  3125. unsigned long iflags;
  3126. spin_lock_irqsave(&phba->hbalock, iflags);
  3127. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  3128. if (cmdiocbq->context2 && rspiocbq)
  3129. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  3130. &rspiocbq->iocb, sizeof(IOCB_t));
  3131. pdone_q = cmdiocbq->context_un.wait_queue;
  3132. if (pdone_q)
  3133. wake_up(pdone_q);
  3134. spin_unlock_irqrestore(&phba->hbalock, iflags);
  3135. return;
  3136. }
  3137. /*
  3138. * Issue the caller's iocb and wait for its completion, but no longer than the
  3139. * caller's timeout. Note that iocb_flags is cleared before the
  3140. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  3141. * definition this is a wait function.
  3142. */
  3143. int
  3144. lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
  3145. struct lpfc_sli_ring *pring,
  3146. struct lpfc_iocbq *piocb,
  3147. struct lpfc_iocbq *prspiocbq,
  3148. uint32_t timeout)
  3149. {
  3150. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3151. long timeleft, timeout_req = 0;
  3152. int retval = IOCB_SUCCESS;
  3153. uint32_t creg_val;
  3154. /*
  3155. * If the caller has provided a response iocbq buffer, then context2
  3156. * is NULL or its an error.
  3157. */
  3158. if (prspiocbq) {
  3159. if (piocb->context2)
  3160. return IOCB_ERROR;
  3161. piocb->context2 = prspiocbq;
  3162. }
  3163. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  3164. piocb->context_un.wait_queue = &done_q;
  3165. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  3166. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3167. creg_val = readl(phba->HCregaddr);
  3168. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  3169. writel(creg_val, phba->HCregaddr);
  3170. readl(phba->HCregaddr); /* flush */
  3171. }
  3172. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  3173. if (retval == IOCB_SUCCESS) {
  3174. timeout_req = timeout * HZ;
  3175. timeleft = wait_event_timeout(done_q,
  3176. piocb->iocb_flag & LPFC_IO_WAKE,
  3177. timeout_req);
  3178. if (piocb->iocb_flag & LPFC_IO_WAKE) {
  3179. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3180. "0331 IOCB wake signaled\n");
  3181. } else if (timeleft == 0) {
  3182. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3183. "0338 IOCB wait timeout error - no "
  3184. "wake response Data x%x\n", timeout);
  3185. retval = IOCB_TIMEDOUT;
  3186. } else {
  3187. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3188. "0330 IOCB wake NOT set, "
  3189. "Data x%x x%lx\n",
  3190. timeout, (timeleft / jiffies));
  3191. retval = IOCB_TIMEDOUT;
  3192. }
  3193. } else {
  3194. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3195. ":0332 IOCB wait issue failed, Data x%x\n",
  3196. retval);
  3197. retval = IOCB_ERROR;
  3198. }
  3199. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3200. creg_val = readl(phba->HCregaddr);
  3201. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  3202. writel(creg_val, phba->HCregaddr);
  3203. readl(phba->HCregaddr); /* flush */
  3204. }
  3205. if (prspiocbq)
  3206. piocb->context2 = NULL;
  3207. piocb->context_un.wait_queue = NULL;
  3208. piocb->iocb_cmpl = NULL;
  3209. return retval;
  3210. }
  3211. int
  3212. lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
  3213. uint32_t timeout)
  3214. {
  3215. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3216. int retval;
  3217. unsigned long flag;
  3218. /* The caller must leave context1 empty. */
  3219. if (pmboxq->context1 != 0)
  3220. return MBX_NOT_FINISHED;
  3221. /* setup wake call as IOCB callback */
  3222. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  3223. /* setup context field to pass wait_queue pointer to wake function */
  3224. pmboxq->context1 = &done_q;
  3225. /* now issue the command */
  3226. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  3227. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  3228. wait_event_interruptible_timeout(done_q,
  3229. pmboxq->mbox_flag & LPFC_MBX_WAKE,
  3230. timeout * HZ);
  3231. spin_lock_irqsave(&phba->hbalock, flag);
  3232. pmboxq->context1 = NULL;
  3233. /*
  3234. * if LPFC_MBX_WAKE flag is set the mailbox is completed
  3235. * else do not free the resources.
  3236. */
  3237. if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
  3238. retval = MBX_SUCCESS;
  3239. else {
  3240. retval = MBX_TIMEOUT;
  3241. pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  3242. }
  3243. spin_unlock_irqrestore(&phba->hbalock, flag);
  3244. }
  3245. return retval;
  3246. }
  3247. int
  3248. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  3249. {
  3250. struct lpfc_vport *vport = phba->pport;
  3251. int i = 0;
  3252. uint32_t ha_copy;
  3253. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
  3254. if (i++ > LPFC_MBOX_TMO * 1000)
  3255. return 1;
  3256. /*
  3257. * Call lpfc_sli_handle_mb_event only if a mailbox cmd
  3258. * did finish. This way we won't get the misleading
  3259. * "Stray Mailbox Interrupt" message.
  3260. */
  3261. spin_lock_irq(&phba->hbalock);
  3262. ha_copy = phba->work_ha;
  3263. phba->work_ha &= ~HA_MBATT;
  3264. spin_unlock_irq(&phba->hbalock);
  3265. if (ha_copy & HA_MBATT)
  3266. if (lpfc_sli_handle_mb_event(phba) == 0)
  3267. i = 0;
  3268. msleep(1);
  3269. }
  3270. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  3271. }
  3272. irqreturn_t
  3273. lpfc_intr_handler(int irq, void *dev_id)
  3274. {
  3275. struct lpfc_hba *phba;
  3276. uint32_t ha_copy;
  3277. uint32_t work_ha_copy;
  3278. unsigned long status;
  3279. int i;
  3280. uint32_t control;
  3281. MAILBOX_t *mbox, *pmbox;
  3282. struct lpfc_vport *vport;
  3283. struct lpfc_nodelist *ndlp;
  3284. struct lpfc_dmabuf *mp;
  3285. LPFC_MBOXQ_t *pmb;
  3286. int rc;
  3287. /*
  3288. * Get the driver's phba structure from the dev_id and
  3289. * assume the HBA is not interrupting.
  3290. */
  3291. phba = (struct lpfc_hba *) dev_id;
  3292. if (unlikely(!phba))
  3293. return IRQ_NONE;
  3294. /* If the pci channel is offline, ignore all the interrupts. */
  3295. if (unlikely(pci_channel_offline(phba->pcidev)))
  3296. return IRQ_NONE;
  3297. phba->sli.slistat.sli_intr++;
  3298. /*
  3299. * Call the HBA to see if it is interrupting. If not, don't claim
  3300. * the interrupt
  3301. */
  3302. /* Ignore all interrupts during initialization. */
  3303. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  3304. return IRQ_NONE;
  3305. /*
  3306. * Read host attention register to determine interrupt source
  3307. * Clear Attention Sources, except Error Attention (to
  3308. * preserve status) and Link Attention
  3309. */
  3310. spin_lock(&phba->hbalock);
  3311. ha_copy = readl(phba->HAregaddr);
  3312. /* If somebody is waiting to handle an eratt don't process it
  3313. * here. The brdkill function will do this.
  3314. */
  3315. if (phba->link_flag & LS_IGNORE_ERATT)
  3316. ha_copy &= ~HA_ERATT;
  3317. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  3318. readl(phba->HAregaddr); /* flush */
  3319. spin_unlock(&phba->hbalock);
  3320. if (unlikely(!ha_copy))
  3321. return IRQ_NONE;
  3322. work_ha_copy = ha_copy & phba->work_ha_mask;
  3323. if (unlikely(work_ha_copy)) {
  3324. if (work_ha_copy & HA_LATT) {
  3325. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  3326. /*
  3327. * Turn off Link Attention interrupts
  3328. * until CLEAR_LA done
  3329. */
  3330. spin_lock(&phba->hbalock);
  3331. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  3332. control = readl(phba->HCregaddr);
  3333. control &= ~HC_LAINT_ENA;
  3334. writel(control, phba->HCregaddr);
  3335. readl(phba->HCregaddr); /* flush */
  3336. spin_unlock(&phba->hbalock);
  3337. }
  3338. else
  3339. work_ha_copy &= ~HA_LATT;
  3340. }
  3341. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  3342. /*
  3343. * Turn off Slow Rings interrupts, LPFC_ELS_RING is
  3344. * the only slow ring.
  3345. */
  3346. status = (work_ha_copy &
  3347. (HA_RXMASK << (4*LPFC_ELS_RING)));
  3348. status >>= (4*LPFC_ELS_RING);
  3349. if (status & HA_RXMASK) {
  3350. spin_lock(&phba->hbalock);
  3351. control = readl(phba->HCregaddr);
  3352. lpfc_debugfs_slow_ring_trc(phba,
  3353. "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
  3354. control, status,
  3355. (uint32_t)phba->sli.slistat.sli_intr);
  3356. if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
  3357. lpfc_debugfs_slow_ring_trc(phba,
  3358. "ISR Disable ring:"
  3359. "pwork:x%x hawork:x%x wait:x%x",
  3360. phba->work_ha, work_ha_copy,
  3361. (uint32_t)((unsigned long)
  3362. phba->work_wait));
  3363. control &=
  3364. ~(HC_R0INT_ENA << LPFC_ELS_RING);
  3365. writel(control, phba->HCregaddr);
  3366. readl(phba->HCregaddr); /* flush */
  3367. }
  3368. else {
  3369. lpfc_debugfs_slow_ring_trc(phba,
  3370. "ISR slow ring: pwork:"
  3371. "x%x hawork:x%x wait:x%x",
  3372. phba->work_ha, work_ha_copy,
  3373. (uint32_t)((unsigned long)
  3374. phba->work_wait));
  3375. }
  3376. spin_unlock(&phba->hbalock);
  3377. }
  3378. }
  3379. if (work_ha_copy & HA_ERATT) {
  3380. phba->link_state = LPFC_HBA_ERROR;
  3381. /*
  3382. * There was a link/board error. Read the
  3383. * status register to retrieve the error event
  3384. * and process it.
  3385. */
  3386. phba->sli.slistat.err_attn_event++;
  3387. /* Save status info */
  3388. phba->work_hs = readl(phba->HSregaddr);
  3389. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  3390. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  3391. /* Clear Chip error bit */
  3392. writel(HA_ERATT, phba->HAregaddr);
  3393. readl(phba->HAregaddr); /* flush */
  3394. phba->pport->stopped = 1;
  3395. }
  3396. if ((work_ha_copy & HA_MBATT) &&
  3397. (phba->sli.mbox_active)) {
  3398. pmb = phba->sli.mbox_active;
  3399. pmbox = &pmb->mb;
  3400. mbox = &phba->slim2p->mbx;
  3401. vport = pmb->vport;
  3402. /* First check out the status word */
  3403. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
  3404. if (pmbox->mbxOwner != OWN_HOST) {
  3405. /*
  3406. * Stray Mailbox Interrupt, mbxCommand <cmd>
  3407. * mbxStatus <status>
  3408. */
  3409. lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
  3410. LOG_SLI,
  3411. "(%d):0304 Stray Mailbox "
  3412. "Interrupt mbxCommand x%x "
  3413. "mbxStatus x%x\n",
  3414. (vport ? vport->vpi : 0),
  3415. pmbox->mbxCommand,
  3416. pmbox->mbxStatus);
  3417. }
  3418. phba->last_completion_time = jiffies;
  3419. del_timer_sync(&phba->sli.mbox_tmo);
  3420. phba->sli.mbox_active = NULL;
  3421. if (pmb->mbox_cmpl) {
  3422. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  3423. MAILBOX_CMD_SIZE);
  3424. }
  3425. if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
  3426. pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
  3427. lpfc_debugfs_disc_trc(vport,
  3428. LPFC_DISC_TRC_MBOX_VPORT,
  3429. "MBOX dflt rpi: : status:x%x rpi:x%x",
  3430. (uint32_t)pmbox->mbxStatus,
  3431. pmbox->un.varWords[0], 0);
  3432. if ( !pmbox->mbxStatus) {
  3433. mp = (struct lpfc_dmabuf *)
  3434. (pmb->context1);
  3435. ndlp = (struct lpfc_nodelist *)
  3436. pmb->context2;
  3437. /* Reg_LOGIN of dflt RPI was successful.
  3438. * new lets get rid of the RPI using the
  3439. * same mbox buffer.
  3440. */
  3441. lpfc_unreg_login(phba, vport->vpi,
  3442. pmbox->un.varWords[0], pmb);
  3443. pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
  3444. pmb->context1 = mp;
  3445. pmb->context2 = ndlp;
  3446. pmb->vport = vport;
  3447. spin_lock(&phba->hbalock);
  3448. phba->sli.sli_flag &=
  3449. ~LPFC_SLI_MBOX_ACTIVE;
  3450. spin_unlock(&phba->hbalock);
  3451. goto send_current_mbox;
  3452. }
  3453. }
  3454. spin_lock(&phba->pport->work_port_lock);
  3455. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  3456. spin_unlock(&phba->pport->work_port_lock);
  3457. lpfc_mbox_cmpl_put(phba, pmb);
  3458. }
  3459. if ((work_ha_copy & HA_MBATT) &&
  3460. (phba->sli.mbox_active == NULL)) {
  3461. send_next_mbox:
  3462. spin_lock(&phba->hbalock);
  3463. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  3464. pmb = lpfc_mbox_get(phba);
  3465. spin_unlock(&phba->hbalock);
  3466. send_current_mbox:
  3467. /* Process next mailbox command if there is one */
  3468. if (pmb != NULL) {
  3469. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  3470. if (rc == MBX_NOT_FINISHED) {
  3471. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  3472. lpfc_mbox_cmpl_put(phba, pmb);
  3473. goto send_next_mbox;
  3474. }
  3475. } else {
  3476. /* Turn on IOCB processing */
  3477. for (i = 0; i < phba->sli.num_rings; i++)
  3478. lpfc_sli_turn_on_ring(phba, i);
  3479. }
  3480. }
  3481. spin_lock(&phba->hbalock);
  3482. phba->work_ha |= work_ha_copy;
  3483. if (phba->work_wait)
  3484. lpfc_worker_wake_up(phba);
  3485. spin_unlock(&phba->hbalock);
  3486. }
  3487. ha_copy &= ~(phba->work_ha_mask);
  3488. /*
  3489. * Process all events on FCP ring. Take the optimized path for
  3490. * FCP IO. Any other IO is slow path and is handled by
  3491. * the worker thread.
  3492. */
  3493. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  3494. status >>= (4*LPFC_FCP_RING);
  3495. if (status & HA_RXMASK)
  3496. lpfc_sli_handle_fast_ring_event(phba,
  3497. &phba->sli.ring[LPFC_FCP_RING],
  3498. status);
  3499. if (phba->cfg_multi_ring_support == 2) {
  3500. /*
  3501. * Process all events on extra ring. Take the optimized path
  3502. * for extra ring IO. Any other IO is slow path and is handled
  3503. * by the worker thread.
  3504. */
  3505. status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
  3506. status >>= (4*LPFC_EXTRA_RING);
  3507. if (status & HA_RXMASK) {
  3508. lpfc_sli_handle_fast_ring_event(phba,
  3509. &phba->sli.ring[LPFC_EXTRA_RING],
  3510. status);
  3511. }
  3512. }
  3513. return IRQ_HANDLED;
  3514. } /* lpfc_intr_handler */