iwl4965-base.c 256 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. /*
  30. * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets
  31. * by defining IWL to either 3945 or 4965. The Makefile used when building
  32. * the base targets will create base-3945.o and base-4965.o
  33. *
  34. * The eventual goal is to move as many of the #if IWL / #endif blocks out of
  35. * this file and into the hardware specific implementation files (iwl-XXXX.c)
  36. * and leave only the common (non #ifdef sprinkled) code in this file
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/module.h>
  40. #include <linux/version.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/delay.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/wireless.h>
  48. #include <linux/firmware.h>
  49. #include <linux/skbuff.h>
  50. #include <linux/netdevice.h>
  51. #include <linux/etherdevice.h>
  52. #include <linux/if_arp.h>
  53. #include <net/ieee80211_radiotap.h>
  54. #include <net/mac80211.h>
  55. #include <asm/div64.h>
  56. #define IWL 4965
  57. #include "iwlwifi.h"
  58. #include "iwl-4965.h"
  59. #include "iwl-helpers.h"
  60. #ifdef CONFIG_IWLWIFI_DEBUG
  61. u32 iwl_debug_level;
  62. #endif
  63. /******************************************************************************
  64. *
  65. * module boiler plate
  66. *
  67. ******************************************************************************/
  68. /* module parameters */
  69. int iwl_param_disable_hw_scan;
  70. int iwl_param_debug;
  71. int iwl_param_disable; /* def: enable radio */
  72. int iwl_param_antenna; /* def: 0 = both antennas (use diversity) */
  73. int iwl_param_hwcrypto; /* def: using software encryption */
  74. int iwl_param_qos_enable = 1;
  75. int iwl_param_queues_num = IWL_MAX_NUM_QUEUES;
  76. /*
  77. * module name, copyright, version, etc.
  78. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  79. */
  80. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  81. #ifdef CONFIG_IWLWIFI_DEBUG
  82. #define VD "d"
  83. #else
  84. #define VD
  85. #endif
  86. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  87. #define VS "s"
  88. #else
  89. #define VS
  90. #endif
  91. #define IWLWIFI_VERSION "1.1.17k" VD VS
  92. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  93. #define DRV_VERSION IWLWIFI_VERSION
  94. /* Change firmware file name, using "-" and incrementing number,
  95. * *only* when uCode interface or architecture changes so that it
  96. * is not compatible with earlier drivers.
  97. * This number will also appear in << 8 position of 1st dword of uCode file */
  98. #define IWL4965_UCODE_API "-1"
  99. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  100. MODULE_VERSION(DRV_VERSION);
  101. MODULE_AUTHOR(DRV_COPYRIGHT);
  102. MODULE_LICENSE("GPL");
  103. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  104. {
  105. u16 fc = le16_to_cpu(hdr->frame_control);
  106. int hdr_len = ieee80211_get_hdrlen(fc);
  107. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  108. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  109. return NULL;
  110. }
  111. static const struct ieee80211_hw_mode *iwl_get_hw_mode(
  112. struct iwl_priv *priv, int mode)
  113. {
  114. int i;
  115. for (i = 0; i < 3; i++)
  116. if (priv->modes[i].mode == mode)
  117. return &priv->modes[i];
  118. return NULL;
  119. }
  120. static int iwl_is_empty_essid(const char *essid, int essid_len)
  121. {
  122. /* Single white space is for Linksys APs */
  123. if (essid_len == 1 && essid[0] == ' ')
  124. return 1;
  125. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  126. while (essid_len) {
  127. essid_len--;
  128. if (essid[essid_len] != '\0')
  129. return 0;
  130. }
  131. return 1;
  132. }
  133. static const char *iwl_escape_essid(const char *essid, u8 essid_len)
  134. {
  135. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  136. const char *s = essid;
  137. char *d = escaped;
  138. if (iwl_is_empty_essid(essid, essid_len)) {
  139. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  140. return escaped;
  141. }
  142. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  143. while (essid_len--) {
  144. if (*s == '\0') {
  145. *d++ = '\\';
  146. *d++ = '0';
  147. s++;
  148. } else
  149. *d++ = *s++;
  150. }
  151. *d = '\0';
  152. return escaped;
  153. }
  154. static void iwl_print_hex_dump(int level, void *p, u32 len)
  155. {
  156. #ifdef CONFIG_IWLWIFI_DEBUG
  157. if (!(iwl_debug_level & level))
  158. return;
  159. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  160. p, len, 1);
  161. #endif
  162. }
  163. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  164. * DMA services
  165. *
  166. * Theory of operation
  167. *
  168. * A queue is a circular buffers with 'Read' and 'Write' pointers.
  169. * 2 empty entries always kept in the buffer to protect from overflow.
  170. *
  171. * For Tx queue, there are low mark and high mark limits. If, after queuing
  172. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  173. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  174. * Tx queue resumed.
  175. *
  176. * The IWL operates with six queues, one receive queue in the device's
  177. * sram, one transmit queue for sending commands to the device firmware,
  178. * and four transmit queues for data.
  179. ***************************************************/
  180. static int iwl_queue_space(const struct iwl_queue *q)
  181. {
  182. int s = q->last_used - q->first_empty;
  183. if (q->last_used > q->first_empty)
  184. s -= q->n_bd;
  185. if (s <= 0)
  186. s += q->n_window;
  187. /* keep some reserve to not confuse empty and full situations */
  188. s -= 2;
  189. if (s < 0)
  190. s = 0;
  191. return s;
  192. }
  193. /* XXX: n_bd must be power-of-two size */
  194. static inline int iwl_queue_inc_wrap(int index, int n_bd)
  195. {
  196. return ++index & (n_bd - 1);
  197. }
  198. /* XXX: n_bd must be power-of-two size */
  199. static inline int iwl_queue_dec_wrap(int index, int n_bd)
  200. {
  201. return --index & (n_bd - 1);
  202. }
  203. static inline int x2_queue_used(const struct iwl_queue *q, int i)
  204. {
  205. return q->first_empty > q->last_used ?
  206. (i >= q->last_used && i < q->first_empty) :
  207. !(i < q->last_used && i >= q->first_empty);
  208. }
  209. static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
  210. {
  211. if (is_huge)
  212. return q->n_window;
  213. return index & (q->n_window - 1);
  214. }
  215. static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  216. int count, int slots_num, u32 id)
  217. {
  218. q->n_bd = count;
  219. q->n_window = slots_num;
  220. q->id = id;
  221. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  222. * and iwl_queue_dec_wrap are broken. */
  223. BUG_ON(!is_power_of_2(count));
  224. /* slots_num must be power-of-two size, otherwise
  225. * get_cmd_index is broken. */
  226. BUG_ON(!is_power_of_2(slots_num));
  227. q->low_mark = q->n_window / 4;
  228. if (q->low_mark < 4)
  229. q->low_mark = 4;
  230. q->high_mark = q->n_window / 8;
  231. if (q->high_mark < 2)
  232. q->high_mark = 2;
  233. q->first_empty = q->last_used = 0;
  234. return 0;
  235. }
  236. static int iwl_tx_queue_alloc(struct iwl_priv *priv,
  237. struct iwl_tx_queue *txq, u32 id)
  238. {
  239. struct pci_dev *dev = priv->pci_dev;
  240. if (id != IWL_CMD_QUEUE_NUM) {
  241. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  242. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  243. if (!txq->txb) {
  244. IWL_ERROR("kmalloc for auxilary BD "
  245. "structures failed\n");
  246. goto error;
  247. }
  248. } else
  249. txq->txb = NULL;
  250. txq->bd = pci_alloc_consistent(dev,
  251. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  252. &txq->q.dma_addr);
  253. if (!txq->bd) {
  254. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  255. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  256. goto error;
  257. }
  258. txq->q.id = id;
  259. return 0;
  260. error:
  261. if (txq->txb) {
  262. kfree(txq->txb);
  263. txq->txb = NULL;
  264. }
  265. return -ENOMEM;
  266. }
  267. int iwl_tx_queue_init(struct iwl_priv *priv,
  268. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  269. {
  270. struct pci_dev *dev = priv->pci_dev;
  271. int len;
  272. int rc = 0;
  273. /* alocate command space + one big command for scan since scan
  274. * command is very huge the system will not have two scan at the
  275. * same time */
  276. len = sizeof(struct iwl_cmd) * slots_num;
  277. if (txq_id == IWL_CMD_QUEUE_NUM)
  278. len += IWL_MAX_SCAN_SIZE;
  279. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  280. if (!txq->cmd)
  281. return -ENOMEM;
  282. rc = iwl_tx_queue_alloc(priv, txq, txq_id);
  283. if (rc) {
  284. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  285. return -ENOMEM;
  286. }
  287. txq->need_update = 0;
  288. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  289. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  290. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  291. iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  292. iwl_hw_tx_queue_init(priv, txq);
  293. return 0;
  294. }
  295. /**
  296. * iwl_tx_queue_free - Deallocate DMA queue.
  297. * @txq: Transmit queue to deallocate.
  298. *
  299. * Empty queue by removing and destroying all BD's.
  300. * Free all buffers. txq itself is not freed.
  301. *
  302. */
  303. void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  304. {
  305. struct iwl_queue *q = &txq->q;
  306. struct pci_dev *dev = priv->pci_dev;
  307. int len;
  308. if (q->n_bd == 0)
  309. return;
  310. /* first, empty all BD's */
  311. for (; q->first_empty != q->last_used;
  312. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd))
  313. iwl_hw_txq_free_tfd(priv, txq);
  314. len = sizeof(struct iwl_cmd) * q->n_window;
  315. if (q->id == IWL_CMD_QUEUE_NUM)
  316. len += IWL_MAX_SCAN_SIZE;
  317. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  318. /* free buffers belonging to queue itself */
  319. if (txq->q.n_bd)
  320. pci_free_consistent(dev, sizeof(struct iwl_tfd_frame) *
  321. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  322. if (txq->txb) {
  323. kfree(txq->txb);
  324. txq->txb = NULL;
  325. }
  326. /* 0 fill whole structure */
  327. memset(txq, 0, sizeof(*txq));
  328. }
  329. const u8 BROADCAST_ADDR[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  330. /*************** STATION TABLE MANAGEMENT ****
  331. *
  332. * NOTE: This needs to be overhauled to better synchronize between
  333. * how the iwl-4965.c is using iwl_hw_find_station vs. iwl-3945.c
  334. *
  335. * mac80211 should also be examined to determine if sta_info is duplicating
  336. * the functionality provided here
  337. */
  338. /**************************************************************/
  339. #if 0 /* temparary disable till we add real remove station */
  340. static u8 iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  341. {
  342. int index = IWL_INVALID_STATION;
  343. int i;
  344. unsigned long flags;
  345. spin_lock_irqsave(&priv->sta_lock, flags);
  346. if (is_ap)
  347. index = IWL_AP_ID;
  348. else if (is_broadcast_ether_addr(addr))
  349. index = priv->hw_setting.bcast_sta_id;
  350. else
  351. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  352. if (priv->stations[i].used &&
  353. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  354. addr)) {
  355. index = i;
  356. break;
  357. }
  358. if (unlikely(index == IWL_INVALID_STATION))
  359. goto out;
  360. if (priv->stations[index].used) {
  361. priv->stations[index].used = 0;
  362. priv->num_stations--;
  363. }
  364. BUG_ON(priv->num_stations < 0);
  365. out:
  366. spin_unlock_irqrestore(&priv->sta_lock, flags);
  367. return 0;
  368. }
  369. #endif
  370. static void iwl_clear_stations_table(struct iwl_priv *priv)
  371. {
  372. unsigned long flags;
  373. spin_lock_irqsave(&priv->sta_lock, flags);
  374. priv->num_stations = 0;
  375. memset(priv->stations, 0, sizeof(priv->stations));
  376. spin_unlock_irqrestore(&priv->sta_lock, flags);
  377. }
  378. u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  379. {
  380. int i;
  381. int index = IWL_INVALID_STATION;
  382. struct iwl_station_entry *station;
  383. unsigned long flags_spin;
  384. DECLARE_MAC_BUF(mac);
  385. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  386. if (is_ap)
  387. index = IWL_AP_ID;
  388. else if (is_broadcast_ether_addr(addr))
  389. index = priv->hw_setting.bcast_sta_id;
  390. else
  391. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  392. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  393. addr)) {
  394. index = i;
  395. break;
  396. }
  397. if (!priv->stations[i].used &&
  398. index == IWL_INVALID_STATION)
  399. index = i;
  400. }
  401. /* These twh conditions has the same outcome but keep them separate
  402. since they have different meaning */
  403. if (unlikely(index == IWL_INVALID_STATION)) {
  404. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  405. return index;
  406. }
  407. if (priv->stations[index].used &&
  408. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  409. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  410. return index;
  411. }
  412. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  413. station = &priv->stations[index];
  414. station->used = 1;
  415. priv->num_stations++;
  416. memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd));
  417. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  418. station->sta.mode = 0;
  419. station->sta.sta.sta_id = index;
  420. station->sta.station_flags = 0;
  421. #ifdef CONFIG_IWLWIFI_HT
  422. /* BCAST station and IBSS stations do not work in HT mode */
  423. if (index != priv->hw_setting.bcast_sta_id &&
  424. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  425. iwl4965_set_ht_add_station(priv, index);
  426. #endif /*CONFIG_IWLWIFI_HT*/
  427. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  428. iwl_send_add_station(priv, &station->sta, flags);
  429. return index;
  430. }
  431. /*************** DRIVER STATUS FUNCTIONS *****/
  432. static inline int iwl_is_ready(struct iwl_priv *priv)
  433. {
  434. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  435. * set but EXIT_PENDING is not */
  436. return test_bit(STATUS_READY, &priv->status) &&
  437. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  438. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  439. }
  440. static inline int iwl_is_alive(struct iwl_priv *priv)
  441. {
  442. return test_bit(STATUS_ALIVE, &priv->status);
  443. }
  444. static inline int iwl_is_init(struct iwl_priv *priv)
  445. {
  446. return test_bit(STATUS_INIT, &priv->status);
  447. }
  448. static inline int iwl_is_rfkill(struct iwl_priv *priv)
  449. {
  450. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  451. test_bit(STATUS_RF_KILL_SW, &priv->status);
  452. }
  453. static inline int iwl_is_ready_rf(struct iwl_priv *priv)
  454. {
  455. if (iwl_is_rfkill(priv))
  456. return 0;
  457. return iwl_is_ready(priv);
  458. }
  459. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  460. #define IWL_CMD(x) case x : return #x
  461. static const char *get_cmd_string(u8 cmd)
  462. {
  463. switch (cmd) {
  464. IWL_CMD(REPLY_ALIVE);
  465. IWL_CMD(REPLY_ERROR);
  466. IWL_CMD(REPLY_RXON);
  467. IWL_CMD(REPLY_RXON_ASSOC);
  468. IWL_CMD(REPLY_QOS_PARAM);
  469. IWL_CMD(REPLY_RXON_TIMING);
  470. IWL_CMD(REPLY_ADD_STA);
  471. IWL_CMD(REPLY_REMOVE_STA);
  472. IWL_CMD(REPLY_REMOVE_ALL_STA);
  473. IWL_CMD(REPLY_TX);
  474. IWL_CMD(REPLY_RATE_SCALE);
  475. IWL_CMD(REPLY_LEDS_CMD);
  476. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  477. IWL_CMD(RADAR_NOTIFICATION);
  478. IWL_CMD(REPLY_QUIET_CMD);
  479. IWL_CMD(REPLY_CHANNEL_SWITCH);
  480. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  481. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  482. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  483. IWL_CMD(POWER_TABLE_CMD);
  484. IWL_CMD(PM_SLEEP_NOTIFICATION);
  485. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  486. IWL_CMD(REPLY_SCAN_CMD);
  487. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  488. IWL_CMD(SCAN_START_NOTIFICATION);
  489. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  490. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  491. IWL_CMD(BEACON_NOTIFICATION);
  492. IWL_CMD(REPLY_TX_BEACON);
  493. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  494. IWL_CMD(QUIET_NOTIFICATION);
  495. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  496. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  497. IWL_CMD(REPLY_BT_CONFIG);
  498. IWL_CMD(REPLY_STATISTICS_CMD);
  499. IWL_CMD(STATISTICS_NOTIFICATION);
  500. IWL_CMD(REPLY_CARD_STATE_CMD);
  501. IWL_CMD(CARD_STATE_NOTIFICATION);
  502. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  503. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  504. IWL_CMD(SENSITIVITY_CMD);
  505. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  506. IWL_CMD(REPLY_RX_PHY_CMD);
  507. IWL_CMD(REPLY_RX_MPDU_CMD);
  508. IWL_CMD(REPLY_4965_RX);
  509. IWL_CMD(REPLY_COMPRESSED_BA);
  510. default:
  511. return "UNKNOWN";
  512. }
  513. }
  514. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  515. /**
  516. * iwl_enqueue_hcmd - enqueue a uCode command
  517. * @priv: device private data point
  518. * @cmd: a point to the ucode command structure
  519. *
  520. * The function returns < 0 values to indicate the operation is
  521. * failed. On success, it turns the index (> 0) of command in the
  522. * command queue.
  523. */
  524. static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  525. {
  526. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  527. struct iwl_queue *q = &txq->q;
  528. struct iwl_tfd_frame *tfd;
  529. u32 *control_flags;
  530. struct iwl_cmd *out_cmd;
  531. u32 idx;
  532. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  533. dma_addr_t phys_addr;
  534. int ret;
  535. unsigned long flags;
  536. /* If any of the command structures end up being larger than
  537. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  538. * we will need to increase the size of the TFD entries */
  539. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  540. !(cmd->meta.flags & CMD_SIZE_HUGE));
  541. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  542. IWL_ERROR("No space for Tx\n");
  543. return -ENOSPC;
  544. }
  545. spin_lock_irqsave(&priv->hcmd_lock, flags);
  546. tfd = &txq->bd[q->first_empty];
  547. memset(tfd, 0, sizeof(*tfd));
  548. control_flags = (u32 *) tfd;
  549. idx = get_cmd_index(q, q->first_empty, cmd->meta.flags & CMD_SIZE_HUGE);
  550. out_cmd = &txq->cmd[idx];
  551. out_cmd->hdr.cmd = cmd->id;
  552. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  553. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  554. /* At this point, the out_cmd now has all of the incoming cmd
  555. * information */
  556. out_cmd->hdr.flags = 0;
  557. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  558. INDEX_TO_SEQ(q->first_empty));
  559. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  560. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  561. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  562. offsetof(struct iwl_cmd, hdr);
  563. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  564. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  565. "%d bytes at %d[%d]:%d\n",
  566. get_cmd_string(out_cmd->hdr.cmd),
  567. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  568. fix_size, q->first_empty, idx, IWL_CMD_QUEUE_NUM);
  569. txq->need_update = 1;
  570. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  571. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  572. iwl_tx_queue_update_write_ptr(priv, txq);
  573. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  574. return ret ? ret : idx;
  575. }
  576. int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  577. {
  578. int ret;
  579. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  580. /* An asynchronous command can not expect an SKB to be set. */
  581. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  582. /* An asynchronous command MUST have a callback. */
  583. BUG_ON(!cmd->meta.u.callback);
  584. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  585. return -EBUSY;
  586. ret = iwl_enqueue_hcmd(priv, cmd);
  587. if (ret < 0) {
  588. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  589. get_cmd_string(cmd->id), ret);
  590. return ret;
  591. }
  592. return 0;
  593. }
  594. int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  595. {
  596. int cmd_idx;
  597. int ret;
  598. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  599. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  600. /* A synchronous command can not have a callback set. */
  601. BUG_ON(cmd->meta.u.callback != NULL);
  602. if (atomic_xchg(&entry, 1)) {
  603. IWL_ERROR("Error sending %s: Already sending a host command\n",
  604. get_cmd_string(cmd->id));
  605. return -EBUSY;
  606. }
  607. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  608. if (cmd->meta.flags & CMD_WANT_SKB)
  609. cmd->meta.source = &cmd->meta;
  610. cmd_idx = iwl_enqueue_hcmd(priv, cmd);
  611. if (cmd_idx < 0) {
  612. ret = cmd_idx;
  613. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  614. get_cmd_string(cmd->id), ret);
  615. goto out;
  616. }
  617. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  618. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  619. HOST_COMPLETE_TIMEOUT);
  620. if (!ret) {
  621. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  622. IWL_ERROR("Error sending %s: time out after %dms.\n",
  623. get_cmd_string(cmd->id),
  624. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  625. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  626. ret = -ETIMEDOUT;
  627. goto cancel;
  628. }
  629. }
  630. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  631. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  632. get_cmd_string(cmd->id));
  633. ret = -ECANCELED;
  634. goto fail;
  635. }
  636. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  637. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  638. get_cmd_string(cmd->id));
  639. ret = -EIO;
  640. goto fail;
  641. }
  642. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  643. IWL_ERROR("Error: Response NULL in '%s'\n",
  644. get_cmd_string(cmd->id));
  645. ret = -EIO;
  646. goto out;
  647. }
  648. ret = 0;
  649. goto out;
  650. cancel:
  651. if (cmd->meta.flags & CMD_WANT_SKB) {
  652. struct iwl_cmd *qcmd;
  653. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  654. * TX cmd queue. Otherwise in case the cmd comes
  655. * in later, it will possibly set an invalid
  656. * address (cmd->meta.source). */
  657. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  658. qcmd->meta.flags &= ~CMD_WANT_SKB;
  659. }
  660. fail:
  661. if (cmd->meta.u.skb) {
  662. dev_kfree_skb_any(cmd->meta.u.skb);
  663. cmd->meta.u.skb = NULL;
  664. }
  665. out:
  666. atomic_set(&entry, 0);
  667. return ret;
  668. }
  669. int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  670. {
  671. /* A command can not be asynchronous AND expect an SKB to be set. */
  672. BUG_ON((cmd->meta.flags & CMD_ASYNC) &&
  673. (cmd->meta.flags & CMD_WANT_SKB));
  674. if (cmd->meta.flags & CMD_ASYNC)
  675. return iwl_send_cmd_async(priv, cmd);
  676. return iwl_send_cmd_sync(priv, cmd);
  677. }
  678. int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  679. {
  680. struct iwl_host_cmd cmd = {
  681. .id = id,
  682. .len = len,
  683. .data = data,
  684. };
  685. return iwl_send_cmd_sync(priv, &cmd);
  686. }
  687. static int __must_check iwl_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  688. {
  689. struct iwl_host_cmd cmd = {
  690. .id = id,
  691. .len = sizeof(val),
  692. .data = &val,
  693. };
  694. return iwl_send_cmd_sync(priv, &cmd);
  695. }
  696. int iwl_send_statistics_request(struct iwl_priv *priv)
  697. {
  698. return iwl_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  699. }
  700. /**
  701. * iwl_rxon_add_station - add station into station table.
  702. *
  703. * there is only one AP station with id= IWL_AP_ID
  704. * NOTE: mutex must be held before calling the this fnction
  705. */
  706. static int iwl_rxon_add_station(struct iwl_priv *priv,
  707. const u8 *addr, int is_ap)
  708. {
  709. u8 sta_id;
  710. sta_id = iwl_add_station(priv, addr, is_ap, 0);
  711. iwl4965_add_station(priv, addr, is_ap);
  712. return sta_id;
  713. }
  714. /**
  715. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  716. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  717. * @channel: Any channel valid for the requested phymode
  718. * In addition to setting the staging RXON, priv->phymode is also set.
  719. *
  720. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  721. * in the staging RXON flag structure based on the phymode
  722. */
  723. static int iwl_set_rxon_channel(struct iwl_priv *priv, u8 phymode, u16 channel)
  724. {
  725. if (!iwl_get_channel_info(priv, phymode, channel)) {
  726. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  727. channel, phymode);
  728. return -EINVAL;
  729. }
  730. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  731. (priv->phymode == phymode))
  732. return 0;
  733. priv->staging_rxon.channel = cpu_to_le16(channel);
  734. if (phymode == MODE_IEEE80211A)
  735. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  736. else
  737. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  738. priv->phymode = phymode;
  739. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  740. return 0;
  741. }
  742. /**
  743. * iwl_check_rxon_cmd - validate RXON structure is valid
  744. *
  745. * NOTE: This is really only useful during development and can eventually
  746. * be #ifdef'd out once the driver is stable and folks aren't actively
  747. * making changes
  748. */
  749. static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
  750. {
  751. int error = 0;
  752. int counter = 1;
  753. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  754. error |= le32_to_cpu(rxon->flags &
  755. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  756. RXON_FLG_RADAR_DETECT_MSK));
  757. if (error)
  758. IWL_WARNING("check 24G fields %d | %d\n",
  759. counter++, error);
  760. } else {
  761. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  762. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  763. if (error)
  764. IWL_WARNING("check 52 fields %d | %d\n",
  765. counter++, error);
  766. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  767. if (error)
  768. IWL_WARNING("check 52 CCK %d | %d\n",
  769. counter++, error);
  770. }
  771. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  772. if (error)
  773. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  774. /* make sure basic rates 6Mbps and 1Mbps are supported */
  775. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  776. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  777. if (error)
  778. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  779. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  780. if (error)
  781. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  782. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  783. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  784. if (error)
  785. IWL_WARNING("check CCK and short slot %d | %d\n",
  786. counter++, error);
  787. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  788. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  789. if (error)
  790. IWL_WARNING("check CCK & auto detect %d | %d\n",
  791. counter++, error);
  792. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  793. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  794. if (error)
  795. IWL_WARNING("check TGG and auto detect %d | %d\n",
  796. counter++, error);
  797. if (error)
  798. IWL_WARNING("Tuning to channel %d\n",
  799. le16_to_cpu(rxon->channel));
  800. if (error) {
  801. IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
  802. return -1;
  803. }
  804. return 0;
  805. }
  806. /**
  807. * iwl_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
  808. * @priv: staging_rxon is comapred to active_rxon
  809. *
  810. * If the RXON structure is changing sufficient to require a new
  811. * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
  812. * to indicate a new tune is required.
  813. */
  814. static int iwl_full_rxon_required(struct iwl_priv *priv)
  815. {
  816. /* These items are only settable from the full RXON command */
  817. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  818. compare_ether_addr(priv->staging_rxon.bssid_addr,
  819. priv->active_rxon.bssid_addr) ||
  820. compare_ether_addr(priv->staging_rxon.node_addr,
  821. priv->active_rxon.node_addr) ||
  822. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  823. priv->active_rxon.wlap_bssid_addr) ||
  824. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  825. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  826. (priv->staging_rxon.air_propagation !=
  827. priv->active_rxon.air_propagation) ||
  828. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  829. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  830. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  831. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  832. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  833. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  834. return 1;
  835. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  836. * be updated with the RXON_ASSOC command -- however only some
  837. * flag transitions are allowed using RXON_ASSOC */
  838. /* Check if we are not switching bands */
  839. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  840. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  841. return 1;
  842. /* Check if we are switching association toggle */
  843. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  844. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  845. return 1;
  846. return 0;
  847. }
  848. static int iwl_send_rxon_assoc(struct iwl_priv *priv)
  849. {
  850. int rc = 0;
  851. struct iwl_rx_packet *res = NULL;
  852. struct iwl_rxon_assoc_cmd rxon_assoc;
  853. struct iwl_host_cmd cmd = {
  854. .id = REPLY_RXON_ASSOC,
  855. .len = sizeof(rxon_assoc),
  856. .meta.flags = CMD_WANT_SKB,
  857. .data = &rxon_assoc,
  858. };
  859. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  860. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  861. if ((rxon1->flags == rxon2->flags) &&
  862. (rxon1->filter_flags == rxon2->filter_flags) &&
  863. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  864. (rxon1->ofdm_ht_single_stream_basic_rates ==
  865. rxon2->ofdm_ht_single_stream_basic_rates) &&
  866. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  867. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  868. (rxon1->rx_chain == rxon2->rx_chain) &&
  869. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  870. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  871. return 0;
  872. }
  873. rxon_assoc.flags = priv->staging_rxon.flags;
  874. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  875. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  876. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  877. rxon_assoc.reserved = 0;
  878. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  879. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  880. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  881. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  882. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  883. rc = iwl_send_cmd_sync(priv, &cmd);
  884. if (rc)
  885. return rc;
  886. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  887. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  888. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  889. rc = -EIO;
  890. }
  891. priv->alloc_rxb_skb--;
  892. dev_kfree_skb_any(cmd.meta.u.skb);
  893. return rc;
  894. }
  895. /**
  896. * iwl_commit_rxon - commit staging_rxon to hardware
  897. *
  898. * The RXON command in staging_rxon is commited to the hardware and
  899. * the active_rxon structure is updated with the new data. This
  900. * function correctly transitions out of the RXON_ASSOC_MSK state if
  901. * a HW tune is required based on the RXON structure changes.
  902. */
  903. static int iwl_commit_rxon(struct iwl_priv *priv)
  904. {
  905. /* cast away the const for active_rxon in this function */
  906. struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  907. DECLARE_MAC_BUF(mac);
  908. int rc = 0;
  909. if (!iwl_is_alive(priv))
  910. return -1;
  911. /* always get timestamp with Rx frame */
  912. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  913. rc = iwl_check_rxon_cmd(&priv->staging_rxon);
  914. if (rc) {
  915. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  916. return -EINVAL;
  917. }
  918. /* If we don't need to send a full RXON, we can use
  919. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  920. * and other flags for the current radio configuration. */
  921. if (!iwl_full_rxon_required(priv)) {
  922. rc = iwl_send_rxon_assoc(priv);
  923. if (rc) {
  924. IWL_ERROR("Error setting RXON_ASSOC "
  925. "configuration (%d).\n", rc);
  926. return rc;
  927. }
  928. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  929. return 0;
  930. }
  931. /* station table will be cleared */
  932. priv->assoc_station_added = 0;
  933. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  934. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  935. if (!priv->error_recovering)
  936. priv->start_calib = 0;
  937. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  938. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  939. /* If we are currently associated and the new config requires
  940. * an RXON_ASSOC and the new config wants the associated mask enabled,
  941. * we must clear the associated from the active configuration
  942. * before we apply the new config */
  943. if (iwl_is_associated(priv) &&
  944. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  945. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  946. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  947. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  948. sizeof(struct iwl_rxon_cmd),
  949. &priv->active_rxon);
  950. /* If the mask clearing failed then we set
  951. * active_rxon back to what it was previously */
  952. if (rc) {
  953. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  954. IWL_ERROR("Error clearing ASSOC_MSK on current "
  955. "configuration (%d).\n", rc);
  956. return rc;
  957. }
  958. }
  959. IWL_DEBUG_INFO("Sending RXON\n"
  960. "* with%s RXON_FILTER_ASSOC_MSK\n"
  961. "* channel = %d\n"
  962. "* bssid = %s\n",
  963. ((priv->staging_rxon.filter_flags &
  964. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  965. le16_to_cpu(priv->staging_rxon.channel),
  966. print_mac(mac, priv->staging_rxon.bssid_addr));
  967. /* Apply the new configuration */
  968. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  969. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  970. if (rc) {
  971. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  972. return rc;
  973. }
  974. iwl_clear_stations_table(priv);
  975. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  976. if (!priv->error_recovering)
  977. priv->start_calib = 0;
  978. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  979. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  980. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  981. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  982. /* If we issue a new RXON command which required a tune then we must
  983. * send a new TXPOWER command or we won't be able to Tx any frames */
  984. rc = iwl_hw_reg_send_txpower(priv);
  985. if (rc) {
  986. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  987. return rc;
  988. }
  989. /* Add the broadcast address so we can send broadcast frames */
  990. if (iwl_rxon_add_station(priv, BROADCAST_ADDR, 0) ==
  991. IWL_INVALID_STATION) {
  992. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  993. return -EIO;
  994. }
  995. /* If we have set the ASSOC_MSK and we are in BSS mode then
  996. * add the IWL_AP_ID to the station rate table */
  997. if (iwl_is_associated(priv) &&
  998. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  999. if (iwl_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1000. == IWL_INVALID_STATION) {
  1001. IWL_ERROR("Error adding AP address for transmit.\n");
  1002. return -EIO;
  1003. }
  1004. priv->assoc_station_added = 1;
  1005. }
  1006. return 0;
  1007. }
  1008. static int iwl_send_bt_config(struct iwl_priv *priv)
  1009. {
  1010. struct iwl_bt_cmd bt_cmd = {
  1011. .flags = 3,
  1012. .lead_time = 0xAA,
  1013. .max_kill = 1,
  1014. .kill_ack_mask = 0,
  1015. .kill_cts_mask = 0,
  1016. };
  1017. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1018. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1019. }
  1020. static int iwl_send_scan_abort(struct iwl_priv *priv)
  1021. {
  1022. int rc = 0;
  1023. struct iwl_rx_packet *res;
  1024. struct iwl_host_cmd cmd = {
  1025. .id = REPLY_SCAN_ABORT_CMD,
  1026. .meta.flags = CMD_WANT_SKB,
  1027. };
  1028. /* If there isn't a scan actively going on in the hardware
  1029. * then we are in between scan bands and not actually
  1030. * actively scanning, so don't send the abort command */
  1031. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1032. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1033. return 0;
  1034. }
  1035. rc = iwl_send_cmd_sync(priv, &cmd);
  1036. if (rc) {
  1037. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1038. return rc;
  1039. }
  1040. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1041. if (res->u.status != CAN_ABORT_STATUS) {
  1042. /* The scan abort will return 1 for success or
  1043. * 2 for "failure". A failure condition can be
  1044. * due to simply not being in an active scan which
  1045. * can occur if we send the scan abort before we
  1046. * the microcode has notified us that a scan is
  1047. * completed. */
  1048. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1049. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1050. clear_bit(STATUS_SCAN_HW, &priv->status);
  1051. }
  1052. dev_kfree_skb_any(cmd.meta.u.skb);
  1053. return rc;
  1054. }
  1055. static int iwl_card_state_sync_callback(struct iwl_priv *priv,
  1056. struct iwl_cmd *cmd,
  1057. struct sk_buff *skb)
  1058. {
  1059. return 1;
  1060. }
  1061. /*
  1062. * CARD_STATE_CMD
  1063. *
  1064. * Use: Sets the internal card state to enable, disable, or halt
  1065. *
  1066. * When in the 'enable' state the card operates as normal.
  1067. * When in the 'disable' state, the card enters into a low power mode.
  1068. * When in the 'halt' state, the card is shut down and must be fully
  1069. * restarted to come back on.
  1070. */
  1071. static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1072. {
  1073. struct iwl_host_cmd cmd = {
  1074. .id = REPLY_CARD_STATE_CMD,
  1075. .len = sizeof(u32),
  1076. .data = &flags,
  1077. .meta.flags = meta_flag,
  1078. };
  1079. if (meta_flag & CMD_ASYNC)
  1080. cmd.meta.u.callback = iwl_card_state_sync_callback;
  1081. return iwl_send_cmd(priv, &cmd);
  1082. }
  1083. static int iwl_add_sta_sync_callback(struct iwl_priv *priv,
  1084. struct iwl_cmd *cmd, struct sk_buff *skb)
  1085. {
  1086. struct iwl_rx_packet *res = NULL;
  1087. if (!skb) {
  1088. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1089. return 1;
  1090. }
  1091. res = (struct iwl_rx_packet *)skb->data;
  1092. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1093. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1094. res->hdr.flags);
  1095. return 1;
  1096. }
  1097. switch (res->u.add_sta.status) {
  1098. case ADD_STA_SUCCESS_MSK:
  1099. break;
  1100. default:
  1101. break;
  1102. }
  1103. /* We didn't cache the SKB; let the caller free it */
  1104. return 1;
  1105. }
  1106. int iwl_send_add_station(struct iwl_priv *priv,
  1107. struct iwl_addsta_cmd *sta, u8 flags)
  1108. {
  1109. struct iwl_rx_packet *res = NULL;
  1110. int rc = 0;
  1111. struct iwl_host_cmd cmd = {
  1112. .id = REPLY_ADD_STA,
  1113. .len = sizeof(struct iwl_addsta_cmd),
  1114. .meta.flags = flags,
  1115. .data = sta,
  1116. };
  1117. if (flags & CMD_ASYNC)
  1118. cmd.meta.u.callback = iwl_add_sta_sync_callback;
  1119. else
  1120. cmd.meta.flags |= CMD_WANT_SKB;
  1121. rc = iwl_send_cmd(priv, &cmd);
  1122. if (rc || (flags & CMD_ASYNC))
  1123. return rc;
  1124. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1125. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1126. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1127. res->hdr.flags);
  1128. rc = -EIO;
  1129. }
  1130. if (rc == 0) {
  1131. switch (res->u.add_sta.status) {
  1132. case ADD_STA_SUCCESS_MSK:
  1133. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1134. break;
  1135. default:
  1136. rc = -EIO;
  1137. IWL_WARNING("REPLY_ADD_STA failed\n");
  1138. break;
  1139. }
  1140. }
  1141. priv->alloc_rxb_skb--;
  1142. dev_kfree_skb_any(cmd.meta.u.skb);
  1143. return rc;
  1144. }
  1145. static int iwl_update_sta_key_info(struct iwl_priv *priv,
  1146. struct ieee80211_key_conf *keyconf,
  1147. u8 sta_id)
  1148. {
  1149. unsigned long flags;
  1150. __le16 key_flags = 0;
  1151. switch (keyconf->alg) {
  1152. case ALG_CCMP:
  1153. key_flags |= STA_KEY_FLG_CCMP;
  1154. key_flags |= cpu_to_le16(
  1155. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1156. key_flags &= ~STA_KEY_FLG_INVALID;
  1157. break;
  1158. case ALG_TKIP:
  1159. case ALG_WEP:
  1160. return -EINVAL;
  1161. default:
  1162. return -EINVAL;
  1163. }
  1164. spin_lock_irqsave(&priv->sta_lock, flags);
  1165. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1166. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1167. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1168. keyconf->keylen);
  1169. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1170. keyconf->keylen);
  1171. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1172. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1173. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1174. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1175. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1176. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1177. return 0;
  1178. }
  1179. static int iwl_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1180. {
  1181. unsigned long flags;
  1182. spin_lock_irqsave(&priv->sta_lock, flags);
  1183. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  1184. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl_keyinfo));
  1185. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1186. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1187. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1188. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1189. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1190. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1191. return 0;
  1192. }
  1193. static void iwl_clear_free_frames(struct iwl_priv *priv)
  1194. {
  1195. struct list_head *element;
  1196. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1197. priv->frames_count);
  1198. while (!list_empty(&priv->free_frames)) {
  1199. element = priv->free_frames.next;
  1200. list_del(element);
  1201. kfree(list_entry(element, struct iwl_frame, list));
  1202. priv->frames_count--;
  1203. }
  1204. if (priv->frames_count) {
  1205. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1206. priv->frames_count);
  1207. priv->frames_count = 0;
  1208. }
  1209. }
  1210. static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
  1211. {
  1212. struct iwl_frame *frame;
  1213. struct list_head *element;
  1214. if (list_empty(&priv->free_frames)) {
  1215. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1216. if (!frame) {
  1217. IWL_ERROR("Could not allocate frame!\n");
  1218. return NULL;
  1219. }
  1220. priv->frames_count++;
  1221. return frame;
  1222. }
  1223. element = priv->free_frames.next;
  1224. list_del(element);
  1225. return list_entry(element, struct iwl_frame, list);
  1226. }
  1227. static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
  1228. {
  1229. memset(frame, 0, sizeof(*frame));
  1230. list_add(&frame->list, &priv->free_frames);
  1231. }
  1232. unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
  1233. struct ieee80211_hdr *hdr,
  1234. const u8 *dest, int left)
  1235. {
  1236. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1237. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1238. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1239. return 0;
  1240. if (priv->ibss_beacon->len > left)
  1241. return 0;
  1242. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1243. return priv->ibss_beacon->len;
  1244. }
  1245. int iwl_rate_index_from_plcp(int plcp)
  1246. {
  1247. int i = 0;
  1248. if (plcp & RATE_MCS_HT_MSK) {
  1249. i = (plcp & 0xff);
  1250. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1251. i = i - IWL_RATE_MIMO_6M_PLCP;
  1252. i += IWL_FIRST_OFDM_RATE;
  1253. /* skip 9M not supported in ht*/
  1254. if (i >= IWL_RATE_9M_INDEX)
  1255. i += 1;
  1256. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1257. (i <= IWL_LAST_OFDM_RATE))
  1258. return i;
  1259. } else {
  1260. for (i = 0; i < ARRAY_SIZE(iwl_rates); i++)
  1261. if (iwl_rates[i].plcp == (plcp &0xFF))
  1262. return i;
  1263. }
  1264. return -1;
  1265. }
  1266. static u8 iwl_rate_get_lowest_plcp(int rate_mask)
  1267. {
  1268. u8 i;
  1269. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1270. i = iwl_rates[i].next_ieee) {
  1271. if (rate_mask & (1 << i))
  1272. return iwl_rates[i].plcp;
  1273. }
  1274. return IWL_RATE_INVALID;
  1275. }
  1276. static int iwl_send_beacon_cmd(struct iwl_priv *priv)
  1277. {
  1278. struct iwl_frame *frame;
  1279. unsigned int frame_size;
  1280. int rc;
  1281. u8 rate;
  1282. frame = iwl_get_free_frame(priv);
  1283. if (!frame) {
  1284. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1285. "command.\n");
  1286. return -ENOMEM;
  1287. }
  1288. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1289. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic &
  1290. 0xFF0);
  1291. if (rate == IWL_INVALID_RATE)
  1292. rate = IWL_RATE_6M_PLCP;
  1293. } else {
  1294. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1295. if (rate == IWL_INVALID_RATE)
  1296. rate = IWL_RATE_1M_PLCP;
  1297. }
  1298. frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
  1299. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1300. &frame->u.cmd[0]);
  1301. iwl_free_frame(priv, frame);
  1302. return rc;
  1303. }
  1304. /******************************************************************************
  1305. *
  1306. * EEPROM related functions
  1307. *
  1308. ******************************************************************************/
  1309. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1310. {
  1311. memcpy(mac, priv->eeprom.mac_address, 6);
  1312. }
  1313. /**
  1314. * iwl_eeprom_init - read EEPROM contents
  1315. *
  1316. * Load the EEPROM from adapter into priv->eeprom
  1317. *
  1318. * NOTE: This routine uses the non-debug IO access functions.
  1319. */
  1320. int iwl_eeprom_init(struct iwl_priv *priv)
  1321. {
  1322. u16 *e = (u16 *)&priv->eeprom;
  1323. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1324. u32 r;
  1325. int sz = sizeof(priv->eeprom);
  1326. int rc;
  1327. int i;
  1328. u16 addr;
  1329. /* The EEPROM structure has several padding buffers within it
  1330. * and when adding new EEPROM maps is subject to programmer errors
  1331. * which may be very difficult to identify without explicitly
  1332. * checking the resulting size of the eeprom map. */
  1333. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1334. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1335. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1336. return -ENOENT;
  1337. }
  1338. rc = iwl_eeprom_aqcuire_semaphore(priv);
  1339. if (rc < 0) {
  1340. IWL_ERROR("Failed to aqcuire EEPROM semaphore.\n");
  1341. return -ENOENT;
  1342. }
  1343. /* eeprom is an array of 16bit values */
  1344. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1345. _iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
  1346. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1347. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1348. i += IWL_EEPROM_ACCESS_DELAY) {
  1349. r = _iwl_read_restricted(priv, CSR_EEPROM_REG);
  1350. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1351. break;
  1352. udelay(IWL_EEPROM_ACCESS_DELAY);
  1353. }
  1354. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1355. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1356. rc = -ETIMEDOUT;
  1357. goto done;
  1358. }
  1359. e[addr / 2] = le16_to_cpu(r >> 16);
  1360. }
  1361. rc = 0;
  1362. done:
  1363. iwl_eeprom_release_semaphore(priv);
  1364. return rc;
  1365. }
  1366. /******************************************************************************
  1367. *
  1368. * Misc. internal state and helper functions
  1369. *
  1370. ******************************************************************************/
  1371. #ifdef CONFIG_IWLWIFI_DEBUG
  1372. /**
  1373. * iwl_report_frame - dump frame to syslog during debug sessions
  1374. *
  1375. * hack this function to show different aspects of received frames,
  1376. * including selective frame dumps.
  1377. * group100 parameter selects whether to show 1 out of 100 good frames.
  1378. *
  1379. * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type
  1380. * info output is okay, but some of this stuff (e.g. iwl_rx_frame_stats)
  1381. * is 3945-specific and gives bad output for 4965. Need to split the
  1382. * functionality, keep common stuff here.
  1383. */
  1384. void iwl_report_frame(struct iwl_priv *priv,
  1385. struct iwl_rx_packet *pkt,
  1386. struct ieee80211_hdr *header, int group100)
  1387. {
  1388. u32 to_us;
  1389. u32 print_summary = 0;
  1390. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1391. u32 hundred = 0;
  1392. u32 dataframe = 0;
  1393. u16 fc;
  1394. u16 seq_ctl;
  1395. u16 channel;
  1396. u16 phy_flags;
  1397. int rate_sym;
  1398. u16 length;
  1399. u16 status;
  1400. u16 bcn_tmr;
  1401. u32 tsf_low;
  1402. u64 tsf;
  1403. u8 rssi;
  1404. u8 agc;
  1405. u16 sig_avg;
  1406. u16 noise_diff;
  1407. struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1408. struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1409. struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1410. u8 *data = IWL_RX_DATA(pkt);
  1411. /* MAC header */
  1412. fc = le16_to_cpu(header->frame_control);
  1413. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1414. /* metadata */
  1415. channel = le16_to_cpu(rx_hdr->channel);
  1416. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1417. rate_sym = rx_hdr->rate;
  1418. length = le16_to_cpu(rx_hdr->len);
  1419. /* end-of-frame status and timestamp */
  1420. status = le32_to_cpu(rx_end->status);
  1421. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1422. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1423. tsf = le64_to_cpu(rx_end->timestamp);
  1424. /* signal statistics */
  1425. rssi = rx_stats->rssi;
  1426. agc = rx_stats->agc;
  1427. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1428. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1429. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1430. /* if data frame is to us and all is good,
  1431. * (optionally) print summary for only 1 out of every 100 */
  1432. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1433. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1434. dataframe = 1;
  1435. if (!group100)
  1436. print_summary = 1; /* print each frame */
  1437. else if (priv->framecnt_to_us < 100) {
  1438. priv->framecnt_to_us++;
  1439. print_summary = 0;
  1440. } else {
  1441. priv->framecnt_to_us = 0;
  1442. print_summary = 1;
  1443. hundred = 1;
  1444. }
  1445. } else {
  1446. /* print summary for all other frames */
  1447. print_summary = 1;
  1448. }
  1449. if (print_summary) {
  1450. char *title;
  1451. u32 rate;
  1452. if (hundred)
  1453. title = "100Frames";
  1454. else if (fc & IEEE80211_FCTL_RETRY)
  1455. title = "Retry";
  1456. else if (ieee80211_is_assoc_response(fc))
  1457. title = "AscRsp";
  1458. else if (ieee80211_is_reassoc_response(fc))
  1459. title = "RasRsp";
  1460. else if (ieee80211_is_probe_response(fc)) {
  1461. title = "PrbRsp";
  1462. print_dump = 1; /* dump frame contents */
  1463. } else if (ieee80211_is_beacon(fc)) {
  1464. title = "Beacon";
  1465. print_dump = 1; /* dump frame contents */
  1466. } else if (ieee80211_is_atim(fc))
  1467. title = "ATIM";
  1468. else if (ieee80211_is_auth(fc))
  1469. title = "Auth";
  1470. else if (ieee80211_is_deauth(fc))
  1471. title = "DeAuth";
  1472. else if (ieee80211_is_disassoc(fc))
  1473. title = "DisAssoc";
  1474. else
  1475. title = "Frame";
  1476. rate = iwl_rate_index_from_plcp(rate_sym);
  1477. if (rate == -1)
  1478. rate = 0;
  1479. else
  1480. rate = iwl_rates[rate].ieee / 2;
  1481. /* print frame summary.
  1482. * MAC addresses show just the last byte (for brevity),
  1483. * but you can hack it to show more, if you'd like to. */
  1484. if (dataframe)
  1485. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1486. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1487. title, fc, header->addr1[5],
  1488. length, rssi, channel, rate);
  1489. else {
  1490. /* src/dst addresses assume managed mode */
  1491. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1492. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1493. "phy=0x%02x, chnl=%d\n",
  1494. title, fc, header->addr1[5],
  1495. header->addr3[5], rssi,
  1496. tsf_low - priv->scan_start_tsf,
  1497. phy_flags, channel);
  1498. }
  1499. }
  1500. if (print_dump)
  1501. iwl_print_hex_dump(IWL_DL_RX, data, length);
  1502. }
  1503. #endif
  1504. static void iwl_unset_hw_setting(struct iwl_priv *priv)
  1505. {
  1506. if (priv->hw_setting.shared_virt)
  1507. pci_free_consistent(priv->pci_dev,
  1508. sizeof(struct iwl_shared),
  1509. priv->hw_setting.shared_virt,
  1510. priv->hw_setting.shared_phys);
  1511. }
  1512. /**
  1513. * iwl_supported_rate_to_ie - fill in the supported rate in IE field
  1514. *
  1515. * return : set the bit for each supported rate insert in ie
  1516. */
  1517. static u16 iwl_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1518. u16 basic_rate, int max_count)
  1519. {
  1520. u16 ret_rates = 0, bit;
  1521. int i;
  1522. u8 *rates;
  1523. rates = &(ie[1]);
  1524. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1525. if (bit & supported_rate) {
  1526. ret_rates |= bit;
  1527. rates[*ie] = iwl_rates[i].ieee |
  1528. ((bit & basic_rate) ? 0x80 : 0x00);
  1529. *ie = *ie + 1;
  1530. if (*ie >= max_count)
  1531. break;
  1532. }
  1533. }
  1534. return ret_rates;
  1535. }
  1536. #ifdef CONFIG_IWLWIFI_HT
  1537. void static iwl_set_ht_capab(struct ieee80211_hw *hw,
  1538. struct ieee80211_ht_capability *ht_cap,
  1539. u8 use_wide_chan);
  1540. #endif
  1541. /**
  1542. * iwl_fill_probe_req - fill in all required fields and IE for probe request
  1543. */
  1544. static u16 iwl_fill_probe_req(struct iwl_priv *priv,
  1545. struct ieee80211_mgmt *frame,
  1546. int left, int is_direct)
  1547. {
  1548. int len = 0;
  1549. u8 *pos = NULL;
  1550. u16 ret_rates;
  1551. /* Make sure there is enough space for the probe request,
  1552. * two mandatory IEs and the data */
  1553. left -= 24;
  1554. if (left < 0)
  1555. return 0;
  1556. len += 24;
  1557. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1558. memcpy(frame->da, BROADCAST_ADDR, ETH_ALEN);
  1559. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1560. memcpy(frame->bssid, BROADCAST_ADDR, ETH_ALEN);
  1561. frame->seq_ctrl = 0;
  1562. /* fill in our indirect SSID IE */
  1563. /* ...next IE... */
  1564. left -= 2;
  1565. if (left < 0)
  1566. return 0;
  1567. len += 2;
  1568. pos = &(frame->u.probe_req.variable[0]);
  1569. *pos++ = WLAN_EID_SSID;
  1570. *pos++ = 0;
  1571. /* fill in our direct SSID IE... */
  1572. if (is_direct) {
  1573. /* ...next IE... */
  1574. left -= 2 + priv->essid_len;
  1575. if (left < 0)
  1576. return 0;
  1577. /* ... fill it in... */
  1578. *pos++ = WLAN_EID_SSID;
  1579. *pos++ = priv->essid_len;
  1580. memcpy(pos, priv->essid, priv->essid_len);
  1581. pos += priv->essid_len;
  1582. len += 2 + priv->essid_len;
  1583. }
  1584. /* fill in supported rate */
  1585. /* ...next IE... */
  1586. left -= 2;
  1587. if (left < 0)
  1588. return 0;
  1589. /* ... fill it in... */
  1590. *pos++ = WLAN_EID_SUPP_RATES;
  1591. *pos = 0;
  1592. ret_rates = priv->active_rate = priv->rates_mask;
  1593. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1594. iwl_supported_rate_to_ie(pos, priv->active_rate,
  1595. priv->active_rate_basic, left);
  1596. len += 2 + *pos;
  1597. pos += (*pos) + 1;
  1598. ret_rates = ~ret_rates & priv->active_rate;
  1599. if (ret_rates == 0)
  1600. goto fill_end;
  1601. /* fill in supported extended rate */
  1602. /* ...next IE... */
  1603. left -= 2;
  1604. if (left < 0)
  1605. return 0;
  1606. /* ... fill it in... */
  1607. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1608. *pos = 0;
  1609. iwl_supported_rate_to_ie(pos, ret_rates, priv->active_rate_basic, left);
  1610. if (*pos > 0)
  1611. len += 2 + *pos;
  1612. #ifdef CONFIG_IWLWIFI_HT
  1613. if (is_direct && priv->is_ht_enabled) {
  1614. u8 use_wide_chan = 1;
  1615. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  1616. use_wide_chan = 0;
  1617. pos += (*pos) + 1;
  1618. *pos++ = WLAN_EID_HT_CAPABILITY;
  1619. *pos++ = sizeof(struct ieee80211_ht_capability);
  1620. iwl_set_ht_capab(NULL, (struct ieee80211_ht_capability *)pos,
  1621. use_wide_chan);
  1622. len += 2 + sizeof(struct ieee80211_ht_capability);
  1623. }
  1624. #endif /*CONFIG_IWLWIFI_HT */
  1625. fill_end:
  1626. return (u16)len;
  1627. }
  1628. /*
  1629. * QoS support
  1630. */
  1631. #ifdef CONFIG_IWLWIFI_QOS
  1632. static int iwl_send_qos_params_command(struct iwl_priv *priv,
  1633. struct iwl_qosparam_cmd *qos)
  1634. {
  1635. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1636. sizeof(struct iwl_qosparam_cmd), qos);
  1637. }
  1638. static void iwl_reset_qos(struct iwl_priv *priv)
  1639. {
  1640. u16 cw_min = 15;
  1641. u16 cw_max = 1023;
  1642. u8 aifs = 2;
  1643. u8 is_legacy = 0;
  1644. unsigned long flags;
  1645. int i;
  1646. spin_lock_irqsave(&priv->lock, flags);
  1647. priv->qos_data.qos_active = 0;
  1648. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1649. if (priv->qos_data.qos_enable)
  1650. priv->qos_data.qos_active = 1;
  1651. if (!(priv->active_rate & 0xfff0)) {
  1652. cw_min = 31;
  1653. is_legacy = 1;
  1654. }
  1655. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1656. if (priv->qos_data.qos_enable)
  1657. priv->qos_data.qos_active = 1;
  1658. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1659. cw_min = 31;
  1660. is_legacy = 1;
  1661. }
  1662. if (priv->qos_data.qos_active)
  1663. aifs = 3;
  1664. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1665. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1666. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1667. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1668. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1669. if (priv->qos_data.qos_active) {
  1670. i = 1;
  1671. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1672. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1673. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1674. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1675. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1676. i = 2;
  1677. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1678. cpu_to_le16((cw_min + 1) / 2 - 1);
  1679. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1680. cpu_to_le16(cw_max);
  1681. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1682. if (is_legacy)
  1683. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1684. cpu_to_le16(6016);
  1685. else
  1686. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1687. cpu_to_le16(3008);
  1688. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1689. i = 3;
  1690. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1691. cpu_to_le16((cw_min + 1) / 4 - 1);
  1692. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1693. cpu_to_le16((cw_max + 1) / 2 - 1);
  1694. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1695. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1696. if (is_legacy)
  1697. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1698. cpu_to_le16(3264);
  1699. else
  1700. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1701. cpu_to_le16(1504);
  1702. } else {
  1703. for (i = 1; i < 4; i++) {
  1704. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1705. cpu_to_le16(cw_min);
  1706. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1707. cpu_to_le16(cw_max);
  1708. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1709. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1710. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1711. }
  1712. }
  1713. IWL_DEBUG_QOS("set QoS to default \n");
  1714. spin_unlock_irqrestore(&priv->lock, flags);
  1715. }
  1716. static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  1717. {
  1718. unsigned long flags;
  1719. if (priv == NULL)
  1720. return;
  1721. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1722. return;
  1723. if (!priv->qos_data.qos_enable)
  1724. return;
  1725. spin_lock_irqsave(&priv->lock, flags);
  1726. priv->qos_data.def_qos_parm.qos_flags = 0;
  1727. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1728. !priv->qos_data.qos_cap.q_AP.txop_request)
  1729. priv->qos_data.def_qos_parm.qos_flags |=
  1730. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1731. if (priv->qos_data.qos_active)
  1732. priv->qos_data.def_qos_parm.qos_flags |=
  1733. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1734. spin_unlock_irqrestore(&priv->lock, flags);
  1735. if (force || iwl_is_associated(priv)) {
  1736. IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
  1737. priv->qos_data.qos_active);
  1738. iwl_send_qos_params_command(priv,
  1739. &(priv->qos_data.def_qos_parm));
  1740. }
  1741. }
  1742. #endif /* CONFIG_IWLWIFI_QOS */
  1743. /*
  1744. * Power management (not Tx power!) functions
  1745. */
  1746. #define MSEC_TO_USEC 1024
  1747. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1748. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1749. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1750. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1751. __constant_cpu_to_le32(X1), \
  1752. __constant_cpu_to_le32(X2), \
  1753. __constant_cpu_to_le32(X3), \
  1754. __constant_cpu_to_le32(X4)}
  1755. /* default power management (not Tx power) table values */
  1756. /* for tim 0-10 */
  1757. static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = {
  1758. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1759. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1760. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1761. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1762. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1763. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1764. };
  1765. /* for tim > 10 */
  1766. static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = {
  1767. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1768. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1769. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1770. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1771. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1772. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1773. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1774. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1775. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1776. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1777. };
  1778. int iwl_power_init_handle(struct iwl_priv *priv)
  1779. {
  1780. int rc = 0, i;
  1781. struct iwl_power_mgr *pow_data;
  1782. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_AC;
  1783. u16 pci_pm;
  1784. IWL_DEBUG_POWER("Initialize power \n");
  1785. pow_data = &(priv->power_data);
  1786. memset(pow_data, 0, sizeof(*pow_data));
  1787. pow_data->active_index = IWL_POWER_RANGE_0;
  1788. pow_data->dtim_val = 0xffff;
  1789. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1790. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1791. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1792. if (rc != 0)
  1793. return 0;
  1794. else {
  1795. struct iwl_powertable_cmd *cmd;
  1796. IWL_DEBUG_POWER("adjust power command flags\n");
  1797. for (i = 0; i < IWL_POWER_AC; i++) {
  1798. cmd = &pow_data->pwr_range_0[i].cmd;
  1799. if (pci_pm & 0x1)
  1800. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1801. else
  1802. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1803. }
  1804. }
  1805. return rc;
  1806. }
  1807. static int iwl_update_power_cmd(struct iwl_priv *priv,
  1808. struct iwl_powertable_cmd *cmd, u32 mode)
  1809. {
  1810. int rc = 0, i;
  1811. u8 skip;
  1812. u32 max_sleep = 0;
  1813. struct iwl_power_vec_entry *range;
  1814. u8 period = 0;
  1815. struct iwl_power_mgr *pow_data;
  1816. if (mode > IWL_POWER_INDEX_5) {
  1817. IWL_DEBUG_POWER("Error invalid power mode \n");
  1818. return -1;
  1819. }
  1820. pow_data = &(priv->power_data);
  1821. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1822. range = &pow_data->pwr_range_0[0];
  1823. else
  1824. range = &pow_data->pwr_range_1[1];
  1825. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd));
  1826. #ifdef IWL_MAC80211_DISABLE
  1827. if (priv->assoc_network != NULL) {
  1828. unsigned long flags;
  1829. period = priv->assoc_network->tim.tim_period;
  1830. }
  1831. #endif /*IWL_MAC80211_DISABLE */
  1832. skip = range[mode].no_dtim;
  1833. if (period == 0) {
  1834. period = 1;
  1835. skip = 0;
  1836. }
  1837. if (skip == 0) {
  1838. max_sleep = period;
  1839. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1840. } else {
  1841. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1842. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1843. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1844. }
  1845. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1846. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1847. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1848. }
  1849. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1850. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1851. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1852. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1853. le32_to_cpu(cmd->sleep_interval[0]),
  1854. le32_to_cpu(cmd->sleep_interval[1]),
  1855. le32_to_cpu(cmd->sleep_interval[2]),
  1856. le32_to_cpu(cmd->sleep_interval[3]),
  1857. le32_to_cpu(cmd->sleep_interval[4]));
  1858. return rc;
  1859. }
  1860. static int iwl_send_power_mode(struct iwl_priv *priv, u32 mode)
  1861. {
  1862. u32 final_mode = mode;
  1863. int rc;
  1864. struct iwl_powertable_cmd cmd;
  1865. /* If on battery, set to 3,
  1866. * if plugged into AC power, set to CAM ("continuosly aware mode"),
  1867. * else user level */
  1868. switch (mode) {
  1869. case IWL_POWER_BATTERY:
  1870. final_mode = IWL_POWER_INDEX_3;
  1871. break;
  1872. case IWL_POWER_AC:
  1873. final_mode = IWL_POWER_MODE_CAM;
  1874. break;
  1875. default:
  1876. final_mode = mode;
  1877. break;
  1878. }
  1879. cmd.keep_alive_beacons = 0;
  1880. iwl_update_power_cmd(priv, &cmd, final_mode);
  1881. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1882. if (final_mode == IWL_POWER_MODE_CAM)
  1883. clear_bit(STATUS_POWER_PMI, &priv->status);
  1884. else
  1885. set_bit(STATUS_POWER_PMI, &priv->status);
  1886. return rc;
  1887. }
  1888. int iwl_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1889. {
  1890. /* Filter incoming packets to determine if they are targeted toward
  1891. * this network, discarding packets coming from ourselves */
  1892. switch (priv->iw_mode) {
  1893. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1894. /* packets from our adapter are dropped (echo) */
  1895. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1896. return 0;
  1897. /* {broad,multi}cast packets to our IBSS go through */
  1898. if (is_multicast_ether_addr(header->addr1))
  1899. return !compare_ether_addr(header->addr3, priv->bssid);
  1900. /* packets to our adapter go through */
  1901. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1902. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1903. /* packets from our adapter are dropped (echo) */
  1904. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1905. return 0;
  1906. /* {broad,multi}cast packets to our BSS go through */
  1907. if (is_multicast_ether_addr(header->addr1))
  1908. return !compare_ether_addr(header->addr2, priv->bssid);
  1909. /* packets to our adapter go through */
  1910. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1911. }
  1912. return 1;
  1913. }
  1914. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1915. const char *iwl_get_tx_fail_reason(u32 status)
  1916. {
  1917. switch (status & TX_STATUS_MSK) {
  1918. case TX_STATUS_SUCCESS:
  1919. return "SUCCESS";
  1920. TX_STATUS_ENTRY(SHORT_LIMIT);
  1921. TX_STATUS_ENTRY(LONG_LIMIT);
  1922. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1923. TX_STATUS_ENTRY(MGMNT_ABORT);
  1924. TX_STATUS_ENTRY(NEXT_FRAG);
  1925. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1926. TX_STATUS_ENTRY(DEST_PS);
  1927. TX_STATUS_ENTRY(ABORTED);
  1928. TX_STATUS_ENTRY(BT_RETRY);
  1929. TX_STATUS_ENTRY(STA_INVALID);
  1930. TX_STATUS_ENTRY(FRAG_DROPPED);
  1931. TX_STATUS_ENTRY(TID_DISABLE);
  1932. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1933. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1934. TX_STATUS_ENTRY(TX_LOCKED);
  1935. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1936. }
  1937. return "UNKNOWN";
  1938. }
  1939. /**
  1940. * iwl_scan_cancel - Cancel any currently executing HW scan
  1941. *
  1942. * NOTE: priv->mutex is not required before calling this function
  1943. */
  1944. static int iwl_scan_cancel(struct iwl_priv *priv)
  1945. {
  1946. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1947. clear_bit(STATUS_SCANNING, &priv->status);
  1948. return 0;
  1949. }
  1950. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1951. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1952. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1953. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1954. queue_work(priv->workqueue, &priv->abort_scan);
  1955. } else
  1956. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1957. return test_bit(STATUS_SCANNING, &priv->status);
  1958. }
  1959. return 0;
  1960. }
  1961. /**
  1962. * iwl_scan_cancel_timeout - Cancel any currently executing HW scan
  1963. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1964. *
  1965. * NOTE: priv->mutex must be held before calling this function
  1966. */
  1967. static int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1968. {
  1969. unsigned long now = jiffies;
  1970. int ret;
  1971. ret = iwl_scan_cancel(priv);
  1972. if (ret && ms) {
  1973. mutex_unlock(&priv->mutex);
  1974. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1975. test_bit(STATUS_SCANNING, &priv->status))
  1976. msleep(1);
  1977. mutex_lock(&priv->mutex);
  1978. return test_bit(STATUS_SCANNING, &priv->status);
  1979. }
  1980. return ret;
  1981. }
  1982. static void iwl_sequence_reset(struct iwl_priv *priv)
  1983. {
  1984. /* Reset ieee stats */
  1985. /* We don't reset the net_device_stats (ieee->stats) on
  1986. * re-association */
  1987. priv->last_seq_num = -1;
  1988. priv->last_frag_num = -1;
  1989. priv->last_packet_time = 0;
  1990. iwl_scan_cancel(priv);
  1991. }
  1992. #define MAX_UCODE_BEACON_INTERVAL 4096
  1993. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1994. static __le16 iwl_adjust_beacon_interval(u16 beacon_val)
  1995. {
  1996. u16 new_val = 0;
  1997. u16 beacon_factor = 0;
  1998. beacon_factor =
  1999. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2000. / MAX_UCODE_BEACON_INTERVAL;
  2001. new_val = beacon_val / beacon_factor;
  2002. return cpu_to_le16(new_val);
  2003. }
  2004. static void iwl_setup_rxon_timing(struct iwl_priv *priv)
  2005. {
  2006. u64 interval_tm_unit;
  2007. u64 tsf, result;
  2008. unsigned long flags;
  2009. struct ieee80211_conf *conf = NULL;
  2010. u16 beacon_int = 0;
  2011. conf = ieee80211_get_hw_conf(priv->hw);
  2012. spin_lock_irqsave(&priv->lock, flags);
  2013. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2014. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2015. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2016. tsf = priv->timestamp1;
  2017. tsf = ((tsf << 32) | priv->timestamp0);
  2018. beacon_int = priv->beacon_int;
  2019. spin_unlock_irqrestore(&priv->lock, flags);
  2020. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2021. if (beacon_int == 0) {
  2022. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2023. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2024. } else {
  2025. priv->rxon_timing.beacon_interval =
  2026. cpu_to_le16(beacon_int);
  2027. priv->rxon_timing.beacon_interval =
  2028. iwl_adjust_beacon_interval(
  2029. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2030. }
  2031. priv->rxon_timing.atim_window = 0;
  2032. } else {
  2033. priv->rxon_timing.beacon_interval =
  2034. iwl_adjust_beacon_interval(conf->beacon_int);
  2035. /* TODO: we need to get atim_window from upper stack
  2036. * for now we set to 0 */
  2037. priv->rxon_timing.atim_window = 0;
  2038. }
  2039. interval_tm_unit =
  2040. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2041. result = do_div(tsf, interval_tm_unit);
  2042. priv->rxon_timing.beacon_init_val =
  2043. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2044. IWL_DEBUG_ASSOC
  2045. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2046. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2047. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2048. le16_to_cpu(priv->rxon_timing.atim_window));
  2049. }
  2050. static int iwl_scan_initiate(struct iwl_priv *priv)
  2051. {
  2052. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2053. IWL_ERROR("APs don't scan.\n");
  2054. return 0;
  2055. }
  2056. if (!iwl_is_ready_rf(priv)) {
  2057. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2058. return -EIO;
  2059. }
  2060. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2061. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2062. return -EAGAIN;
  2063. }
  2064. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2065. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2066. "Queuing.\n");
  2067. return -EAGAIN;
  2068. }
  2069. IWL_DEBUG_INFO("Starting scan...\n");
  2070. priv->scan_bands = 2;
  2071. set_bit(STATUS_SCANNING, &priv->status);
  2072. priv->scan_start = jiffies;
  2073. priv->scan_pass_start = priv->scan_start;
  2074. queue_work(priv->workqueue, &priv->request_scan);
  2075. return 0;
  2076. }
  2077. static int iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  2078. {
  2079. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  2080. if (hw_decrypt)
  2081. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2082. else
  2083. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2084. return 0;
  2085. }
  2086. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode)
  2087. {
  2088. if (phymode == MODE_IEEE80211A) {
  2089. priv->staging_rxon.flags &=
  2090. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2091. | RXON_FLG_CCK_MSK);
  2092. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2093. } else {
  2094. /* Copied from iwl_bg_post_associate() */
  2095. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2096. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2097. else
  2098. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2099. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2100. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2101. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2102. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2103. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2104. }
  2105. }
  2106. /*
  2107. * initilize rxon structure with default values fromm eeprom
  2108. */
  2109. static void iwl_connection_init_rx_config(struct iwl_priv *priv)
  2110. {
  2111. const struct iwl_channel_info *ch_info;
  2112. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2113. switch (priv->iw_mode) {
  2114. case IEEE80211_IF_TYPE_AP:
  2115. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2116. break;
  2117. case IEEE80211_IF_TYPE_STA:
  2118. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2119. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2120. break;
  2121. case IEEE80211_IF_TYPE_IBSS:
  2122. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2123. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2124. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2125. RXON_FILTER_ACCEPT_GRP_MSK;
  2126. break;
  2127. case IEEE80211_IF_TYPE_MNTR:
  2128. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2129. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2130. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2131. break;
  2132. }
  2133. #if 0
  2134. /* TODO: Figure out when short_preamble would be set and cache from
  2135. * that */
  2136. if (!hw_to_local(priv->hw)->short_preamble)
  2137. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2138. else
  2139. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2140. #endif
  2141. ch_info = iwl_get_channel_info(priv, priv->phymode,
  2142. le16_to_cpu(priv->staging_rxon.channel));
  2143. if (!ch_info)
  2144. ch_info = &priv->channel_info[0];
  2145. /*
  2146. * in some case A channels are all non IBSS
  2147. * in this case force B/G channel
  2148. */
  2149. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2150. !(is_channel_ibss(ch_info)))
  2151. ch_info = &priv->channel_info[0];
  2152. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2153. if (is_channel_a_band(ch_info))
  2154. priv->phymode = MODE_IEEE80211A;
  2155. else
  2156. priv->phymode = MODE_IEEE80211G;
  2157. iwl_set_flags_for_phymode(priv, priv->phymode);
  2158. priv->staging_rxon.ofdm_basic_rates =
  2159. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2160. priv->staging_rxon.cck_basic_rates =
  2161. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2162. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2163. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2164. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2165. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2166. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2167. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2168. iwl4965_set_rxon_chain(priv);
  2169. }
  2170. static int iwl_set_mode(struct iwl_priv *priv, int mode)
  2171. {
  2172. if (!iwl_is_ready_rf(priv))
  2173. return -EAGAIN;
  2174. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2175. const struct iwl_channel_info *ch_info;
  2176. ch_info = iwl_get_channel_info(priv,
  2177. priv->phymode,
  2178. le16_to_cpu(priv->staging_rxon.channel));
  2179. if (!ch_info || !is_channel_ibss(ch_info)) {
  2180. IWL_ERROR("channel %d not IBSS channel\n",
  2181. le16_to_cpu(priv->staging_rxon.channel));
  2182. return -EINVAL;
  2183. }
  2184. }
  2185. cancel_delayed_work(&priv->scan_check);
  2186. if (iwl_scan_cancel_timeout(priv, 100)) {
  2187. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2188. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2189. return -EAGAIN;
  2190. }
  2191. priv->iw_mode = mode;
  2192. iwl_connection_init_rx_config(priv);
  2193. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2194. iwl_clear_stations_table(priv);
  2195. iwl_commit_rxon(priv);
  2196. return 0;
  2197. }
  2198. static void iwl_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  2199. struct ieee80211_tx_control *ctl,
  2200. struct iwl_cmd *cmd,
  2201. struct sk_buff *skb_frag,
  2202. int last_frag)
  2203. {
  2204. struct iwl_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2205. switch (keyinfo->alg) {
  2206. case ALG_CCMP:
  2207. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2208. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2209. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2210. break;
  2211. case ALG_TKIP:
  2212. #if 0
  2213. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2214. if (last_frag)
  2215. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2216. 8);
  2217. else
  2218. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2219. #endif
  2220. break;
  2221. case ALG_WEP:
  2222. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2223. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2224. if (keyinfo->keylen == 13)
  2225. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2226. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2227. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2228. "with key %d\n", ctl->key_idx);
  2229. break;
  2230. default:
  2231. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2232. break;
  2233. }
  2234. }
  2235. /*
  2236. * handle build REPLY_TX command notification.
  2237. */
  2238. static void iwl_build_tx_cmd_basic(struct iwl_priv *priv,
  2239. struct iwl_cmd *cmd,
  2240. struct ieee80211_tx_control *ctrl,
  2241. struct ieee80211_hdr *hdr,
  2242. int is_unicast, u8 std_id)
  2243. {
  2244. __le16 *qc;
  2245. u16 fc = le16_to_cpu(hdr->frame_control);
  2246. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2247. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2248. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2249. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2250. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2251. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2252. if (ieee80211_is_probe_response(fc) &&
  2253. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2254. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2255. } else {
  2256. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2257. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2258. }
  2259. cmd->cmd.tx.sta_id = std_id;
  2260. if (ieee80211_get_morefrag(hdr))
  2261. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2262. qc = ieee80211_get_qos_ctrl(hdr);
  2263. if (qc) {
  2264. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2265. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2266. } else
  2267. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2268. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2269. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2270. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2271. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2272. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2273. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2274. }
  2275. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2276. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2277. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2278. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2279. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2280. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2281. cmd->cmd.tx.timeout.pm_frame_timeout =
  2282. cpu_to_le16(3);
  2283. else
  2284. cmd->cmd.tx.timeout.pm_frame_timeout =
  2285. cpu_to_le16(2);
  2286. } else
  2287. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2288. cmd->cmd.tx.driver_txop = 0;
  2289. cmd->cmd.tx.tx_flags = tx_flags;
  2290. cmd->cmd.tx.next_frame_len = 0;
  2291. }
  2292. static int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  2293. {
  2294. int sta_id;
  2295. u16 fc = le16_to_cpu(hdr->frame_control);
  2296. DECLARE_MAC_BUF(mac);
  2297. /* If this frame is broadcast or not data then use the broadcast
  2298. * station id */
  2299. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2300. is_multicast_ether_addr(hdr->addr1))
  2301. return priv->hw_setting.bcast_sta_id;
  2302. switch (priv->iw_mode) {
  2303. /* If this frame is part of a BSS network (we're a station), then
  2304. * we use the AP's station id */
  2305. case IEEE80211_IF_TYPE_STA:
  2306. return IWL_AP_ID;
  2307. /* If we are an AP, then find the station, or use BCAST */
  2308. case IEEE80211_IF_TYPE_AP:
  2309. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2310. if (sta_id != IWL_INVALID_STATION)
  2311. return sta_id;
  2312. return priv->hw_setting.bcast_sta_id;
  2313. /* If this frame is part of a IBSS network, then we use the
  2314. * target specific station id */
  2315. case IEEE80211_IF_TYPE_IBSS:
  2316. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2317. if (sta_id != IWL_INVALID_STATION)
  2318. return sta_id;
  2319. sta_id = iwl_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  2320. if (sta_id != IWL_INVALID_STATION)
  2321. return sta_id;
  2322. IWL_DEBUG_DROP("Station %s not in station map. "
  2323. "Defaulting to broadcast...\n",
  2324. print_mac(mac, hdr->addr1));
  2325. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2326. return priv->hw_setting.bcast_sta_id;
  2327. default:
  2328. IWL_WARNING("Unkown mode of operation: %d", priv->iw_mode);
  2329. return priv->hw_setting.bcast_sta_id;
  2330. }
  2331. }
  2332. /*
  2333. * start REPLY_TX command process
  2334. */
  2335. static int iwl_tx_skb(struct iwl_priv *priv,
  2336. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2337. {
  2338. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2339. struct iwl_tfd_frame *tfd;
  2340. u32 *control_flags;
  2341. int txq_id = ctl->queue;
  2342. struct iwl_tx_queue *txq = NULL;
  2343. struct iwl_queue *q = NULL;
  2344. dma_addr_t phys_addr;
  2345. dma_addr_t txcmd_phys;
  2346. struct iwl_cmd *out_cmd = NULL;
  2347. u16 len, idx, len_org;
  2348. u8 id, hdr_len, unicast;
  2349. u8 sta_id;
  2350. u16 seq_number = 0;
  2351. u16 fc;
  2352. __le16 *qc;
  2353. u8 wait_write_ptr = 0;
  2354. unsigned long flags;
  2355. int rc;
  2356. spin_lock_irqsave(&priv->lock, flags);
  2357. if (iwl_is_rfkill(priv)) {
  2358. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2359. goto drop_unlock;
  2360. }
  2361. if (!priv->interface_id) {
  2362. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2363. goto drop_unlock;
  2364. }
  2365. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2366. IWL_ERROR("ERROR: No TX rate available.\n");
  2367. goto drop_unlock;
  2368. }
  2369. unicast = !is_multicast_ether_addr(hdr->addr1);
  2370. id = 0;
  2371. fc = le16_to_cpu(hdr->frame_control);
  2372. #ifdef CONFIG_IWLWIFI_DEBUG
  2373. if (ieee80211_is_auth(fc))
  2374. IWL_DEBUG_TX("Sending AUTH frame\n");
  2375. else if (ieee80211_is_assoc_request(fc))
  2376. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2377. else if (ieee80211_is_reassoc_request(fc))
  2378. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2379. #endif
  2380. if (!iwl_is_associated(priv) &&
  2381. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2382. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  2383. goto drop_unlock;
  2384. }
  2385. spin_unlock_irqrestore(&priv->lock, flags);
  2386. hdr_len = ieee80211_get_hdrlen(fc);
  2387. sta_id = iwl_get_sta_id(priv, hdr);
  2388. if (sta_id == IWL_INVALID_STATION) {
  2389. DECLARE_MAC_BUF(mac);
  2390. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2391. print_mac(mac, hdr->addr1));
  2392. goto drop;
  2393. }
  2394. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2395. qc = ieee80211_get_qos_ctrl(hdr);
  2396. if (qc) {
  2397. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2398. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2399. IEEE80211_SCTL_SEQ;
  2400. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2401. (hdr->seq_ctrl &
  2402. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2403. seq_number += 0x10;
  2404. #ifdef CONFIG_IWLWIFI_HT
  2405. #ifdef CONFIG_IWLWIFI_HT_AGG
  2406. /* aggregation is on for this <sta,tid> */
  2407. if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
  2408. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2409. #endif /* CONFIG_IWLWIFI_HT_AGG */
  2410. #endif /* CONFIG_IWLWIFI_HT */
  2411. }
  2412. txq = &priv->txq[txq_id];
  2413. q = &txq->q;
  2414. spin_lock_irqsave(&priv->lock, flags);
  2415. tfd = &txq->bd[q->first_empty];
  2416. memset(tfd, 0, sizeof(*tfd));
  2417. control_flags = (u32 *) tfd;
  2418. idx = get_cmd_index(q, q->first_empty, 0);
  2419. memset(&(txq->txb[q->first_empty]), 0, sizeof(struct iwl_tx_info));
  2420. txq->txb[q->first_empty].skb[0] = skb;
  2421. memcpy(&(txq->txb[q->first_empty].status.control),
  2422. ctl, sizeof(struct ieee80211_tx_control));
  2423. out_cmd = &txq->cmd[idx];
  2424. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2425. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2426. out_cmd->hdr.cmd = REPLY_TX;
  2427. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2428. INDEX_TO_SEQ(q->first_empty)));
  2429. /* copy frags header */
  2430. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2431. /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
  2432. len = priv->hw_setting.tx_cmd_len +
  2433. sizeof(struct iwl_cmd_header) + hdr_len;
  2434. len_org = len;
  2435. len = (len + 3) & ~3;
  2436. if (len_org != len)
  2437. len_org = 1;
  2438. else
  2439. len_org = 0;
  2440. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2441. offsetof(struct iwl_cmd, hdr);
  2442. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2443. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2444. iwl_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2445. /* 802.11 null functions have no payload... */
  2446. len = skb->len - hdr_len;
  2447. if (len) {
  2448. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2449. len, PCI_DMA_TODEVICE);
  2450. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2451. }
  2452. if (len_org)
  2453. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2454. len = (u16)skb->len;
  2455. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2456. /* TODO need this for burst mode later on */
  2457. iwl_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2458. /* set is_hcca to 0; it probably will never be implemented */
  2459. iwl_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2460. iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
  2461. hdr, hdr_len, ctl, NULL);
  2462. if (!ieee80211_get_morefrag(hdr)) {
  2463. txq->need_update = 1;
  2464. if (qc) {
  2465. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2466. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2467. }
  2468. } else {
  2469. wait_write_ptr = 1;
  2470. txq->need_update = 0;
  2471. }
  2472. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2473. sizeof(out_cmd->cmd.tx));
  2474. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2475. ieee80211_get_hdrlen(fc));
  2476. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2477. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  2478. rc = iwl_tx_queue_update_write_ptr(priv, txq);
  2479. spin_unlock_irqrestore(&priv->lock, flags);
  2480. if (rc)
  2481. return rc;
  2482. if ((iwl_queue_space(q) < q->high_mark)
  2483. && priv->mac80211_registered) {
  2484. if (wait_write_ptr) {
  2485. spin_lock_irqsave(&priv->lock, flags);
  2486. txq->need_update = 1;
  2487. iwl_tx_queue_update_write_ptr(priv, txq);
  2488. spin_unlock_irqrestore(&priv->lock, flags);
  2489. }
  2490. ieee80211_stop_queue(priv->hw, ctl->queue);
  2491. }
  2492. return 0;
  2493. drop_unlock:
  2494. spin_unlock_irqrestore(&priv->lock, flags);
  2495. drop:
  2496. return -1;
  2497. }
  2498. static void iwl_set_rate(struct iwl_priv *priv)
  2499. {
  2500. const struct ieee80211_hw_mode *hw = NULL;
  2501. struct ieee80211_rate *rate;
  2502. int i;
  2503. hw = iwl_get_hw_mode(priv, priv->phymode);
  2504. priv->active_rate = 0;
  2505. priv->active_rate_basic = 0;
  2506. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2507. hw->mode == MODE_IEEE80211A ?
  2508. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2509. for (i = 0; i < hw->num_rates; i++) {
  2510. rate = &(hw->rates[i]);
  2511. if ((rate->val < IWL_RATE_COUNT) &&
  2512. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2513. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2514. rate->val, iwl_rates[rate->val].plcp,
  2515. (rate->flags & IEEE80211_RATE_BASIC) ?
  2516. "*" : "");
  2517. priv->active_rate |= (1 << rate->val);
  2518. if (rate->flags & IEEE80211_RATE_BASIC)
  2519. priv->active_rate_basic |= (1 << rate->val);
  2520. } else
  2521. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2522. rate->val, iwl_rates[rate->val].plcp);
  2523. }
  2524. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2525. priv->active_rate, priv->active_rate_basic);
  2526. /*
  2527. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2528. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2529. * OFDM
  2530. */
  2531. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2532. priv->staging_rxon.cck_basic_rates =
  2533. ((priv->active_rate_basic &
  2534. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2535. else
  2536. priv->staging_rxon.cck_basic_rates =
  2537. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2538. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2539. priv->staging_rxon.ofdm_basic_rates =
  2540. ((priv->active_rate_basic &
  2541. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2542. IWL_FIRST_OFDM_RATE) & 0xFF;
  2543. else
  2544. priv->staging_rxon.ofdm_basic_rates =
  2545. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2546. }
  2547. static void iwl_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2548. {
  2549. unsigned long flags;
  2550. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2551. return;
  2552. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2553. disable_radio ? "OFF" : "ON");
  2554. if (disable_radio) {
  2555. iwl_scan_cancel(priv);
  2556. /* FIXME: This is a workaround for AP */
  2557. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2558. spin_lock_irqsave(&priv->lock, flags);
  2559. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2560. CSR_UCODE_SW_BIT_RFKILL);
  2561. spin_unlock_irqrestore(&priv->lock, flags);
  2562. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2563. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2564. }
  2565. return;
  2566. }
  2567. spin_lock_irqsave(&priv->lock, flags);
  2568. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2569. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2570. spin_unlock_irqrestore(&priv->lock, flags);
  2571. /* wake up ucode */
  2572. msleep(10);
  2573. spin_lock_irqsave(&priv->lock, flags);
  2574. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2575. if (!iwl_grab_restricted_access(priv))
  2576. iwl_release_restricted_access(priv);
  2577. spin_unlock_irqrestore(&priv->lock, flags);
  2578. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2579. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2580. "disabled by HW switch\n");
  2581. return;
  2582. }
  2583. queue_work(priv->workqueue, &priv->restart);
  2584. return;
  2585. }
  2586. void iwl_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2587. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2588. {
  2589. u16 fc =
  2590. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2591. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2592. return;
  2593. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2594. return;
  2595. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2596. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2597. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2598. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2599. RX_RES_STATUS_BAD_ICV_MIC)
  2600. stats->flag |= RX_FLAG_MMIC_ERROR;
  2601. case RX_RES_STATUS_SEC_TYPE_WEP:
  2602. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2603. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2604. RX_RES_STATUS_DECRYPT_OK) {
  2605. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2606. stats->flag |= RX_FLAG_DECRYPTED;
  2607. }
  2608. break;
  2609. default:
  2610. break;
  2611. }
  2612. }
  2613. void iwl_handle_data_packet_monitor(struct iwl_priv *priv,
  2614. struct iwl_rx_mem_buffer *rxb,
  2615. void *data, short len,
  2616. struct ieee80211_rx_status *stats,
  2617. u16 phy_flags)
  2618. {
  2619. struct iwl_rt_rx_hdr *iwl_rt;
  2620. /* First cache any information we need before we overwrite
  2621. * the information provided in the skb from the hardware */
  2622. s8 signal = stats->ssi;
  2623. s8 noise = 0;
  2624. int rate = stats->rate;
  2625. u64 tsf = stats->mactime;
  2626. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2627. /* We received data from the HW, so stop the watchdog */
  2628. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl_rt)) {
  2629. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2630. return;
  2631. }
  2632. /* copy the frame data to write after where the radiotap header goes */
  2633. iwl_rt = (void *)rxb->skb->data;
  2634. memmove(iwl_rt->payload, data, len);
  2635. iwl_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2636. iwl_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2637. /* total header + data */
  2638. iwl_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl_rt));
  2639. /* Set the size of the skb to the size of the frame */
  2640. skb_put(rxb->skb, sizeof(*iwl_rt) + len);
  2641. /* Big bitfield of all the fields we provide in radiotap */
  2642. iwl_rt->rt_hdr.it_present =
  2643. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2644. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2645. (1 << IEEE80211_RADIOTAP_RATE) |
  2646. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2647. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2648. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2649. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2650. /* Zero the flags, we'll add to them as we go */
  2651. iwl_rt->rt_flags = 0;
  2652. iwl_rt->rt_tsf = cpu_to_le64(tsf);
  2653. /* Convert to dBm */
  2654. iwl_rt->rt_dbmsignal = signal;
  2655. iwl_rt->rt_dbmnoise = noise;
  2656. /* Convert the channel frequency and set the flags */
  2657. iwl_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2658. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2659. iwl_rt->rt_chbitmask =
  2660. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2661. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2662. iwl_rt->rt_chbitmask =
  2663. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2664. else /* 802.11g */
  2665. iwl_rt->rt_chbitmask =
  2666. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2667. rate = iwl_rate_index_from_plcp(rate);
  2668. if (rate == -1)
  2669. iwl_rt->rt_rate = 0;
  2670. else
  2671. iwl_rt->rt_rate = iwl_rates[rate].ieee;
  2672. /* antenna number */
  2673. iwl_rt->rt_antenna =
  2674. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2675. /* set the preamble flag if we have it */
  2676. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2677. iwl_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2678. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2679. stats->flag |= RX_FLAG_RADIOTAP;
  2680. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2681. rxb->skb = NULL;
  2682. }
  2683. #define IWL_PACKET_RETRY_TIME HZ
  2684. int is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2685. {
  2686. u16 sc = le16_to_cpu(header->seq_ctrl);
  2687. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2688. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2689. u16 *last_seq, *last_frag;
  2690. unsigned long *last_time;
  2691. switch (priv->iw_mode) {
  2692. case IEEE80211_IF_TYPE_IBSS:{
  2693. struct list_head *p;
  2694. struct iwl_ibss_seq *entry = NULL;
  2695. u8 *mac = header->addr2;
  2696. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2697. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2698. entry =
  2699. list_entry(p, struct iwl_ibss_seq, list);
  2700. if (!compare_ether_addr(entry->mac, mac))
  2701. break;
  2702. }
  2703. if (p == &priv->ibss_mac_hash[index]) {
  2704. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2705. if (!entry) {
  2706. IWL_ERROR
  2707. ("Cannot malloc new mac entry\n");
  2708. return 0;
  2709. }
  2710. memcpy(entry->mac, mac, ETH_ALEN);
  2711. entry->seq_num = seq;
  2712. entry->frag_num = frag;
  2713. entry->packet_time = jiffies;
  2714. list_add(&entry->list,
  2715. &priv->ibss_mac_hash[index]);
  2716. return 0;
  2717. }
  2718. last_seq = &entry->seq_num;
  2719. last_frag = &entry->frag_num;
  2720. last_time = &entry->packet_time;
  2721. break;
  2722. }
  2723. case IEEE80211_IF_TYPE_STA:
  2724. last_seq = &priv->last_seq_num;
  2725. last_frag = &priv->last_frag_num;
  2726. last_time = &priv->last_packet_time;
  2727. break;
  2728. default:
  2729. return 0;
  2730. }
  2731. if ((*last_seq == seq) &&
  2732. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2733. if (*last_frag == frag)
  2734. goto drop;
  2735. if (*last_frag + 1 != frag)
  2736. /* out-of-order fragment */
  2737. goto drop;
  2738. } else
  2739. *last_seq = seq;
  2740. *last_frag = frag;
  2741. *last_time = jiffies;
  2742. return 0;
  2743. drop:
  2744. return 1;
  2745. }
  2746. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2747. #include "iwl-spectrum.h"
  2748. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2749. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2750. #define TIME_UNIT 1024
  2751. /*
  2752. * extended beacon time format
  2753. * time in usec will be changed into a 32-bit value in 8:24 format
  2754. * the high 1 byte is the beacon counts
  2755. * the lower 3 bytes is the time in usec within one beacon interval
  2756. */
  2757. static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2758. {
  2759. u32 quot;
  2760. u32 rem;
  2761. u32 interval = beacon_interval * 1024;
  2762. if (!interval || !usec)
  2763. return 0;
  2764. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2765. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2766. return (quot << 24) + rem;
  2767. }
  2768. /* base is usually what we get from ucode with each received frame,
  2769. * the same as HW timer counter counting down
  2770. */
  2771. static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2772. {
  2773. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2774. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2775. u32 interval = beacon_interval * TIME_UNIT;
  2776. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2777. (addon & BEACON_TIME_MASK_HIGH);
  2778. if (base_low > addon_low)
  2779. res += base_low - addon_low;
  2780. else if (base_low < addon_low) {
  2781. res += interval + base_low - addon_low;
  2782. res += (1 << 24);
  2783. } else
  2784. res += (1 << 24);
  2785. return cpu_to_le32(res);
  2786. }
  2787. static int iwl_get_measurement(struct iwl_priv *priv,
  2788. struct ieee80211_measurement_params *params,
  2789. u8 type)
  2790. {
  2791. struct iwl_spectrum_cmd spectrum;
  2792. struct iwl_rx_packet *res;
  2793. struct iwl_host_cmd cmd = {
  2794. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2795. .data = (void *)&spectrum,
  2796. .meta.flags = CMD_WANT_SKB,
  2797. };
  2798. u32 add_time = le64_to_cpu(params->start_time);
  2799. int rc;
  2800. int spectrum_resp_status;
  2801. int duration = le16_to_cpu(params->duration);
  2802. if (iwl_is_associated(priv))
  2803. add_time =
  2804. iwl_usecs_to_beacons(
  2805. le64_to_cpu(params->start_time) - priv->last_tsf,
  2806. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2807. memset(&spectrum, 0, sizeof(spectrum));
  2808. spectrum.channel_count = cpu_to_le16(1);
  2809. spectrum.flags =
  2810. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2811. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2812. cmd.len = sizeof(spectrum);
  2813. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2814. if (iwl_is_associated(priv))
  2815. spectrum.start_time =
  2816. iwl_add_beacon_time(priv->last_beacon_time,
  2817. add_time,
  2818. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2819. else
  2820. spectrum.start_time = 0;
  2821. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2822. spectrum.channels[0].channel = params->channel;
  2823. spectrum.channels[0].type = type;
  2824. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2825. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2826. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2827. rc = iwl_send_cmd_sync(priv, &cmd);
  2828. if (rc)
  2829. return rc;
  2830. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2831. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2832. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2833. rc = -EIO;
  2834. }
  2835. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2836. switch (spectrum_resp_status) {
  2837. case 0: /* Command will be handled */
  2838. if (res->u.spectrum.id != 0xff) {
  2839. IWL_DEBUG_INFO
  2840. ("Replaced existing measurement: %d\n",
  2841. res->u.spectrum.id);
  2842. priv->measurement_status &= ~MEASUREMENT_READY;
  2843. }
  2844. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2845. rc = 0;
  2846. break;
  2847. case 1: /* Command will not be handled */
  2848. rc = -EAGAIN;
  2849. break;
  2850. }
  2851. dev_kfree_skb_any(cmd.meta.u.skb);
  2852. return rc;
  2853. }
  2854. #endif
  2855. static void iwl_txstatus_to_ieee(struct iwl_priv *priv,
  2856. struct iwl_tx_info *tx_sta)
  2857. {
  2858. tx_sta->status.ack_signal = 0;
  2859. tx_sta->status.excessive_retries = 0;
  2860. tx_sta->status.queue_length = 0;
  2861. tx_sta->status.queue_number = 0;
  2862. if (in_interrupt())
  2863. ieee80211_tx_status_irqsafe(priv->hw,
  2864. tx_sta->skb[0], &(tx_sta->status));
  2865. else
  2866. ieee80211_tx_status(priv->hw,
  2867. tx_sta->skb[0], &(tx_sta->status));
  2868. tx_sta->skb[0] = NULL;
  2869. }
  2870. /**
  2871. * iwl_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
  2872. *
  2873. * When FW advances 'R' index, all entries between old and
  2874. * new 'R' index need to be reclaimed. As result, some free space
  2875. * forms. If there is enough free space (> low mark), wake Tx queue.
  2876. */
  2877. int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2878. {
  2879. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2880. struct iwl_queue *q = &txq->q;
  2881. int nfreed = 0;
  2882. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2883. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2884. "is out of range [0-%d] %d %d.\n", txq_id,
  2885. index, q->n_bd, q->first_empty, q->last_used);
  2886. return 0;
  2887. }
  2888. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2889. q->last_used != index;
  2890. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd)) {
  2891. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2892. iwl_txstatus_to_ieee(priv,
  2893. &(txq->txb[txq->q.last_used]));
  2894. iwl_hw_txq_free_tfd(priv, txq);
  2895. } else if (nfreed > 1) {
  2896. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2897. q->first_empty, q->last_used);
  2898. queue_work(priv->workqueue, &priv->restart);
  2899. }
  2900. nfreed++;
  2901. }
  2902. if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2903. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2904. priv->mac80211_registered)
  2905. ieee80211_wake_queue(priv->hw, txq_id);
  2906. return nfreed;
  2907. }
  2908. static int iwl_is_tx_success(u32 status)
  2909. {
  2910. status &= TX_STATUS_MSK;
  2911. return (status == TX_STATUS_SUCCESS)
  2912. || (status == TX_STATUS_DIRECT_DONE);
  2913. }
  2914. /******************************************************************************
  2915. *
  2916. * Generic RX handler implementations
  2917. *
  2918. ******************************************************************************/
  2919. #ifdef CONFIG_IWLWIFI_HT
  2920. #ifdef CONFIG_IWLWIFI_HT_AGG
  2921. static inline int iwl_get_ra_sta_id(struct iwl_priv *priv,
  2922. struct ieee80211_hdr *hdr)
  2923. {
  2924. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2925. return IWL_AP_ID;
  2926. else {
  2927. u8 *da = ieee80211_get_DA(hdr);
  2928. return iwl_hw_find_station(priv, da);
  2929. }
  2930. }
  2931. static struct ieee80211_hdr *iwl_tx_queue_get_hdr(
  2932. struct iwl_priv *priv, int txq_id, int idx)
  2933. {
  2934. if (priv->txq[txq_id].txb[idx].skb[0])
  2935. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2936. txb[idx].skb[0]->data;
  2937. return NULL;
  2938. }
  2939. static inline u32 iwl_get_scd_ssn(struct iwl_tx_resp *tx_resp)
  2940. {
  2941. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2942. tx_resp->frame_count);
  2943. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2944. }
  2945. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2946. struct iwl_ht_agg *agg,
  2947. struct iwl_tx_resp *tx_resp,
  2948. u16 start_idx)
  2949. {
  2950. u32 status;
  2951. __le32 *frame_status = &tx_resp->status;
  2952. struct ieee80211_tx_status *tx_status = NULL;
  2953. struct ieee80211_hdr *hdr = NULL;
  2954. int i, sh;
  2955. int txq_id, idx;
  2956. u16 seq;
  2957. if (agg->wait_for_ba)
  2958. IWL_DEBUG_TX_REPLY("got tx repsons w/o back\n");
  2959. agg->frame_count = tx_resp->frame_count;
  2960. agg->start_idx = start_idx;
  2961. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2962. agg->bitmap0 = agg->bitmap1 = 0;
  2963. if (agg->frame_count == 1) {
  2964. struct iwl_tx_queue *txq ;
  2965. status = le32_to_cpu(frame_status[0]);
  2966. txq_id = agg->txq_id;
  2967. txq = &priv->txq[txq_id];
  2968. /* FIXME: code repetition */
  2969. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
  2970. agg->frame_count, agg->start_idx);
  2971. tx_status = &(priv->txq[txq_id].txb[txq->q.last_used].status);
  2972. tx_status->retry_count = tx_resp->failure_frame;
  2973. tx_status->queue_number = status & 0xff;
  2974. tx_status->queue_length = tx_resp->bt_kill_count;
  2975. tx_status->queue_length |= tx_resp->failure_rts;
  2976. tx_status->flags = iwl_is_tx_success(status)?
  2977. IEEE80211_TX_STATUS_ACK : 0;
  2978. tx_status->control.tx_rate =
  2979. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  2980. /* FIXME: code repetition end */
  2981. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2982. status & 0xff, tx_resp->failure_frame);
  2983. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2984. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2985. agg->wait_for_ba = 0;
  2986. } else {
  2987. u64 bitmap = 0;
  2988. int start = agg->start_idx;
  2989. for (i = 0; i < agg->frame_count; i++) {
  2990. u16 sc;
  2991. status = le32_to_cpu(frame_status[i]);
  2992. seq = status >> 16;
  2993. idx = SEQ_TO_INDEX(seq);
  2994. txq_id = SEQ_TO_QUEUE(seq);
  2995. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2996. AGG_TX_STATE_ABORT_MSK))
  2997. continue;
  2998. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2999. agg->frame_count, txq_id, idx);
  3000. hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
  3001. sc = le16_to_cpu(hdr->seq_ctrl);
  3002. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3003. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3004. " idx=%d, seq_idx=%d, seq=%d\n",
  3005. idx, SEQ_TO_SN(sc),
  3006. hdr->seq_ctrl);
  3007. return -1;
  3008. }
  3009. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3010. i, idx, SEQ_TO_SN(sc));
  3011. sh = idx - start;
  3012. if (sh > 64) {
  3013. sh = (start - idx) + 0xff;
  3014. bitmap = bitmap << sh;
  3015. sh = 0;
  3016. start = idx;
  3017. } else if (sh < -64)
  3018. sh = 0xff - (start - idx);
  3019. else if (sh < 0) {
  3020. sh = start - idx;
  3021. start = idx;
  3022. bitmap = bitmap << sh;
  3023. sh = 0;
  3024. }
  3025. bitmap |= (1 << sh);
  3026. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3027. start, (u32)(bitmap & 0xFFFFFFFF));
  3028. }
  3029. agg->bitmap0 = bitmap & 0xFFFFFFFF;
  3030. agg->bitmap1 = bitmap >> 32;
  3031. agg->start_idx = start;
  3032. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3033. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
  3034. agg->frame_count, agg->start_idx,
  3035. agg->bitmap0);
  3036. if (bitmap)
  3037. agg->wait_for_ba = 1;
  3038. }
  3039. return 0;
  3040. }
  3041. #endif
  3042. #endif
  3043. static void iwl_rx_reply_tx(struct iwl_priv *priv,
  3044. struct iwl_rx_mem_buffer *rxb)
  3045. {
  3046. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3047. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3048. int txq_id = SEQ_TO_QUEUE(sequence);
  3049. int index = SEQ_TO_INDEX(sequence);
  3050. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  3051. struct ieee80211_tx_status *tx_status;
  3052. struct iwl_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3053. u32 status = le32_to_cpu(tx_resp->status);
  3054. #ifdef CONFIG_IWLWIFI_HT
  3055. #ifdef CONFIG_IWLWIFI_HT_AGG
  3056. int tid, sta_id;
  3057. #endif
  3058. #endif
  3059. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3060. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3061. "is out of range [0-%d] %d %d\n", txq_id,
  3062. index, txq->q.n_bd, txq->q.first_empty,
  3063. txq->q.last_used);
  3064. return;
  3065. }
  3066. #ifdef CONFIG_IWLWIFI_HT
  3067. #ifdef CONFIG_IWLWIFI_HT_AGG
  3068. if (txq->sched_retry) {
  3069. const u32 scd_ssn = iwl_get_scd_ssn(tx_resp);
  3070. struct ieee80211_hdr *hdr =
  3071. iwl_tx_queue_get_hdr(priv, txq_id, index);
  3072. struct iwl_ht_agg *agg = NULL;
  3073. __le16 *qc = ieee80211_get_qos_ctrl(hdr);
  3074. if (qc == NULL) {
  3075. IWL_ERROR("BUG_ON qc is null!!!!\n");
  3076. return;
  3077. }
  3078. tid = le16_to_cpu(*qc) & 0xf;
  3079. sta_id = iwl_get_ra_sta_id(priv, hdr);
  3080. if (unlikely(sta_id == IWL_INVALID_STATION)) {
  3081. IWL_ERROR("Station not known for\n");
  3082. return;
  3083. }
  3084. agg = &priv->stations[sta_id].tid[tid].agg;
  3085. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
  3086. if ((tx_resp->frame_count == 1) &&
  3087. !iwl_is_tx_success(status)) {
  3088. /* TODO: send BAR */
  3089. }
  3090. if ((txq->q.last_used != (scd_ssn & 0xff))) {
  3091. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3092. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3093. "%d index %d\n", scd_ssn , index);
  3094. iwl_tx_queue_reclaim(priv, txq_id, index);
  3095. }
  3096. } else {
  3097. #endif /* CONFIG_IWLWIFI_HT_AGG */
  3098. #endif /* CONFIG_IWLWIFI_HT */
  3099. tx_status = &(txq->txb[txq->q.last_used].status);
  3100. tx_status->retry_count = tx_resp->failure_frame;
  3101. tx_status->queue_number = status;
  3102. tx_status->queue_length = tx_resp->bt_kill_count;
  3103. tx_status->queue_length |= tx_resp->failure_rts;
  3104. tx_status->flags =
  3105. iwl_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3106. tx_status->control.tx_rate =
  3107. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3108. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3109. "retries %d\n", txq_id, iwl_get_tx_fail_reason(status),
  3110. status, le32_to_cpu(tx_resp->rate_n_flags),
  3111. tx_resp->failure_frame);
  3112. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3113. if (index != -1)
  3114. iwl_tx_queue_reclaim(priv, txq_id, index);
  3115. #ifdef CONFIG_IWLWIFI_HT
  3116. #ifdef CONFIG_IWLWIFI_HT_AGG
  3117. }
  3118. #endif /* CONFIG_IWLWIFI_HT_AGG */
  3119. #endif /* CONFIG_IWLWIFI_HT */
  3120. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3121. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3122. }
  3123. static void iwl_rx_reply_alive(struct iwl_priv *priv,
  3124. struct iwl_rx_mem_buffer *rxb)
  3125. {
  3126. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3127. struct iwl_alive_resp *palive;
  3128. struct delayed_work *pwork;
  3129. palive = &pkt->u.alive_frame;
  3130. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3131. "0x%01X 0x%01X\n",
  3132. palive->is_valid, palive->ver_type,
  3133. palive->ver_subtype);
  3134. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3135. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3136. memcpy(&priv->card_alive_init,
  3137. &pkt->u.alive_frame,
  3138. sizeof(struct iwl_init_alive_resp));
  3139. pwork = &priv->init_alive_start;
  3140. } else {
  3141. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3142. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3143. sizeof(struct iwl_alive_resp));
  3144. pwork = &priv->alive_start;
  3145. }
  3146. /* We delay the ALIVE response by 5ms to
  3147. * give the HW RF Kill time to activate... */
  3148. if (palive->is_valid == UCODE_VALID_OK)
  3149. queue_delayed_work(priv->workqueue, pwork,
  3150. msecs_to_jiffies(5));
  3151. else
  3152. IWL_WARNING("uCode did not respond OK.\n");
  3153. }
  3154. static void iwl_rx_reply_add_sta(struct iwl_priv *priv,
  3155. struct iwl_rx_mem_buffer *rxb)
  3156. {
  3157. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3158. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3159. return;
  3160. }
  3161. static void iwl_rx_reply_error(struct iwl_priv *priv,
  3162. struct iwl_rx_mem_buffer *rxb)
  3163. {
  3164. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3165. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3166. "seq 0x%04X ser 0x%08X\n",
  3167. le32_to_cpu(pkt->u.err_resp.error_type),
  3168. get_cmd_string(pkt->u.err_resp.cmd_id),
  3169. pkt->u.err_resp.cmd_id,
  3170. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3171. le32_to_cpu(pkt->u.err_resp.error_info));
  3172. }
  3173. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3174. static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  3175. {
  3176. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3177. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3178. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  3179. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3180. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3181. rxon->channel = csa->channel;
  3182. priv->staging_rxon.channel = csa->channel;
  3183. }
  3184. static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  3185. struct iwl_rx_mem_buffer *rxb)
  3186. {
  3187. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  3188. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3189. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3190. if (!report->state) {
  3191. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3192. "Spectrum Measure Notification: Start\n");
  3193. return;
  3194. }
  3195. memcpy(&priv->measure_report, report, sizeof(*report));
  3196. priv->measurement_status |= MEASUREMENT_READY;
  3197. #endif
  3198. }
  3199. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  3200. struct iwl_rx_mem_buffer *rxb)
  3201. {
  3202. #ifdef CONFIG_IWLWIFI_DEBUG
  3203. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3204. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3205. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3206. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3207. #endif
  3208. }
  3209. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  3210. struct iwl_rx_mem_buffer *rxb)
  3211. {
  3212. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3213. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3214. "notification for %s:\n",
  3215. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3216. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3217. }
  3218. static void iwl_bg_beacon_update(struct work_struct *work)
  3219. {
  3220. struct iwl_priv *priv =
  3221. container_of(work, struct iwl_priv, beacon_update);
  3222. struct sk_buff *beacon;
  3223. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3224. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  3225. if (!beacon) {
  3226. IWL_ERROR("update beacon failed\n");
  3227. return;
  3228. }
  3229. mutex_lock(&priv->mutex);
  3230. /* new beacon skb is allocated every time; dispose previous.*/
  3231. if (priv->ibss_beacon)
  3232. dev_kfree_skb(priv->ibss_beacon);
  3233. priv->ibss_beacon = beacon;
  3234. mutex_unlock(&priv->mutex);
  3235. iwl_send_beacon_cmd(priv);
  3236. }
  3237. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  3238. struct iwl_rx_mem_buffer *rxb)
  3239. {
  3240. #ifdef CONFIG_IWLWIFI_DEBUG
  3241. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3242. struct iwl_beacon_notif *beacon = &(pkt->u.beacon_status);
  3243. u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3244. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3245. "tsf %d %d rate %d\n",
  3246. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3247. beacon->beacon_notify_hdr.failure_frame,
  3248. le32_to_cpu(beacon->ibss_mgr_status),
  3249. le32_to_cpu(beacon->high_tsf),
  3250. le32_to_cpu(beacon->low_tsf), rate);
  3251. #endif
  3252. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3253. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3254. queue_work(priv->workqueue, &priv->beacon_update);
  3255. }
  3256. /* Service response to REPLY_SCAN_CMD (0x80) */
  3257. static void iwl_rx_reply_scan(struct iwl_priv *priv,
  3258. struct iwl_rx_mem_buffer *rxb)
  3259. {
  3260. #ifdef CONFIG_IWLWIFI_DEBUG
  3261. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3262. struct iwl_scanreq_notification *notif =
  3263. (struct iwl_scanreq_notification *)pkt->u.raw;
  3264. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3265. #endif
  3266. }
  3267. /* Service SCAN_START_NOTIFICATION (0x82) */
  3268. static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
  3269. struct iwl_rx_mem_buffer *rxb)
  3270. {
  3271. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3272. struct iwl_scanstart_notification *notif =
  3273. (struct iwl_scanstart_notification *)pkt->u.raw;
  3274. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3275. IWL_DEBUG_SCAN("Scan start: "
  3276. "%d [802.11%s] "
  3277. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3278. notif->channel,
  3279. notif->band ? "bg" : "a",
  3280. notif->tsf_high,
  3281. notif->tsf_low, notif->status, notif->beacon_timer);
  3282. }
  3283. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3284. static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
  3285. struct iwl_rx_mem_buffer *rxb)
  3286. {
  3287. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3288. struct iwl_scanresults_notification *notif =
  3289. (struct iwl_scanresults_notification *)pkt->u.raw;
  3290. IWL_DEBUG_SCAN("Scan ch.res: "
  3291. "%d [802.11%s] "
  3292. "(TSF: 0x%08X:%08X) - %d "
  3293. "elapsed=%lu usec (%dms since last)\n",
  3294. notif->channel,
  3295. notif->band ? "bg" : "a",
  3296. le32_to_cpu(notif->tsf_high),
  3297. le32_to_cpu(notif->tsf_low),
  3298. le32_to_cpu(notif->statistics[0]),
  3299. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3300. jiffies_to_msecs(elapsed_jiffies
  3301. (priv->last_scan_jiffies, jiffies)));
  3302. priv->last_scan_jiffies = jiffies;
  3303. }
  3304. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3305. static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
  3306. struct iwl_rx_mem_buffer *rxb)
  3307. {
  3308. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3309. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3310. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3311. scan_notif->scanned_channels,
  3312. scan_notif->tsf_low,
  3313. scan_notif->tsf_high, scan_notif->status);
  3314. /* The HW is no longer scanning */
  3315. clear_bit(STATUS_SCAN_HW, &priv->status);
  3316. /* The scan completion notification came in, so kill that timer... */
  3317. cancel_delayed_work(&priv->scan_check);
  3318. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3319. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3320. jiffies_to_msecs(elapsed_jiffies
  3321. (priv->scan_pass_start, jiffies)));
  3322. /* Remove this scanned band from the list
  3323. * of pending bands to scan */
  3324. priv->scan_bands--;
  3325. /* If a request to abort was given, or the scan did not succeed
  3326. * then we reset the scan state machine and terminate,
  3327. * re-queuing another scan if one has been requested */
  3328. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3329. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3330. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3331. } else {
  3332. /* If there are more bands on this scan pass reschedule */
  3333. if (priv->scan_bands > 0)
  3334. goto reschedule;
  3335. }
  3336. priv->last_scan_jiffies = jiffies;
  3337. IWL_DEBUG_INFO("Setting scan to off\n");
  3338. clear_bit(STATUS_SCANNING, &priv->status);
  3339. IWL_DEBUG_INFO("Scan took %dms\n",
  3340. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3341. queue_work(priv->workqueue, &priv->scan_completed);
  3342. return;
  3343. reschedule:
  3344. priv->scan_pass_start = jiffies;
  3345. queue_work(priv->workqueue, &priv->request_scan);
  3346. }
  3347. /* Handle notification from uCode that card's power state is changing
  3348. * due to software, hardware, or critical temperature RFKILL */
  3349. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  3350. struct iwl_rx_mem_buffer *rxb)
  3351. {
  3352. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3353. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3354. unsigned long status = priv->status;
  3355. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3356. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3357. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3358. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3359. RF_CARD_DISABLED)) {
  3360. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3361. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3362. if (!iwl_grab_restricted_access(priv)) {
  3363. iwl_write_restricted(
  3364. priv, HBUS_TARG_MBX_C,
  3365. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3366. iwl_release_restricted_access(priv);
  3367. }
  3368. if (!(flags & RXON_CARD_DISABLED)) {
  3369. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3370. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3371. if (!iwl_grab_restricted_access(priv)) {
  3372. iwl_write_restricted(
  3373. priv, HBUS_TARG_MBX_C,
  3374. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3375. iwl_release_restricted_access(priv);
  3376. }
  3377. }
  3378. if (flags & RF_CARD_DISABLED) {
  3379. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3380. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3381. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3382. if (!iwl_grab_restricted_access(priv))
  3383. iwl_release_restricted_access(priv);
  3384. }
  3385. }
  3386. if (flags & HW_CARD_DISABLED)
  3387. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3388. else
  3389. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3390. if (flags & SW_CARD_DISABLED)
  3391. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3392. else
  3393. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3394. if (!(flags & RXON_CARD_DISABLED))
  3395. iwl_scan_cancel(priv);
  3396. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3397. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3398. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3399. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3400. queue_work(priv->workqueue, &priv->rf_kill);
  3401. else
  3402. wake_up_interruptible(&priv->wait_command_queue);
  3403. }
  3404. /**
  3405. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  3406. *
  3407. * Setup the RX handlers for each of the reply types sent from the uCode
  3408. * to the host.
  3409. *
  3410. * This function chains into the hardware specific files for them to setup
  3411. * any hardware specific handlers as well.
  3412. */
  3413. static void iwl_setup_rx_handlers(struct iwl_priv *priv)
  3414. {
  3415. priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
  3416. priv->rx_handlers[REPLY_ADD_STA] = iwl_rx_reply_add_sta;
  3417. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  3418. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  3419. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3420. iwl_rx_spectrum_measure_notif;
  3421. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  3422. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3423. iwl_rx_pm_debug_statistics_notif;
  3424. priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  3425. /* NOTE: iwl_rx_statistics is different based on whether
  3426. * the build is for the 3945 or the 4965. See the
  3427. * corresponding implementation in iwl-XXXX.c
  3428. *
  3429. * The same handler is used for both the REPLY to a
  3430. * discrete statistics request from the host as well as
  3431. * for the periodic statistics notification from the uCode
  3432. */
  3433. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_hw_rx_statistics;
  3434. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_hw_rx_statistics;
  3435. priv->rx_handlers[REPLY_SCAN_CMD] = iwl_rx_reply_scan;
  3436. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl_rx_scan_start_notif;
  3437. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3438. iwl_rx_scan_results_notif;
  3439. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3440. iwl_rx_scan_complete_notif;
  3441. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  3442. priv->rx_handlers[REPLY_TX] = iwl_rx_reply_tx;
  3443. /* Setup hardware specific Rx handlers */
  3444. iwl_hw_rx_handler_setup(priv);
  3445. }
  3446. /**
  3447. * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3448. * @rxb: Rx buffer to reclaim
  3449. *
  3450. * If an Rx buffer has an async callback associated with it the callback
  3451. * will be executed. The attached skb (if present) will only be freed
  3452. * if the callback returns 1
  3453. */
  3454. static void iwl_tx_cmd_complete(struct iwl_priv *priv,
  3455. struct iwl_rx_mem_buffer *rxb)
  3456. {
  3457. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3458. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3459. int txq_id = SEQ_TO_QUEUE(sequence);
  3460. int index = SEQ_TO_INDEX(sequence);
  3461. int huge = sequence & SEQ_HUGE_FRAME;
  3462. int cmd_index;
  3463. struct iwl_cmd *cmd;
  3464. /* If a Tx command is being handled and it isn't in the actual
  3465. * command queue then there a command routing bug has been introduced
  3466. * in the queue management code. */
  3467. if (txq_id != IWL_CMD_QUEUE_NUM)
  3468. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3469. txq_id, pkt->hdr.cmd);
  3470. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3471. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3472. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3473. /* Input error checking is done when commands are added to queue. */
  3474. if (cmd->meta.flags & CMD_WANT_SKB) {
  3475. cmd->meta.source->u.skb = rxb->skb;
  3476. rxb->skb = NULL;
  3477. } else if (cmd->meta.u.callback &&
  3478. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3479. rxb->skb = NULL;
  3480. iwl_tx_queue_reclaim(priv, txq_id, index);
  3481. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3482. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3483. wake_up_interruptible(&priv->wait_command_queue);
  3484. }
  3485. }
  3486. /************************** RX-FUNCTIONS ****************************/
  3487. /*
  3488. * Rx theory of operation
  3489. *
  3490. * The host allocates 32 DMA target addresses and passes the host address
  3491. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  3492. * 0 to 31
  3493. *
  3494. * Rx Queue Indexes
  3495. * The host/firmware share two index registers for managing the Rx buffers.
  3496. *
  3497. * The READ index maps to the first position that the firmware may be writing
  3498. * to -- the driver can read up to (but not including) this position and get
  3499. * good data.
  3500. * The READ index is managed by the firmware once the card is enabled.
  3501. *
  3502. * The WRITE index maps to the last position the driver has read from -- the
  3503. * position preceding WRITE is the last slot the firmware can place a packet.
  3504. *
  3505. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3506. * WRITE = READ.
  3507. *
  3508. * During initialization the host sets up the READ queue position to the first
  3509. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3510. *
  3511. * When the firmware places a packet in a buffer it will advance the READ index
  3512. * and fire the RX interrupt. The driver can then query the READ index and
  3513. * process as many packets as possible, moving the WRITE index forward as it
  3514. * resets the Rx queue buffers with new memory.
  3515. *
  3516. * The management in the driver is as follows:
  3517. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3518. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3519. * to replensish the iwl->rxq->rx_free.
  3520. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  3521. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3522. * 'processed' and 'read' driver indexes as well)
  3523. * + A received packet is processed and handed to the kernel network stack,
  3524. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3525. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3526. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3527. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3528. * were enough free buffers and RX_STALLED is set it is cleared.
  3529. *
  3530. *
  3531. * Driver sequence:
  3532. *
  3533. * iwl_rx_queue_alloc() Allocates rx_free
  3534. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3535. * iwl_rx_queue_restock
  3536. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  3537. * queue, updates firmware pointers, and updates
  3538. * the WRITE index. If insufficient rx_free buffers
  3539. * are available, schedules iwl_rx_replenish
  3540. *
  3541. * -- enable interrupts --
  3542. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  3543. * READ INDEX, detaching the SKB from the pool.
  3544. * Moves the packet buffer from queue to rx_used.
  3545. * Calls iwl_rx_queue_restock to refill any empty
  3546. * slots.
  3547. * ...
  3548. *
  3549. */
  3550. /**
  3551. * iwl_rx_queue_space - Return number of free slots available in queue.
  3552. */
  3553. static int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  3554. {
  3555. int s = q->read - q->write;
  3556. if (s <= 0)
  3557. s += RX_QUEUE_SIZE;
  3558. /* keep some buffer to not confuse full and empty queue */
  3559. s -= 2;
  3560. if (s < 0)
  3561. s = 0;
  3562. return s;
  3563. }
  3564. /**
  3565. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3566. *
  3567. * NOTE: This function has 3945 and 4965 specific code sections
  3568. * but is declared in base due to the majority of the
  3569. * implementation being the same (only a numeric constant is
  3570. * different)
  3571. *
  3572. */
  3573. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  3574. {
  3575. u32 reg = 0;
  3576. int rc = 0;
  3577. unsigned long flags;
  3578. spin_lock_irqsave(&q->lock, flags);
  3579. if (q->need_update == 0)
  3580. goto exit_unlock;
  3581. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3582. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3583. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3584. iwl_set_bit(priv, CSR_GP_CNTRL,
  3585. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3586. goto exit_unlock;
  3587. }
  3588. rc = iwl_grab_restricted_access(priv);
  3589. if (rc)
  3590. goto exit_unlock;
  3591. iwl_write_restricted(priv, FH_RSCSR_CHNL0_WPTR,
  3592. q->write & ~0x7);
  3593. iwl_release_restricted_access(priv);
  3594. } else
  3595. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3596. q->need_update = 0;
  3597. exit_unlock:
  3598. spin_unlock_irqrestore(&q->lock, flags);
  3599. return rc;
  3600. }
  3601. /**
  3602. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
  3603. *
  3604. * NOTE: This function has 3945 and 4965 specific code paths in it.
  3605. */
  3606. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3607. dma_addr_t dma_addr)
  3608. {
  3609. return cpu_to_le32((u32)(dma_addr >> 8));
  3610. }
  3611. /**
  3612. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  3613. *
  3614. * If there are slots in the RX queue that need to be restocked,
  3615. * and we have free pre-allocated buffers, fill the ranks as much
  3616. * as we can pulling from rx_free.
  3617. *
  3618. * This moves the 'write' index forward to catch up with 'processed', and
  3619. * also updates the memory address in the firmware to reference the new
  3620. * target buffer.
  3621. */
  3622. int iwl_rx_queue_restock(struct iwl_priv *priv)
  3623. {
  3624. struct iwl_rx_queue *rxq = &priv->rxq;
  3625. struct list_head *element;
  3626. struct iwl_rx_mem_buffer *rxb;
  3627. unsigned long flags;
  3628. int write, rc;
  3629. spin_lock_irqsave(&rxq->lock, flags);
  3630. write = rxq->write & ~0x7;
  3631. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3632. element = rxq->rx_free.next;
  3633. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3634. list_del(element);
  3635. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3636. rxq->queue[rxq->write] = rxb;
  3637. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3638. rxq->free_count--;
  3639. }
  3640. spin_unlock_irqrestore(&rxq->lock, flags);
  3641. /* If the pre-allocated buffer pool is dropping low, schedule to
  3642. * refill it */
  3643. if (rxq->free_count <= RX_LOW_WATERMARK)
  3644. queue_work(priv->workqueue, &priv->rx_replenish);
  3645. /* If we've added more space for the firmware to place data, tell it */
  3646. if ((write != (rxq->write & ~0x7))
  3647. || (abs(rxq->write - rxq->read) > 7)) {
  3648. spin_lock_irqsave(&rxq->lock, flags);
  3649. rxq->need_update = 1;
  3650. spin_unlock_irqrestore(&rxq->lock, flags);
  3651. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  3652. if (rc)
  3653. return rc;
  3654. }
  3655. return 0;
  3656. }
  3657. /**
  3658. * iwl_rx_replensih - Move all used packet from rx_used to rx_free
  3659. *
  3660. * When moving to rx_free an SKB is allocated for the slot.
  3661. *
  3662. * Also restock the Rx queue via iwl_rx_queue_restock.
  3663. * This is called as a scheduled work item (except for during intialization)
  3664. */
  3665. void iwl_rx_replenish(void *data)
  3666. {
  3667. struct iwl_priv *priv = data;
  3668. struct iwl_rx_queue *rxq = &priv->rxq;
  3669. struct list_head *element;
  3670. struct iwl_rx_mem_buffer *rxb;
  3671. unsigned long flags;
  3672. spin_lock_irqsave(&rxq->lock, flags);
  3673. while (!list_empty(&rxq->rx_used)) {
  3674. element = rxq->rx_used.next;
  3675. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3676. rxb->skb =
  3677. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3678. if (!rxb->skb) {
  3679. if (net_ratelimit())
  3680. printk(KERN_CRIT DRV_NAME
  3681. ": Can not allocate SKB buffers\n");
  3682. /* We don't reschedule replenish work here -- we will
  3683. * call the restock method and if it still needs
  3684. * more buffers it will schedule replenish */
  3685. break;
  3686. }
  3687. priv->alloc_rxb_skb++;
  3688. list_del(element);
  3689. rxb->dma_addr =
  3690. pci_map_single(priv->pci_dev, rxb->skb->data,
  3691. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3692. list_add_tail(&rxb->list, &rxq->rx_free);
  3693. rxq->free_count++;
  3694. }
  3695. spin_unlock_irqrestore(&rxq->lock, flags);
  3696. spin_lock_irqsave(&priv->lock, flags);
  3697. iwl_rx_queue_restock(priv);
  3698. spin_unlock_irqrestore(&priv->lock, flags);
  3699. }
  3700. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3701. * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
  3702. * This free routine walks the list of POOL entries and if SKB is set to
  3703. * non NULL it is unmapped and freed
  3704. */
  3705. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3706. {
  3707. int i;
  3708. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3709. if (rxq->pool[i].skb != NULL) {
  3710. pci_unmap_single(priv->pci_dev,
  3711. rxq->pool[i].dma_addr,
  3712. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3713. dev_kfree_skb(rxq->pool[i].skb);
  3714. }
  3715. }
  3716. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3717. rxq->dma_addr);
  3718. rxq->bd = NULL;
  3719. }
  3720. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  3721. {
  3722. struct iwl_rx_queue *rxq = &priv->rxq;
  3723. struct pci_dev *dev = priv->pci_dev;
  3724. int i;
  3725. spin_lock_init(&rxq->lock);
  3726. INIT_LIST_HEAD(&rxq->rx_free);
  3727. INIT_LIST_HEAD(&rxq->rx_used);
  3728. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3729. if (!rxq->bd)
  3730. return -ENOMEM;
  3731. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3732. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3733. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3734. /* Set us so that we have processed and used all buffers, but have
  3735. * not restocked the Rx queue with fresh buffers */
  3736. rxq->read = rxq->write = 0;
  3737. rxq->free_count = 0;
  3738. rxq->need_update = 0;
  3739. return 0;
  3740. }
  3741. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3742. {
  3743. unsigned long flags;
  3744. int i;
  3745. spin_lock_irqsave(&rxq->lock, flags);
  3746. INIT_LIST_HEAD(&rxq->rx_free);
  3747. INIT_LIST_HEAD(&rxq->rx_used);
  3748. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3749. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3750. /* In the reset function, these buffers may have been allocated
  3751. * to an SKB, so we need to unmap and free potential storage */
  3752. if (rxq->pool[i].skb != NULL) {
  3753. pci_unmap_single(priv->pci_dev,
  3754. rxq->pool[i].dma_addr,
  3755. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3756. priv->alloc_rxb_skb--;
  3757. dev_kfree_skb(rxq->pool[i].skb);
  3758. rxq->pool[i].skb = NULL;
  3759. }
  3760. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3761. }
  3762. /* Set us so that we have processed and used all buffers, but have
  3763. * not restocked the Rx queue with fresh buffers */
  3764. rxq->read = rxq->write = 0;
  3765. rxq->free_count = 0;
  3766. spin_unlock_irqrestore(&rxq->lock, flags);
  3767. }
  3768. /* Convert linear signal-to-noise ratio into dB */
  3769. static u8 ratio2dB[100] = {
  3770. /* 0 1 2 3 4 5 6 7 8 9 */
  3771. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3772. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3773. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3774. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3775. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3776. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3777. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3778. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3779. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3780. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3781. };
  3782. /* Calculates a relative dB value from a ratio of linear
  3783. * (i.e. not dB) signal levels.
  3784. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3785. int iwl_calc_db_from_ratio(int sig_ratio)
  3786. {
  3787. /* Anything above 1000:1 just report as 60 dB */
  3788. if (sig_ratio > 1000)
  3789. return 60;
  3790. /* Above 100:1, divide by 10 and use table,
  3791. * add 20 dB to make up for divide by 10 */
  3792. if (sig_ratio > 100)
  3793. return (20 + (int)ratio2dB[sig_ratio/10]);
  3794. /* We shouldn't see this */
  3795. if (sig_ratio < 1)
  3796. return 0;
  3797. /* Use table for ratios 1:1 - 99:1 */
  3798. return (int)ratio2dB[sig_ratio];
  3799. }
  3800. #define PERFECT_RSSI (-20) /* dBm */
  3801. #define WORST_RSSI (-95) /* dBm */
  3802. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3803. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3804. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3805. * about formulas used below. */
  3806. int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3807. {
  3808. int sig_qual;
  3809. int degradation = PERFECT_RSSI - rssi_dbm;
  3810. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3811. * as indicator; formula is (signal dbm - noise dbm).
  3812. * SNR at or above 40 is a great signal (100%).
  3813. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3814. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3815. if (noise_dbm) {
  3816. if (rssi_dbm - noise_dbm >= 40)
  3817. return 100;
  3818. else if (rssi_dbm < noise_dbm)
  3819. return 0;
  3820. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3821. /* Else use just the signal level.
  3822. * This formula is a least squares fit of data points collected and
  3823. * compared with a reference system that had a percentage (%) display
  3824. * for signal quality. */
  3825. } else
  3826. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3827. (15 * RSSI_RANGE + 62 * degradation)) /
  3828. (RSSI_RANGE * RSSI_RANGE);
  3829. if (sig_qual > 100)
  3830. sig_qual = 100;
  3831. else if (sig_qual < 1)
  3832. sig_qual = 0;
  3833. return sig_qual;
  3834. }
  3835. /**
  3836. * iwl_rx_handle - Main entry function for receiving responses from the uCode
  3837. *
  3838. * Uses the priv->rx_handlers callback function array to invoke
  3839. * the appropriate handlers, including command responses,
  3840. * frame-received notifications, and other notifications.
  3841. */
  3842. static void iwl_rx_handle(struct iwl_priv *priv)
  3843. {
  3844. struct iwl_rx_mem_buffer *rxb;
  3845. struct iwl_rx_packet *pkt;
  3846. struct iwl_rx_queue *rxq = &priv->rxq;
  3847. u32 r, i;
  3848. int reclaim;
  3849. unsigned long flags;
  3850. r = iwl_hw_get_rx_read(priv);
  3851. i = rxq->read;
  3852. /* Rx interrupt, but nothing sent from uCode */
  3853. if (i == r)
  3854. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3855. while (i != r) {
  3856. rxb = rxq->queue[i];
  3857. /* If an RXB doesn't have a queue slot associated with it
  3858. * then a bug has been introduced in the queue refilling
  3859. * routines -- catch it here */
  3860. BUG_ON(rxb == NULL);
  3861. rxq->queue[i] = NULL;
  3862. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3863. IWL_RX_BUF_SIZE,
  3864. PCI_DMA_FROMDEVICE);
  3865. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3866. /* Reclaim a command buffer only if this packet is a response
  3867. * to a (driver-originated) command.
  3868. * If the packet (e.g. Rx frame) originated from uCode,
  3869. * there is no command buffer to reclaim.
  3870. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3871. * but apparently a few don't get set; catch them here. */
  3872. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3873. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3874. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3875. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3876. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3877. (pkt->hdr.cmd != REPLY_TX);
  3878. /* Based on type of command response or notification,
  3879. * handle those that need handling via function in
  3880. * rx_handlers table. See iwl_setup_rx_handlers() */
  3881. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3882. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3883. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3884. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3885. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3886. } else {
  3887. /* No handling needed */
  3888. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3889. "r %d i %d No handler needed for %s, 0x%02x\n",
  3890. r, i, get_cmd_string(pkt->hdr.cmd),
  3891. pkt->hdr.cmd);
  3892. }
  3893. if (reclaim) {
  3894. /* Invoke any callbacks, transfer the skb to caller,
  3895. * and fire off the (possibly) blocking iwl_send_cmd()
  3896. * as we reclaim the driver command queue */
  3897. if (rxb && rxb->skb)
  3898. iwl_tx_cmd_complete(priv, rxb);
  3899. else
  3900. IWL_WARNING("Claim null rxb?\n");
  3901. }
  3902. /* For now we just don't re-use anything. We can tweak this
  3903. * later to try and re-use notification packets and SKBs that
  3904. * fail to Rx correctly */
  3905. if (rxb->skb != NULL) {
  3906. priv->alloc_rxb_skb--;
  3907. dev_kfree_skb_any(rxb->skb);
  3908. rxb->skb = NULL;
  3909. }
  3910. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3911. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3912. spin_lock_irqsave(&rxq->lock, flags);
  3913. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3914. spin_unlock_irqrestore(&rxq->lock, flags);
  3915. i = (i + 1) & RX_QUEUE_MASK;
  3916. }
  3917. /* Backtrack one entry */
  3918. priv->rxq.read = i;
  3919. iwl_rx_queue_restock(priv);
  3920. }
  3921. int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3922. struct iwl_tx_queue *txq)
  3923. {
  3924. u32 reg = 0;
  3925. int rc = 0;
  3926. int txq_id = txq->q.id;
  3927. if (txq->need_update == 0)
  3928. return rc;
  3929. /* if we're trying to save power */
  3930. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3931. /* wake up nic if it's powered down ...
  3932. * uCode will wake up, and interrupt us again, so next
  3933. * time we'll skip this part. */
  3934. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3935. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3936. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3937. iwl_set_bit(priv, CSR_GP_CNTRL,
  3938. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3939. return rc;
  3940. }
  3941. /* restore this queue's parameters in nic hardware. */
  3942. rc = iwl_grab_restricted_access(priv);
  3943. if (rc)
  3944. return rc;
  3945. iwl_write_restricted(priv, HBUS_TARG_WRPTR,
  3946. txq->q.first_empty | (txq_id << 8));
  3947. iwl_release_restricted_access(priv);
  3948. /* else not in power-save mode, uCode will never sleep when we're
  3949. * trying to tx (during RFKILL, we're not trying to tx). */
  3950. } else
  3951. iwl_write32(priv, HBUS_TARG_WRPTR,
  3952. txq->q.first_empty | (txq_id << 8));
  3953. txq->need_update = 0;
  3954. return rc;
  3955. }
  3956. #ifdef CONFIG_IWLWIFI_DEBUG
  3957. static void iwl_print_rx_config_cmd(struct iwl_rxon_cmd *rxon)
  3958. {
  3959. DECLARE_MAC_BUF(mac);
  3960. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3961. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3962. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3963. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3964. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3965. le32_to_cpu(rxon->filter_flags));
  3966. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3967. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3968. rxon->ofdm_basic_rates);
  3969. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3970. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3971. print_mac(mac, rxon->node_addr));
  3972. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3973. print_mac(mac, rxon->bssid_addr));
  3974. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3975. }
  3976. #endif
  3977. static void iwl_enable_interrupts(struct iwl_priv *priv)
  3978. {
  3979. IWL_DEBUG_ISR("Enabling interrupts\n");
  3980. set_bit(STATUS_INT_ENABLED, &priv->status);
  3981. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3982. }
  3983. static inline void iwl_disable_interrupts(struct iwl_priv *priv)
  3984. {
  3985. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3986. /* disable interrupts from uCode/NIC to host */
  3987. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3988. /* acknowledge/clear/reset any interrupts still pending
  3989. * from uCode or flow handler (Rx/Tx DMA) */
  3990. iwl_write32(priv, CSR_INT, 0xffffffff);
  3991. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3992. IWL_DEBUG_ISR("Disabled interrupts\n");
  3993. }
  3994. static const char *desc_lookup(int i)
  3995. {
  3996. switch (i) {
  3997. case 1:
  3998. return "FAIL";
  3999. case 2:
  4000. return "BAD_PARAM";
  4001. case 3:
  4002. return "BAD_CHECKSUM";
  4003. case 4:
  4004. return "NMI_INTERRUPT";
  4005. case 5:
  4006. return "SYSASSERT";
  4007. case 6:
  4008. return "FATAL_ERROR";
  4009. }
  4010. return "UNKNOWN";
  4011. }
  4012. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4013. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4014. static void iwl_dump_nic_error_log(struct iwl_priv *priv)
  4015. {
  4016. u32 data2, line;
  4017. u32 desc, time, count, base, data1;
  4018. u32 blink1, blink2, ilink1, ilink2;
  4019. int rc;
  4020. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4021. if (!iwl_hw_valid_rtc_data_addr(base)) {
  4022. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4023. return;
  4024. }
  4025. rc = iwl_grab_restricted_access(priv);
  4026. if (rc) {
  4027. IWL_WARNING("Can not read from adapter at this time.\n");
  4028. return;
  4029. }
  4030. count = iwl_read_restricted_mem(priv, base);
  4031. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4032. IWL_ERROR("Start IWL Error Log Dump:\n");
  4033. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4034. priv->status, priv->config, count);
  4035. }
  4036. desc = iwl_read_restricted_mem(priv, base + 1 * sizeof(u32));
  4037. blink1 = iwl_read_restricted_mem(priv, base + 3 * sizeof(u32));
  4038. blink2 = iwl_read_restricted_mem(priv, base + 4 * sizeof(u32));
  4039. ilink1 = iwl_read_restricted_mem(priv, base + 5 * sizeof(u32));
  4040. ilink2 = iwl_read_restricted_mem(priv, base + 6 * sizeof(u32));
  4041. data1 = iwl_read_restricted_mem(priv, base + 7 * sizeof(u32));
  4042. data2 = iwl_read_restricted_mem(priv, base + 8 * sizeof(u32));
  4043. line = iwl_read_restricted_mem(priv, base + 9 * sizeof(u32));
  4044. time = iwl_read_restricted_mem(priv, base + 11 * sizeof(u32));
  4045. IWL_ERROR("Desc Time "
  4046. "data1 data2 line\n");
  4047. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4048. desc_lookup(desc), desc, time, data1, data2, line);
  4049. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4050. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4051. ilink1, ilink2);
  4052. iwl_release_restricted_access(priv);
  4053. }
  4054. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4055. /**
  4056. * iwl_print_event_log - Dump error event log to syslog
  4057. *
  4058. * NOTE: Must be called with iwl_grab_restricted_access() already obtained!
  4059. */
  4060. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  4061. u32 num_events, u32 mode)
  4062. {
  4063. u32 i;
  4064. u32 base; /* SRAM byte address of event log header */
  4065. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4066. u32 ptr; /* SRAM byte address of log data */
  4067. u32 ev, time, data; /* event log data */
  4068. if (num_events == 0)
  4069. return;
  4070. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4071. if (mode == 0)
  4072. event_size = 2 * sizeof(u32);
  4073. else
  4074. event_size = 3 * sizeof(u32);
  4075. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4076. /* "time" is actually "data" for mode 0 (no timestamp).
  4077. * place event id # at far right for easier visual parsing. */
  4078. for (i = 0; i < num_events; i++) {
  4079. ev = iwl_read_restricted_mem(priv, ptr);
  4080. ptr += sizeof(u32);
  4081. time = iwl_read_restricted_mem(priv, ptr);
  4082. ptr += sizeof(u32);
  4083. if (mode == 0)
  4084. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4085. else {
  4086. data = iwl_read_restricted_mem(priv, ptr);
  4087. ptr += sizeof(u32);
  4088. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4089. }
  4090. }
  4091. }
  4092. static void iwl_dump_nic_event_log(struct iwl_priv *priv)
  4093. {
  4094. int rc;
  4095. u32 base; /* SRAM byte address of event log header */
  4096. u32 capacity; /* event log capacity in # entries */
  4097. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4098. u32 num_wraps; /* # times uCode wrapped to top of log */
  4099. u32 next_entry; /* index of next entry to be written by uCode */
  4100. u32 size; /* # entries that we'll print */
  4101. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4102. if (!iwl_hw_valid_rtc_data_addr(base)) {
  4103. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4104. return;
  4105. }
  4106. rc = iwl_grab_restricted_access(priv);
  4107. if (rc) {
  4108. IWL_WARNING("Can not read from adapter at this time.\n");
  4109. return;
  4110. }
  4111. /* event log header */
  4112. capacity = iwl_read_restricted_mem(priv, base);
  4113. mode = iwl_read_restricted_mem(priv, base + (1 * sizeof(u32)));
  4114. num_wraps = iwl_read_restricted_mem(priv, base + (2 * sizeof(u32)));
  4115. next_entry = iwl_read_restricted_mem(priv, base + (3 * sizeof(u32)));
  4116. size = num_wraps ? capacity : next_entry;
  4117. /* bail out if nothing in log */
  4118. if (size == 0) {
  4119. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4120. iwl_release_restricted_access(priv);
  4121. return;
  4122. }
  4123. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4124. size, num_wraps);
  4125. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4126. * i.e the next one that uCode would fill. */
  4127. if (num_wraps)
  4128. iwl_print_event_log(priv, next_entry,
  4129. capacity - next_entry, mode);
  4130. /* (then/else) start at top of log */
  4131. iwl_print_event_log(priv, 0, next_entry, mode);
  4132. iwl_release_restricted_access(priv);
  4133. }
  4134. /**
  4135. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  4136. */
  4137. static void iwl_irq_handle_error(struct iwl_priv *priv)
  4138. {
  4139. /* Set the FW error flag -- cleared on iwl_down */
  4140. set_bit(STATUS_FW_ERROR, &priv->status);
  4141. /* Cancel currently queued command. */
  4142. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4143. #ifdef CONFIG_IWLWIFI_DEBUG
  4144. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  4145. iwl_dump_nic_error_log(priv);
  4146. iwl_dump_nic_event_log(priv);
  4147. iwl_print_rx_config_cmd(&priv->staging_rxon);
  4148. }
  4149. #endif
  4150. wake_up_interruptible(&priv->wait_command_queue);
  4151. /* Keep the restart process from trying to send host
  4152. * commands by clearing the INIT status bit */
  4153. clear_bit(STATUS_READY, &priv->status);
  4154. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4155. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4156. "Restarting adapter due to uCode error.\n");
  4157. if (iwl_is_associated(priv)) {
  4158. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4159. sizeof(priv->recovery_rxon));
  4160. priv->error_recovering = 1;
  4161. }
  4162. queue_work(priv->workqueue, &priv->restart);
  4163. }
  4164. }
  4165. static void iwl_error_recovery(struct iwl_priv *priv)
  4166. {
  4167. unsigned long flags;
  4168. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4169. sizeof(priv->staging_rxon));
  4170. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4171. iwl_commit_rxon(priv);
  4172. iwl_rxon_add_station(priv, priv->bssid, 1);
  4173. spin_lock_irqsave(&priv->lock, flags);
  4174. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4175. priv->error_recovering = 0;
  4176. spin_unlock_irqrestore(&priv->lock, flags);
  4177. }
  4178. static void iwl_irq_tasklet(struct iwl_priv *priv)
  4179. {
  4180. u32 inta, handled = 0;
  4181. u32 inta_fh;
  4182. unsigned long flags;
  4183. #ifdef CONFIG_IWLWIFI_DEBUG
  4184. u32 inta_mask;
  4185. #endif
  4186. spin_lock_irqsave(&priv->lock, flags);
  4187. /* Ack/clear/reset pending uCode interrupts.
  4188. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4189. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4190. inta = iwl_read32(priv, CSR_INT);
  4191. iwl_write32(priv, CSR_INT, inta);
  4192. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4193. * Any new interrupts that happen after this, either while we're
  4194. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4195. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4196. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4197. #ifdef CONFIG_IWLWIFI_DEBUG
  4198. if (iwl_debug_level & IWL_DL_ISR) {
  4199. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4200. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4201. inta, inta_mask, inta_fh);
  4202. }
  4203. #endif
  4204. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4205. * atomic, make sure that inta covers all the interrupts that
  4206. * we've discovered, even if FH interrupt came in just after
  4207. * reading CSR_INT. */
  4208. if (inta_fh & CSR_FH_INT_RX_MASK)
  4209. inta |= CSR_INT_BIT_FH_RX;
  4210. if (inta_fh & CSR_FH_INT_TX_MASK)
  4211. inta |= CSR_INT_BIT_FH_TX;
  4212. /* Now service all interrupt bits discovered above. */
  4213. if (inta & CSR_INT_BIT_HW_ERR) {
  4214. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4215. /* Tell the device to stop sending interrupts */
  4216. iwl_disable_interrupts(priv);
  4217. iwl_irq_handle_error(priv);
  4218. handled |= CSR_INT_BIT_HW_ERR;
  4219. spin_unlock_irqrestore(&priv->lock, flags);
  4220. return;
  4221. }
  4222. #ifdef CONFIG_IWLWIFI_DEBUG
  4223. if (iwl_debug_level & (IWL_DL_ISR)) {
  4224. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4225. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  4226. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  4227. /* Alive notification via Rx interrupt will do the real work */
  4228. if (inta & CSR_INT_BIT_ALIVE)
  4229. IWL_DEBUG_ISR("Alive interrupt\n");
  4230. }
  4231. #endif
  4232. /* Safely ignore these bits for debug checks below */
  4233. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  4234. /* HW RF KILL switch toggled (4965 only) */
  4235. if (inta & CSR_INT_BIT_RF_KILL) {
  4236. int hw_rf_kill = 0;
  4237. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  4238. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4239. hw_rf_kill = 1;
  4240. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4241. "RF_KILL bit toggled to %s.\n",
  4242. hw_rf_kill ? "disable radio":"enable radio");
  4243. /* Queue restart only if RF_KILL switch was set to "kill"
  4244. * when we loaded driver, and is now set to "enable".
  4245. * After we're Alive, RF_KILL gets handled by
  4246. * iwl_rx_card_state_notif() */
  4247. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
  4248. queue_work(priv->workqueue, &priv->restart);
  4249. handled |= CSR_INT_BIT_RF_KILL;
  4250. }
  4251. /* Chip got too hot and stopped itself (4965 only) */
  4252. if (inta & CSR_INT_BIT_CT_KILL) {
  4253. IWL_ERROR("Microcode CT kill error detected.\n");
  4254. handled |= CSR_INT_BIT_CT_KILL;
  4255. }
  4256. /* Error detected by uCode */
  4257. if (inta & CSR_INT_BIT_SW_ERR) {
  4258. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4259. inta);
  4260. iwl_irq_handle_error(priv);
  4261. handled |= CSR_INT_BIT_SW_ERR;
  4262. }
  4263. /* uCode wakes up after power-down sleep */
  4264. if (inta & CSR_INT_BIT_WAKEUP) {
  4265. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4266. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  4267. iwl_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4268. iwl_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4269. iwl_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4270. iwl_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4271. iwl_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4272. iwl_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4273. handled |= CSR_INT_BIT_WAKEUP;
  4274. }
  4275. /* All uCode command responses, including Tx command responses,
  4276. * Rx "responses" (frame-received notification), and other
  4277. * notifications from uCode come through here*/
  4278. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4279. iwl_rx_handle(priv);
  4280. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4281. }
  4282. if (inta & CSR_INT_BIT_FH_TX) {
  4283. IWL_DEBUG_ISR("Tx interrupt\n");
  4284. handled |= CSR_INT_BIT_FH_TX;
  4285. }
  4286. if (inta & ~handled)
  4287. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4288. if (inta & ~CSR_INI_SET_MASK) {
  4289. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4290. inta & ~CSR_INI_SET_MASK);
  4291. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4292. }
  4293. /* Re-enable all interrupts */
  4294. iwl_enable_interrupts(priv);
  4295. #ifdef CONFIG_IWLWIFI_DEBUG
  4296. if (iwl_debug_level & (IWL_DL_ISR)) {
  4297. inta = iwl_read32(priv, CSR_INT);
  4298. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  4299. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4300. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4301. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4302. }
  4303. #endif
  4304. spin_unlock_irqrestore(&priv->lock, flags);
  4305. }
  4306. static irqreturn_t iwl_isr(int irq, void *data)
  4307. {
  4308. struct iwl_priv *priv = data;
  4309. u32 inta, inta_mask;
  4310. u32 inta_fh;
  4311. if (!priv)
  4312. return IRQ_NONE;
  4313. spin_lock(&priv->lock);
  4314. /* Disable (but don't clear!) interrupts here to avoid
  4315. * back-to-back ISRs and sporadic interrupts from our NIC.
  4316. * If we have something to service, the tasklet will re-enable ints.
  4317. * If we *don't* have something, we'll re-enable before leaving here. */
  4318. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4319. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  4320. /* Discover which interrupts are active/pending */
  4321. inta = iwl_read32(priv, CSR_INT);
  4322. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4323. /* Ignore interrupt if there's nothing in NIC to service.
  4324. * This may be due to IRQ shared with another device,
  4325. * or due to sporadic interrupts thrown from our NIC. */
  4326. if (!inta && !inta_fh) {
  4327. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4328. goto none;
  4329. }
  4330. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4331. /* Hardware disappeared */
  4332. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4333. goto none;
  4334. }
  4335. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4336. inta, inta_mask, inta_fh);
  4337. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  4338. tasklet_schedule(&priv->irq_tasklet);
  4339. spin_unlock(&priv->lock);
  4340. return IRQ_HANDLED;
  4341. none:
  4342. /* re-enable interrupts here since we don't have anything to service. */
  4343. iwl_enable_interrupts(priv);
  4344. spin_unlock(&priv->lock);
  4345. return IRQ_NONE;
  4346. }
  4347. /************************** EEPROM BANDS ****************************
  4348. *
  4349. * The iwl_eeprom_band definitions below provide the mapping from the
  4350. * EEPROM contents to the specific channel number supported for each
  4351. * band.
  4352. *
  4353. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  4354. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4355. * The specific geography and calibration information for that channel
  4356. * is contained in the eeprom map itself.
  4357. *
  4358. * During init, we copy the eeprom information and channel map
  4359. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4360. *
  4361. * channel_map_24/52 provides the index in the channel_info array for a
  4362. * given channel. We have to have two separate maps as there is channel
  4363. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4364. * band_2
  4365. *
  4366. * A value of 0xff stored in the channel_map indicates that the channel
  4367. * is not supported by the hardware at all.
  4368. *
  4369. * A value of 0xfe in the channel_map indicates that the channel is not
  4370. * valid for Tx with the current hardware. This means that
  4371. * while the system can tune and receive on a given channel, it may not
  4372. * be able to associate or transmit any frames on that
  4373. * channel. There is no corresponding channel information for that
  4374. * entry.
  4375. *
  4376. *********************************************************************/
  4377. /* 2.4 GHz */
  4378. static const u8 iwl_eeprom_band_1[14] = {
  4379. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4380. };
  4381. /* 5.2 GHz bands */
  4382. static const u8 iwl_eeprom_band_2[] = {
  4383. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4384. };
  4385. static const u8 iwl_eeprom_band_3[] = { /* 5205-5320MHz */
  4386. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4387. };
  4388. static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
  4389. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4390. };
  4391. static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
  4392. 145, 149, 153, 157, 161, 165
  4393. };
  4394. static u8 iwl_eeprom_band_6[] = { /* 2.4 FAT channel */
  4395. 1, 2, 3, 4, 5, 6, 7
  4396. };
  4397. static u8 iwl_eeprom_band_7[] = { /* 5.2 FAT channel */
  4398. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4399. };
  4400. static void iwl_init_band_reference(const struct iwl_priv *priv, int band,
  4401. int *eeprom_ch_count,
  4402. const struct iwl_eeprom_channel
  4403. **eeprom_ch_info,
  4404. const u8 **eeprom_ch_index)
  4405. {
  4406. switch (band) {
  4407. case 1: /* 2.4GHz band */
  4408. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
  4409. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4410. *eeprom_ch_index = iwl_eeprom_band_1;
  4411. break;
  4412. case 2: /* 5.2GHz band */
  4413. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
  4414. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4415. *eeprom_ch_index = iwl_eeprom_band_2;
  4416. break;
  4417. case 3: /* 5.2GHz band */
  4418. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
  4419. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4420. *eeprom_ch_index = iwl_eeprom_band_3;
  4421. break;
  4422. case 4: /* 5.2GHz band */
  4423. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
  4424. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4425. *eeprom_ch_index = iwl_eeprom_band_4;
  4426. break;
  4427. case 5: /* 5.2GHz band */
  4428. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
  4429. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4430. *eeprom_ch_index = iwl_eeprom_band_5;
  4431. break;
  4432. case 6:
  4433. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
  4434. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4435. *eeprom_ch_index = iwl_eeprom_band_6;
  4436. break;
  4437. case 7:
  4438. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
  4439. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4440. *eeprom_ch_index = iwl_eeprom_band_7;
  4441. break;
  4442. default:
  4443. BUG();
  4444. return;
  4445. }
  4446. }
  4447. const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
  4448. int phymode, u16 channel)
  4449. {
  4450. int i;
  4451. switch (phymode) {
  4452. case MODE_IEEE80211A:
  4453. for (i = 14; i < priv->channel_count; i++) {
  4454. if (priv->channel_info[i].channel == channel)
  4455. return &priv->channel_info[i];
  4456. }
  4457. break;
  4458. case MODE_IEEE80211B:
  4459. case MODE_IEEE80211G:
  4460. if (channel >= 1 && channel <= 14)
  4461. return &priv->channel_info[channel - 1];
  4462. break;
  4463. }
  4464. return NULL;
  4465. }
  4466. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4467. ? # x " " : "")
  4468. static int iwl_init_channel_map(struct iwl_priv *priv)
  4469. {
  4470. int eeprom_ch_count = 0;
  4471. const u8 *eeprom_ch_index = NULL;
  4472. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  4473. int band, ch;
  4474. struct iwl_channel_info *ch_info;
  4475. if (priv->channel_count) {
  4476. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4477. return 0;
  4478. }
  4479. if (priv->eeprom.version < 0x2f) {
  4480. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4481. priv->eeprom.version);
  4482. return -EINVAL;
  4483. }
  4484. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4485. priv->channel_count =
  4486. ARRAY_SIZE(iwl_eeprom_band_1) +
  4487. ARRAY_SIZE(iwl_eeprom_band_2) +
  4488. ARRAY_SIZE(iwl_eeprom_band_3) +
  4489. ARRAY_SIZE(iwl_eeprom_band_4) +
  4490. ARRAY_SIZE(iwl_eeprom_band_5);
  4491. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4492. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  4493. priv->channel_count, GFP_KERNEL);
  4494. if (!priv->channel_info) {
  4495. IWL_ERROR("Could not allocate channel_info\n");
  4496. priv->channel_count = 0;
  4497. return -ENOMEM;
  4498. }
  4499. ch_info = priv->channel_info;
  4500. /* Loop through the 5 EEPROM bands adding them in order to the
  4501. * channel map we maintain (that contains additional information than
  4502. * what just in the EEPROM) */
  4503. for (band = 1; band <= 5; band++) {
  4504. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4505. &eeprom_ch_info, &eeprom_ch_index);
  4506. /* Loop through each band adding each of the channels */
  4507. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4508. ch_info->channel = eeprom_ch_index[ch];
  4509. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4510. MODE_IEEE80211A;
  4511. /* permanently store EEPROM's channel regulatory flags
  4512. * and max power in channel info database. */
  4513. ch_info->eeprom = eeprom_ch_info[ch];
  4514. /* Copy the run-time flags so they are there even on
  4515. * invalid channels */
  4516. ch_info->flags = eeprom_ch_info[ch].flags;
  4517. if (!(is_channel_valid(ch_info))) {
  4518. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4519. "No traffic\n",
  4520. ch_info->channel,
  4521. ch_info->flags,
  4522. is_channel_a_band(ch_info) ?
  4523. "5.2" : "2.4");
  4524. ch_info++;
  4525. continue;
  4526. }
  4527. /* Initialize regulatory-based run-time data */
  4528. ch_info->max_power_avg = ch_info->curr_txpow =
  4529. eeprom_ch_info[ch].max_power_avg;
  4530. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4531. ch_info->min_power = 0;
  4532. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4533. " %ddBm): Ad-Hoc %ssupported\n",
  4534. ch_info->channel,
  4535. is_channel_a_band(ch_info) ?
  4536. "5.2" : "2.4",
  4537. CHECK_AND_PRINT(IBSS),
  4538. CHECK_AND_PRINT(ACTIVE),
  4539. CHECK_AND_PRINT(RADAR),
  4540. CHECK_AND_PRINT(WIDE),
  4541. CHECK_AND_PRINT(NARROW),
  4542. CHECK_AND_PRINT(DFS),
  4543. eeprom_ch_info[ch].flags,
  4544. eeprom_ch_info[ch].max_power_avg,
  4545. ((eeprom_ch_info[ch].
  4546. flags & EEPROM_CHANNEL_IBSS)
  4547. && !(eeprom_ch_info[ch].
  4548. flags & EEPROM_CHANNEL_RADAR))
  4549. ? "" : "not ");
  4550. /* Set the user_txpower_limit to the highest power
  4551. * supported by any channel */
  4552. if (eeprom_ch_info[ch].max_power_avg >
  4553. priv->user_txpower_limit)
  4554. priv->user_txpower_limit =
  4555. eeprom_ch_info[ch].max_power_avg;
  4556. ch_info++;
  4557. }
  4558. }
  4559. for (band = 6; band <= 7; band++) {
  4560. int phymode;
  4561. u8 fat_extension_chan;
  4562. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4563. &eeprom_ch_info, &eeprom_ch_index);
  4564. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4565. /* Loop through each band adding each of the channels */
  4566. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4567. if ((band == 6) &&
  4568. ((eeprom_ch_index[ch] == 5) ||
  4569. (eeprom_ch_index[ch] == 6) ||
  4570. (eeprom_ch_index[ch] == 7)))
  4571. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4572. else
  4573. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4574. iwl4965_set_fat_chan_info(priv, phymode,
  4575. eeprom_ch_index[ch],
  4576. &(eeprom_ch_info[ch]),
  4577. fat_extension_chan);
  4578. iwl4965_set_fat_chan_info(priv, phymode,
  4579. (eeprom_ch_index[ch] + 4),
  4580. &(eeprom_ch_info[ch]),
  4581. HT_IE_EXT_CHANNEL_BELOW);
  4582. }
  4583. }
  4584. return 0;
  4585. }
  4586. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4587. * sending probe req. This should be set long enough to hear probe responses
  4588. * from more than one AP. */
  4589. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4590. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4591. /* For faster active scanning, scan will move to the next channel if fewer than
  4592. * PLCP_QUIET_THRESH packets are heard on this channel within
  4593. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4594. * time if it's a quiet channel (nothing responded to our probe, and there's
  4595. * no other traffic).
  4596. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4597. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4598. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4599. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4600. * Must be set longer than active dwell time.
  4601. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4602. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4603. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4604. #define IWL_PASSIVE_DWELL_BASE (100)
  4605. #define IWL_CHANNEL_TUNE_TIME 5
  4606. static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, int phymode)
  4607. {
  4608. if (phymode == MODE_IEEE80211A)
  4609. return IWL_ACTIVE_DWELL_TIME_52;
  4610. else
  4611. return IWL_ACTIVE_DWELL_TIME_24;
  4612. }
  4613. static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, int phymode)
  4614. {
  4615. u16 active = iwl_get_active_dwell_time(priv, phymode);
  4616. u16 passive = (phymode != MODE_IEEE80211A) ?
  4617. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4618. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4619. if (iwl_is_associated(priv)) {
  4620. /* If we're associated, we clamp the maximum passive
  4621. * dwell time to be 98% of the beacon interval (minus
  4622. * 2 * channel tune time) */
  4623. passive = priv->beacon_int;
  4624. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4625. passive = IWL_PASSIVE_DWELL_BASE;
  4626. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4627. }
  4628. if (passive <= active)
  4629. passive = active + 1;
  4630. return passive;
  4631. }
  4632. static int iwl_get_channels_for_scan(struct iwl_priv *priv, int phymode,
  4633. u8 is_active, u8 direct_mask,
  4634. struct iwl_scan_channel *scan_ch)
  4635. {
  4636. const struct ieee80211_channel *channels = NULL;
  4637. const struct ieee80211_hw_mode *hw_mode;
  4638. const struct iwl_channel_info *ch_info;
  4639. u16 passive_dwell = 0;
  4640. u16 active_dwell = 0;
  4641. int added, i;
  4642. hw_mode = iwl_get_hw_mode(priv, phymode);
  4643. if (!hw_mode)
  4644. return 0;
  4645. channels = hw_mode->channels;
  4646. active_dwell = iwl_get_active_dwell_time(priv, phymode);
  4647. passive_dwell = iwl_get_passive_dwell_time(priv, phymode);
  4648. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4649. if (channels[i].chan ==
  4650. le16_to_cpu(priv->active_rxon.channel)) {
  4651. if (iwl_is_associated(priv)) {
  4652. IWL_DEBUG_SCAN
  4653. ("Skipping current channel %d\n",
  4654. le16_to_cpu(priv->active_rxon.channel));
  4655. continue;
  4656. }
  4657. } else if (priv->only_active_channel)
  4658. continue;
  4659. scan_ch->channel = channels[i].chan;
  4660. ch_info = iwl_get_channel_info(priv, phymode, scan_ch->channel);
  4661. if (!is_channel_valid(ch_info)) {
  4662. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4663. scan_ch->channel);
  4664. continue;
  4665. }
  4666. if (!is_active || is_channel_passive(ch_info) ||
  4667. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4668. scan_ch->type = 0; /* passive */
  4669. else
  4670. scan_ch->type = 1; /* active */
  4671. if (scan_ch->type & 1)
  4672. scan_ch->type |= (direct_mask << 1);
  4673. if (is_channel_narrow(ch_info))
  4674. scan_ch->type |= (1 << 7);
  4675. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4676. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4677. /* Set power levels to defaults */
  4678. scan_ch->tpc.dsp_atten = 110;
  4679. /* scan_pwr_info->tpc.dsp_atten; */
  4680. /*scan_pwr_info->tpc.tx_gain; */
  4681. if (phymode == MODE_IEEE80211A)
  4682. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4683. else {
  4684. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4685. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4686. * power level
  4687. scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4688. */
  4689. }
  4690. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4691. scan_ch->channel,
  4692. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4693. (scan_ch->type & 1) ?
  4694. active_dwell : passive_dwell);
  4695. scan_ch++;
  4696. added++;
  4697. }
  4698. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4699. return added;
  4700. }
  4701. static void iwl_reset_channel_flag(struct iwl_priv *priv)
  4702. {
  4703. int i, j;
  4704. for (i = 0; i < 3; i++) {
  4705. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4706. for (j = 0; j < hw_mode->num_channels; j++)
  4707. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4708. }
  4709. }
  4710. static void iwl_init_hw_rates(struct iwl_priv *priv,
  4711. struct ieee80211_rate *rates)
  4712. {
  4713. int i;
  4714. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4715. rates[i].rate = iwl_rates[i].ieee * 5;
  4716. rates[i].val = i; /* Rate scaling will work on indexes */
  4717. rates[i].val2 = i;
  4718. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4719. /* Only OFDM have the bits-per-symbol set */
  4720. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4721. rates[i].flags |= IEEE80211_RATE_OFDM;
  4722. else {
  4723. /*
  4724. * If CCK 1M then set rate flag to CCK else CCK_2
  4725. * which is CCK | PREAMBLE2
  4726. */
  4727. rates[i].flags |= (iwl_rates[i].plcp == 10) ?
  4728. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4729. }
  4730. /* Set up which ones are basic rates... */
  4731. if (IWL_BASIC_RATES_MASK & (1 << i))
  4732. rates[i].flags |= IEEE80211_RATE_BASIC;
  4733. }
  4734. iwl4965_init_hw_rates(priv, rates);
  4735. }
  4736. /**
  4737. * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4738. */
  4739. static int iwl_init_geos(struct iwl_priv *priv)
  4740. {
  4741. struct iwl_channel_info *ch;
  4742. struct ieee80211_hw_mode *modes;
  4743. struct ieee80211_channel *channels;
  4744. struct ieee80211_channel *geo_ch;
  4745. struct ieee80211_rate *rates;
  4746. int i = 0;
  4747. enum {
  4748. A = 0,
  4749. B = 1,
  4750. G = 2,
  4751. A_11N = 3,
  4752. G_11N = 4,
  4753. };
  4754. int mode_count = 5;
  4755. if (priv->modes) {
  4756. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4757. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4758. return 0;
  4759. }
  4760. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4761. GFP_KERNEL);
  4762. if (!modes)
  4763. return -ENOMEM;
  4764. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4765. priv->channel_count, GFP_KERNEL);
  4766. if (!channels) {
  4767. kfree(modes);
  4768. return -ENOMEM;
  4769. }
  4770. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4771. GFP_KERNEL);
  4772. if (!rates) {
  4773. kfree(modes);
  4774. kfree(channels);
  4775. return -ENOMEM;
  4776. }
  4777. /* 0 = 802.11a
  4778. * 1 = 802.11b
  4779. * 2 = 802.11g
  4780. */
  4781. /* 5.2GHz channels start after the 2.4GHz channels */
  4782. modes[A].mode = MODE_IEEE80211A;
  4783. modes[A].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4784. modes[A].rates = rates;
  4785. modes[A].num_rates = 8; /* just OFDM */
  4786. modes[A].rates = &rates[4];
  4787. modes[A].num_channels = 0;
  4788. modes[B].mode = MODE_IEEE80211B;
  4789. modes[B].channels = channels;
  4790. modes[B].rates = rates;
  4791. modes[B].num_rates = 4; /* just CCK */
  4792. modes[B].num_channels = 0;
  4793. modes[G].mode = MODE_IEEE80211G;
  4794. modes[G].channels = channels;
  4795. modes[G].rates = rates;
  4796. modes[G].num_rates = 12; /* OFDM & CCK */
  4797. modes[G].num_channels = 0;
  4798. modes[G_11N].mode = MODE_IEEE80211G;
  4799. modes[G_11N].channels = channels;
  4800. modes[G_11N].num_rates = 13; /* OFDM & CCK */
  4801. modes[G_11N].rates = rates;
  4802. modes[G_11N].num_channels = 0;
  4803. modes[A_11N].mode = MODE_IEEE80211A;
  4804. modes[A_11N].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4805. modes[A_11N].rates = &rates[4];
  4806. modes[A_11N].num_rates = 9; /* just OFDM */
  4807. modes[A_11N].num_channels = 0;
  4808. priv->ieee_channels = channels;
  4809. priv->ieee_rates = rates;
  4810. iwl_init_hw_rates(priv, rates);
  4811. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4812. ch = &priv->channel_info[i];
  4813. if (!is_channel_valid(ch)) {
  4814. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4815. "skipping.\n",
  4816. ch->channel, is_channel_a_band(ch) ?
  4817. "5.2" : "2.4");
  4818. continue;
  4819. }
  4820. if (is_channel_a_band(ch)) {
  4821. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4822. modes[A_11N].num_channels++;
  4823. } else {
  4824. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4825. modes[G].num_channels++;
  4826. modes[G_11N].num_channels++;
  4827. }
  4828. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4829. geo_ch->chan = ch->channel;
  4830. geo_ch->power_level = ch->max_power_avg;
  4831. geo_ch->antenna_max = 0xff;
  4832. if (is_channel_valid(ch)) {
  4833. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4834. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4835. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4836. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4837. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4838. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4839. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4840. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4841. priv->max_channel_txpower_limit =
  4842. ch->max_power_avg;
  4843. }
  4844. geo_ch->val = geo_ch->flag;
  4845. }
  4846. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4847. printk(KERN_INFO DRV_NAME
  4848. ": Incorrectly detected BG card as ABG. Please send "
  4849. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4850. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4851. priv->is_abg = 0;
  4852. }
  4853. printk(KERN_INFO DRV_NAME
  4854. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4855. modes[G].num_channels, modes[A].num_channels);
  4856. /*
  4857. * NOTE: We register these in preference of order -- the
  4858. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4859. * a phymode based on rates or AP capabilities but seems to
  4860. * configure it purely on if the channel being configured
  4861. * is supported by a mode -- and the first match is taken
  4862. */
  4863. if (modes[G].num_channels)
  4864. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4865. if (modes[B].num_channels)
  4866. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4867. if (modes[A].num_channels)
  4868. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4869. priv->modes = modes;
  4870. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4871. return 0;
  4872. }
  4873. /******************************************************************************
  4874. *
  4875. * uCode download functions
  4876. *
  4877. ******************************************************************************/
  4878. static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
  4879. {
  4880. if (priv->ucode_code.v_addr != NULL) {
  4881. pci_free_consistent(priv->pci_dev,
  4882. priv->ucode_code.len,
  4883. priv->ucode_code.v_addr,
  4884. priv->ucode_code.p_addr);
  4885. priv->ucode_code.v_addr = NULL;
  4886. }
  4887. if (priv->ucode_data.v_addr != NULL) {
  4888. pci_free_consistent(priv->pci_dev,
  4889. priv->ucode_data.len,
  4890. priv->ucode_data.v_addr,
  4891. priv->ucode_data.p_addr);
  4892. priv->ucode_data.v_addr = NULL;
  4893. }
  4894. if (priv->ucode_data_backup.v_addr != NULL) {
  4895. pci_free_consistent(priv->pci_dev,
  4896. priv->ucode_data_backup.len,
  4897. priv->ucode_data_backup.v_addr,
  4898. priv->ucode_data_backup.p_addr);
  4899. priv->ucode_data_backup.v_addr = NULL;
  4900. }
  4901. if (priv->ucode_init.v_addr != NULL) {
  4902. pci_free_consistent(priv->pci_dev,
  4903. priv->ucode_init.len,
  4904. priv->ucode_init.v_addr,
  4905. priv->ucode_init.p_addr);
  4906. priv->ucode_init.v_addr = NULL;
  4907. }
  4908. if (priv->ucode_init_data.v_addr != NULL) {
  4909. pci_free_consistent(priv->pci_dev,
  4910. priv->ucode_init_data.len,
  4911. priv->ucode_init_data.v_addr,
  4912. priv->ucode_init_data.p_addr);
  4913. priv->ucode_init_data.v_addr = NULL;
  4914. }
  4915. if (priv->ucode_boot.v_addr != NULL) {
  4916. pci_free_consistent(priv->pci_dev,
  4917. priv->ucode_boot.len,
  4918. priv->ucode_boot.v_addr,
  4919. priv->ucode_boot.p_addr);
  4920. priv->ucode_boot.v_addr = NULL;
  4921. }
  4922. }
  4923. /**
  4924. * iwl_verify_inst_full - verify runtime uCode image in card vs. host,
  4925. * looking at all data.
  4926. */
  4927. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 * image, u32 len)
  4928. {
  4929. u32 val;
  4930. u32 save_len = len;
  4931. int rc = 0;
  4932. u32 errcnt;
  4933. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4934. rc = iwl_grab_restricted_access(priv);
  4935. if (rc)
  4936. return rc;
  4937. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4938. errcnt = 0;
  4939. for (; len > 0; len -= sizeof(u32), image++) {
  4940. /* read data comes through single port, auto-incr addr */
  4941. /* NOTE: Use the debugless read so we don't flood kernel log
  4942. * if IWL_DL_IO is set */
  4943. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4944. if (val != le32_to_cpu(*image)) {
  4945. IWL_ERROR("uCode INST section is invalid at "
  4946. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4947. save_len - len, val, le32_to_cpu(*image));
  4948. rc = -EIO;
  4949. errcnt++;
  4950. if (errcnt >= 20)
  4951. break;
  4952. }
  4953. }
  4954. iwl_release_restricted_access(priv);
  4955. if (!errcnt)
  4956. IWL_DEBUG_INFO
  4957. ("ucode image in INSTRUCTION memory is good\n");
  4958. return rc;
  4959. }
  4960. /**
  4961. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4962. * using sample data 100 bytes apart. If these sample points are good,
  4963. * it's a pretty good bet that everything between them is good, too.
  4964. */
  4965. static int iwl_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4966. {
  4967. u32 val;
  4968. int rc = 0;
  4969. u32 errcnt = 0;
  4970. u32 i;
  4971. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4972. rc = iwl_grab_restricted_access(priv);
  4973. if (rc)
  4974. return rc;
  4975. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4976. /* read data comes through single port, auto-incr addr */
  4977. /* NOTE: Use the debugless read so we don't flood kernel log
  4978. * if IWL_DL_IO is set */
  4979. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR,
  4980. i + RTC_INST_LOWER_BOUND);
  4981. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4982. if (val != le32_to_cpu(*image)) {
  4983. #if 0 /* Enable this if you want to see details */
  4984. IWL_ERROR("uCode INST section is invalid at "
  4985. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4986. i, val, *image);
  4987. #endif
  4988. rc = -EIO;
  4989. errcnt++;
  4990. if (errcnt >= 3)
  4991. break;
  4992. }
  4993. }
  4994. iwl_release_restricted_access(priv);
  4995. return rc;
  4996. }
  4997. /**
  4998. * iwl_verify_ucode - determine which instruction image is in SRAM,
  4999. * and verify its contents
  5000. */
  5001. static int iwl_verify_ucode(struct iwl_priv *priv)
  5002. {
  5003. __le32 *image;
  5004. u32 len;
  5005. int rc = 0;
  5006. /* Try bootstrap */
  5007. image = (__le32 *)priv->ucode_boot.v_addr;
  5008. len = priv->ucode_boot.len;
  5009. rc = iwl_verify_inst_sparse(priv, image, len);
  5010. if (rc == 0) {
  5011. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5012. return 0;
  5013. }
  5014. /* Try initialize */
  5015. image = (__le32 *)priv->ucode_init.v_addr;
  5016. len = priv->ucode_init.len;
  5017. rc = iwl_verify_inst_sparse(priv, image, len);
  5018. if (rc == 0) {
  5019. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5020. return 0;
  5021. }
  5022. /* Try runtime/protocol */
  5023. image = (__le32 *)priv->ucode_code.v_addr;
  5024. len = priv->ucode_code.len;
  5025. rc = iwl_verify_inst_sparse(priv, image, len);
  5026. if (rc == 0) {
  5027. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5028. return 0;
  5029. }
  5030. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5031. /* Show first several data entries in instruction SRAM.
  5032. * Selection of bootstrap image is arbitrary. */
  5033. image = (__le32 *)priv->ucode_boot.v_addr;
  5034. len = priv->ucode_boot.len;
  5035. rc = iwl_verify_inst_full(priv, image, len);
  5036. return rc;
  5037. }
  5038. /* check contents of special bootstrap uCode SRAM */
  5039. static int iwl_verify_bsm(struct iwl_priv *priv)
  5040. {
  5041. __le32 *image = priv->ucode_boot.v_addr;
  5042. u32 len = priv->ucode_boot.len;
  5043. u32 reg;
  5044. u32 val;
  5045. IWL_DEBUG_INFO("Begin verify bsm\n");
  5046. /* verify BSM SRAM contents */
  5047. val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG);
  5048. for (reg = BSM_SRAM_LOWER_BOUND;
  5049. reg < BSM_SRAM_LOWER_BOUND + len;
  5050. reg += sizeof(u32), image ++) {
  5051. val = iwl_read_restricted_reg(priv, reg);
  5052. if (val != le32_to_cpu(*image)) {
  5053. IWL_ERROR("BSM uCode verification failed at "
  5054. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5055. BSM_SRAM_LOWER_BOUND,
  5056. reg - BSM_SRAM_LOWER_BOUND, len,
  5057. val, le32_to_cpu(*image));
  5058. return -EIO;
  5059. }
  5060. }
  5061. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5062. return 0;
  5063. }
  5064. /**
  5065. * iwl_load_bsm - Load bootstrap instructions
  5066. *
  5067. * BSM operation:
  5068. *
  5069. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5070. * in special SRAM that does not power down during RFKILL. When powering back
  5071. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5072. * the bootstrap program into the on-board processor, and starts it.
  5073. *
  5074. * The bootstrap program loads (via DMA) instructions and data for a new
  5075. * program from host DRAM locations indicated by the host driver in the
  5076. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5077. * automatically.
  5078. *
  5079. * When initializing the NIC, the host driver points the BSM to the
  5080. * "initialize" uCode image. This uCode sets up some internal data, then
  5081. * notifies host via "initialize alive" that it is complete.
  5082. *
  5083. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5084. * normal runtime uCode instructions and a backup uCode data cache buffer
  5085. * (filled initially with starting data values for the on-board processor),
  5086. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5087. * which begins normal operation.
  5088. *
  5089. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5090. * the backup data cache in DRAM before SRAM is powered down.
  5091. *
  5092. * When powering back up, the BSM loads the bootstrap program. This reloads
  5093. * the runtime uCode instructions and the backup data cache into SRAM,
  5094. * and re-launches the runtime uCode from where it left off.
  5095. */
  5096. static int iwl_load_bsm(struct iwl_priv *priv)
  5097. {
  5098. __le32 *image = priv->ucode_boot.v_addr;
  5099. u32 len = priv->ucode_boot.len;
  5100. dma_addr_t pinst;
  5101. dma_addr_t pdata;
  5102. u32 inst_len;
  5103. u32 data_len;
  5104. int rc;
  5105. int i;
  5106. u32 done;
  5107. u32 reg_offset;
  5108. IWL_DEBUG_INFO("Begin load bsm\n");
  5109. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5110. if (len > IWL_MAX_BSM_SIZE)
  5111. return -EINVAL;
  5112. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5113. * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
  5114. * NOTE: iwl_initialize_alive_start() will replace these values,
  5115. * after the "initialize" uCode has run, to point to
  5116. * runtime/protocol instructions and backup data cache. */
  5117. pinst = priv->ucode_init.p_addr >> 4;
  5118. pdata = priv->ucode_init_data.p_addr >> 4;
  5119. inst_len = priv->ucode_init.len;
  5120. data_len = priv->ucode_init_data.len;
  5121. rc = iwl_grab_restricted_access(priv);
  5122. if (rc)
  5123. return rc;
  5124. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5125. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5126. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5127. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5128. /* Fill BSM memory with bootstrap instructions */
  5129. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5130. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5131. reg_offset += sizeof(u32), image++)
  5132. _iwl_write_restricted_reg(priv, reg_offset,
  5133. le32_to_cpu(*image));
  5134. rc = iwl_verify_bsm(priv);
  5135. if (rc) {
  5136. iwl_release_restricted_access(priv);
  5137. return rc;
  5138. }
  5139. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5140. iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5141. iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG,
  5142. RTC_INST_LOWER_BOUND);
  5143. iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5144. /* Load bootstrap code into instruction SRAM now,
  5145. * to prepare to load "initialize" uCode */
  5146. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  5147. BSM_WR_CTRL_REG_BIT_START);
  5148. /* Wait for load of bootstrap uCode to finish */
  5149. for (i = 0; i < 100; i++) {
  5150. done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG);
  5151. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5152. break;
  5153. udelay(10);
  5154. }
  5155. if (i < 100)
  5156. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5157. else {
  5158. IWL_ERROR("BSM write did not complete!\n");
  5159. return -EIO;
  5160. }
  5161. /* Enable future boot loads whenever power management unit triggers it
  5162. * (e.g. when powering back up after power-save shutdown) */
  5163. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  5164. BSM_WR_CTRL_REG_BIT_START_EN);
  5165. iwl_release_restricted_access(priv);
  5166. return 0;
  5167. }
  5168. static void iwl_nic_start(struct iwl_priv *priv)
  5169. {
  5170. /* Remove all resets to allow NIC to operate */
  5171. iwl_write32(priv, CSR_RESET, 0);
  5172. }
  5173. /**
  5174. * iwl_read_ucode - Read uCode images from disk file.
  5175. *
  5176. * Copy into buffers for card to fetch via bus-mastering
  5177. */
  5178. static int iwl_read_ucode(struct iwl_priv *priv)
  5179. {
  5180. struct iwl_ucode *ucode;
  5181. int rc = 0;
  5182. const struct firmware *ucode_raw;
  5183. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5184. u8 *src;
  5185. size_t len;
  5186. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5187. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5188. * request_firmware() is synchronous, file is in memory on return. */
  5189. rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5190. if (rc < 0) {
  5191. IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
  5192. goto error;
  5193. }
  5194. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5195. name, ucode_raw->size);
  5196. /* Make sure that we got at least our header! */
  5197. if (ucode_raw->size < sizeof(*ucode)) {
  5198. IWL_ERROR("File size way too small!\n");
  5199. rc = -EINVAL;
  5200. goto err_release;
  5201. }
  5202. /* Data from ucode file: header followed by uCode images */
  5203. ucode = (void *)ucode_raw->data;
  5204. ver = le32_to_cpu(ucode->ver);
  5205. inst_size = le32_to_cpu(ucode->inst_size);
  5206. data_size = le32_to_cpu(ucode->data_size);
  5207. init_size = le32_to_cpu(ucode->init_size);
  5208. init_data_size = le32_to_cpu(ucode->init_data_size);
  5209. boot_size = le32_to_cpu(ucode->boot_size);
  5210. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5211. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5212. inst_size);
  5213. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5214. data_size);
  5215. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5216. init_size);
  5217. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5218. init_data_size);
  5219. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5220. boot_size);
  5221. /* Verify size of file vs. image size info in file's header */
  5222. if (ucode_raw->size < sizeof(*ucode) +
  5223. inst_size + data_size + init_size +
  5224. init_data_size + boot_size) {
  5225. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5226. (int)ucode_raw->size);
  5227. rc = -EINVAL;
  5228. goto err_release;
  5229. }
  5230. /* Verify that uCode images will fit in card's SRAM */
  5231. if (inst_size > IWL_MAX_INST_SIZE) {
  5232. IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
  5233. (int)inst_size);
  5234. rc = -EINVAL;
  5235. goto err_release;
  5236. }
  5237. if (data_size > IWL_MAX_DATA_SIZE) {
  5238. IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
  5239. (int)data_size);
  5240. rc = -EINVAL;
  5241. goto err_release;
  5242. }
  5243. if (init_size > IWL_MAX_INST_SIZE) {
  5244. IWL_DEBUG_INFO
  5245. ("uCode init instr len %d too large to fit in card\n",
  5246. (int)init_size);
  5247. rc = -EINVAL;
  5248. goto err_release;
  5249. }
  5250. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5251. IWL_DEBUG_INFO
  5252. ("uCode init data len %d too large to fit in card\n",
  5253. (int)init_data_size);
  5254. rc = -EINVAL;
  5255. goto err_release;
  5256. }
  5257. if (boot_size > IWL_MAX_BSM_SIZE) {
  5258. IWL_DEBUG_INFO
  5259. ("uCode boot instr len %d too large to fit in bsm\n",
  5260. (int)boot_size);
  5261. rc = -EINVAL;
  5262. goto err_release;
  5263. }
  5264. /* Allocate ucode buffers for card's bus-master loading ... */
  5265. /* Runtime instructions and 2 copies of data:
  5266. * 1) unmodified from disk
  5267. * 2) backup cache for save/restore during power-downs */
  5268. priv->ucode_code.len = inst_size;
  5269. priv->ucode_code.v_addr =
  5270. pci_alloc_consistent(priv->pci_dev,
  5271. priv->ucode_code.len,
  5272. &(priv->ucode_code.p_addr));
  5273. priv->ucode_data.len = data_size;
  5274. priv->ucode_data.v_addr =
  5275. pci_alloc_consistent(priv->pci_dev,
  5276. priv->ucode_data.len,
  5277. &(priv->ucode_data.p_addr));
  5278. priv->ucode_data_backup.len = data_size;
  5279. priv->ucode_data_backup.v_addr =
  5280. pci_alloc_consistent(priv->pci_dev,
  5281. priv->ucode_data_backup.len,
  5282. &(priv->ucode_data_backup.p_addr));
  5283. /* Initialization instructions and data */
  5284. priv->ucode_init.len = init_size;
  5285. priv->ucode_init.v_addr =
  5286. pci_alloc_consistent(priv->pci_dev,
  5287. priv->ucode_init.len,
  5288. &(priv->ucode_init.p_addr));
  5289. priv->ucode_init_data.len = init_data_size;
  5290. priv->ucode_init_data.v_addr =
  5291. pci_alloc_consistent(priv->pci_dev,
  5292. priv->ucode_init_data.len,
  5293. &(priv->ucode_init_data.p_addr));
  5294. /* Bootstrap (instructions only, no data) */
  5295. priv->ucode_boot.len = boot_size;
  5296. priv->ucode_boot.v_addr =
  5297. pci_alloc_consistent(priv->pci_dev,
  5298. priv->ucode_boot.len,
  5299. &(priv->ucode_boot.p_addr));
  5300. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  5301. !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
  5302. !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
  5303. goto err_pci_alloc;
  5304. /* Copy images into buffers for card's bus-master reads ... */
  5305. /* Runtime instructions (first block of data in file) */
  5306. src = &ucode->data[0];
  5307. len = priv->ucode_code.len;
  5308. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
  5309. (int)len);
  5310. memcpy(priv->ucode_code.v_addr, src, len);
  5311. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5312. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5313. /* Runtime data (2nd block)
  5314. * NOTE: Copy into backup buffer will be done in iwl_up() */
  5315. src = &ucode->data[inst_size];
  5316. len = priv->ucode_data.len;
  5317. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
  5318. (int)len);
  5319. memcpy(priv->ucode_data.v_addr, src, len);
  5320. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5321. /* Initialization instructions (3rd block) */
  5322. if (init_size) {
  5323. src = &ucode->data[inst_size + data_size];
  5324. len = priv->ucode_init.len;
  5325. IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
  5326. (int)len);
  5327. memcpy(priv->ucode_init.v_addr, src, len);
  5328. }
  5329. /* Initialization data (4th block) */
  5330. if (init_data_size) {
  5331. src = &ucode->data[inst_size + data_size + init_size];
  5332. len = priv->ucode_init_data.len;
  5333. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  5334. (int)len);
  5335. memcpy(priv->ucode_init_data.v_addr, src, len);
  5336. }
  5337. /* Bootstrap instructions (5th block) */
  5338. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5339. len = priv->ucode_boot.len;
  5340. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  5341. (int)len);
  5342. memcpy(priv->ucode_boot.v_addr, src, len);
  5343. /* We have our copies now, allow OS release its copies */
  5344. release_firmware(ucode_raw);
  5345. return 0;
  5346. err_pci_alloc:
  5347. IWL_ERROR("failed to allocate pci memory\n");
  5348. rc = -ENOMEM;
  5349. iwl_dealloc_ucode_pci(priv);
  5350. err_release:
  5351. release_firmware(ucode_raw);
  5352. error:
  5353. return rc;
  5354. }
  5355. /**
  5356. * iwl_set_ucode_ptrs - Set uCode address location
  5357. *
  5358. * Tell initialization uCode where to find runtime uCode.
  5359. *
  5360. * BSM registers initially contain pointers to initialization uCode.
  5361. * We need to replace them to load runtime uCode inst and data,
  5362. * and to save runtime data when powering down.
  5363. */
  5364. static int iwl_set_ucode_ptrs(struct iwl_priv *priv)
  5365. {
  5366. dma_addr_t pinst;
  5367. dma_addr_t pdata;
  5368. int rc = 0;
  5369. unsigned long flags;
  5370. /* bits 35:4 for 4965 */
  5371. pinst = priv->ucode_code.p_addr >> 4;
  5372. pdata = priv->ucode_data_backup.p_addr >> 4;
  5373. spin_lock_irqsave(&priv->lock, flags);
  5374. rc = iwl_grab_restricted_access(priv);
  5375. if (rc) {
  5376. spin_unlock_irqrestore(&priv->lock, flags);
  5377. return rc;
  5378. }
  5379. /* Tell bootstrap uCode where to find image to load */
  5380. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5381. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5382. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5383. priv->ucode_data.len);
  5384. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5385. * that all new ptr/size info is in place */
  5386. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5387. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5388. iwl_release_restricted_access(priv);
  5389. spin_unlock_irqrestore(&priv->lock, flags);
  5390. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5391. return rc;
  5392. }
  5393. /**
  5394. * iwl_init_alive_start - Called after REPLY_ALIVE notification receieved
  5395. *
  5396. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5397. *
  5398. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5399. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5400. * (3945 does not contain this data).
  5401. *
  5402. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5403. */
  5404. static void iwl_init_alive_start(struct iwl_priv *priv)
  5405. {
  5406. /* Check alive response for "valid" sign from uCode */
  5407. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5408. /* We had an error bringing up the hardware, so take it
  5409. * all the way back down so we can try again */
  5410. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5411. goto restart;
  5412. }
  5413. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5414. * This is a paranoid check, because we would not have gotten the
  5415. * "initialize" alive if code weren't properly loaded. */
  5416. if (iwl_verify_ucode(priv)) {
  5417. /* Runtime instruction load was bad;
  5418. * take it all the way back down so we can try again */
  5419. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5420. goto restart;
  5421. }
  5422. /* Calculate temperature */
  5423. priv->temperature = iwl4965_get_temperature(priv);
  5424. /* Send pointers to protocol/runtime uCode image ... init code will
  5425. * load and launch runtime uCode, which will send us another "Alive"
  5426. * notification. */
  5427. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5428. if (iwl_set_ucode_ptrs(priv)) {
  5429. /* Runtime instruction load won't happen;
  5430. * take it all the way back down so we can try again */
  5431. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5432. goto restart;
  5433. }
  5434. return;
  5435. restart:
  5436. queue_work(priv->workqueue, &priv->restart);
  5437. }
  5438. /**
  5439. * iwl_alive_start - called after REPLY_ALIVE notification received
  5440. * from protocol/runtime uCode (initialization uCode's
  5441. * Alive gets handled by iwl_init_alive_start()).
  5442. */
  5443. static void iwl_alive_start(struct iwl_priv *priv)
  5444. {
  5445. int rc = 0;
  5446. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5447. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5448. /* We had an error bringing up the hardware, so take it
  5449. * all the way back down so we can try again */
  5450. IWL_DEBUG_INFO("Alive failed.\n");
  5451. goto restart;
  5452. }
  5453. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5454. * This is a paranoid check, because we would not have gotten the
  5455. * "runtime" alive if code weren't properly loaded. */
  5456. if (iwl_verify_ucode(priv)) {
  5457. /* Runtime instruction load was bad;
  5458. * take it all the way back down so we can try again */
  5459. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5460. goto restart;
  5461. }
  5462. iwl_clear_stations_table(priv);
  5463. rc = iwl4965_alive_notify(priv);
  5464. if (rc) {
  5465. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5466. rc);
  5467. goto restart;
  5468. }
  5469. /* After the ALIVE response, we can process host commands */
  5470. set_bit(STATUS_ALIVE, &priv->status);
  5471. /* Clear out the uCode error bit if it is set */
  5472. clear_bit(STATUS_FW_ERROR, &priv->status);
  5473. rc = iwl_init_channel_map(priv);
  5474. if (rc) {
  5475. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5476. return;
  5477. }
  5478. iwl_init_geos(priv);
  5479. if (iwl_is_rfkill(priv))
  5480. return;
  5481. if (!priv->mac80211_registered) {
  5482. /* Unlock so any user space entry points can call back into
  5483. * the driver without a deadlock... */
  5484. mutex_unlock(&priv->mutex);
  5485. iwl_rate_control_register(priv->hw);
  5486. rc = ieee80211_register_hw(priv->hw);
  5487. priv->hw->conf.beacon_int = 100;
  5488. mutex_lock(&priv->mutex);
  5489. if (rc) {
  5490. IWL_ERROR("Failed to register network "
  5491. "device (error %d)\n", rc);
  5492. return;
  5493. }
  5494. priv->mac80211_registered = 1;
  5495. iwl_reset_channel_flag(priv);
  5496. } else
  5497. ieee80211_start_queues(priv->hw);
  5498. priv->active_rate = priv->rates_mask;
  5499. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5500. iwl_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5501. if (iwl_is_associated(priv)) {
  5502. struct iwl_rxon_cmd *active_rxon =
  5503. (struct iwl_rxon_cmd *)(&priv->active_rxon);
  5504. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5505. sizeof(priv->staging_rxon));
  5506. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5507. } else {
  5508. /* Initialize our rx_config data */
  5509. iwl_connection_init_rx_config(priv);
  5510. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5511. }
  5512. /* Configure BT coexistence */
  5513. iwl_send_bt_config(priv);
  5514. /* Configure the adapter for unassociated operation */
  5515. iwl_commit_rxon(priv);
  5516. /* At this point, the NIC is initialized and operational */
  5517. priv->notif_missed_beacons = 0;
  5518. set_bit(STATUS_READY, &priv->status);
  5519. iwl4965_rf_kill_ct_config(priv);
  5520. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5521. if (priv->error_recovering)
  5522. iwl_error_recovery(priv);
  5523. return;
  5524. restart:
  5525. queue_work(priv->workqueue, &priv->restart);
  5526. }
  5527. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  5528. static void __iwl_down(struct iwl_priv *priv)
  5529. {
  5530. unsigned long flags;
  5531. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5532. struct ieee80211_conf *conf = NULL;
  5533. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5534. conf = ieee80211_get_hw_conf(priv->hw);
  5535. if (!exit_pending)
  5536. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5537. iwl_clear_stations_table(priv);
  5538. /* Unblock any waiting calls */
  5539. wake_up_interruptible_all(&priv->wait_command_queue);
  5540. iwl_cancel_deferred_work(priv);
  5541. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5542. * exiting the module */
  5543. if (!exit_pending)
  5544. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5545. /* stop and reset the on-board processor */
  5546. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5547. /* tell the device to stop sending interrupts */
  5548. iwl_disable_interrupts(priv);
  5549. if (priv->mac80211_registered)
  5550. ieee80211_stop_queues(priv->hw);
  5551. /* If we have not previously called iwl_init() then
  5552. * clear all bits but the RF Kill and SUSPEND bits and return */
  5553. if (!iwl_is_init(priv)) {
  5554. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5555. STATUS_RF_KILL_HW |
  5556. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5557. STATUS_RF_KILL_SW |
  5558. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5559. STATUS_IN_SUSPEND;
  5560. goto exit;
  5561. }
  5562. /* ...otherwise clear out all the status bits but the RF Kill and
  5563. * SUSPEND bits and continue taking the NIC down. */
  5564. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5565. STATUS_RF_KILL_HW |
  5566. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5567. STATUS_RF_KILL_SW |
  5568. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5569. STATUS_IN_SUSPEND |
  5570. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5571. STATUS_FW_ERROR;
  5572. spin_lock_irqsave(&priv->lock, flags);
  5573. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5574. spin_unlock_irqrestore(&priv->lock, flags);
  5575. iwl_hw_txq_ctx_stop(priv);
  5576. iwl_hw_rxq_stop(priv);
  5577. spin_lock_irqsave(&priv->lock, flags);
  5578. if (!iwl_grab_restricted_access(priv)) {
  5579. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  5580. APMG_CLK_VAL_DMA_CLK_RQT);
  5581. iwl_release_restricted_access(priv);
  5582. }
  5583. spin_unlock_irqrestore(&priv->lock, flags);
  5584. udelay(5);
  5585. iwl_hw_nic_stop_master(priv);
  5586. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5587. iwl_hw_nic_reset(priv);
  5588. exit:
  5589. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  5590. if (priv->ibss_beacon)
  5591. dev_kfree_skb(priv->ibss_beacon);
  5592. priv->ibss_beacon = NULL;
  5593. /* clear out any free frames */
  5594. iwl_clear_free_frames(priv);
  5595. }
  5596. static void iwl_down(struct iwl_priv *priv)
  5597. {
  5598. mutex_lock(&priv->mutex);
  5599. __iwl_down(priv);
  5600. mutex_unlock(&priv->mutex);
  5601. }
  5602. #define MAX_HW_RESTARTS 5
  5603. static int __iwl_up(struct iwl_priv *priv)
  5604. {
  5605. DECLARE_MAC_BUF(mac);
  5606. int rc, i;
  5607. u32 hw_rf_kill = 0;
  5608. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5609. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5610. return -EIO;
  5611. }
  5612. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5613. IWL_WARNING("Radio disabled by SW RF kill (module "
  5614. "parameter)\n");
  5615. return 0;
  5616. }
  5617. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5618. rc = iwl_hw_nic_init(priv);
  5619. if (rc) {
  5620. IWL_ERROR("Unable to int nic\n");
  5621. return rc;
  5622. }
  5623. /* make sure rfkill handshake bits are cleared */
  5624. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5625. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5626. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5627. /* clear (again), then enable host interrupts */
  5628. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5629. iwl_enable_interrupts(priv);
  5630. /* really make sure rfkill handshake bits are cleared */
  5631. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5632. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5633. /* Copy original ucode data image from disk into backup cache.
  5634. * This will be used to initialize the on-board processor's
  5635. * data SRAM for a clean start when the runtime program first loads. */
  5636. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5637. priv->ucode_data.len);
  5638. /* If platform's RF_KILL switch is set to KILL,
  5639. * wait for BIT_INT_RF_KILL interrupt before loading uCode
  5640. * and getting things started */
  5641. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  5642. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  5643. hw_rf_kill = 1;
  5644. if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
  5645. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5646. return 0;
  5647. }
  5648. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5649. iwl_clear_stations_table(priv);
  5650. /* load bootstrap state machine,
  5651. * load bootstrap program into processor's memory,
  5652. * prepare to load the "initialize" uCode */
  5653. rc = iwl_load_bsm(priv);
  5654. if (rc) {
  5655. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5656. continue;
  5657. }
  5658. /* start card; "initialize" will load runtime ucode */
  5659. iwl_nic_start(priv);
  5660. /* MAC Address location in EEPROM same for 3945/4965 */
  5661. get_eeprom_mac(priv, priv->mac_addr);
  5662. IWL_DEBUG_INFO("MAC address: %s\n",
  5663. print_mac(mac, priv->mac_addr));
  5664. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5665. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5666. return 0;
  5667. }
  5668. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5669. __iwl_down(priv);
  5670. /* tried to restart and config the device for as long as our
  5671. * patience could withstand */
  5672. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5673. return -EIO;
  5674. }
  5675. /*****************************************************************************
  5676. *
  5677. * Workqueue callbacks
  5678. *
  5679. *****************************************************************************/
  5680. static void iwl_bg_init_alive_start(struct work_struct *data)
  5681. {
  5682. struct iwl_priv *priv =
  5683. container_of(data, struct iwl_priv, init_alive_start.work);
  5684. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5685. return;
  5686. mutex_lock(&priv->mutex);
  5687. iwl_init_alive_start(priv);
  5688. mutex_unlock(&priv->mutex);
  5689. }
  5690. static void iwl_bg_alive_start(struct work_struct *data)
  5691. {
  5692. struct iwl_priv *priv =
  5693. container_of(data, struct iwl_priv, alive_start.work);
  5694. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5695. return;
  5696. mutex_lock(&priv->mutex);
  5697. iwl_alive_start(priv);
  5698. mutex_unlock(&priv->mutex);
  5699. }
  5700. static void iwl_bg_rf_kill(struct work_struct *work)
  5701. {
  5702. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5703. wake_up_interruptible(&priv->wait_command_queue);
  5704. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5705. return;
  5706. mutex_lock(&priv->mutex);
  5707. if (!iwl_is_rfkill(priv)) {
  5708. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5709. "HW and/or SW RF Kill no longer active, restarting "
  5710. "device\n");
  5711. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5712. queue_work(priv->workqueue, &priv->restart);
  5713. } else {
  5714. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5715. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5716. "disabled by SW switch\n");
  5717. else
  5718. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5719. "Kill switch must be turned off for "
  5720. "wireless networking to work.\n");
  5721. }
  5722. mutex_unlock(&priv->mutex);
  5723. }
  5724. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5725. static void iwl_bg_scan_check(struct work_struct *data)
  5726. {
  5727. struct iwl_priv *priv =
  5728. container_of(data, struct iwl_priv, scan_check.work);
  5729. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5730. return;
  5731. mutex_lock(&priv->mutex);
  5732. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5733. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5734. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5735. "Scan completion watchdog resetting adapter (%dms)\n",
  5736. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5737. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5738. queue_work(priv->workqueue, &priv->restart);
  5739. }
  5740. mutex_unlock(&priv->mutex);
  5741. }
  5742. static void iwl_bg_request_scan(struct work_struct *data)
  5743. {
  5744. struct iwl_priv *priv =
  5745. container_of(data, struct iwl_priv, request_scan);
  5746. struct iwl_host_cmd cmd = {
  5747. .id = REPLY_SCAN_CMD,
  5748. .len = sizeof(struct iwl_scan_cmd),
  5749. .meta.flags = CMD_SIZE_HUGE,
  5750. };
  5751. int rc = 0;
  5752. struct iwl_scan_cmd *scan;
  5753. struct ieee80211_conf *conf = NULL;
  5754. u8 direct_mask;
  5755. int phymode;
  5756. conf = ieee80211_get_hw_conf(priv->hw);
  5757. mutex_lock(&priv->mutex);
  5758. if (!iwl_is_ready(priv)) {
  5759. IWL_WARNING("request scan called when driver not ready.\n");
  5760. goto done;
  5761. }
  5762. /* Make sure the scan wasn't cancelled before this queued work
  5763. * was given the chance to run... */
  5764. if (!test_bit(STATUS_SCANNING, &priv->status))
  5765. goto done;
  5766. /* This should never be called or scheduled if there is currently
  5767. * a scan active in the hardware. */
  5768. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5769. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5770. "Ignoring second request.\n");
  5771. rc = -EIO;
  5772. goto done;
  5773. }
  5774. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5775. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5776. goto done;
  5777. }
  5778. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5779. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5780. goto done;
  5781. }
  5782. if (iwl_is_rfkill(priv)) {
  5783. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5784. goto done;
  5785. }
  5786. if (!test_bit(STATUS_READY, &priv->status)) {
  5787. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5788. goto done;
  5789. }
  5790. if (!priv->scan_bands) {
  5791. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5792. goto done;
  5793. }
  5794. if (!priv->scan) {
  5795. priv->scan = kmalloc(sizeof(struct iwl_scan_cmd) +
  5796. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5797. if (!priv->scan) {
  5798. rc = -ENOMEM;
  5799. goto done;
  5800. }
  5801. }
  5802. scan = priv->scan;
  5803. memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5804. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5805. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5806. if (iwl_is_associated(priv)) {
  5807. u16 interval = 0;
  5808. u32 extra;
  5809. u32 suspend_time = 100;
  5810. u32 scan_suspend_time = 100;
  5811. unsigned long flags;
  5812. IWL_DEBUG_INFO("Scanning while associated...\n");
  5813. spin_lock_irqsave(&priv->lock, flags);
  5814. interval = priv->beacon_int;
  5815. spin_unlock_irqrestore(&priv->lock, flags);
  5816. scan->suspend_time = 0;
  5817. scan->max_out_time = cpu_to_le32(600 * 1024);
  5818. if (!interval)
  5819. interval = suspend_time;
  5820. extra = (suspend_time / interval) << 22;
  5821. scan_suspend_time = (extra |
  5822. ((suspend_time % interval) * 1024));
  5823. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5824. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5825. scan_suspend_time, interval);
  5826. }
  5827. /* We should add the ability for user to lock to PASSIVE ONLY */
  5828. if (priv->one_direct_scan) {
  5829. IWL_DEBUG_SCAN
  5830. ("Kicking off one direct scan for '%s'\n",
  5831. iwl_escape_essid(priv->direct_ssid,
  5832. priv->direct_ssid_len));
  5833. scan->direct_scan[0].id = WLAN_EID_SSID;
  5834. scan->direct_scan[0].len = priv->direct_ssid_len;
  5835. memcpy(scan->direct_scan[0].ssid,
  5836. priv->direct_ssid, priv->direct_ssid_len);
  5837. direct_mask = 1;
  5838. } else if (!iwl_is_associated(priv)) {
  5839. scan->direct_scan[0].id = WLAN_EID_SSID;
  5840. scan->direct_scan[0].len = priv->essid_len;
  5841. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5842. direct_mask = 1;
  5843. } else
  5844. direct_mask = 0;
  5845. /* We don't build a direct scan probe request; the uCode will do
  5846. * that based on the direct_mask added to each channel entry */
  5847. scan->tx_cmd.len = cpu_to_le16(
  5848. iwl_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5849. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5850. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5851. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5852. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5853. /* flags + rate selection */
  5854. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5855. switch (priv->scan_bands) {
  5856. case 2:
  5857. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5858. scan->tx_cmd.rate_n_flags =
  5859. iwl_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5860. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5861. scan->good_CRC_th = 0;
  5862. phymode = MODE_IEEE80211G;
  5863. break;
  5864. case 1:
  5865. scan->tx_cmd.rate_n_flags =
  5866. iwl_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5867. RATE_MCS_ANT_B_MSK);
  5868. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5869. phymode = MODE_IEEE80211A;
  5870. break;
  5871. default:
  5872. IWL_WARNING("Invalid scan band count\n");
  5873. goto done;
  5874. }
  5875. /* select Rx chains */
  5876. /* Force use of chains B and C (0x6) for scan Rx.
  5877. * Avoid A (0x1) because of its off-channel reception on A-band.
  5878. * MIMO is not used here, but value is required to make uCode happy. */
  5879. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5880. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5881. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5882. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5883. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5884. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5885. if (direct_mask)
  5886. IWL_DEBUG_SCAN
  5887. ("Initiating direct scan for %s.\n",
  5888. iwl_escape_essid(priv->essid, priv->essid_len));
  5889. else
  5890. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5891. scan->channel_count =
  5892. iwl_get_channels_for_scan(
  5893. priv, phymode, 1, /* active */
  5894. direct_mask,
  5895. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5896. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5897. scan->channel_count * sizeof(struct iwl_scan_channel);
  5898. cmd.data = scan;
  5899. scan->len = cpu_to_le16(cmd.len);
  5900. set_bit(STATUS_SCAN_HW, &priv->status);
  5901. rc = iwl_send_cmd_sync(priv, &cmd);
  5902. if (rc)
  5903. goto done;
  5904. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5905. IWL_SCAN_CHECK_WATCHDOG);
  5906. mutex_unlock(&priv->mutex);
  5907. return;
  5908. done:
  5909. /* inform mac80211 sacn aborted */
  5910. queue_work(priv->workqueue, &priv->scan_completed);
  5911. mutex_unlock(&priv->mutex);
  5912. }
  5913. static void iwl_bg_up(struct work_struct *data)
  5914. {
  5915. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5916. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5917. return;
  5918. mutex_lock(&priv->mutex);
  5919. __iwl_up(priv);
  5920. mutex_unlock(&priv->mutex);
  5921. }
  5922. static void iwl_bg_restart(struct work_struct *data)
  5923. {
  5924. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5925. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5926. return;
  5927. iwl_down(priv);
  5928. queue_work(priv->workqueue, &priv->up);
  5929. }
  5930. static void iwl_bg_rx_replenish(struct work_struct *data)
  5931. {
  5932. struct iwl_priv *priv =
  5933. container_of(data, struct iwl_priv, rx_replenish);
  5934. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5935. return;
  5936. mutex_lock(&priv->mutex);
  5937. iwl_rx_replenish(priv);
  5938. mutex_unlock(&priv->mutex);
  5939. }
  5940. static void iwl_bg_post_associate(struct work_struct *data)
  5941. {
  5942. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5943. post_associate.work);
  5944. int rc = 0;
  5945. struct ieee80211_conf *conf = NULL;
  5946. DECLARE_MAC_BUF(mac);
  5947. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5948. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5949. return;
  5950. }
  5951. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5952. priv->assoc_id,
  5953. print_mac(mac, priv->active_rxon.bssid_addr));
  5954. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5955. return;
  5956. mutex_lock(&priv->mutex);
  5957. conf = ieee80211_get_hw_conf(priv->hw);
  5958. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5959. iwl_commit_rxon(priv);
  5960. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5961. iwl_setup_rxon_timing(priv);
  5962. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5963. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5964. if (rc)
  5965. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5966. "Attempting to continue.\n");
  5967. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5968. #ifdef CONFIG_IWLWIFI_HT
  5969. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  5970. iwl4965_set_rxon_ht(priv, &priv->current_assoc_ht);
  5971. else {
  5972. priv->active_rate_ht[0] = 0;
  5973. priv->active_rate_ht[1] = 0;
  5974. priv->current_channel_width = IWL_CHANNEL_WIDTH_20MHZ;
  5975. }
  5976. #endif /* CONFIG_IWLWIFI_HT*/
  5977. iwl4965_set_rxon_chain(priv);
  5978. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5979. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5980. priv->assoc_id, priv->beacon_int);
  5981. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5982. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5983. else
  5984. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5985. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5986. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5987. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5988. else
  5989. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5990. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5991. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5992. }
  5993. iwl_commit_rxon(priv);
  5994. switch (priv->iw_mode) {
  5995. case IEEE80211_IF_TYPE_STA:
  5996. iwl_rate_scale_init(priv->hw, IWL_AP_ID);
  5997. break;
  5998. case IEEE80211_IF_TYPE_IBSS:
  5999. /* clear out the station table */
  6000. iwl_clear_stations_table(priv);
  6001. iwl_rxon_add_station(priv, BROADCAST_ADDR, 0);
  6002. iwl_rxon_add_station(priv, priv->bssid, 0);
  6003. iwl_rate_scale_init(priv->hw, IWL_STA_ID);
  6004. iwl_send_beacon_cmd(priv);
  6005. break;
  6006. default:
  6007. IWL_ERROR("%s Should not be called in %d mode\n",
  6008. __FUNCTION__, priv->iw_mode);
  6009. break;
  6010. }
  6011. iwl_sequence_reset(priv);
  6012. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  6013. /* Enable Rx differential gain and sensitivity calibrations */
  6014. iwl4965_chain_noise_reset(priv);
  6015. priv->start_calib = 1;
  6016. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  6017. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6018. priv->assoc_station_added = 1;
  6019. #ifdef CONFIG_IWLWIFI_QOS
  6020. iwl_activate_qos(priv, 0);
  6021. #endif /* CONFIG_IWLWIFI_QOS */
  6022. mutex_unlock(&priv->mutex);
  6023. }
  6024. static void iwl_bg_abort_scan(struct work_struct *work)
  6025. {
  6026. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  6027. abort_scan);
  6028. if (!iwl_is_ready(priv))
  6029. return;
  6030. mutex_lock(&priv->mutex);
  6031. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6032. iwl_send_scan_abort(priv);
  6033. mutex_unlock(&priv->mutex);
  6034. }
  6035. static void iwl_bg_scan_completed(struct work_struct *work)
  6036. {
  6037. struct iwl_priv *priv =
  6038. container_of(work, struct iwl_priv, scan_completed);
  6039. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6040. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6041. return;
  6042. ieee80211_scan_completed(priv->hw);
  6043. /* Since setting the TXPOWER may have been deferred while
  6044. * performing the scan, fire one off */
  6045. mutex_lock(&priv->mutex);
  6046. iwl_hw_reg_send_txpower(priv);
  6047. mutex_unlock(&priv->mutex);
  6048. }
  6049. /*****************************************************************************
  6050. *
  6051. * mac80211 entry point functions
  6052. *
  6053. *****************************************************************************/
  6054. static int iwl_mac_start(struct ieee80211_hw *hw)
  6055. {
  6056. struct iwl_priv *priv = hw->priv;
  6057. IWL_DEBUG_MAC80211("enter\n");
  6058. /* we should be verifying the device is ready to be opened */
  6059. mutex_lock(&priv->mutex);
  6060. priv->is_open = 1;
  6061. if (!iwl_is_rfkill(priv))
  6062. ieee80211_start_queues(priv->hw);
  6063. mutex_unlock(&priv->mutex);
  6064. IWL_DEBUG_MAC80211("leave\n");
  6065. return 0;
  6066. }
  6067. static void iwl_mac_stop(struct ieee80211_hw *hw)
  6068. {
  6069. struct iwl_priv *priv = hw->priv;
  6070. IWL_DEBUG_MAC80211("enter\n");
  6071. priv->is_open = 0;
  6072. /*netif_stop_queue(dev); */
  6073. flush_workqueue(priv->workqueue);
  6074. IWL_DEBUG_MAC80211("leave\n");
  6075. }
  6076. static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6077. struct ieee80211_tx_control *ctl)
  6078. {
  6079. struct iwl_priv *priv = hw->priv;
  6080. IWL_DEBUG_MAC80211("enter\n");
  6081. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6082. IWL_DEBUG_MAC80211("leave - monitor\n");
  6083. return -1;
  6084. }
  6085. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6086. ctl->tx_rate);
  6087. if (iwl_tx_skb(priv, skb, ctl))
  6088. dev_kfree_skb_any(skb);
  6089. IWL_DEBUG_MAC80211("leave\n");
  6090. return 0;
  6091. }
  6092. static int iwl_mac_add_interface(struct ieee80211_hw *hw,
  6093. struct ieee80211_if_init_conf *conf)
  6094. {
  6095. struct iwl_priv *priv = hw->priv;
  6096. unsigned long flags;
  6097. DECLARE_MAC_BUF(mac);
  6098. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  6099. if (conf->mac_addr)
  6100. IWL_DEBUG_MAC80211("enter: MAC %s\n",
  6101. print_mac(mac, conf->mac_addr));
  6102. if (priv->interface_id) {
  6103. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  6104. return 0;
  6105. }
  6106. spin_lock_irqsave(&priv->lock, flags);
  6107. priv->interface_id = conf->if_id;
  6108. spin_unlock_irqrestore(&priv->lock, flags);
  6109. mutex_lock(&priv->mutex);
  6110. iwl_set_mode(priv, conf->type);
  6111. IWL_DEBUG_MAC80211("leave\n");
  6112. mutex_unlock(&priv->mutex);
  6113. return 0;
  6114. }
  6115. /**
  6116. * iwl_mac_config - mac80211 config callback
  6117. *
  6118. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6119. * be set inappropriately and the driver currently sets the hardware up to
  6120. * use it whenever needed.
  6121. */
  6122. static int iwl_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6123. {
  6124. struct iwl_priv *priv = hw->priv;
  6125. const struct iwl_channel_info *ch_info;
  6126. unsigned long flags;
  6127. mutex_lock(&priv->mutex);
  6128. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6129. if (!iwl_is_ready(priv)) {
  6130. IWL_DEBUG_MAC80211("leave - not ready\n");
  6131. mutex_unlock(&priv->mutex);
  6132. return -EIO;
  6133. }
  6134. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  6135. * what is exposed through include/ declrations */
  6136. if (unlikely(!iwl_param_disable_hw_scan &&
  6137. test_bit(STATUS_SCANNING, &priv->status))) {
  6138. IWL_DEBUG_MAC80211("leave - scanning\n");
  6139. mutex_unlock(&priv->mutex);
  6140. return 0;
  6141. }
  6142. spin_lock_irqsave(&priv->lock, flags);
  6143. ch_info = iwl_get_channel_info(priv, conf->phymode, conf->channel);
  6144. if (!is_channel_valid(ch_info)) {
  6145. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6146. conf->channel, conf->phymode);
  6147. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6148. spin_unlock_irqrestore(&priv->lock, flags);
  6149. mutex_unlock(&priv->mutex);
  6150. return -EINVAL;
  6151. }
  6152. #ifdef CONFIG_IWLWIFI_HT
  6153. /* if we are switching fron ht to 2.4 clear flags
  6154. * from any ht related info since 2.4 does not
  6155. * support ht */
  6156. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6157. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6158. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6159. #endif
  6160. )
  6161. priv->staging_rxon.flags = 0;
  6162. #endif /* CONFIG_IWLWIFI_HT */
  6163. iwl_set_rxon_channel(priv, conf->phymode, conf->channel);
  6164. iwl_set_flags_for_phymode(priv, conf->phymode);
  6165. /* The list of supported rates and rate mask can be different
  6166. * for each phymode; since the phymode may have changed, reset
  6167. * the rate mask to what mac80211 lists */
  6168. iwl_set_rate(priv);
  6169. spin_unlock_irqrestore(&priv->lock, flags);
  6170. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6171. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6172. iwl_hw_channel_switch(priv, conf->channel);
  6173. mutex_unlock(&priv->mutex);
  6174. return 0;
  6175. }
  6176. #endif
  6177. iwl_radio_kill_sw(priv, !conf->radio_enabled);
  6178. if (!conf->radio_enabled) {
  6179. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6180. mutex_unlock(&priv->mutex);
  6181. return 0;
  6182. }
  6183. if (iwl_is_rfkill(priv)) {
  6184. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6185. mutex_unlock(&priv->mutex);
  6186. return -EIO;
  6187. }
  6188. iwl_set_rate(priv);
  6189. if (memcmp(&priv->active_rxon,
  6190. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6191. iwl_commit_rxon(priv);
  6192. else
  6193. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6194. IWL_DEBUG_MAC80211("leave\n");
  6195. mutex_unlock(&priv->mutex);
  6196. return 0;
  6197. }
  6198. static void iwl_config_ap(struct iwl_priv *priv)
  6199. {
  6200. int rc = 0;
  6201. if (priv->status & STATUS_EXIT_PENDING)
  6202. return;
  6203. /* The following should be done only at AP bring up */
  6204. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6205. /* RXON - unassoc (to set timing command) */
  6206. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6207. iwl_commit_rxon(priv);
  6208. /* RXON Timing */
  6209. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  6210. iwl_setup_rxon_timing(priv);
  6211. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6212. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6213. if (rc)
  6214. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6215. "Attempting to continue.\n");
  6216. iwl4965_set_rxon_chain(priv);
  6217. /* FIXME: what should be the assoc_id for AP? */
  6218. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6219. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6220. priv->staging_rxon.flags |=
  6221. RXON_FLG_SHORT_PREAMBLE_MSK;
  6222. else
  6223. priv->staging_rxon.flags &=
  6224. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6225. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6226. if (priv->assoc_capability &
  6227. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6228. priv->staging_rxon.flags |=
  6229. RXON_FLG_SHORT_SLOT_MSK;
  6230. else
  6231. priv->staging_rxon.flags &=
  6232. ~RXON_FLG_SHORT_SLOT_MSK;
  6233. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6234. priv->staging_rxon.flags &=
  6235. ~RXON_FLG_SHORT_SLOT_MSK;
  6236. }
  6237. /* restore RXON assoc */
  6238. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6239. iwl_commit_rxon(priv);
  6240. #ifdef CONFIG_IWLWIFI_QOS
  6241. iwl_activate_qos(priv, 1);
  6242. #endif
  6243. iwl_rxon_add_station(priv, BROADCAST_ADDR, 0);
  6244. }
  6245. iwl_send_beacon_cmd(priv);
  6246. /* FIXME - we need to add code here to detect a totally new
  6247. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6248. * clear sta table, add BCAST sta... */
  6249. }
  6250. static int iwl_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  6251. struct ieee80211_if_conf *conf)
  6252. {
  6253. struct iwl_priv *priv = hw->priv;
  6254. DECLARE_MAC_BUF(mac);
  6255. unsigned long flags;
  6256. int rc;
  6257. if (conf == NULL)
  6258. return -EIO;
  6259. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6260. (!conf->beacon || !conf->ssid_len)) {
  6261. IWL_DEBUG_MAC80211
  6262. ("Leaving in AP mode because HostAPD is not ready.\n");
  6263. return 0;
  6264. }
  6265. mutex_lock(&priv->mutex);
  6266. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  6267. if (conf->bssid)
  6268. IWL_DEBUG_MAC80211("bssid: %s\n",
  6269. print_mac(mac, conf->bssid));
  6270. /*
  6271. * very dubious code was here; the probe filtering flag is never set:
  6272. *
  6273. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6274. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6275. */
  6276. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6277. IWL_DEBUG_MAC80211("leave - scanning\n");
  6278. mutex_unlock(&priv->mutex);
  6279. return 0;
  6280. }
  6281. if (priv->interface_id != if_id) {
  6282. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  6283. mutex_unlock(&priv->mutex);
  6284. return 0;
  6285. }
  6286. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6287. if (!conf->bssid) {
  6288. conf->bssid = priv->mac_addr;
  6289. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6290. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6291. print_mac(mac, conf->bssid));
  6292. }
  6293. if (priv->ibss_beacon)
  6294. dev_kfree_skb(priv->ibss_beacon);
  6295. priv->ibss_beacon = conf->beacon;
  6296. }
  6297. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6298. !is_multicast_ether_addr(conf->bssid)) {
  6299. /* If there is currently a HW scan going on in the background
  6300. * then we need to cancel it else the RXON below will fail. */
  6301. if (iwl_scan_cancel_timeout(priv, 100)) {
  6302. IWL_WARNING("Aborted scan still in progress "
  6303. "after 100ms\n");
  6304. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6305. mutex_unlock(&priv->mutex);
  6306. return -EAGAIN;
  6307. }
  6308. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6309. /* TODO: Audit driver for usage of these members and see
  6310. * if mac80211 deprecates them (priv->bssid looks like it
  6311. * shouldn't be there, but I haven't scanned the IBSS code
  6312. * to verify) - jpk */
  6313. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6314. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6315. iwl_config_ap(priv);
  6316. else {
  6317. priv->staging_rxon.filter_flags |=
  6318. RXON_FILTER_ASSOC_MSK;
  6319. rc = iwl_commit_rxon(priv);
  6320. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6321. iwl_rxon_add_station(
  6322. priv, priv->active_rxon.bssid_addr, 1);
  6323. }
  6324. } else {
  6325. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6326. iwl_commit_rxon(priv);
  6327. }
  6328. spin_lock_irqsave(&priv->lock, flags);
  6329. if (!conf->ssid_len)
  6330. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6331. else
  6332. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6333. priv->essid_len = conf->ssid_len;
  6334. spin_unlock_irqrestore(&priv->lock, flags);
  6335. IWL_DEBUG_MAC80211("leave\n");
  6336. mutex_unlock(&priv->mutex);
  6337. return 0;
  6338. }
  6339. static void iwl_configure_filter(struct ieee80211_hw *hw,
  6340. unsigned int changed_flags,
  6341. unsigned int *total_flags,
  6342. int mc_count, struct dev_addr_list *mc_list)
  6343. {
  6344. /*
  6345. * XXX: dummy
  6346. * see also iwl_connection_init_rx_config
  6347. */
  6348. *total_flags = 0;
  6349. }
  6350. static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  6351. struct ieee80211_if_init_conf *conf)
  6352. {
  6353. struct iwl_priv *priv = hw->priv;
  6354. IWL_DEBUG_MAC80211("enter\n");
  6355. mutex_lock(&priv->mutex);
  6356. if (priv->interface_id == conf->if_id) {
  6357. priv->interface_id = 0;
  6358. memset(priv->bssid, 0, ETH_ALEN);
  6359. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6360. priv->essid_len = 0;
  6361. }
  6362. mutex_unlock(&priv->mutex);
  6363. IWL_DEBUG_MAC80211("leave\n");
  6364. }
  6365. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6366. static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6367. {
  6368. int rc = 0;
  6369. unsigned long flags;
  6370. struct iwl_priv *priv = hw->priv;
  6371. IWL_DEBUG_MAC80211("enter\n");
  6372. spin_lock_irqsave(&priv->lock, flags);
  6373. if (!iwl_is_ready_rf(priv)) {
  6374. rc = -EIO;
  6375. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6376. goto out_unlock;
  6377. }
  6378. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6379. rc = -EIO;
  6380. IWL_ERROR("ERROR: APs don't scan\n");
  6381. goto out_unlock;
  6382. }
  6383. /* if we just finished scan ask for delay */
  6384. if (priv->last_scan_jiffies &&
  6385. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  6386. jiffies)) {
  6387. rc = -EAGAIN;
  6388. goto out_unlock;
  6389. }
  6390. if (len) {
  6391. IWL_DEBUG_SCAN("direct scan for "
  6392. "%s [%d]\n ",
  6393. iwl_escape_essid(ssid, len), (int)len);
  6394. priv->one_direct_scan = 1;
  6395. priv->direct_ssid_len = (u8)
  6396. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6397. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6398. }
  6399. rc = iwl_scan_initiate(priv);
  6400. IWL_DEBUG_MAC80211("leave\n");
  6401. out_unlock:
  6402. spin_unlock_irqrestore(&priv->lock, flags);
  6403. return rc;
  6404. }
  6405. static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6406. const u8 *local_addr, const u8 *addr,
  6407. struct ieee80211_key_conf *key)
  6408. {
  6409. struct iwl_priv *priv = hw->priv;
  6410. DECLARE_MAC_BUF(mac);
  6411. int rc = 0;
  6412. u8 sta_id;
  6413. IWL_DEBUG_MAC80211("enter\n");
  6414. if (!iwl_param_hwcrypto) {
  6415. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6416. return -EOPNOTSUPP;
  6417. }
  6418. if (is_zero_ether_addr(addr))
  6419. /* only support pairwise keys */
  6420. return -EOPNOTSUPP;
  6421. sta_id = iwl_hw_find_station(priv, addr);
  6422. if (sta_id == IWL_INVALID_STATION) {
  6423. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6424. print_mac(mac, addr));
  6425. return -EINVAL;
  6426. }
  6427. mutex_lock(&priv->mutex);
  6428. switch (cmd) {
  6429. case SET_KEY:
  6430. rc = iwl_update_sta_key_info(priv, key, sta_id);
  6431. if (!rc) {
  6432. iwl_set_rxon_hwcrypto(priv, 1);
  6433. iwl_commit_rxon(priv);
  6434. key->hw_key_idx = sta_id;
  6435. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6436. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6437. }
  6438. break;
  6439. case DISABLE_KEY:
  6440. rc = iwl_clear_sta_key_info(priv, sta_id);
  6441. if (!rc) {
  6442. iwl_set_rxon_hwcrypto(priv, 0);
  6443. iwl_commit_rxon(priv);
  6444. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6445. }
  6446. break;
  6447. default:
  6448. rc = -EINVAL;
  6449. }
  6450. IWL_DEBUG_MAC80211("leave\n");
  6451. mutex_unlock(&priv->mutex);
  6452. return rc;
  6453. }
  6454. static int iwl_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6455. const struct ieee80211_tx_queue_params *params)
  6456. {
  6457. struct iwl_priv *priv = hw->priv;
  6458. #ifdef CONFIG_IWLWIFI_QOS
  6459. unsigned long flags;
  6460. int q;
  6461. #endif /* CONFIG_IWL_QOS */
  6462. IWL_DEBUG_MAC80211("enter\n");
  6463. if (!iwl_is_ready_rf(priv)) {
  6464. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6465. return -EIO;
  6466. }
  6467. if (queue >= AC_NUM) {
  6468. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6469. return 0;
  6470. }
  6471. #ifdef CONFIG_IWLWIFI_QOS
  6472. if (!priv->qos_data.qos_enable) {
  6473. priv->qos_data.qos_active = 0;
  6474. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6475. return 0;
  6476. }
  6477. q = AC_NUM - 1 - queue;
  6478. spin_lock_irqsave(&priv->lock, flags);
  6479. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6480. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6481. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6482. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6483. cpu_to_le16((params->burst_time * 100));
  6484. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6485. priv->qos_data.qos_active = 1;
  6486. spin_unlock_irqrestore(&priv->lock, flags);
  6487. mutex_lock(&priv->mutex);
  6488. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6489. iwl_activate_qos(priv, 1);
  6490. else if (priv->assoc_id && iwl_is_associated(priv))
  6491. iwl_activate_qos(priv, 0);
  6492. mutex_unlock(&priv->mutex);
  6493. #endif /*CONFIG_IWLWIFI_QOS */
  6494. IWL_DEBUG_MAC80211("leave\n");
  6495. return 0;
  6496. }
  6497. static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  6498. struct ieee80211_tx_queue_stats *stats)
  6499. {
  6500. struct iwl_priv *priv = hw->priv;
  6501. int i, avail;
  6502. struct iwl_tx_queue *txq;
  6503. struct iwl_queue *q;
  6504. unsigned long flags;
  6505. IWL_DEBUG_MAC80211("enter\n");
  6506. if (!iwl_is_ready_rf(priv)) {
  6507. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6508. return -EIO;
  6509. }
  6510. spin_lock_irqsave(&priv->lock, flags);
  6511. for (i = 0; i < AC_NUM; i++) {
  6512. txq = &priv->txq[i];
  6513. q = &txq->q;
  6514. avail = iwl_queue_space(q);
  6515. stats->data[i].len = q->n_window - avail;
  6516. stats->data[i].limit = q->n_window - q->high_mark;
  6517. stats->data[i].count = q->n_window;
  6518. }
  6519. spin_unlock_irqrestore(&priv->lock, flags);
  6520. IWL_DEBUG_MAC80211("leave\n");
  6521. return 0;
  6522. }
  6523. static int iwl_mac_get_stats(struct ieee80211_hw *hw,
  6524. struct ieee80211_low_level_stats *stats)
  6525. {
  6526. IWL_DEBUG_MAC80211("enter\n");
  6527. IWL_DEBUG_MAC80211("leave\n");
  6528. return 0;
  6529. }
  6530. static u64 iwl_mac_get_tsf(struct ieee80211_hw *hw)
  6531. {
  6532. IWL_DEBUG_MAC80211("enter\n");
  6533. IWL_DEBUG_MAC80211("leave\n");
  6534. return 0;
  6535. }
  6536. static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  6537. {
  6538. struct iwl_priv *priv = hw->priv;
  6539. unsigned long flags;
  6540. mutex_lock(&priv->mutex);
  6541. IWL_DEBUG_MAC80211("enter\n");
  6542. priv->lq_mngr.lq_ready = 0;
  6543. #ifdef CONFIG_IWLWIFI_HT
  6544. spin_lock_irqsave(&priv->lock, flags);
  6545. memset(&priv->current_assoc_ht, 0, sizeof(struct sta_ht_info));
  6546. spin_unlock_irqrestore(&priv->lock, flags);
  6547. #ifdef CONFIG_IWLWIFI_HT_AGG
  6548. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6549. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6550. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl_agg_control));
  6551. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6552. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6553. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6554. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6555. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6556. #endif /*CONFIG_IWLWIFI_HT_AGG */
  6557. #endif /* CONFIG_IWLWIFI_HT */
  6558. #ifdef CONFIG_IWLWIFI_QOS
  6559. iwl_reset_qos(priv);
  6560. #endif
  6561. cancel_delayed_work(&priv->post_associate);
  6562. spin_lock_irqsave(&priv->lock, flags);
  6563. priv->assoc_id = 0;
  6564. priv->assoc_capability = 0;
  6565. priv->call_post_assoc_from_beacon = 0;
  6566. priv->assoc_station_added = 0;
  6567. /* new association get rid of ibss beacon skb */
  6568. if (priv->ibss_beacon)
  6569. dev_kfree_skb(priv->ibss_beacon);
  6570. priv->ibss_beacon = NULL;
  6571. priv->beacon_int = priv->hw->conf.beacon_int;
  6572. priv->timestamp1 = 0;
  6573. priv->timestamp0 = 0;
  6574. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6575. priv->beacon_int = 0;
  6576. spin_unlock_irqrestore(&priv->lock, flags);
  6577. /* Per mac80211.h: This is only used in IBSS mode... */
  6578. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6579. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6580. mutex_unlock(&priv->mutex);
  6581. return;
  6582. }
  6583. if (!iwl_is_ready_rf(priv)) {
  6584. IWL_DEBUG_MAC80211("leave - not ready\n");
  6585. mutex_unlock(&priv->mutex);
  6586. return;
  6587. }
  6588. priv->only_active_channel = 0;
  6589. iwl_set_rate(priv);
  6590. mutex_unlock(&priv->mutex);
  6591. IWL_DEBUG_MAC80211("leave\n");
  6592. }
  6593. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6594. struct ieee80211_tx_control *control)
  6595. {
  6596. struct iwl_priv *priv = hw->priv;
  6597. unsigned long flags;
  6598. mutex_lock(&priv->mutex);
  6599. IWL_DEBUG_MAC80211("enter\n");
  6600. if (!iwl_is_ready_rf(priv)) {
  6601. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6602. mutex_unlock(&priv->mutex);
  6603. return -EIO;
  6604. }
  6605. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6606. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6607. mutex_unlock(&priv->mutex);
  6608. return -EIO;
  6609. }
  6610. spin_lock_irqsave(&priv->lock, flags);
  6611. if (priv->ibss_beacon)
  6612. dev_kfree_skb(priv->ibss_beacon);
  6613. priv->ibss_beacon = skb;
  6614. priv->assoc_id = 0;
  6615. IWL_DEBUG_MAC80211("leave\n");
  6616. spin_unlock_irqrestore(&priv->lock, flags);
  6617. #ifdef CONFIG_IWLWIFI_QOS
  6618. iwl_reset_qos(priv);
  6619. #endif
  6620. queue_work(priv->workqueue, &priv->post_associate.work);
  6621. mutex_unlock(&priv->mutex);
  6622. return 0;
  6623. }
  6624. #ifdef CONFIG_IWLWIFI_HT
  6625. union ht_cap_info {
  6626. struct {
  6627. u16 advanced_coding_cap :1;
  6628. u16 supported_chan_width_set :1;
  6629. u16 mimo_power_save_mode :2;
  6630. u16 green_field :1;
  6631. u16 short_GI20 :1;
  6632. u16 short_GI40 :1;
  6633. u16 tx_stbc :1;
  6634. u16 rx_stbc :1;
  6635. u16 beam_forming :1;
  6636. u16 delayed_ba :1;
  6637. u16 maximal_amsdu_size :1;
  6638. u16 cck_mode_at_40MHz :1;
  6639. u16 psmp_support :1;
  6640. u16 stbc_ctrl_frame_support :1;
  6641. u16 sig_txop_protection_support :1;
  6642. };
  6643. u16 val;
  6644. } __attribute__ ((packed));
  6645. union ht_param_info{
  6646. struct {
  6647. u8 max_rx_ampdu_factor :2;
  6648. u8 mpdu_density :3;
  6649. u8 reserved :3;
  6650. };
  6651. u8 val;
  6652. } __attribute__ ((packed));
  6653. union ht_exra_param_info {
  6654. struct {
  6655. u8 ext_chan_offset :2;
  6656. u8 tx_chan_width :1;
  6657. u8 rifs_mode :1;
  6658. u8 controlled_access_only :1;
  6659. u8 service_interval_granularity :3;
  6660. };
  6661. u8 val;
  6662. } __attribute__ ((packed));
  6663. union ht_operation_mode{
  6664. struct {
  6665. u16 op_mode :2;
  6666. u16 non_GF :1;
  6667. u16 reserved :13;
  6668. };
  6669. u16 val;
  6670. } __attribute__ ((packed));
  6671. static int sta_ht_info_init(struct ieee80211_ht_capability *ht_cap,
  6672. struct ieee80211_ht_additional_info *ht_extra,
  6673. struct sta_ht_info *ht_info_ap,
  6674. struct sta_ht_info *ht_info)
  6675. {
  6676. union ht_cap_info cap;
  6677. union ht_operation_mode op_mode;
  6678. union ht_param_info param_info;
  6679. union ht_exra_param_info extra_param_info;
  6680. IWL_DEBUG_MAC80211("enter: \n");
  6681. if (!ht_info) {
  6682. IWL_DEBUG_MAC80211("leave: ht_info is NULL\n");
  6683. return -1;
  6684. }
  6685. if (ht_cap) {
  6686. cap.val = (u16) le16_to_cpu(ht_cap->capabilities_info);
  6687. param_info.val = ht_cap->mac_ht_params_info;
  6688. ht_info->is_ht = 1;
  6689. if (cap.short_GI20)
  6690. ht_info->sgf |= 0x1;
  6691. if (cap.short_GI40)
  6692. ht_info->sgf |= 0x2;
  6693. ht_info->is_green_field = cap.green_field;
  6694. ht_info->max_amsdu_size = cap.maximal_amsdu_size;
  6695. ht_info->supported_chan_width = cap.supported_chan_width_set;
  6696. ht_info->tx_mimo_ps_mode = cap.mimo_power_save_mode;
  6697. memcpy(ht_info->supp_rates, ht_cap->supported_mcs_set, 16);
  6698. ht_info->ampdu_factor = param_info.max_rx_ampdu_factor;
  6699. ht_info->mpdu_density = param_info.mpdu_density;
  6700. IWL_DEBUG_MAC80211("SISO mask 0x%X MIMO mask 0x%X \n",
  6701. ht_cap->supported_mcs_set[0],
  6702. ht_cap->supported_mcs_set[1]);
  6703. if (ht_info_ap) {
  6704. ht_info->control_channel = ht_info_ap->control_channel;
  6705. ht_info->extension_chan_offset =
  6706. ht_info_ap->extension_chan_offset;
  6707. ht_info->tx_chan_width = ht_info_ap->tx_chan_width;
  6708. ht_info->operating_mode = ht_info_ap->operating_mode;
  6709. }
  6710. if (ht_extra) {
  6711. extra_param_info.val = ht_extra->ht_param;
  6712. ht_info->control_channel = ht_extra->control_chan;
  6713. ht_info->extension_chan_offset =
  6714. extra_param_info.ext_chan_offset;
  6715. ht_info->tx_chan_width = extra_param_info.tx_chan_width;
  6716. op_mode.val = (u16)
  6717. le16_to_cpu(ht_extra->operation_mode);
  6718. ht_info->operating_mode = op_mode.op_mode;
  6719. IWL_DEBUG_MAC80211("control channel %d\n",
  6720. ht_extra->control_chan);
  6721. }
  6722. } else
  6723. ht_info->is_ht = 0;
  6724. IWL_DEBUG_MAC80211("leave\n");
  6725. return 0;
  6726. }
  6727. static int iwl_mac_conf_ht(struct ieee80211_hw *hw,
  6728. struct ieee80211_ht_capability *ht_cap,
  6729. struct ieee80211_ht_additional_info *ht_extra)
  6730. {
  6731. struct iwl_priv *priv = hw->priv;
  6732. int rs;
  6733. IWL_DEBUG_MAC80211("enter: \n");
  6734. rs = sta_ht_info_init(ht_cap, ht_extra, NULL, &priv->current_assoc_ht);
  6735. iwl4965_set_rxon_chain(priv);
  6736. if (priv && priv->assoc_id &&
  6737. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6738. unsigned long flags;
  6739. spin_lock_irqsave(&priv->lock, flags);
  6740. if (priv->beacon_int)
  6741. queue_work(priv->workqueue, &priv->post_associate.work);
  6742. else
  6743. priv->call_post_assoc_from_beacon = 1;
  6744. spin_unlock_irqrestore(&priv->lock, flags);
  6745. }
  6746. IWL_DEBUG_MAC80211("leave: control channel %d\n",
  6747. ht_extra->control_chan);
  6748. return rs;
  6749. }
  6750. static void iwl_set_ht_capab(struct ieee80211_hw *hw,
  6751. struct ieee80211_ht_capability *ht_cap,
  6752. u8 use_wide_chan)
  6753. {
  6754. union ht_cap_info cap;
  6755. union ht_param_info param_info;
  6756. memset(&cap, 0, sizeof(union ht_cap_info));
  6757. memset(&param_info, 0, sizeof(union ht_param_info));
  6758. cap.maximal_amsdu_size = HT_IE_MAX_AMSDU_SIZE_4K;
  6759. cap.green_field = 1;
  6760. cap.short_GI20 = 1;
  6761. cap.short_GI40 = 1;
  6762. cap.supported_chan_width_set = use_wide_chan;
  6763. cap.mimo_power_save_mode = 0x3;
  6764. param_info.max_rx_ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  6765. param_info.mpdu_density = CFG_HT_MPDU_DENSITY_DEF;
  6766. ht_cap->capabilities_info = (__le16) cpu_to_le16(cap.val);
  6767. ht_cap->mac_ht_params_info = (u8) param_info.val;
  6768. ht_cap->supported_mcs_set[0] = 0xff;
  6769. ht_cap->supported_mcs_set[1] = 0xff;
  6770. ht_cap->supported_mcs_set[4] =
  6771. (cap.supported_chan_width_set) ? 0x1: 0x0;
  6772. }
  6773. static void iwl_mac_get_ht_capab(struct ieee80211_hw *hw,
  6774. struct ieee80211_ht_capability *ht_cap)
  6775. {
  6776. u8 use_wide_channel = 1;
  6777. struct iwl_priv *priv = hw->priv;
  6778. IWL_DEBUG_MAC80211("enter: \n");
  6779. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  6780. use_wide_channel = 0;
  6781. /* no fat tx allowed on 2.4GHZ */
  6782. if (priv->phymode != MODE_IEEE80211A)
  6783. use_wide_channel = 0;
  6784. iwl_set_ht_capab(hw, ht_cap, use_wide_channel);
  6785. IWL_DEBUG_MAC80211("leave: \n");
  6786. }
  6787. #endif /*CONFIG_IWLWIFI_HT*/
  6788. /*****************************************************************************
  6789. *
  6790. * sysfs attributes
  6791. *
  6792. *****************************************************************************/
  6793. #ifdef CONFIG_IWLWIFI_DEBUG
  6794. /*
  6795. * The following adds a new attribute to the sysfs representation
  6796. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6797. * used for controlling the debug level.
  6798. *
  6799. * See the level definitions in iwl for details.
  6800. */
  6801. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6802. {
  6803. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6804. }
  6805. static ssize_t store_debug_level(struct device_driver *d,
  6806. const char *buf, size_t count)
  6807. {
  6808. char *p = (char *)buf;
  6809. u32 val;
  6810. val = simple_strtoul(p, &p, 0);
  6811. if (p == buf)
  6812. printk(KERN_INFO DRV_NAME
  6813. ": %s is not in hex or decimal form.\n", buf);
  6814. else
  6815. iwl_debug_level = val;
  6816. return strnlen(buf, count);
  6817. }
  6818. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6819. show_debug_level, store_debug_level);
  6820. #endif /* CONFIG_IWLWIFI_DEBUG */
  6821. static ssize_t show_rf_kill(struct device *d,
  6822. struct device_attribute *attr, char *buf)
  6823. {
  6824. /*
  6825. * 0 - RF kill not enabled
  6826. * 1 - SW based RF kill active (sysfs)
  6827. * 2 - HW based RF kill active
  6828. * 3 - Both HW and SW based RF kill active
  6829. */
  6830. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6831. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6832. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6833. return sprintf(buf, "%i\n", val);
  6834. }
  6835. static ssize_t store_rf_kill(struct device *d,
  6836. struct device_attribute *attr,
  6837. const char *buf, size_t count)
  6838. {
  6839. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6840. mutex_lock(&priv->mutex);
  6841. iwl_radio_kill_sw(priv, buf[0] == '1');
  6842. mutex_unlock(&priv->mutex);
  6843. return count;
  6844. }
  6845. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6846. static ssize_t show_temperature(struct device *d,
  6847. struct device_attribute *attr, char *buf)
  6848. {
  6849. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6850. if (!iwl_is_alive(priv))
  6851. return -EAGAIN;
  6852. return sprintf(buf, "%d\n", iwl_hw_get_temperature(priv));
  6853. }
  6854. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6855. static ssize_t show_rs_window(struct device *d,
  6856. struct device_attribute *attr,
  6857. char *buf)
  6858. {
  6859. struct iwl_priv *priv = d->driver_data;
  6860. return iwl_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6861. }
  6862. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6863. static ssize_t show_tx_power(struct device *d,
  6864. struct device_attribute *attr, char *buf)
  6865. {
  6866. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6867. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6868. }
  6869. static ssize_t store_tx_power(struct device *d,
  6870. struct device_attribute *attr,
  6871. const char *buf, size_t count)
  6872. {
  6873. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6874. char *p = (char *)buf;
  6875. u32 val;
  6876. val = simple_strtoul(p, &p, 10);
  6877. if (p == buf)
  6878. printk(KERN_INFO DRV_NAME
  6879. ": %s is not in decimal form.\n", buf);
  6880. else
  6881. iwl_hw_reg_set_txpower(priv, val);
  6882. return count;
  6883. }
  6884. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6885. static ssize_t show_flags(struct device *d,
  6886. struct device_attribute *attr, char *buf)
  6887. {
  6888. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6889. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6890. }
  6891. static ssize_t store_flags(struct device *d,
  6892. struct device_attribute *attr,
  6893. const char *buf, size_t count)
  6894. {
  6895. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6896. u32 flags = simple_strtoul(buf, NULL, 0);
  6897. mutex_lock(&priv->mutex);
  6898. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6899. /* Cancel any currently running scans... */
  6900. if (iwl_scan_cancel_timeout(priv, 100))
  6901. IWL_WARNING("Could not cancel scan.\n");
  6902. else {
  6903. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6904. flags);
  6905. priv->staging_rxon.flags = cpu_to_le32(flags);
  6906. iwl_commit_rxon(priv);
  6907. }
  6908. }
  6909. mutex_unlock(&priv->mutex);
  6910. return count;
  6911. }
  6912. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6913. static ssize_t show_filter_flags(struct device *d,
  6914. struct device_attribute *attr, char *buf)
  6915. {
  6916. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6917. return sprintf(buf, "0x%04X\n",
  6918. le32_to_cpu(priv->active_rxon.filter_flags));
  6919. }
  6920. static ssize_t store_filter_flags(struct device *d,
  6921. struct device_attribute *attr,
  6922. const char *buf, size_t count)
  6923. {
  6924. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6925. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6926. mutex_lock(&priv->mutex);
  6927. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6928. /* Cancel any currently running scans... */
  6929. if (iwl_scan_cancel_timeout(priv, 100))
  6930. IWL_WARNING("Could not cancel scan.\n");
  6931. else {
  6932. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6933. "0x%04X\n", filter_flags);
  6934. priv->staging_rxon.filter_flags =
  6935. cpu_to_le32(filter_flags);
  6936. iwl_commit_rxon(priv);
  6937. }
  6938. }
  6939. mutex_unlock(&priv->mutex);
  6940. return count;
  6941. }
  6942. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6943. store_filter_flags);
  6944. static ssize_t show_tune(struct device *d,
  6945. struct device_attribute *attr, char *buf)
  6946. {
  6947. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6948. return sprintf(buf, "0x%04X\n",
  6949. (priv->phymode << 8) |
  6950. le16_to_cpu(priv->active_rxon.channel));
  6951. }
  6952. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode);
  6953. static ssize_t store_tune(struct device *d,
  6954. struct device_attribute *attr,
  6955. const char *buf, size_t count)
  6956. {
  6957. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6958. char *p = (char *)buf;
  6959. u16 tune = simple_strtoul(p, &p, 0);
  6960. u8 phymode = (tune >> 8) & 0xff;
  6961. u16 channel = tune & 0xff;
  6962. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  6963. mutex_lock(&priv->mutex);
  6964. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  6965. (priv->phymode != phymode)) {
  6966. const struct iwl_channel_info *ch_info;
  6967. ch_info = iwl_get_channel_info(priv, phymode, channel);
  6968. if (!ch_info) {
  6969. IWL_WARNING("Requested invalid phymode/channel "
  6970. "combination: %d %d\n", phymode, channel);
  6971. mutex_unlock(&priv->mutex);
  6972. return -EINVAL;
  6973. }
  6974. /* Cancel any currently running scans... */
  6975. if (iwl_scan_cancel_timeout(priv, 100))
  6976. IWL_WARNING("Could not cancel scan.\n");
  6977. else {
  6978. IWL_DEBUG_INFO("Committing phymode and "
  6979. "rxon.channel = %d %d\n",
  6980. phymode, channel);
  6981. iwl_set_rxon_channel(priv, phymode, channel);
  6982. iwl_set_flags_for_phymode(priv, phymode);
  6983. iwl_set_rate(priv);
  6984. iwl_commit_rxon(priv);
  6985. }
  6986. }
  6987. mutex_unlock(&priv->mutex);
  6988. return count;
  6989. }
  6990. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  6991. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6992. static ssize_t show_measurement(struct device *d,
  6993. struct device_attribute *attr, char *buf)
  6994. {
  6995. struct iwl_priv *priv = dev_get_drvdata(d);
  6996. struct iwl_spectrum_notification measure_report;
  6997. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6998. u8 *data = (u8 *) & measure_report;
  6999. unsigned long flags;
  7000. spin_lock_irqsave(&priv->lock, flags);
  7001. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7002. spin_unlock_irqrestore(&priv->lock, flags);
  7003. return 0;
  7004. }
  7005. memcpy(&measure_report, &priv->measure_report, size);
  7006. priv->measurement_status = 0;
  7007. spin_unlock_irqrestore(&priv->lock, flags);
  7008. while (size && (PAGE_SIZE - len)) {
  7009. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7010. PAGE_SIZE - len, 1);
  7011. len = strlen(buf);
  7012. if (PAGE_SIZE - len)
  7013. buf[len++] = '\n';
  7014. ofs += 16;
  7015. size -= min(size, 16U);
  7016. }
  7017. return len;
  7018. }
  7019. static ssize_t store_measurement(struct device *d,
  7020. struct device_attribute *attr,
  7021. const char *buf, size_t count)
  7022. {
  7023. struct iwl_priv *priv = dev_get_drvdata(d);
  7024. struct ieee80211_measurement_params params = {
  7025. .channel = le16_to_cpu(priv->active_rxon.channel),
  7026. .start_time = cpu_to_le64(priv->last_tsf),
  7027. .duration = cpu_to_le16(1),
  7028. };
  7029. u8 type = IWL_MEASURE_BASIC;
  7030. u8 buffer[32];
  7031. u8 channel;
  7032. if (count) {
  7033. char *p = buffer;
  7034. strncpy(buffer, buf, min(sizeof(buffer), count));
  7035. channel = simple_strtoul(p, NULL, 0);
  7036. if (channel)
  7037. params.channel = channel;
  7038. p = buffer;
  7039. while (*p && *p != ' ')
  7040. p++;
  7041. if (*p)
  7042. type = simple_strtoul(p + 1, NULL, 0);
  7043. }
  7044. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7045. "channel %d (for '%s')\n", type, params.channel, buf);
  7046. iwl_get_measurement(priv, &params, type);
  7047. return count;
  7048. }
  7049. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7050. show_measurement, store_measurement);
  7051. #endif /* CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT */
  7052. static ssize_t store_retry_rate(struct device *d,
  7053. struct device_attribute *attr,
  7054. const char *buf, size_t count)
  7055. {
  7056. struct iwl_priv *priv = dev_get_drvdata(d);
  7057. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7058. if (priv->retry_rate <= 0)
  7059. priv->retry_rate = 1;
  7060. return count;
  7061. }
  7062. static ssize_t show_retry_rate(struct device *d,
  7063. struct device_attribute *attr, char *buf)
  7064. {
  7065. struct iwl_priv *priv = dev_get_drvdata(d);
  7066. return sprintf(buf, "%d", priv->retry_rate);
  7067. }
  7068. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7069. store_retry_rate);
  7070. static ssize_t store_power_level(struct device *d,
  7071. struct device_attribute *attr,
  7072. const char *buf, size_t count)
  7073. {
  7074. struct iwl_priv *priv = dev_get_drvdata(d);
  7075. int rc;
  7076. int mode;
  7077. mode = simple_strtoul(buf, NULL, 0);
  7078. mutex_lock(&priv->mutex);
  7079. if (!iwl_is_ready(priv)) {
  7080. rc = -EAGAIN;
  7081. goto out;
  7082. }
  7083. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7084. mode = IWL_POWER_AC;
  7085. else
  7086. mode |= IWL_POWER_ENABLED;
  7087. if (mode != priv->power_mode) {
  7088. rc = iwl_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7089. if (rc) {
  7090. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7091. goto out;
  7092. }
  7093. priv->power_mode = mode;
  7094. }
  7095. rc = count;
  7096. out:
  7097. mutex_unlock(&priv->mutex);
  7098. return rc;
  7099. }
  7100. #define MAX_WX_STRING 80
  7101. /* Values are in microsecond */
  7102. static const s32 timeout_duration[] = {
  7103. 350000,
  7104. 250000,
  7105. 75000,
  7106. 37000,
  7107. 25000,
  7108. };
  7109. static const s32 period_duration[] = {
  7110. 400000,
  7111. 700000,
  7112. 1000000,
  7113. 1000000,
  7114. 1000000
  7115. };
  7116. static ssize_t show_power_level(struct device *d,
  7117. struct device_attribute *attr, char *buf)
  7118. {
  7119. struct iwl_priv *priv = dev_get_drvdata(d);
  7120. int level = IWL_POWER_LEVEL(priv->power_mode);
  7121. char *p = buf;
  7122. p += sprintf(p, "%d ", level);
  7123. switch (level) {
  7124. case IWL_POWER_MODE_CAM:
  7125. case IWL_POWER_AC:
  7126. p += sprintf(p, "(AC)");
  7127. break;
  7128. case IWL_POWER_BATTERY:
  7129. p += sprintf(p, "(BATTERY)");
  7130. break;
  7131. default:
  7132. p += sprintf(p,
  7133. "(Timeout %dms, Period %dms)",
  7134. timeout_duration[level - 1] / 1000,
  7135. period_duration[level - 1] / 1000);
  7136. }
  7137. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7138. p += sprintf(p, " OFF\n");
  7139. else
  7140. p += sprintf(p, " \n");
  7141. return (p - buf + 1);
  7142. }
  7143. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7144. store_power_level);
  7145. static ssize_t show_channels(struct device *d,
  7146. struct device_attribute *attr, char *buf)
  7147. {
  7148. struct iwl_priv *priv = dev_get_drvdata(d);
  7149. int len = 0, i;
  7150. struct ieee80211_channel *channels = NULL;
  7151. const struct ieee80211_hw_mode *hw_mode = NULL;
  7152. int count = 0;
  7153. if (!iwl_is_ready(priv))
  7154. return -EAGAIN;
  7155. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211G);
  7156. if (!hw_mode)
  7157. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211B);
  7158. if (hw_mode) {
  7159. channels = hw_mode->channels;
  7160. count = hw_mode->num_channels;
  7161. }
  7162. len +=
  7163. sprintf(&buf[len],
  7164. "Displaying %d channels in 2.4GHz band "
  7165. "(802.11bg):\n", count);
  7166. for (i = 0; i < count; i++)
  7167. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7168. channels[i].chan,
  7169. channels[i].power_level,
  7170. channels[i].
  7171. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7172. " (IEEE 802.11h required)" : "",
  7173. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7174. || (channels[i].
  7175. flag &
  7176. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7177. ", IBSS",
  7178. channels[i].
  7179. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7180. "active/passive" : "passive only");
  7181. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211A);
  7182. if (hw_mode) {
  7183. channels = hw_mode->channels;
  7184. count = hw_mode->num_channels;
  7185. } else {
  7186. channels = NULL;
  7187. count = 0;
  7188. }
  7189. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7190. "(802.11a):\n", count);
  7191. for (i = 0; i < count; i++)
  7192. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7193. channels[i].chan,
  7194. channels[i].power_level,
  7195. channels[i].
  7196. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7197. " (IEEE 802.11h required)" : "",
  7198. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7199. || (channels[i].
  7200. flag &
  7201. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7202. ", IBSS",
  7203. channels[i].
  7204. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7205. "active/passive" : "passive only");
  7206. return len;
  7207. }
  7208. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7209. static ssize_t show_statistics(struct device *d,
  7210. struct device_attribute *attr, char *buf)
  7211. {
  7212. struct iwl_priv *priv = dev_get_drvdata(d);
  7213. u32 size = sizeof(struct iwl_notif_statistics);
  7214. u32 len = 0, ofs = 0;
  7215. u8 *data = (u8 *) & priv->statistics;
  7216. int rc = 0;
  7217. if (!iwl_is_alive(priv))
  7218. return -EAGAIN;
  7219. mutex_lock(&priv->mutex);
  7220. rc = iwl_send_statistics_request(priv);
  7221. mutex_unlock(&priv->mutex);
  7222. if (rc) {
  7223. len = sprintf(buf,
  7224. "Error sending statistics request: 0x%08X\n", rc);
  7225. return len;
  7226. }
  7227. while (size && (PAGE_SIZE - len)) {
  7228. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7229. PAGE_SIZE - len, 1);
  7230. len = strlen(buf);
  7231. if (PAGE_SIZE - len)
  7232. buf[len++] = '\n';
  7233. ofs += 16;
  7234. size -= min(size, 16U);
  7235. }
  7236. return len;
  7237. }
  7238. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7239. static ssize_t show_antenna(struct device *d,
  7240. struct device_attribute *attr, char *buf)
  7241. {
  7242. struct iwl_priv *priv = dev_get_drvdata(d);
  7243. if (!iwl_is_alive(priv))
  7244. return -EAGAIN;
  7245. return sprintf(buf, "%d\n", priv->antenna);
  7246. }
  7247. static ssize_t store_antenna(struct device *d,
  7248. struct device_attribute *attr,
  7249. const char *buf, size_t count)
  7250. {
  7251. int ant;
  7252. struct iwl_priv *priv = dev_get_drvdata(d);
  7253. if (count == 0)
  7254. return 0;
  7255. if (sscanf(buf, "%1i", &ant) != 1) {
  7256. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7257. return count;
  7258. }
  7259. if ((ant >= 0) && (ant <= 2)) {
  7260. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7261. priv->antenna = (enum iwl_antenna)ant;
  7262. } else
  7263. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7264. return count;
  7265. }
  7266. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7267. static ssize_t show_status(struct device *d,
  7268. struct device_attribute *attr, char *buf)
  7269. {
  7270. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  7271. if (!iwl_is_alive(priv))
  7272. return -EAGAIN;
  7273. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7274. }
  7275. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7276. static ssize_t dump_error_log(struct device *d,
  7277. struct device_attribute *attr,
  7278. const char *buf, size_t count)
  7279. {
  7280. char *p = (char *)buf;
  7281. if (p[0] == '1')
  7282. iwl_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  7283. return strnlen(buf, count);
  7284. }
  7285. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7286. static ssize_t dump_event_log(struct device *d,
  7287. struct device_attribute *attr,
  7288. const char *buf, size_t count)
  7289. {
  7290. char *p = (char *)buf;
  7291. if (p[0] == '1')
  7292. iwl_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  7293. return strnlen(buf, count);
  7294. }
  7295. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7296. /*****************************************************************************
  7297. *
  7298. * driver setup and teardown
  7299. *
  7300. *****************************************************************************/
  7301. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  7302. {
  7303. priv->workqueue = create_workqueue(DRV_NAME);
  7304. init_waitqueue_head(&priv->wait_command_queue);
  7305. INIT_WORK(&priv->up, iwl_bg_up);
  7306. INIT_WORK(&priv->restart, iwl_bg_restart);
  7307. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  7308. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  7309. INIT_WORK(&priv->request_scan, iwl_bg_request_scan);
  7310. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  7311. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  7312. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  7313. INIT_DELAYED_WORK(&priv->post_associate, iwl_bg_post_associate);
  7314. INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
  7315. INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
  7316. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  7317. iwl_hw_setup_deferred_work(priv);
  7318. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7319. iwl_irq_tasklet, (unsigned long)priv);
  7320. }
  7321. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  7322. {
  7323. iwl_hw_cancel_deferred_work(priv);
  7324. cancel_delayed_work(&priv->scan_check);
  7325. cancel_delayed_work(&priv->alive_start);
  7326. cancel_delayed_work(&priv->post_associate);
  7327. cancel_work_sync(&priv->beacon_update);
  7328. }
  7329. static struct attribute *iwl_sysfs_entries[] = {
  7330. &dev_attr_antenna.attr,
  7331. &dev_attr_channels.attr,
  7332. &dev_attr_dump_errors.attr,
  7333. &dev_attr_dump_events.attr,
  7334. &dev_attr_flags.attr,
  7335. &dev_attr_filter_flags.attr,
  7336. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  7337. &dev_attr_measurement.attr,
  7338. #endif
  7339. &dev_attr_power_level.attr,
  7340. &dev_attr_retry_rate.attr,
  7341. &dev_attr_rf_kill.attr,
  7342. &dev_attr_rs_window.attr,
  7343. &dev_attr_statistics.attr,
  7344. &dev_attr_status.attr,
  7345. &dev_attr_temperature.attr,
  7346. &dev_attr_tune.attr,
  7347. &dev_attr_tx_power.attr,
  7348. NULL
  7349. };
  7350. static struct attribute_group iwl_attribute_group = {
  7351. .name = NULL, /* put in device directory */
  7352. .attrs = iwl_sysfs_entries,
  7353. };
  7354. static struct ieee80211_ops iwl_hw_ops = {
  7355. .tx = iwl_mac_tx,
  7356. .start = iwl_mac_start,
  7357. .stop = iwl_mac_stop,
  7358. .add_interface = iwl_mac_add_interface,
  7359. .remove_interface = iwl_mac_remove_interface,
  7360. .config = iwl_mac_config,
  7361. .config_interface = iwl_mac_config_interface,
  7362. .configure_filter = iwl_configure_filter,
  7363. .set_key = iwl_mac_set_key,
  7364. .get_stats = iwl_mac_get_stats,
  7365. .get_tx_stats = iwl_mac_get_tx_stats,
  7366. .conf_tx = iwl_mac_conf_tx,
  7367. .get_tsf = iwl_mac_get_tsf,
  7368. .reset_tsf = iwl_mac_reset_tsf,
  7369. .beacon_update = iwl_mac_beacon_update,
  7370. #ifdef CONFIG_IWLWIFI_HT
  7371. .conf_ht = iwl_mac_conf_ht,
  7372. .get_ht_capab = iwl_mac_get_ht_capab,
  7373. #ifdef CONFIG_IWLWIFI_HT_AGG
  7374. .ht_tx_agg_start = iwl_mac_ht_tx_agg_start,
  7375. .ht_tx_agg_stop = iwl_mac_ht_tx_agg_stop,
  7376. .ht_rx_agg_start = iwl_mac_ht_rx_agg_start,
  7377. .ht_rx_agg_stop = iwl_mac_ht_rx_agg_stop,
  7378. #endif /* CONFIG_IWLWIFI_HT_AGG */
  7379. #endif /* CONFIG_IWLWIFI_HT */
  7380. .hw_scan = iwl_mac_hw_scan
  7381. };
  7382. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7383. {
  7384. int err = 0;
  7385. struct iwl_priv *priv;
  7386. struct ieee80211_hw *hw;
  7387. int i;
  7388. if (iwl_param_disable_hw_scan) {
  7389. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7390. iwl_hw_ops.hw_scan = NULL;
  7391. }
  7392. if ((iwl_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7393. (iwl_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7394. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7395. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7396. err = -EINVAL;
  7397. goto out;
  7398. }
  7399. /* mac80211 allocates memory for this device instance, including
  7400. * space for this driver's private structure */
  7401. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl_hw_ops);
  7402. if (hw == NULL) {
  7403. IWL_ERROR("Can not allocate network device\n");
  7404. err = -ENOMEM;
  7405. goto out;
  7406. }
  7407. SET_IEEE80211_DEV(hw, &pdev->dev);
  7408. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7409. priv = hw->priv;
  7410. priv->hw = hw;
  7411. priv->pci_dev = pdev;
  7412. priv->antenna = (enum iwl_antenna)iwl_param_antenna;
  7413. #ifdef CONFIG_IWLWIFI_DEBUG
  7414. iwl_debug_level = iwl_param_debug;
  7415. atomic_set(&priv->restrict_refcnt, 0);
  7416. #endif
  7417. priv->retry_rate = 1;
  7418. priv->ibss_beacon = NULL;
  7419. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7420. * the range of signal quality values that we'll provide.
  7421. * Negative values for level/noise indicate that we'll provide dBm.
  7422. * For WE, at least, non-0 values here *enable* display of values
  7423. * in app (iwconfig). */
  7424. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7425. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7426. hw->max_signal = 100; /* link quality indication (%) */
  7427. /* Tell mac80211 our Tx characteristics */
  7428. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7429. hw->queues = 4;
  7430. #ifdef CONFIG_IWLWIFI_HT
  7431. #ifdef CONFIG_IWLWIFI_HT_AGG
  7432. hw->queues = 16;
  7433. #endif /* CONFIG_IWLWIFI_HT_AGG */
  7434. #endif /* CONFIG_IWLWIFI_HT */
  7435. spin_lock_init(&priv->lock);
  7436. spin_lock_init(&priv->power_data.lock);
  7437. spin_lock_init(&priv->sta_lock);
  7438. spin_lock_init(&priv->hcmd_lock);
  7439. spin_lock_init(&priv->lq_mngr.lock);
  7440. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7441. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7442. INIT_LIST_HEAD(&priv->free_frames);
  7443. mutex_init(&priv->mutex);
  7444. if (pci_enable_device(pdev)) {
  7445. err = -ENODEV;
  7446. goto out_ieee80211_free_hw;
  7447. }
  7448. pci_set_master(pdev);
  7449. iwl_clear_stations_table(priv);
  7450. priv->data_retry_limit = -1;
  7451. priv->ieee_channels = NULL;
  7452. priv->ieee_rates = NULL;
  7453. priv->phymode = -1;
  7454. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7455. if (!err)
  7456. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7457. if (err) {
  7458. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7459. goto out_pci_disable_device;
  7460. }
  7461. pci_set_drvdata(pdev, priv);
  7462. err = pci_request_regions(pdev, DRV_NAME);
  7463. if (err)
  7464. goto out_pci_disable_device;
  7465. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7466. * PCI Tx retries from interfering with C3 CPU state */
  7467. pci_write_config_byte(pdev, 0x41, 0x00);
  7468. priv->hw_base = pci_iomap(pdev, 0, 0);
  7469. if (!priv->hw_base) {
  7470. err = -ENODEV;
  7471. goto out_pci_release_regions;
  7472. }
  7473. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7474. (unsigned long long) pci_resource_len(pdev, 0));
  7475. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7476. /* Initialize module parameter values here */
  7477. if (iwl_param_disable) {
  7478. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7479. IWL_DEBUG_INFO("Radio disabled.\n");
  7480. }
  7481. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7482. priv->ps_mode = 0;
  7483. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7484. priv->is_ht_enabled = 1;
  7485. priv->channel_width = IWL_CHANNEL_WIDTH_40MHZ;
  7486. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7487. priv->ps_mode = IWL_MIMO_PS_NONE;
  7488. priv->cck_power_index_compensation = iwl_read32(
  7489. priv, CSR_HW_REV_WA_REG);
  7490. iwl4965_set_rxon_chain(priv);
  7491. printk(KERN_INFO DRV_NAME
  7492. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7493. /* Device-specific setup */
  7494. if (iwl_hw_set_hw_setting(priv)) {
  7495. IWL_ERROR("failed to set hw settings\n");
  7496. mutex_unlock(&priv->mutex);
  7497. goto out_iounmap;
  7498. }
  7499. #ifdef CONFIG_IWLWIFI_QOS
  7500. if (iwl_param_qos_enable)
  7501. priv->qos_data.qos_enable = 1;
  7502. iwl_reset_qos(priv);
  7503. priv->qos_data.qos_active = 0;
  7504. priv->qos_data.qos_cap.val = 0;
  7505. #endif /* CONFIG_IWLWIFI_QOS */
  7506. iwl_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7507. iwl_setup_deferred_work(priv);
  7508. iwl_setup_rx_handlers(priv);
  7509. priv->rates_mask = IWL_RATES_MASK;
  7510. /* If power management is turned on, default to AC mode */
  7511. priv->power_mode = IWL_POWER_AC;
  7512. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7513. pci_enable_msi(pdev);
  7514. err = request_irq(pdev->irq, iwl_isr, IRQF_SHARED, DRV_NAME, priv);
  7515. if (err) {
  7516. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7517. goto out_disable_msi;
  7518. }
  7519. mutex_lock(&priv->mutex);
  7520. err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
  7521. if (err) {
  7522. IWL_ERROR("failed to create sysfs device attributes\n");
  7523. mutex_unlock(&priv->mutex);
  7524. goto out_release_irq;
  7525. }
  7526. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7527. * ucode filename and max sizes are card-specific. */
  7528. err = iwl_read_ucode(priv);
  7529. if (err) {
  7530. IWL_ERROR("Could not read microcode: %d\n", err);
  7531. mutex_unlock(&priv->mutex);
  7532. goto out_pci_alloc;
  7533. }
  7534. mutex_unlock(&priv->mutex);
  7535. IWL_DEBUG_INFO("Queing UP work.\n");
  7536. queue_work(priv->workqueue, &priv->up);
  7537. return 0;
  7538. out_pci_alloc:
  7539. iwl_dealloc_ucode_pci(priv);
  7540. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7541. out_release_irq:
  7542. free_irq(pdev->irq, priv);
  7543. out_disable_msi:
  7544. pci_disable_msi(pdev);
  7545. destroy_workqueue(priv->workqueue);
  7546. priv->workqueue = NULL;
  7547. iwl_unset_hw_setting(priv);
  7548. out_iounmap:
  7549. pci_iounmap(pdev, priv->hw_base);
  7550. out_pci_release_regions:
  7551. pci_release_regions(pdev);
  7552. out_pci_disable_device:
  7553. pci_disable_device(pdev);
  7554. pci_set_drvdata(pdev, NULL);
  7555. out_ieee80211_free_hw:
  7556. ieee80211_free_hw(priv->hw);
  7557. out:
  7558. return err;
  7559. }
  7560. static void iwl_pci_remove(struct pci_dev *pdev)
  7561. {
  7562. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7563. struct list_head *p, *q;
  7564. int i;
  7565. if (!priv)
  7566. return;
  7567. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7568. mutex_lock(&priv->mutex);
  7569. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7570. __iwl_down(priv);
  7571. mutex_unlock(&priv->mutex);
  7572. /* Free MAC hash list for ADHOC */
  7573. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7574. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7575. list_del(p);
  7576. kfree(list_entry(p, struct iwl_ibss_seq, list));
  7577. }
  7578. }
  7579. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7580. iwl_dealloc_ucode_pci(priv);
  7581. if (priv->rxq.bd)
  7582. iwl_rx_queue_free(priv, &priv->rxq);
  7583. iwl_hw_txq_ctx_free(priv);
  7584. iwl_unset_hw_setting(priv);
  7585. iwl_clear_stations_table(priv);
  7586. if (priv->mac80211_registered) {
  7587. ieee80211_unregister_hw(priv->hw);
  7588. iwl_rate_control_unregister(priv->hw);
  7589. }
  7590. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  7591. * priv->workqueue... so we can't take down the workqueue
  7592. * until now... */
  7593. destroy_workqueue(priv->workqueue);
  7594. priv->workqueue = NULL;
  7595. free_irq(pdev->irq, priv);
  7596. pci_disable_msi(pdev);
  7597. pci_iounmap(pdev, priv->hw_base);
  7598. pci_release_regions(pdev);
  7599. pci_disable_device(pdev);
  7600. pci_set_drvdata(pdev, NULL);
  7601. kfree(priv->channel_info);
  7602. kfree(priv->ieee_channels);
  7603. kfree(priv->ieee_rates);
  7604. if (priv->ibss_beacon)
  7605. dev_kfree_skb(priv->ibss_beacon);
  7606. ieee80211_free_hw(priv->hw);
  7607. }
  7608. #ifdef CONFIG_PM
  7609. static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7610. {
  7611. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7612. mutex_lock(&priv->mutex);
  7613. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7614. /* Take down the device; powers it off, etc. */
  7615. __iwl_down(priv);
  7616. if (priv->mac80211_registered)
  7617. ieee80211_stop_queues(priv->hw);
  7618. pci_save_state(pdev);
  7619. pci_disable_device(pdev);
  7620. pci_set_power_state(pdev, PCI_D3hot);
  7621. mutex_unlock(&priv->mutex);
  7622. return 0;
  7623. }
  7624. static void iwl_resume(struct iwl_priv *priv)
  7625. {
  7626. unsigned long flags;
  7627. /* The following it a temporary work around due to the
  7628. * suspend / resume not fully initializing the NIC correctly.
  7629. * Without all of the following, resume will not attempt to take
  7630. * down the NIC (it shouldn't really need to) and will just try
  7631. * and bring the NIC back up. However that fails during the
  7632. * ucode verification process. This then causes iwl_down to be
  7633. * called *after* iwl_hw_nic_init() has succeeded -- which
  7634. * then lets the next init sequence succeed. So, we've
  7635. * replicated all of that NIC init code here... */
  7636. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7637. iwl_hw_nic_init(priv);
  7638. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7639. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7640. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7641. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7642. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7643. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7644. /* tell the device to stop sending interrupts */
  7645. iwl_disable_interrupts(priv);
  7646. spin_lock_irqsave(&priv->lock, flags);
  7647. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7648. if (!iwl_grab_restricted_access(priv)) {
  7649. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  7650. APMG_CLK_VAL_DMA_CLK_RQT);
  7651. iwl_release_restricted_access(priv);
  7652. }
  7653. spin_unlock_irqrestore(&priv->lock, flags);
  7654. udelay(5);
  7655. iwl_hw_nic_reset(priv);
  7656. /* Bring the device back up */
  7657. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7658. queue_work(priv->workqueue, &priv->up);
  7659. }
  7660. static int iwl_pci_resume(struct pci_dev *pdev)
  7661. {
  7662. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7663. int err;
  7664. printk(KERN_INFO "Coming out of suspend...\n");
  7665. mutex_lock(&priv->mutex);
  7666. pci_set_power_state(pdev, PCI_D0);
  7667. err = pci_enable_device(pdev);
  7668. pci_restore_state(pdev);
  7669. /*
  7670. * Suspend/Resume resets the PCI configuration space, so we have to
  7671. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7672. * from interfering with C3 CPU state. pci_restore_state won't help
  7673. * here since it only restores the first 64 bytes pci config header.
  7674. */
  7675. pci_write_config_byte(pdev, 0x41, 0x00);
  7676. iwl_resume(priv);
  7677. mutex_unlock(&priv->mutex);
  7678. return 0;
  7679. }
  7680. #endif /* CONFIG_PM */
  7681. /*****************************************************************************
  7682. *
  7683. * driver and module entry point
  7684. *
  7685. *****************************************************************************/
  7686. static struct pci_driver iwl_driver = {
  7687. .name = DRV_NAME,
  7688. .id_table = iwl_hw_card_ids,
  7689. .probe = iwl_pci_probe,
  7690. .remove = __devexit_p(iwl_pci_remove),
  7691. #ifdef CONFIG_PM
  7692. .suspend = iwl_pci_suspend,
  7693. .resume = iwl_pci_resume,
  7694. #endif
  7695. };
  7696. static int __init iwl_init(void)
  7697. {
  7698. int ret;
  7699. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7700. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7701. ret = pci_register_driver(&iwl_driver);
  7702. if (ret) {
  7703. IWL_ERROR("Unable to initialize PCI module\n");
  7704. return ret;
  7705. }
  7706. #ifdef CONFIG_IWLWIFI_DEBUG
  7707. ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
  7708. if (ret) {
  7709. IWL_ERROR("Unable to create driver sysfs file\n");
  7710. pci_unregister_driver(&iwl_driver);
  7711. return ret;
  7712. }
  7713. #endif
  7714. return ret;
  7715. }
  7716. static void __exit iwl_exit(void)
  7717. {
  7718. #ifdef CONFIG_IWLWIFI_DEBUG
  7719. driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
  7720. #endif
  7721. pci_unregister_driver(&iwl_driver);
  7722. }
  7723. module_param_named(antenna, iwl_param_antenna, int, 0444);
  7724. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7725. module_param_named(disable, iwl_param_disable, int, 0444);
  7726. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7727. module_param_named(hwcrypto, iwl_param_hwcrypto, int, 0444);
  7728. MODULE_PARM_DESC(hwcrypto,
  7729. "using hardware crypto engine (default 0 [software])\n");
  7730. module_param_named(debug, iwl_param_debug, int, 0444);
  7731. MODULE_PARM_DESC(debug, "debug output mask");
  7732. module_param_named(disable_hw_scan, iwl_param_disable_hw_scan, int, 0444);
  7733. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7734. module_param_named(queues_num, iwl_param_queues_num, int, 0444);
  7735. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7736. /* QoS */
  7737. module_param_named(qos_enable, iwl_param_qos_enable, int, 0444);
  7738. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7739. module_exit(iwl_exit);
  7740. module_init(iwl_init);