iwl3945-base.c 239 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361636263636364636563666367636863696370637163726373637463756376637763786379638063816382638363846385638663876388638963906391639263936394639563966397639863996400640164026403640464056406640764086409641064116412641364146415641664176418641964206421642264236424642564266427642864296430643164326433643464356436643764386439644064416442644364446445644664476448644964506451645264536454645564566457645864596460646164626463646464656466646764686469647064716472647364746475647664776478647964806481648264836484648564866487648864896490649164926493649464956496649764986499650065016502650365046505650665076508650965106511651265136514651565166517651865196520652165226523652465256526652765286529653065316532653365346535653665376538653965406541654265436544654565466547654865496550655165526553655465556556655765586559656065616562656365646565656665676568656965706571657265736574657565766577657865796580658165826583658465856586658765886589659065916592659365946595659665976598659966006601660266036604660566066607660866096610661166126613661466156616661766186619662066216622662366246625662666276628662966306631663266336634663566366637663866396640664166426643664466456646664766486649665066516652665366546655665666576658665966606661666266636664666566666667666866696670667166726673667466756676667766786679668066816682668366846685668666876688668966906691669266936694669566966697669866996700670167026703670467056706670767086709671067116712671367146715671667176718671967206721672267236724672567266727672867296730673167326733673467356736673767386739674067416742674367446745674667476748674967506751675267536754675567566757675867596760676167626763676467656766676767686769677067716772677367746775677667776778677967806781678267836784678567866787678867896790679167926793679467956796679767986799680068016802680368046805680668076808680968106811681268136814681568166817681868196820682168226823682468256826682768286829683068316832683368346835683668376838683968406841684268436844684568466847684868496850685168526853685468556856685768586859686068616862686368646865686668676868686968706871687268736874687568766877687868796880688168826883688468856886688768886889689068916892689368946895689668976898689969006901690269036904690569066907690869096910691169126913691469156916691769186919692069216922692369246925692669276928692969306931693269336934693569366937693869396940694169426943694469456946694769486949695069516952695369546955695669576958695969606961696269636964696569666967696869696970697169726973697469756976697769786979698069816982698369846985698669876988698969906991699269936994699569966997699869997000700170027003700470057006700770087009701070117012701370147015701670177018701970207021702270237024702570267027702870297030703170327033703470357036703770387039704070417042704370447045704670477048704970507051705270537054705570567057705870597060706170627063706470657066706770687069707070717072707370747075707670777078707970807081708270837084708570867087708870897090709170927093709470957096709770987099710071017102710371047105710671077108710971107111711271137114711571167117711871197120712171227123712471257126712771287129713071317132713371347135713671377138713971407141714271437144714571467147714871497150715171527153715471557156715771587159716071617162716371647165716671677168716971707171717271737174717571767177717871797180718171827183718471857186718771887189719071917192719371947195719671977198719972007201720272037204720572067207720872097210721172127213721472157216721772187219722072217222722372247225722672277228722972307231723272337234723572367237723872397240724172427243724472457246724772487249725072517252725372547255725672577258725972607261726272637264726572667267726872697270727172727273727472757276727772787279728072817282728372847285728672877288728972907291729272937294729572967297729872997300730173027303730473057306730773087309731073117312731373147315731673177318731973207321732273237324732573267327732873297330733173327333733473357336733773387339734073417342734373447345734673477348734973507351735273537354735573567357735873597360736173627363736473657366736773687369737073717372737373747375737673777378737973807381738273837384738573867387738873897390739173927393739473957396739773987399740074017402740374047405740674077408740974107411741274137414741574167417741874197420742174227423742474257426742774287429743074317432743374347435743674377438743974407441744274437444744574467447744874497450745174527453745474557456745774587459746074617462746374647465746674677468746974707471747274737474747574767477747874797480748174827483748474857486748774887489749074917492749374947495749674977498749975007501750275037504750575067507750875097510751175127513751475157516751775187519752075217522752375247525752675277528752975307531753275337534753575367537753875397540754175427543754475457546754775487549755075517552755375547555755675577558755975607561756275637564756575667567756875697570757175727573757475757576757775787579758075817582758375847585758675877588758975907591759275937594759575967597759875997600760176027603760476057606760776087609761076117612761376147615761676177618761976207621762276237624762576267627762876297630763176327633763476357636763776387639764076417642764376447645764676477648764976507651765276537654765576567657765876597660766176627663766476657666766776687669767076717672767376747675767676777678767976807681768276837684768576867687768876897690769176927693769476957696769776987699770077017702770377047705770677077708770977107711771277137714771577167717771877197720772177227723772477257726772777287729773077317732773377347735773677377738773977407741774277437744774577467747774877497750775177527753775477557756775777587759776077617762776377647765776677677768776977707771777277737774777577767777777877797780778177827783778477857786778777887789779077917792779377947795779677977798779978007801780278037804780578067807780878097810781178127813781478157816781778187819782078217822782378247825782678277828782978307831783278337834783578367837783878397840784178427843784478457846784778487849785078517852785378547855785678577858785978607861786278637864786578667867786878697870787178727873787478757876787778787879788078817882788378847885788678877888788978907891789278937894789578967897789878997900790179027903790479057906790779087909791079117912791379147915791679177918791979207921792279237924792579267927792879297930793179327933793479357936793779387939794079417942794379447945794679477948794979507951795279537954795579567957795879597960796179627963796479657966796779687969797079717972797379747975797679777978797979807981798279837984798579867987798879897990799179927993799479957996799779987999800080018002800380048005800680078008800980108011801280138014801580168017801880198020802180228023802480258026802780288029803080318032803380348035803680378038803980408041804280438044804580468047804880498050805180528053805480558056805780588059806080618062806380648065806680678068806980708071807280738074807580768077807880798080808180828083808480858086808780888089809080918092809380948095809680978098809981008101810281038104810581068107810881098110811181128113811481158116811781188119812081218122812381248125812681278128812981308131813281338134813581368137813881398140814181428143814481458146814781488149815081518152815381548155815681578158815981608161816281638164816581668167816881698170817181728173817481758176817781788179818081818182818381848185818681878188818981908191819281938194819581968197819881998200820182028203820482058206820782088209821082118212821382148215821682178218821982208221822282238224822582268227822882298230823182328233823482358236823782388239824082418242824382448245824682478248824982508251825282538254825582568257825882598260826182628263826482658266826782688269827082718272827382748275827682778278827982808281828282838284828582868287828882898290829182928293829482958296829782988299830083018302830383048305830683078308830983108311831283138314831583168317831883198320832183228323832483258326832783288329833083318332833383348335833683378338833983408341834283438344834583468347834883498350835183528353835483558356835783588359836083618362836383648365836683678368836983708371837283738374837583768377837883798380838183828383838483858386838783888389839083918392839383948395839683978398839984008401840284038404840584068407840884098410841184128413841484158416841784188419842084218422842384248425842684278428842984308431843284338434843584368437843884398440844184428443844484458446844784488449845084518452845384548455845684578458845984608461846284638464846584668467846884698470847184728473847484758476847784788479848084818482848384848485848684878488848984908491849284938494849584968497849884998500850185028503850485058506850785088509851085118512851385148515851685178518851985208521852285238524852585268527852885298530853185328533853485358536853785388539854085418542854385448545854685478548854985508551855285538554855585568557855885598560856185628563856485658566856785688569857085718572857385748575857685778578857985808581858285838584858585868587858885898590859185928593859485958596859785988599860086018602860386048605860686078608860986108611861286138614861586168617861886198620862186228623862486258626862786288629863086318632863386348635863686378638863986408641864286438644864586468647864886498650865186528653865486558656865786588659866086618662866386648665866686678668866986708671867286738674867586768677867886798680868186828683868486858686868786888689869086918692869386948695869686978698869987008701870287038704870587068707870887098710871187128713871487158716871787188719872087218722872387248725872687278728872987308731873287338734873587368737873887398740874187428743874487458746
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. /*
  30. * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets
  31. * by defining IWL to either 3945 or 4965. The Makefile used when building
  32. * the base targets will create base-3945.o and base-4965.o
  33. *
  34. * The eventual goal is to move as many of the #if IWL / #endif blocks out of
  35. * this file and into the hardware specific implementation files (iwl-XXXX.c)
  36. * and leave only the common (non #ifdef sprinkled) code in this file
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/module.h>
  40. #include <linux/version.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/delay.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/wireless.h>
  48. #include <linux/firmware.h>
  49. #include <linux/skbuff.h>
  50. #include <linux/netdevice.h>
  51. #include <linux/etherdevice.h>
  52. #include <linux/if_arp.h>
  53. #include <net/ieee80211_radiotap.h>
  54. #include <net/mac80211.h>
  55. #include <asm/div64.h>
  56. #define IWL 3945
  57. #include "iwlwifi.h"
  58. #include "iwl-3945.h"
  59. #include "iwl-helpers.h"
  60. #ifdef CONFIG_IWLWIFI_DEBUG
  61. u32 iwl_debug_level;
  62. #endif
  63. /******************************************************************************
  64. *
  65. * module boiler plate
  66. *
  67. ******************************************************************************/
  68. /* module parameters */
  69. int iwl_param_disable_hw_scan;
  70. int iwl_param_debug;
  71. int iwl_param_disable; /* def: enable radio */
  72. int iwl_param_antenna; /* def: 0 = both antennas (use diversity) */
  73. int iwl_param_hwcrypto; /* def: using software encryption */
  74. int iwl_param_qos_enable = 1;
  75. int iwl_param_queues_num = IWL_MAX_NUM_QUEUES;
  76. /*
  77. * module name, copyright, version, etc.
  78. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  79. */
  80. #define DRV_DESCRIPTION \
  81. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  82. #ifdef CONFIG_IWLWIFI_DEBUG
  83. #define VD "d"
  84. #else
  85. #define VD
  86. #endif
  87. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  88. #define VS "s"
  89. #else
  90. #define VS
  91. #endif
  92. #define IWLWIFI_VERSION "1.1.17k" VD VS
  93. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  94. #define DRV_VERSION IWLWIFI_VERSION
  95. /* Change firmware file name, using "-" and incrementing number,
  96. * *only* when uCode interface or architecture changes so that it
  97. * is not compatible with earlier drivers.
  98. * This number will also appear in << 8 position of 1st dword of uCode file */
  99. #define IWL3945_UCODE_API "-1"
  100. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  101. MODULE_VERSION(DRV_VERSION);
  102. MODULE_AUTHOR(DRV_COPYRIGHT);
  103. MODULE_LICENSE("GPL");
  104. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  105. {
  106. u16 fc = le16_to_cpu(hdr->frame_control);
  107. int hdr_len = ieee80211_get_hdrlen(fc);
  108. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  109. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  110. return NULL;
  111. }
  112. static const struct ieee80211_hw_mode *iwl_get_hw_mode(
  113. struct iwl_priv *priv, int mode)
  114. {
  115. int i;
  116. for (i = 0; i < 3; i++)
  117. if (priv->modes[i].mode == mode)
  118. return &priv->modes[i];
  119. return NULL;
  120. }
  121. static int iwl_is_empty_essid(const char *essid, int essid_len)
  122. {
  123. /* Single white space is for Linksys APs */
  124. if (essid_len == 1 && essid[0] == ' ')
  125. return 1;
  126. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  127. while (essid_len) {
  128. essid_len--;
  129. if (essid[essid_len] != '\0')
  130. return 0;
  131. }
  132. return 1;
  133. }
  134. static const char *iwl_escape_essid(const char *essid, u8 essid_len)
  135. {
  136. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  137. const char *s = essid;
  138. char *d = escaped;
  139. if (iwl_is_empty_essid(essid, essid_len)) {
  140. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  141. return escaped;
  142. }
  143. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  144. while (essid_len--) {
  145. if (*s == '\0') {
  146. *d++ = '\\';
  147. *d++ = '0';
  148. s++;
  149. } else
  150. *d++ = *s++;
  151. }
  152. *d = '\0';
  153. return escaped;
  154. }
  155. static void iwl_print_hex_dump(int level, void *p, u32 len)
  156. {
  157. #ifdef CONFIG_IWLWIFI_DEBUG
  158. if (!(iwl_debug_level & level))
  159. return;
  160. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  161. p, len, 1);
  162. #endif
  163. }
  164. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  165. * DMA services
  166. *
  167. * Theory of operation
  168. *
  169. * A queue is a circular buffers with 'Read' and 'Write' pointers.
  170. * 2 empty entries always kept in the buffer to protect from overflow.
  171. *
  172. * For Tx queue, there are low mark and high mark limits. If, after queuing
  173. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  174. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  175. * Tx queue resumed.
  176. *
  177. * The IWL operates with six queues, one receive queue in the device's
  178. * sram, one transmit queue for sending commands to the device firmware,
  179. * and four transmit queues for data.
  180. ***************************************************/
  181. static int iwl_queue_space(const struct iwl_queue *q)
  182. {
  183. int s = q->last_used - q->first_empty;
  184. if (q->last_used > q->first_empty)
  185. s -= q->n_bd;
  186. if (s <= 0)
  187. s += q->n_window;
  188. /* keep some reserve to not confuse empty and full situations */
  189. s -= 2;
  190. if (s < 0)
  191. s = 0;
  192. return s;
  193. }
  194. /* XXX: n_bd must be power-of-two size */
  195. static inline int iwl_queue_inc_wrap(int index, int n_bd)
  196. {
  197. return ++index & (n_bd - 1);
  198. }
  199. /* XXX: n_bd must be power-of-two size */
  200. static inline int iwl_queue_dec_wrap(int index, int n_bd)
  201. {
  202. return --index & (n_bd - 1);
  203. }
  204. static inline int x2_queue_used(const struct iwl_queue *q, int i)
  205. {
  206. return q->first_empty > q->last_used ?
  207. (i >= q->last_used && i < q->first_empty) :
  208. !(i < q->last_used && i >= q->first_empty);
  209. }
  210. static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
  211. {
  212. if (is_huge)
  213. return q->n_window;
  214. return index & (q->n_window - 1);
  215. }
  216. static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  217. int count, int slots_num, u32 id)
  218. {
  219. q->n_bd = count;
  220. q->n_window = slots_num;
  221. q->id = id;
  222. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  223. * and iwl_queue_dec_wrap are broken. */
  224. BUG_ON(!is_power_of_2(count));
  225. /* slots_num must be power-of-two size, otherwise
  226. * get_cmd_index is broken. */
  227. BUG_ON(!is_power_of_2(slots_num));
  228. q->low_mark = q->n_window / 4;
  229. if (q->low_mark < 4)
  230. q->low_mark = 4;
  231. q->high_mark = q->n_window / 8;
  232. if (q->high_mark < 2)
  233. q->high_mark = 2;
  234. q->first_empty = q->last_used = 0;
  235. return 0;
  236. }
  237. static int iwl_tx_queue_alloc(struct iwl_priv *priv,
  238. struct iwl_tx_queue *txq, u32 id)
  239. {
  240. struct pci_dev *dev = priv->pci_dev;
  241. if (id != IWL_CMD_QUEUE_NUM) {
  242. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  243. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  244. if (!txq->txb) {
  245. IWL_ERROR("kmalloc for auxilary BD "
  246. "structures failed\n");
  247. goto error;
  248. }
  249. } else
  250. txq->txb = NULL;
  251. txq->bd = pci_alloc_consistent(dev,
  252. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  253. &txq->q.dma_addr);
  254. if (!txq->bd) {
  255. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  256. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  257. goto error;
  258. }
  259. txq->q.id = id;
  260. return 0;
  261. error:
  262. if (txq->txb) {
  263. kfree(txq->txb);
  264. txq->txb = NULL;
  265. }
  266. return -ENOMEM;
  267. }
  268. int iwl_tx_queue_init(struct iwl_priv *priv,
  269. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  270. {
  271. struct pci_dev *dev = priv->pci_dev;
  272. int len;
  273. int rc = 0;
  274. /* alocate command space + one big command for scan since scan
  275. * command is very huge the system will not have two scan at the
  276. * same time */
  277. len = sizeof(struct iwl_cmd) * slots_num;
  278. if (txq_id == IWL_CMD_QUEUE_NUM)
  279. len += IWL_MAX_SCAN_SIZE;
  280. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  281. if (!txq->cmd)
  282. return -ENOMEM;
  283. rc = iwl_tx_queue_alloc(priv, txq, txq_id);
  284. if (rc) {
  285. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  286. return -ENOMEM;
  287. }
  288. txq->need_update = 0;
  289. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  290. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  291. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  292. iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  293. iwl_hw_tx_queue_init(priv, txq);
  294. return 0;
  295. }
  296. /**
  297. * iwl_tx_queue_free - Deallocate DMA queue.
  298. * @txq: Transmit queue to deallocate.
  299. *
  300. * Empty queue by removing and destroying all BD's.
  301. * Free all buffers. txq itself is not freed.
  302. *
  303. */
  304. void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  305. {
  306. struct iwl_queue *q = &txq->q;
  307. struct pci_dev *dev = priv->pci_dev;
  308. int len;
  309. if (q->n_bd == 0)
  310. return;
  311. /* first, empty all BD's */
  312. for (; q->first_empty != q->last_used;
  313. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd))
  314. iwl_hw_txq_free_tfd(priv, txq);
  315. len = sizeof(struct iwl_cmd) * q->n_window;
  316. if (q->id == IWL_CMD_QUEUE_NUM)
  317. len += IWL_MAX_SCAN_SIZE;
  318. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  319. /* free buffers belonging to queue itself */
  320. if (txq->q.n_bd)
  321. pci_free_consistent(dev, sizeof(struct iwl_tfd_frame) *
  322. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  323. if (txq->txb) {
  324. kfree(txq->txb);
  325. txq->txb = NULL;
  326. }
  327. /* 0 fill whole structure */
  328. memset(txq, 0, sizeof(*txq));
  329. }
  330. const u8 BROADCAST_ADDR[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  331. /*************** STATION TABLE MANAGEMENT ****
  332. *
  333. * NOTE: This needs to be overhauled to better synchronize between
  334. * how the iwl-4965.c is using iwl_hw_find_station vs. iwl-3945.c
  335. *
  336. * mac80211 should also be examined to determine if sta_info is duplicating
  337. * the functionality provided here
  338. */
  339. /**************************************************************/
  340. #if 0 /* temparary disable till we add real remove station */
  341. static u8 iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  342. {
  343. int index = IWL_INVALID_STATION;
  344. int i;
  345. unsigned long flags;
  346. spin_lock_irqsave(&priv->sta_lock, flags);
  347. if (is_ap)
  348. index = IWL_AP_ID;
  349. else if (is_broadcast_ether_addr(addr))
  350. index = priv->hw_setting.bcast_sta_id;
  351. else
  352. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  353. if (priv->stations[i].used &&
  354. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  355. addr)) {
  356. index = i;
  357. break;
  358. }
  359. if (unlikely(index == IWL_INVALID_STATION))
  360. goto out;
  361. if (priv->stations[index].used) {
  362. priv->stations[index].used = 0;
  363. priv->num_stations--;
  364. }
  365. BUG_ON(priv->num_stations < 0);
  366. out:
  367. spin_unlock_irqrestore(&priv->sta_lock, flags);
  368. return 0;
  369. }
  370. #endif
  371. static void iwl_clear_stations_table(struct iwl_priv *priv)
  372. {
  373. unsigned long flags;
  374. spin_lock_irqsave(&priv->sta_lock, flags);
  375. priv->num_stations = 0;
  376. memset(priv->stations, 0, sizeof(priv->stations));
  377. spin_unlock_irqrestore(&priv->sta_lock, flags);
  378. }
  379. u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  380. {
  381. int i;
  382. int index = IWL_INVALID_STATION;
  383. struct iwl_station_entry *station;
  384. unsigned long flags_spin;
  385. DECLARE_MAC_BUF(mac);
  386. u8 rate;
  387. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  388. if (is_ap)
  389. index = IWL_AP_ID;
  390. else if (is_broadcast_ether_addr(addr))
  391. index = priv->hw_setting.bcast_sta_id;
  392. else
  393. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  394. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  395. addr)) {
  396. index = i;
  397. break;
  398. }
  399. if (!priv->stations[i].used &&
  400. index == IWL_INVALID_STATION)
  401. index = i;
  402. }
  403. /* These twh conditions has the same outcome but keep them separate
  404. since they have different meaning */
  405. if (unlikely(index == IWL_INVALID_STATION)) {
  406. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  407. return index;
  408. }
  409. if (priv->stations[index].used &&
  410. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  411. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  412. return index;
  413. }
  414. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  415. station = &priv->stations[index];
  416. station->used = 1;
  417. priv->num_stations++;
  418. memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd));
  419. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  420. station->sta.mode = 0;
  421. station->sta.sta.sta_id = index;
  422. station->sta.station_flags = 0;
  423. rate = (priv->phymode == MODE_IEEE80211A) ? IWL_RATE_6M_PLCP :
  424. IWL_RATE_1M_PLCP | priv->hw_setting.cck_flag;
  425. /* Turn on both antennas for the station... */
  426. station->sta.rate_n_flags =
  427. iwl_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  428. station->current_rate.rate_n_flags =
  429. le16_to_cpu(station->sta.rate_n_flags);
  430. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  431. iwl_send_add_station(priv, &station->sta, flags);
  432. return index;
  433. }
  434. /*************** DRIVER STATUS FUNCTIONS *****/
  435. static inline int iwl_is_ready(struct iwl_priv *priv)
  436. {
  437. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  438. * set but EXIT_PENDING is not */
  439. return test_bit(STATUS_READY, &priv->status) &&
  440. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  441. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  442. }
  443. static inline int iwl_is_alive(struct iwl_priv *priv)
  444. {
  445. return test_bit(STATUS_ALIVE, &priv->status);
  446. }
  447. static inline int iwl_is_init(struct iwl_priv *priv)
  448. {
  449. return test_bit(STATUS_INIT, &priv->status);
  450. }
  451. static inline int iwl_is_rfkill(struct iwl_priv *priv)
  452. {
  453. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  454. test_bit(STATUS_RF_KILL_SW, &priv->status);
  455. }
  456. static inline int iwl_is_ready_rf(struct iwl_priv *priv)
  457. {
  458. if (iwl_is_rfkill(priv))
  459. return 0;
  460. return iwl_is_ready(priv);
  461. }
  462. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  463. #define IWL_CMD(x) case x : return #x
  464. static const char *get_cmd_string(u8 cmd)
  465. {
  466. switch (cmd) {
  467. IWL_CMD(REPLY_ALIVE);
  468. IWL_CMD(REPLY_ERROR);
  469. IWL_CMD(REPLY_RXON);
  470. IWL_CMD(REPLY_RXON_ASSOC);
  471. IWL_CMD(REPLY_QOS_PARAM);
  472. IWL_CMD(REPLY_RXON_TIMING);
  473. IWL_CMD(REPLY_ADD_STA);
  474. IWL_CMD(REPLY_REMOVE_STA);
  475. IWL_CMD(REPLY_REMOVE_ALL_STA);
  476. IWL_CMD(REPLY_3945_RX);
  477. IWL_CMD(REPLY_TX);
  478. IWL_CMD(REPLY_RATE_SCALE);
  479. IWL_CMD(REPLY_LEDS_CMD);
  480. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  481. IWL_CMD(RADAR_NOTIFICATION);
  482. IWL_CMD(REPLY_QUIET_CMD);
  483. IWL_CMD(REPLY_CHANNEL_SWITCH);
  484. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  485. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  486. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  487. IWL_CMD(POWER_TABLE_CMD);
  488. IWL_CMD(PM_SLEEP_NOTIFICATION);
  489. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  490. IWL_CMD(REPLY_SCAN_CMD);
  491. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  492. IWL_CMD(SCAN_START_NOTIFICATION);
  493. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  494. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  495. IWL_CMD(BEACON_NOTIFICATION);
  496. IWL_CMD(REPLY_TX_BEACON);
  497. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  498. IWL_CMD(QUIET_NOTIFICATION);
  499. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  500. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  501. IWL_CMD(REPLY_BT_CONFIG);
  502. IWL_CMD(REPLY_STATISTICS_CMD);
  503. IWL_CMD(STATISTICS_NOTIFICATION);
  504. IWL_CMD(REPLY_CARD_STATE_CMD);
  505. IWL_CMD(CARD_STATE_NOTIFICATION);
  506. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  507. default:
  508. return "UNKNOWN";
  509. }
  510. }
  511. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  512. /**
  513. * iwl_enqueue_hcmd - enqueue a uCode command
  514. * @priv: device private data point
  515. * @cmd: a point to the ucode command structure
  516. *
  517. * The function returns < 0 values to indicate the operation is
  518. * failed. On success, it turns the index (> 0) of command in the
  519. * command queue.
  520. */
  521. static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  522. {
  523. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  524. struct iwl_queue *q = &txq->q;
  525. struct iwl_tfd_frame *tfd;
  526. u32 *control_flags;
  527. struct iwl_cmd *out_cmd;
  528. u32 idx;
  529. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  530. dma_addr_t phys_addr;
  531. int pad;
  532. u16 count;
  533. int ret;
  534. unsigned long flags;
  535. /* If any of the command structures end up being larger than
  536. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  537. * we will need to increase the size of the TFD entries */
  538. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  539. !(cmd->meta.flags & CMD_SIZE_HUGE));
  540. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  541. IWL_ERROR("No space for Tx\n");
  542. return -ENOSPC;
  543. }
  544. spin_lock_irqsave(&priv->hcmd_lock, flags);
  545. tfd = &txq->bd[q->first_empty];
  546. memset(tfd, 0, sizeof(*tfd));
  547. control_flags = (u32 *) tfd;
  548. idx = get_cmd_index(q, q->first_empty, cmd->meta.flags & CMD_SIZE_HUGE);
  549. out_cmd = &txq->cmd[idx];
  550. out_cmd->hdr.cmd = cmd->id;
  551. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  552. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  553. /* At this point, the out_cmd now has all of the incoming cmd
  554. * information */
  555. out_cmd->hdr.flags = 0;
  556. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  557. INDEX_TO_SEQ(q->first_empty));
  558. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  559. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  560. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  561. offsetof(struct iwl_cmd, hdr);
  562. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  563. pad = U32_PAD(cmd->len);
  564. count = TFD_CTL_COUNT_GET(*control_flags);
  565. *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
  566. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  567. "%d bytes at %d[%d]:%d\n",
  568. get_cmd_string(out_cmd->hdr.cmd),
  569. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  570. fix_size, q->first_empty, idx, IWL_CMD_QUEUE_NUM);
  571. txq->need_update = 1;
  572. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  573. ret = iwl_tx_queue_update_write_ptr(priv, txq);
  574. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  575. return ret ? ret : idx;
  576. }
  577. int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  578. {
  579. int ret;
  580. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  581. /* An asynchronous command can not expect an SKB to be set. */
  582. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  583. /* An asynchronous command MUST have a callback. */
  584. BUG_ON(!cmd->meta.u.callback);
  585. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  586. return -EBUSY;
  587. ret = iwl_enqueue_hcmd(priv, cmd);
  588. if (ret < 0) {
  589. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  590. get_cmd_string(cmd->id), ret);
  591. return ret;
  592. }
  593. return 0;
  594. }
  595. int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  596. {
  597. int cmd_idx;
  598. int ret;
  599. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  600. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  601. /* A synchronous command can not have a callback set. */
  602. BUG_ON(cmd->meta.u.callback != NULL);
  603. if (atomic_xchg(&entry, 1)) {
  604. IWL_ERROR("Error sending %s: Already sending a host command\n",
  605. get_cmd_string(cmd->id));
  606. return -EBUSY;
  607. }
  608. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  609. if (cmd->meta.flags & CMD_WANT_SKB)
  610. cmd->meta.source = &cmd->meta;
  611. cmd_idx = iwl_enqueue_hcmd(priv, cmd);
  612. if (cmd_idx < 0) {
  613. ret = cmd_idx;
  614. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  615. get_cmd_string(cmd->id), ret);
  616. goto out;
  617. }
  618. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  619. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  620. HOST_COMPLETE_TIMEOUT);
  621. if (!ret) {
  622. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  623. IWL_ERROR("Error sending %s: time out after %dms.\n",
  624. get_cmd_string(cmd->id),
  625. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  626. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  627. ret = -ETIMEDOUT;
  628. goto cancel;
  629. }
  630. }
  631. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  632. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  633. get_cmd_string(cmd->id));
  634. ret = -ECANCELED;
  635. goto fail;
  636. }
  637. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  638. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  639. get_cmd_string(cmd->id));
  640. ret = -EIO;
  641. goto fail;
  642. }
  643. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  644. IWL_ERROR("Error: Response NULL in '%s'\n",
  645. get_cmd_string(cmd->id));
  646. ret = -EIO;
  647. goto out;
  648. }
  649. ret = 0;
  650. goto out;
  651. cancel:
  652. if (cmd->meta.flags & CMD_WANT_SKB) {
  653. struct iwl_cmd *qcmd;
  654. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  655. * TX cmd queue. Otherwise in case the cmd comes
  656. * in later, it will possibly set an invalid
  657. * address (cmd->meta.source). */
  658. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  659. qcmd->meta.flags &= ~CMD_WANT_SKB;
  660. }
  661. fail:
  662. if (cmd->meta.u.skb) {
  663. dev_kfree_skb_any(cmd->meta.u.skb);
  664. cmd->meta.u.skb = NULL;
  665. }
  666. out:
  667. atomic_set(&entry, 0);
  668. return ret;
  669. }
  670. int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  671. {
  672. /* A command can not be asynchronous AND expect an SKB to be set. */
  673. BUG_ON((cmd->meta.flags & CMD_ASYNC) &&
  674. (cmd->meta.flags & CMD_WANT_SKB));
  675. if (cmd->meta.flags & CMD_ASYNC)
  676. return iwl_send_cmd_async(priv, cmd);
  677. return iwl_send_cmd_sync(priv, cmd);
  678. }
  679. int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  680. {
  681. struct iwl_host_cmd cmd = {
  682. .id = id,
  683. .len = len,
  684. .data = data,
  685. };
  686. return iwl_send_cmd_sync(priv, &cmd);
  687. }
  688. static int __must_check iwl_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  689. {
  690. struct iwl_host_cmd cmd = {
  691. .id = id,
  692. .len = sizeof(val),
  693. .data = &val,
  694. };
  695. return iwl_send_cmd_sync(priv, &cmd);
  696. }
  697. int iwl_send_statistics_request(struct iwl_priv *priv)
  698. {
  699. return iwl_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  700. }
  701. /**
  702. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  703. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  704. * @channel: Any channel valid for the requested phymode
  705. * In addition to setting the staging RXON, priv->phymode is also set.
  706. *
  707. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  708. * in the staging RXON flag structure based on the phymode
  709. */
  710. static int iwl_set_rxon_channel(struct iwl_priv *priv, u8 phymode, u16 channel)
  711. {
  712. if (!iwl_get_channel_info(priv, phymode, channel)) {
  713. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  714. channel, phymode);
  715. return -EINVAL;
  716. }
  717. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  718. (priv->phymode == phymode))
  719. return 0;
  720. priv->staging_rxon.channel = cpu_to_le16(channel);
  721. if (phymode == MODE_IEEE80211A)
  722. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  723. else
  724. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  725. priv->phymode = phymode;
  726. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  727. return 0;
  728. }
  729. /**
  730. * iwl_check_rxon_cmd - validate RXON structure is valid
  731. *
  732. * NOTE: This is really only useful during development and can eventually
  733. * be #ifdef'd out once the driver is stable and folks aren't actively
  734. * making changes
  735. */
  736. static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
  737. {
  738. int error = 0;
  739. int counter = 1;
  740. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  741. error |= le32_to_cpu(rxon->flags &
  742. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  743. RXON_FLG_RADAR_DETECT_MSK));
  744. if (error)
  745. IWL_WARNING("check 24G fields %d | %d\n",
  746. counter++, error);
  747. } else {
  748. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  749. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  750. if (error)
  751. IWL_WARNING("check 52 fields %d | %d\n",
  752. counter++, error);
  753. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  754. if (error)
  755. IWL_WARNING("check 52 CCK %d | %d\n",
  756. counter++, error);
  757. }
  758. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  759. if (error)
  760. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  761. /* make sure basic rates 6Mbps and 1Mbps are supported */
  762. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  763. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  764. if (error)
  765. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  766. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  767. if (error)
  768. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  769. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  770. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  771. if (error)
  772. IWL_WARNING("check CCK and short slot %d | %d\n",
  773. counter++, error);
  774. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  775. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  776. if (error)
  777. IWL_WARNING("check CCK & auto detect %d | %d\n",
  778. counter++, error);
  779. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  780. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  781. if (error)
  782. IWL_WARNING("check TGG and auto detect %d | %d\n",
  783. counter++, error);
  784. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  785. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  786. RXON_FLG_ANT_A_MSK)) == 0);
  787. if (error)
  788. IWL_WARNING("check antenna %d %d\n", counter++, error);
  789. if (error)
  790. IWL_WARNING("Tuning to channel %d\n",
  791. le16_to_cpu(rxon->channel));
  792. if (error) {
  793. IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
  794. return -1;
  795. }
  796. return 0;
  797. }
  798. /**
  799. * iwl_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
  800. * @priv: staging_rxon is comapred to active_rxon
  801. *
  802. * If the RXON structure is changing sufficient to require a new
  803. * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
  804. * to indicate a new tune is required.
  805. */
  806. static int iwl_full_rxon_required(struct iwl_priv *priv)
  807. {
  808. /* These items are only settable from the full RXON command */
  809. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  810. compare_ether_addr(priv->staging_rxon.bssid_addr,
  811. priv->active_rxon.bssid_addr) ||
  812. compare_ether_addr(priv->staging_rxon.node_addr,
  813. priv->active_rxon.node_addr) ||
  814. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  815. priv->active_rxon.wlap_bssid_addr) ||
  816. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  817. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  818. (priv->staging_rxon.air_propagation !=
  819. priv->active_rxon.air_propagation) ||
  820. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  821. return 1;
  822. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  823. * be updated with the RXON_ASSOC command -- however only some
  824. * flag transitions are allowed using RXON_ASSOC */
  825. /* Check if we are not switching bands */
  826. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  827. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  828. return 1;
  829. /* Check if we are switching association toggle */
  830. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  831. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  832. return 1;
  833. return 0;
  834. }
  835. static int iwl_send_rxon_assoc(struct iwl_priv *priv)
  836. {
  837. int rc = 0;
  838. struct iwl_rx_packet *res = NULL;
  839. struct iwl_rxon_assoc_cmd rxon_assoc;
  840. struct iwl_host_cmd cmd = {
  841. .id = REPLY_RXON_ASSOC,
  842. .len = sizeof(rxon_assoc),
  843. .meta.flags = CMD_WANT_SKB,
  844. .data = &rxon_assoc,
  845. };
  846. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  847. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  848. if ((rxon1->flags == rxon2->flags) &&
  849. (rxon1->filter_flags == rxon2->filter_flags) &&
  850. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  851. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  852. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  853. return 0;
  854. }
  855. rxon_assoc.flags = priv->staging_rxon.flags;
  856. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  857. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  858. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  859. rxon_assoc.reserved = 0;
  860. rc = iwl_send_cmd_sync(priv, &cmd);
  861. if (rc)
  862. return rc;
  863. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  864. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  865. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  866. rc = -EIO;
  867. }
  868. priv->alloc_rxb_skb--;
  869. dev_kfree_skb_any(cmd.meta.u.skb);
  870. return rc;
  871. }
  872. /**
  873. * iwl_commit_rxon - commit staging_rxon to hardware
  874. *
  875. * The RXON command in staging_rxon is commited to the hardware and
  876. * the active_rxon structure is updated with the new data. This
  877. * function correctly transitions out of the RXON_ASSOC_MSK state if
  878. * a HW tune is required based on the RXON structure changes.
  879. */
  880. static int iwl_commit_rxon(struct iwl_priv *priv)
  881. {
  882. /* cast away the const for active_rxon in this function */
  883. struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  884. int rc = 0;
  885. DECLARE_MAC_BUF(mac);
  886. if (!iwl_is_alive(priv))
  887. return -1;
  888. /* always get timestamp with Rx frame */
  889. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  890. /* select antenna */
  891. priv->staging_rxon.flags &=
  892. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  893. priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
  894. rc = iwl_check_rxon_cmd(&priv->staging_rxon);
  895. if (rc) {
  896. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  897. return -EINVAL;
  898. }
  899. /* If we don't need to send a full RXON, we can use
  900. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  901. * and other flags for the current radio configuration. */
  902. if (!iwl_full_rxon_required(priv)) {
  903. rc = iwl_send_rxon_assoc(priv);
  904. if (rc) {
  905. IWL_ERROR("Error setting RXON_ASSOC "
  906. "configuration (%d).\n", rc);
  907. return rc;
  908. }
  909. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  910. return 0;
  911. }
  912. /* If we are currently associated and the new config requires
  913. * an RXON_ASSOC and the new config wants the associated mask enabled,
  914. * we must clear the associated from the active configuration
  915. * before we apply the new config */
  916. if (iwl_is_associated(priv) &&
  917. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  918. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  919. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  920. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  921. sizeof(struct iwl_rxon_cmd),
  922. &priv->active_rxon);
  923. /* If the mask clearing failed then we set
  924. * active_rxon back to what it was previously */
  925. if (rc) {
  926. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  927. IWL_ERROR("Error clearing ASSOC_MSK on current "
  928. "configuration (%d).\n", rc);
  929. return rc;
  930. }
  931. }
  932. IWL_DEBUG_INFO("Sending RXON\n"
  933. "* with%s RXON_FILTER_ASSOC_MSK\n"
  934. "* channel = %d\n"
  935. "* bssid = %s\n",
  936. ((priv->staging_rxon.filter_flags &
  937. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  938. le16_to_cpu(priv->staging_rxon.channel),
  939. print_mac(mac, priv->staging_rxon.bssid_addr));
  940. /* Apply the new configuration */
  941. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  942. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  943. if (rc) {
  944. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  945. return rc;
  946. }
  947. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  948. iwl_clear_stations_table(priv);
  949. /* If we issue a new RXON command which required a tune then we must
  950. * send a new TXPOWER command or we won't be able to Tx any frames */
  951. rc = iwl_hw_reg_send_txpower(priv);
  952. if (rc) {
  953. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  954. return rc;
  955. }
  956. /* Add the broadcast address so we can send broadcast frames */
  957. if (iwl_add_station(priv, BROADCAST_ADDR, 0, 0) ==
  958. IWL_INVALID_STATION) {
  959. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  960. return -EIO;
  961. }
  962. /* If we have set the ASSOC_MSK and we are in BSS mode then
  963. * add the IWL_AP_ID to the station rate table */
  964. if (iwl_is_associated(priv) &&
  965. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  966. if (iwl_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
  967. == IWL_INVALID_STATION) {
  968. IWL_ERROR("Error adding AP address for transmit.\n");
  969. return -EIO;
  970. }
  971. /* Init the hardware's rate fallback order based on the
  972. * phymode */
  973. rc = iwl3945_init_hw_rate_table(priv);
  974. if (rc) {
  975. IWL_ERROR("Error setting HW rate table: %02X\n", rc);
  976. return -EIO;
  977. }
  978. return 0;
  979. }
  980. static int iwl_send_bt_config(struct iwl_priv *priv)
  981. {
  982. struct iwl_bt_cmd bt_cmd = {
  983. .flags = 3,
  984. .lead_time = 0xAA,
  985. .max_kill = 1,
  986. .kill_ack_mask = 0,
  987. .kill_cts_mask = 0,
  988. };
  989. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  990. sizeof(struct iwl_bt_cmd), &bt_cmd);
  991. }
  992. static int iwl_send_scan_abort(struct iwl_priv *priv)
  993. {
  994. int rc = 0;
  995. struct iwl_rx_packet *res;
  996. struct iwl_host_cmd cmd = {
  997. .id = REPLY_SCAN_ABORT_CMD,
  998. .meta.flags = CMD_WANT_SKB,
  999. };
  1000. /* If there isn't a scan actively going on in the hardware
  1001. * then we are in between scan bands and not actually
  1002. * actively scanning, so don't send the abort command */
  1003. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1004. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1005. return 0;
  1006. }
  1007. rc = iwl_send_cmd_sync(priv, &cmd);
  1008. if (rc) {
  1009. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1010. return rc;
  1011. }
  1012. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1013. if (res->u.status != CAN_ABORT_STATUS) {
  1014. /* The scan abort will return 1 for success or
  1015. * 2 for "failure". A failure condition can be
  1016. * due to simply not being in an active scan which
  1017. * can occur if we send the scan abort before we
  1018. * the microcode has notified us that a scan is
  1019. * completed. */
  1020. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1021. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1022. clear_bit(STATUS_SCAN_HW, &priv->status);
  1023. }
  1024. dev_kfree_skb_any(cmd.meta.u.skb);
  1025. return rc;
  1026. }
  1027. static int iwl_card_state_sync_callback(struct iwl_priv *priv,
  1028. struct iwl_cmd *cmd,
  1029. struct sk_buff *skb)
  1030. {
  1031. return 1;
  1032. }
  1033. /*
  1034. * CARD_STATE_CMD
  1035. *
  1036. * Use: Sets the internal card state to enable, disable, or halt
  1037. *
  1038. * When in the 'enable' state the card operates as normal.
  1039. * When in the 'disable' state, the card enters into a low power mode.
  1040. * When in the 'halt' state, the card is shut down and must be fully
  1041. * restarted to come back on.
  1042. */
  1043. static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1044. {
  1045. struct iwl_host_cmd cmd = {
  1046. .id = REPLY_CARD_STATE_CMD,
  1047. .len = sizeof(u32),
  1048. .data = &flags,
  1049. .meta.flags = meta_flag,
  1050. };
  1051. if (meta_flag & CMD_ASYNC)
  1052. cmd.meta.u.callback = iwl_card_state_sync_callback;
  1053. return iwl_send_cmd(priv, &cmd);
  1054. }
  1055. static int iwl_add_sta_sync_callback(struct iwl_priv *priv,
  1056. struct iwl_cmd *cmd, struct sk_buff *skb)
  1057. {
  1058. struct iwl_rx_packet *res = NULL;
  1059. if (!skb) {
  1060. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1061. return 1;
  1062. }
  1063. res = (struct iwl_rx_packet *)skb->data;
  1064. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1065. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1066. res->hdr.flags);
  1067. return 1;
  1068. }
  1069. switch (res->u.add_sta.status) {
  1070. case ADD_STA_SUCCESS_MSK:
  1071. break;
  1072. default:
  1073. break;
  1074. }
  1075. /* We didn't cache the SKB; let the caller free it */
  1076. return 1;
  1077. }
  1078. int iwl_send_add_station(struct iwl_priv *priv,
  1079. struct iwl_addsta_cmd *sta, u8 flags)
  1080. {
  1081. struct iwl_rx_packet *res = NULL;
  1082. int rc = 0;
  1083. struct iwl_host_cmd cmd = {
  1084. .id = REPLY_ADD_STA,
  1085. .len = sizeof(struct iwl_addsta_cmd),
  1086. .meta.flags = flags,
  1087. .data = sta,
  1088. };
  1089. if (flags & CMD_ASYNC)
  1090. cmd.meta.u.callback = iwl_add_sta_sync_callback;
  1091. else
  1092. cmd.meta.flags |= CMD_WANT_SKB;
  1093. rc = iwl_send_cmd(priv, &cmd);
  1094. if (rc || (flags & CMD_ASYNC))
  1095. return rc;
  1096. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1097. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1098. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1099. res->hdr.flags);
  1100. rc = -EIO;
  1101. }
  1102. if (rc == 0) {
  1103. switch (res->u.add_sta.status) {
  1104. case ADD_STA_SUCCESS_MSK:
  1105. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1106. break;
  1107. default:
  1108. rc = -EIO;
  1109. IWL_WARNING("REPLY_ADD_STA failed\n");
  1110. break;
  1111. }
  1112. }
  1113. priv->alloc_rxb_skb--;
  1114. dev_kfree_skb_any(cmd.meta.u.skb);
  1115. return rc;
  1116. }
  1117. static int iwl_update_sta_key_info(struct iwl_priv *priv,
  1118. struct ieee80211_key_conf *keyconf,
  1119. u8 sta_id)
  1120. {
  1121. unsigned long flags;
  1122. __le16 key_flags = 0;
  1123. switch (keyconf->alg) {
  1124. case ALG_CCMP:
  1125. key_flags |= STA_KEY_FLG_CCMP;
  1126. key_flags |= cpu_to_le16(
  1127. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1128. key_flags &= ~STA_KEY_FLG_INVALID;
  1129. break;
  1130. case ALG_TKIP:
  1131. case ALG_WEP:
  1132. return -EINVAL;
  1133. default:
  1134. return -EINVAL;
  1135. }
  1136. spin_lock_irqsave(&priv->sta_lock, flags);
  1137. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1138. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1139. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1140. keyconf->keylen);
  1141. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1142. keyconf->keylen);
  1143. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1144. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1145. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1146. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1147. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1148. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1149. return 0;
  1150. }
  1151. static int iwl_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1152. {
  1153. unsigned long flags;
  1154. spin_lock_irqsave(&priv->sta_lock, flags);
  1155. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  1156. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl_keyinfo));
  1157. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1158. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1159. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1160. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1161. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1162. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1163. return 0;
  1164. }
  1165. static void iwl_clear_free_frames(struct iwl_priv *priv)
  1166. {
  1167. struct list_head *element;
  1168. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1169. priv->frames_count);
  1170. while (!list_empty(&priv->free_frames)) {
  1171. element = priv->free_frames.next;
  1172. list_del(element);
  1173. kfree(list_entry(element, struct iwl_frame, list));
  1174. priv->frames_count--;
  1175. }
  1176. if (priv->frames_count) {
  1177. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1178. priv->frames_count);
  1179. priv->frames_count = 0;
  1180. }
  1181. }
  1182. static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
  1183. {
  1184. struct iwl_frame *frame;
  1185. struct list_head *element;
  1186. if (list_empty(&priv->free_frames)) {
  1187. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1188. if (!frame) {
  1189. IWL_ERROR("Could not allocate frame!\n");
  1190. return NULL;
  1191. }
  1192. priv->frames_count++;
  1193. return frame;
  1194. }
  1195. element = priv->free_frames.next;
  1196. list_del(element);
  1197. return list_entry(element, struct iwl_frame, list);
  1198. }
  1199. static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
  1200. {
  1201. memset(frame, 0, sizeof(*frame));
  1202. list_add(&frame->list, &priv->free_frames);
  1203. }
  1204. unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
  1205. struct ieee80211_hdr *hdr,
  1206. const u8 *dest, int left)
  1207. {
  1208. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1209. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1210. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1211. return 0;
  1212. if (priv->ibss_beacon->len > left)
  1213. return 0;
  1214. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1215. return priv->ibss_beacon->len;
  1216. }
  1217. static int iwl_rate_index_from_plcp(int plcp)
  1218. {
  1219. int i = 0;
  1220. for (i = 0; i < IWL_RATE_COUNT; i++)
  1221. if (iwl_rates[i].plcp == plcp)
  1222. return i;
  1223. return -1;
  1224. }
  1225. static u8 iwl_rate_get_lowest_plcp(int rate_mask)
  1226. {
  1227. u8 i;
  1228. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1229. i = iwl_rates[i].next_ieee) {
  1230. if (rate_mask & (1 << i))
  1231. return iwl_rates[i].plcp;
  1232. }
  1233. return IWL_RATE_INVALID;
  1234. }
  1235. static int iwl_send_beacon_cmd(struct iwl_priv *priv)
  1236. {
  1237. struct iwl_frame *frame;
  1238. unsigned int frame_size;
  1239. int rc;
  1240. u8 rate;
  1241. frame = iwl_get_free_frame(priv);
  1242. if (!frame) {
  1243. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1244. "command.\n");
  1245. return -ENOMEM;
  1246. }
  1247. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1248. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic &
  1249. 0xFF0);
  1250. if (rate == IWL_INVALID_RATE)
  1251. rate = IWL_RATE_6M_PLCP;
  1252. } else {
  1253. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1254. if (rate == IWL_INVALID_RATE)
  1255. rate = IWL_RATE_1M_PLCP;
  1256. }
  1257. frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
  1258. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1259. &frame->u.cmd[0]);
  1260. iwl_free_frame(priv, frame);
  1261. return rc;
  1262. }
  1263. /******************************************************************************
  1264. *
  1265. * EEPROM related functions
  1266. *
  1267. ******************************************************************************/
  1268. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1269. {
  1270. memcpy(mac, priv->eeprom.mac_address, 6);
  1271. }
  1272. /**
  1273. * iwl_eeprom_init - read EEPROM contents
  1274. *
  1275. * Load the EEPROM from adapter into priv->eeprom
  1276. *
  1277. * NOTE: This routine uses the non-debug IO access functions.
  1278. */
  1279. int iwl_eeprom_init(struct iwl_priv *priv)
  1280. {
  1281. u16 *e = (u16 *)&priv->eeprom;
  1282. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1283. u32 r;
  1284. int sz = sizeof(priv->eeprom);
  1285. int rc;
  1286. int i;
  1287. u16 addr;
  1288. /* The EEPROM structure has several padding buffers within it
  1289. * and when adding new EEPROM maps is subject to programmer errors
  1290. * which may be very difficult to identify without explicitly
  1291. * checking the resulting size of the eeprom map. */
  1292. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1293. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1294. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1295. return -ENOENT;
  1296. }
  1297. rc = iwl_eeprom_aqcuire_semaphore(priv);
  1298. if (rc < 0) {
  1299. IWL_ERROR("Failed to aqcuire EEPROM semaphore.\n");
  1300. return -ENOENT;
  1301. }
  1302. /* eeprom is an array of 16bit values */
  1303. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1304. _iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
  1305. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1306. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1307. i += IWL_EEPROM_ACCESS_DELAY) {
  1308. r = _iwl_read_restricted(priv, CSR_EEPROM_REG);
  1309. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1310. break;
  1311. udelay(IWL_EEPROM_ACCESS_DELAY);
  1312. }
  1313. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1314. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1315. return -ETIMEDOUT;
  1316. }
  1317. e[addr / 2] = le16_to_cpu(r >> 16);
  1318. }
  1319. return 0;
  1320. }
  1321. /******************************************************************************
  1322. *
  1323. * Misc. internal state and helper functions
  1324. *
  1325. ******************************************************************************/
  1326. #ifdef CONFIG_IWLWIFI_DEBUG
  1327. /**
  1328. * iwl_report_frame - dump frame to syslog during debug sessions
  1329. *
  1330. * hack this function to show different aspects of received frames,
  1331. * including selective frame dumps.
  1332. * group100 parameter selects whether to show 1 out of 100 good frames.
  1333. *
  1334. * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type
  1335. * info output is okay, but some of this stuff (e.g. iwl_rx_frame_stats)
  1336. * is 3945-specific and gives bad output for 4965. Need to split the
  1337. * functionality, keep common stuff here.
  1338. */
  1339. void iwl_report_frame(struct iwl_priv *priv,
  1340. struct iwl_rx_packet *pkt,
  1341. struct ieee80211_hdr *header, int group100)
  1342. {
  1343. u32 to_us;
  1344. u32 print_summary = 0;
  1345. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1346. u32 hundred = 0;
  1347. u32 dataframe = 0;
  1348. u16 fc;
  1349. u16 seq_ctl;
  1350. u16 channel;
  1351. u16 phy_flags;
  1352. int rate_sym;
  1353. u16 length;
  1354. u16 status;
  1355. u16 bcn_tmr;
  1356. u32 tsf_low;
  1357. u64 tsf;
  1358. u8 rssi;
  1359. u8 agc;
  1360. u16 sig_avg;
  1361. u16 noise_diff;
  1362. struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1363. struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1364. struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1365. u8 *data = IWL_RX_DATA(pkt);
  1366. /* MAC header */
  1367. fc = le16_to_cpu(header->frame_control);
  1368. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1369. /* metadata */
  1370. channel = le16_to_cpu(rx_hdr->channel);
  1371. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1372. rate_sym = rx_hdr->rate;
  1373. length = le16_to_cpu(rx_hdr->len);
  1374. /* end-of-frame status and timestamp */
  1375. status = le32_to_cpu(rx_end->status);
  1376. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1377. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1378. tsf = le64_to_cpu(rx_end->timestamp);
  1379. /* signal statistics */
  1380. rssi = rx_stats->rssi;
  1381. agc = rx_stats->agc;
  1382. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1383. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1384. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1385. /* if data frame is to us and all is good,
  1386. * (optionally) print summary for only 1 out of every 100 */
  1387. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1388. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1389. dataframe = 1;
  1390. if (!group100)
  1391. print_summary = 1; /* print each frame */
  1392. else if (priv->framecnt_to_us < 100) {
  1393. priv->framecnt_to_us++;
  1394. print_summary = 0;
  1395. } else {
  1396. priv->framecnt_to_us = 0;
  1397. print_summary = 1;
  1398. hundred = 1;
  1399. }
  1400. } else {
  1401. /* print summary for all other frames */
  1402. print_summary = 1;
  1403. }
  1404. if (print_summary) {
  1405. char *title;
  1406. u32 rate;
  1407. if (hundred)
  1408. title = "100Frames";
  1409. else if (fc & IEEE80211_FCTL_RETRY)
  1410. title = "Retry";
  1411. else if (ieee80211_is_assoc_response(fc))
  1412. title = "AscRsp";
  1413. else if (ieee80211_is_reassoc_response(fc))
  1414. title = "RasRsp";
  1415. else if (ieee80211_is_probe_response(fc)) {
  1416. title = "PrbRsp";
  1417. print_dump = 1; /* dump frame contents */
  1418. } else if (ieee80211_is_beacon(fc)) {
  1419. title = "Beacon";
  1420. print_dump = 1; /* dump frame contents */
  1421. } else if (ieee80211_is_atim(fc))
  1422. title = "ATIM";
  1423. else if (ieee80211_is_auth(fc))
  1424. title = "Auth";
  1425. else if (ieee80211_is_deauth(fc))
  1426. title = "DeAuth";
  1427. else if (ieee80211_is_disassoc(fc))
  1428. title = "DisAssoc";
  1429. else
  1430. title = "Frame";
  1431. rate = iwl_rate_index_from_plcp(rate_sym);
  1432. if (rate == -1)
  1433. rate = 0;
  1434. else
  1435. rate = iwl_rates[rate].ieee / 2;
  1436. /* print frame summary.
  1437. * MAC addresses show just the last byte (for brevity),
  1438. * but you can hack it to show more, if you'd like to. */
  1439. if (dataframe)
  1440. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1441. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1442. title, fc, header->addr1[5],
  1443. length, rssi, channel, rate);
  1444. else {
  1445. /* src/dst addresses assume managed mode */
  1446. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1447. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1448. "phy=0x%02x, chnl=%d\n",
  1449. title, fc, header->addr1[5],
  1450. header->addr3[5], rssi,
  1451. tsf_low - priv->scan_start_tsf,
  1452. phy_flags, channel);
  1453. }
  1454. }
  1455. if (print_dump)
  1456. iwl_print_hex_dump(IWL_DL_RX, data, length);
  1457. }
  1458. #endif
  1459. static void iwl_unset_hw_setting(struct iwl_priv *priv)
  1460. {
  1461. if (priv->hw_setting.shared_virt)
  1462. pci_free_consistent(priv->pci_dev,
  1463. sizeof(struct iwl_shared),
  1464. priv->hw_setting.shared_virt,
  1465. priv->hw_setting.shared_phys);
  1466. }
  1467. /**
  1468. * iwl_supported_rate_to_ie - fill in the supported rate in IE field
  1469. *
  1470. * return : set the bit for each supported rate insert in ie
  1471. */
  1472. static u16 iwl_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1473. u16 basic_rate, int max_count)
  1474. {
  1475. u16 ret_rates = 0, bit;
  1476. int i;
  1477. u8 *rates;
  1478. rates = &(ie[1]);
  1479. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1480. if (bit & supported_rate) {
  1481. ret_rates |= bit;
  1482. rates[*ie] = iwl_rates[i].ieee |
  1483. ((bit & basic_rate) ? 0x80 : 0x00);
  1484. *ie = *ie + 1;
  1485. if (*ie >= max_count)
  1486. break;
  1487. }
  1488. }
  1489. return ret_rates;
  1490. }
  1491. /**
  1492. * iwl_fill_probe_req - fill in all required fields and IE for probe request
  1493. */
  1494. static u16 iwl_fill_probe_req(struct iwl_priv *priv,
  1495. struct ieee80211_mgmt *frame,
  1496. int left, int is_direct)
  1497. {
  1498. int len = 0;
  1499. u8 *pos = NULL;
  1500. u16 ret_rates;
  1501. /* Make sure there is enough space for the probe request,
  1502. * two mandatory IEs and the data */
  1503. left -= 24;
  1504. if (left < 0)
  1505. return 0;
  1506. len += 24;
  1507. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1508. memcpy(frame->da, BROADCAST_ADDR, ETH_ALEN);
  1509. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1510. memcpy(frame->bssid, BROADCAST_ADDR, ETH_ALEN);
  1511. frame->seq_ctrl = 0;
  1512. /* fill in our indirect SSID IE */
  1513. /* ...next IE... */
  1514. left -= 2;
  1515. if (left < 0)
  1516. return 0;
  1517. len += 2;
  1518. pos = &(frame->u.probe_req.variable[0]);
  1519. *pos++ = WLAN_EID_SSID;
  1520. *pos++ = 0;
  1521. /* fill in our direct SSID IE... */
  1522. if (is_direct) {
  1523. /* ...next IE... */
  1524. left -= 2 + priv->essid_len;
  1525. if (left < 0)
  1526. return 0;
  1527. /* ... fill it in... */
  1528. *pos++ = WLAN_EID_SSID;
  1529. *pos++ = priv->essid_len;
  1530. memcpy(pos, priv->essid, priv->essid_len);
  1531. pos += priv->essid_len;
  1532. len += 2 + priv->essid_len;
  1533. }
  1534. /* fill in supported rate */
  1535. /* ...next IE... */
  1536. left -= 2;
  1537. if (left < 0)
  1538. return 0;
  1539. /* ... fill it in... */
  1540. *pos++ = WLAN_EID_SUPP_RATES;
  1541. *pos = 0;
  1542. ret_rates = priv->active_rate = priv->rates_mask;
  1543. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1544. iwl_supported_rate_to_ie(pos, priv->active_rate,
  1545. priv->active_rate_basic, left);
  1546. len += 2 + *pos;
  1547. pos += (*pos) + 1;
  1548. ret_rates = ~ret_rates & priv->active_rate;
  1549. if (ret_rates == 0)
  1550. goto fill_end;
  1551. /* fill in supported extended rate */
  1552. /* ...next IE... */
  1553. left -= 2;
  1554. if (left < 0)
  1555. return 0;
  1556. /* ... fill it in... */
  1557. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1558. *pos = 0;
  1559. iwl_supported_rate_to_ie(pos, ret_rates, priv->active_rate_basic, left);
  1560. if (*pos > 0)
  1561. len += 2 + *pos;
  1562. fill_end:
  1563. return (u16)len;
  1564. }
  1565. /*
  1566. * QoS support
  1567. */
  1568. #ifdef CONFIG_IWLWIFI_QOS
  1569. static int iwl_send_qos_params_command(struct iwl_priv *priv,
  1570. struct iwl_qosparam_cmd *qos)
  1571. {
  1572. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1573. sizeof(struct iwl_qosparam_cmd), qos);
  1574. }
  1575. static void iwl_reset_qos(struct iwl_priv *priv)
  1576. {
  1577. u16 cw_min = 15;
  1578. u16 cw_max = 1023;
  1579. u8 aifs = 2;
  1580. u8 is_legacy = 0;
  1581. unsigned long flags;
  1582. int i;
  1583. spin_lock_irqsave(&priv->lock, flags);
  1584. priv->qos_data.qos_active = 0;
  1585. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1586. if (priv->qos_data.qos_enable)
  1587. priv->qos_data.qos_active = 1;
  1588. if (!(priv->active_rate & 0xfff0)) {
  1589. cw_min = 31;
  1590. is_legacy = 1;
  1591. }
  1592. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1593. if (priv->qos_data.qos_enable)
  1594. priv->qos_data.qos_active = 1;
  1595. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1596. cw_min = 31;
  1597. is_legacy = 1;
  1598. }
  1599. if (priv->qos_data.qos_active)
  1600. aifs = 3;
  1601. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1602. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1603. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1604. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1605. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1606. if (priv->qos_data.qos_active) {
  1607. i = 1;
  1608. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1609. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1610. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1611. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1612. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1613. i = 2;
  1614. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1615. cpu_to_le16((cw_min + 1) / 2 - 1);
  1616. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1617. cpu_to_le16(cw_max);
  1618. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1619. if (is_legacy)
  1620. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1621. cpu_to_le16(6016);
  1622. else
  1623. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1624. cpu_to_le16(3008);
  1625. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1626. i = 3;
  1627. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1628. cpu_to_le16((cw_min + 1) / 4 - 1);
  1629. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1630. cpu_to_le16((cw_max + 1) / 2 - 1);
  1631. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1632. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1633. if (is_legacy)
  1634. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1635. cpu_to_le16(3264);
  1636. else
  1637. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1638. cpu_to_le16(1504);
  1639. } else {
  1640. for (i = 1; i < 4; i++) {
  1641. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1642. cpu_to_le16(cw_min);
  1643. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1644. cpu_to_le16(cw_max);
  1645. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1646. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1647. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1648. }
  1649. }
  1650. IWL_DEBUG_QOS("set QoS to default \n");
  1651. spin_unlock_irqrestore(&priv->lock, flags);
  1652. }
  1653. static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  1654. {
  1655. unsigned long flags;
  1656. if (priv == NULL)
  1657. return;
  1658. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1659. return;
  1660. if (!priv->qos_data.qos_enable)
  1661. return;
  1662. spin_lock_irqsave(&priv->lock, flags);
  1663. priv->qos_data.def_qos_parm.qos_flags = 0;
  1664. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1665. !priv->qos_data.qos_cap.q_AP.txop_request)
  1666. priv->qos_data.def_qos_parm.qos_flags |=
  1667. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1668. if (priv->qos_data.qos_active)
  1669. priv->qos_data.def_qos_parm.qos_flags |=
  1670. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1671. spin_unlock_irqrestore(&priv->lock, flags);
  1672. if (force || iwl_is_associated(priv)) {
  1673. IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
  1674. priv->qos_data.qos_active);
  1675. iwl_send_qos_params_command(priv,
  1676. &(priv->qos_data.def_qos_parm));
  1677. }
  1678. }
  1679. #endif /* CONFIG_IWLWIFI_QOS */
  1680. /*
  1681. * Power management (not Tx power!) functions
  1682. */
  1683. #define MSEC_TO_USEC 1024
  1684. #define NOSLP __constant_cpu_to_le32(0)
  1685. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
  1686. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1687. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1688. __constant_cpu_to_le32(X1), \
  1689. __constant_cpu_to_le32(X2), \
  1690. __constant_cpu_to_le32(X3), \
  1691. __constant_cpu_to_le32(X4)}
  1692. /* default power management (not Tx power) table values */
  1693. /* for tim 0-10 */
  1694. static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = {
  1695. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1696. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1697. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1698. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1699. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1700. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1701. };
  1702. /* for tim > 10 */
  1703. static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = {
  1704. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1705. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1706. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1707. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1708. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1709. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1710. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1711. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1712. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1713. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1714. };
  1715. int iwl_power_init_handle(struct iwl_priv *priv)
  1716. {
  1717. int rc = 0, i;
  1718. struct iwl_power_mgr *pow_data;
  1719. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_AC;
  1720. u16 pci_pm;
  1721. IWL_DEBUG_POWER("Initialize power \n");
  1722. pow_data = &(priv->power_data);
  1723. memset(pow_data, 0, sizeof(*pow_data));
  1724. pow_data->active_index = IWL_POWER_RANGE_0;
  1725. pow_data->dtim_val = 0xffff;
  1726. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1727. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1728. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1729. if (rc != 0)
  1730. return 0;
  1731. else {
  1732. struct iwl_powertable_cmd *cmd;
  1733. IWL_DEBUG_POWER("adjust power command flags\n");
  1734. for (i = 0; i < IWL_POWER_AC; i++) {
  1735. cmd = &pow_data->pwr_range_0[i].cmd;
  1736. if (pci_pm & 0x1)
  1737. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1738. else
  1739. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1740. }
  1741. }
  1742. return rc;
  1743. }
  1744. static int iwl_update_power_cmd(struct iwl_priv *priv,
  1745. struct iwl_powertable_cmd *cmd, u32 mode)
  1746. {
  1747. int rc = 0, i;
  1748. u8 skip;
  1749. u32 max_sleep = 0;
  1750. struct iwl_power_vec_entry *range;
  1751. u8 period = 0;
  1752. struct iwl_power_mgr *pow_data;
  1753. if (mode > IWL_POWER_INDEX_5) {
  1754. IWL_DEBUG_POWER("Error invalid power mode \n");
  1755. return -1;
  1756. }
  1757. pow_data = &(priv->power_data);
  1758. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1759. range = &pow_data->pwr_range_0[0];
  1760. else
  1761. range = &pow_data->pwr_range_1[1];
  1762. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd));
  1763. #ifdef IWL_MAC80211_DISABLE
  1764. if (priv->assoc_network != NULL) {
  1765. unsigned long flags;
  1766. period = priv->assoc_network->tim.tim_period;
  1767. }
  1768. #endif /*IWL_MAC80211_DISABLE */
  1769. skip = range[mode].no_dtim;
  1770. if (period == 0) {
  1771. period = 1;
  1772. skip = 0;
  1773. }
  1774. if (skip == 0) {
  1775. max_sleep = period;
  1776. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1777. } else {
  1778. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1779. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1780. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1781. }
  1782. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1783. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1784. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1785. }
  1786. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1787. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1788. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1789. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1790. le32_to_cpu(cmd->sleep_interval[0]),
  1791. le32_to_cpu(cmd->sleep_interval[1]),
  1792. le32_to_cpu(cmd->sleep_interval[2]),
  1793. le32_to_cpu(cmd->sleep_interval[3]),
  1794. le32_to_cpu(cmd->sleep_interval[4]));
  1795. return rc;
  1796. }
  1797. static int iwl_send_power_mode(struct iwl_priv *priv, u32 mode)
  1798. {
  1799. u32 final_mode = mode;
  1800. int rc;
  1801. struct iwl_powertable_cmd cmd;
  1802. /* If on battery, set to 3,
  1803. * if plugged into AC power, set to CAM ("continuosly aware mode"),
  1804. * else user level */
  1805. switch (mode) {
  1806. case IWL_POWER_BATTERY:
  1807. final_mode = IWL_POWER_INDEX_3;
  1808. break;
  1809. case IWL_POWER_AC:
  1810. final_mode = IWL_POWER_MODE_CAM;
  1811. break;
  1812. default:
  1813. final_mode = mode;
  1814. break;
  1815. }
  1816. iwl_update_power_cmd(priv, &cmd, final_mode);
  1817. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1818. if (final_mode == IWL_POWER_MODE_CAM)
  1819. clear_bit(STATUS_POWER_PMI, &priv->status);
  1820. else
  1821. set_bit(STATUS_POWER_PMI, &priv->status);
  1822. return rc;
  1823. }
  1824. int iwl_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1825. {
  1826. /* Filter incoming packets to determine if they are targeted toward
  1827. * this network, discarding packets coming from ourselves */
  1828. switch (priv->iw_mode) {
  1829. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1830. /* packets from our adapter are dropped (echo) */
  1831. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1832. return 0;
  1833. /* {broad,multi}cast packets to our IBSS go through */
  1834. if (is_multicast_ether_addr(header->addr1))
  1835. return !compare_ether_addr(header->addr3, priv->bssid);
  1836. /* packets to our adapter go through */
  1837. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1838. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1839. /* packets from our adapter are dropped (echo) */
  1840. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1841. return 0;
  1842. /* {broad,multi}cast packets to our BSS go through */
  1843. if (is_multicast_ether_addr(header->addr1))
  1844. return !compare_ether_addr(header->addr2, priv->bssid);
  1845. /* packets to our adapter go through */
  1846. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1847. }
  1848. return 1;
  1849. }
  1850. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1851. const char *iwl_get_tx_fail_reason(u32 status)
  1852. {
  1853. switch (status & TX_STATUS_MSK) {
  1854. case TX_STATUS_SUCCESS:
  1855. return "SUCCESS";
  1856. TX_STATUS_ENTRY(SHORT_LIMIT);
  1857. TX_STATUS_ENTRY(LONG_LIMIT);
  1858. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1859. TX_STATUS_ENTRY(MGMNT_ABORT);
  1860. TX_STATUS_ENTRY(NEXT_FRAG);
  1861. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1862. TX_STATUS_ENTRY(DEST_PS);
  1863. TX_STATUS_ENTRY(ABORTED);
  1864. TX_STATUS_ENTRY(BT_RETRY);
  1865. TX_STATUS_ENTRY(STA_INVALID);
  1866. TX_STATUS_ENTRY(FRAG_DROPPED);
  1867. TX_STATUS_ENTRY(TID_DISABLE);
  1868. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1869. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1870. TX_STATUS_ENTRY(TX_LOCKED);
  1871. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1872. }
  1873. return "UNKNOWN";
  1874. }
  1875. /**
  1876. * iwl_scan_cancel - Cancel any currently executing HW scan
  1877. *
  1878. * NOTE: priv->mutex is not required before calling this function
  1879. */
  1880. static int iwl_scan_cancel(struct iwl_priv *priv)
  1881. {
  1882. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1883. clear_bit(STATUS_SCANNING, &priv->status);
  1884. return 0;
  1885. }
  1886. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1887. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1888. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1889. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1890. queue_work(priv->workqueue, &priv->abort_scan);
  1891. } else
  1892. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1893. return test_bit(STATUS_SCANNING, &priv->status);
  1894. }
  1895. return 0;
  1896. }
  1897. /**
  1898. * iwl_scan_cancel_timeout - Cancel any currently executing HW scan
  1899. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1900. *
  1901. * NOTE: priv->mutex must be held before calling this function
  1902. */
  1903. static int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1904. {
  1905. unsigned long now = jiffies;
  1906. int ret;
  1907. ret = iwl_scan_cancel(priv);
  1908. if (ret && ms) {
  1909. mutex_unlock(&priv->mutex);
  1910. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1911. test_bit(STATUS_SCANNING, &priv->status))
  1912. msleep(1);
  1913. mutex_lock(&priv->mutex);
  1914. return test_bit(STATUS_SCANNING, &priv->status);
  1915. }
  1916. return ret;
  1917. }
  1918. static void iwl_sequence_reset(struct iwl_priv *priv)
  1919. {
  1920. /* Reset ieee stats */
  1921. /* We don't reset the net_device_stats (ieee->stats) on
  1922. * re-association */
  1923. priv->last_seq_num = -1;
  1924. priv->last_frag_num = -1;
  1925. priv->last_packet_time = 0;
  1926. iwl_scan_cancel(priv);
  1927. }
  1928. #define MAX_UCODE_BEACON_INTERVAL 1024
  1929. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1930. static __le16 iwl_adjust_beacon_interval(u16 beacon_val)
  1931. {
  1932. u16 new_val = 0;
  1933. u16 beacon_factor = 0;
  1934. beacon_factor =
  1935. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1936. / MAX_UCODE_BEACON_INTERVAL;
  1937. new_val = beacon_val / beacon_factor;
  1938. return cpu_to_le16(new_val);
  1939. }
  1940. static void iwl_setup_rxon_timing(struct iwl_priv *priv)
  1941. {
  1942. u64 interval_tm_unit;
  1943. u64 tsf, result;
  1944. unsigned long flags;
  1945. struct ieee80211_conf *conf = NULL;
  1946. u16 beacon_int = 0;
  1947. conf = ieee80211_get_hw_conf(priv->hw);
  1948. spin_lock_irqsave(&priv->lock, flags);
  1949. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1950. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1951. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1952. tsf = priv->timestamp1;
  1953. tsf = ((tsf << 32) | priv->timestamp0);
  1954. beacon_int = priv->beacon_int;
  1955. spin_unlock_irqrestore(&priv->lock, flags);
  1956. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1957. if (beacon_int == 0) {
  1958. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1959. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1960. } else {
  1961. priv->rxon_timing.beacon_interval =
  1962. cpu_to_le16(beacon_int);
  1963. priv->rxon_timing.beacon_interval =
  1964. iwl_adjust_beacon_interval(
  1965. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1966. }
  1967. priv->rxon_timing.atim_window = 0;
  1968. } else {
  1969. priv->rxon_timing.beacon_interval =
  1970. iwl_adjust_beacon_interval(conf->beacon_int);
  1971. /* TODO: we need to get atim_window from upper stack
  1972. * for now we set to 0 */
  1973. priv->rxon_timing.atim_window = 0;
  1974. }
  1975. interval_tm_unit =
  1976. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1977. result = do_div(tsf, interval_tm_unit);
  1978. priv->rxon_timing.beacon_init_val =
  1979. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1980. IWL_DEBUG_ASSOC
  1981. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1982. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1983. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1984. le16_to_cpu(priv->rxon_timing.atim_window));
  1985. }
  1986. static int iwl_scan_initiate(struct iwl_priv *priv)
  1987. {
  1988. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1989. IWL_ERROR("APs don't scan.\n");
  1990. return 0;
  1991. }
  1992. if (!iwl_is_ready_rf(priv)) {
  1993. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1994. return -EIO;
  1995. }
  1996. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1997. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1998. return -EAGAIN;
  1999. }
  2000. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2001. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2002. "Queuing.\n");
  2003. return -EAGAIN;
  2004. }
  2005. IWL_DEBUG_INFO("Starting scan...\n");
  2006. priv->scan_bands = 2;
  2007. set_bit(STATUS_SCANNING, &priv->status);
  2008. priv->scan_start = jiffies;
  2009. priv->scan_pass_start = priv->scan_start;
  2010. queue_work(priv->workqueue, &priv->request_scan);
  2011. return 0;
  2012. }
  2013. static int iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  2014. {
  2015. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  2016. if (hw_decrypt)
  2017. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2018. else
  2019. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2020. return 0;
  2021. }
  2022. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode)
  2023. {
  2024. if (phymode == MODE_IEEE80211A) {
  2025. priv->staging_rxon.flags &=
  2026. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2027. | RXON_FLG_CCK_MSK);
  2028. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2029. } else {
  2030. /* Copied from iwl_bg_post_associate() */
  2031. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2032. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2033. else
  2034. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2035. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2036. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2037. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2038. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2039. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2040. }
  2041. }
  2042. /*
  2043. * initilize rxon structure with default values fromm eeprom
  2044. */
  2045. static void iwl_connection_init_rx_config(struct iwl_priv *priv)
  2046. {
  2047. const struct iwl_channel_info *ch_info;
  2048. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2049. switch (priv->iw_mode) {
  2050. case IEEE80211_IF_TYPE_AP:
  2051. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2052. break;
  2053. case IEEE80211_IF_TYPE_STA:
  2054. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2055. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2056. break;
  2057. case IEEE80211_IF_TYPE_IBSS:
  2058. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2059. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2060. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2061. RXON_FILTER_ACCEPT_GRP_MSK;
  2062. break;
  2063. case IEEE80211_IF_TYPE_MNTR:
  2064. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2065. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2066. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2067. break;
  2068. }
  2069. #if 0
  2070. /* TODO: Figure out when short_preamble would be set and cache from
  2071. * that */
  2072. if (!hw_to_local(priv->hw)->short_preamble)
  2073. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2074. else
  2075. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2076. #endif
  2077. ch_info = iwl_get_channel_info(priv, priv->phymode,
  2078. le16_to_cpu(priv->staging_rxon.channel));
  2079. if (!ch_info)
  2080. ch_info = &priv->channel_info[0];
  2081. /*
  2082. * in some case A channels are all non IBSS
  2083. * in this case force B/G channel
  2084. */
  2085. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2086. !(is_channel_ibss(ch_info)))
  2087. ch_info = &priv->channel_info[0];
  2088. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2089. if (is_channel_a_band(ch_info))
  2090. priv->phymode = MODE_IEEE80211A;
  2091. else
  2092. priv->phymode = MODE_IEEE80211G;
  2093. iwl_set_flags_for_phymode(priv, priv->phymode);
  2094. priv->staging_rxon.ofdm_basic_rates =
  2095. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2096. priv->staging_rxon.cck_basic_rates =
  2097. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2098. }
  2099. static int iwl_set_mode(struct iwl_priv *priv, int mode)
  2100. {
  2101. if (!iwl_is_ready_rf(priv))
  2102. return -EAGAIN;
  2103. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2104. const struct iwl_channel_info *ch_info;
  2105. ch_info = iwl_get_channel_info(priv,
  2106. priv->phymode,
  2107. le16_to_cpu(priv->staging_rxon.channel));
  2108. if (!ch_info || !is_channel_ibss(ch_info)) {
  2109. IWL_ERROR("channel %d not IBSS channel\n",
  2110. le16_to_cpu(priv->staging_rxon.channel));
  2111. return -EINVAL;
  2112. }
  2113. }
  2114. cancel_delayed_work(&priv->scan_check);
  2115. if (iwl_scan_cancel_timeout(priv, 100)) {
  2116. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2117. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2118. return -EAGAIN;
  2119. }
  2120. priv->iw_mode = mode;
  2121. iwl_connection_init_rx_config(priv);
  2122. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2123. iwl_clear_stations_table(priv);
  2124. iwl_commit_rxon(priv);
  2125. return 0;
  2126. }
  2127. static void iwl_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  2128. struct ieee80211_tx_control *ctl,
  2129. struct iwl_cmd *cmd,
  2130. struct sk_buff *skb_frag,
  2131. int last_frag)
  2132. {
  2133. struct iwl_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2134. switch (keyinfo->alg) {
  2135. case ALG_CCMP:
  2136. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2137. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2138. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2139. break;
  2140. case ALG_TKIP:
  2141. #if 0
  2142. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2143. if (last_frag)
  2144. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2145. 8);
  2146. else
  2147. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2148. #endif
  2149. break;
  2150. case ALG_WEP:
  2151. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2152. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2153. if (keyinfo->keylen == 13)
  2154. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2155. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2156. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2157. "with key %d\n", ctl->key_idx);
  2158. break;
  2159. default:
  2160. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2161. break;
  2162. }
  2163. }
  2164. /*
  2165. * handle build REPLY_TX command notification.
  2166. */
  2167. static void iwl_build_tx_cmd_basic(struct iwl_priv *priv,
  2168. struct iwl_cmd *cmd,
  2169. struct ieee80211_tx_control *ctrl,
  2170. struct ieee80211_hdr *hdr,
  2171. int is_unicast, u8 std_id)
  2172. {
  2173. __le16 *qc;
  2174. u16 fc = le16_to_cpu(hdr->frame_control);
  2175. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2176. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2177. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2178. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2179. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2180. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2181. if (ieee80211_is_probe_response(fc) &&
  2182. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2183. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2184. } else {
  2185. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2186. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2187. }
  2188. cmd->cmd.tx.sta_id = std_id;
  2189. if (ieee80211_get_morefrag(hdr))
  2190. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2191. qc = ieee80211_get_qos_ctrl(hdr);
  2192. if (qc) {
  2193. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2194. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2195. } else
  2196. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2197. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2198. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2199. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2200. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2201. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2202. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2203. }
  2204. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2205. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2206. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2207. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2208. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2209. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2210. cmd->cmd.tx.timeout.pm_frame_timeout =
  2211. cpu_to_le16(3);
  2212. else
  2213. cmd->cmd.tx.timeout.pm_frame_timeout =
  2214. cpu_to_le16(2);
  2215. } else
  2216. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2217. cmd->cmd.tx.driver_txop = 0;
  2218. cmd->cmd.tx.tx_flags = tx_flags;
  2219. cmd->cmd.tx.next_frame_len = 0;
  2220. }
  2221. static int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  2222. {
  2223. int sta_id;
  2224. u16 fc = le16_to_cpu(hdr->frame_control);
  2225. /* If this frame is broadcast or not data then use the broadcast
  2226. * station id */
  2227. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2228. is_multicast_ether_addr(hdr->addr1))
  2229. return priv->hw_setting.bcast_sta_id;
  2230. switch (priv->iw_mode) {
  2231. /* If this frame is part of a BSS network (we're a station), then
  2232. * we use the AP's station id */
  2233. case IEEE80211_IF_TYPE_STA:
  2234. return IWL_AP_ID;
  2235. /* If we are an AP, then find the station, or use BCAST */
  2236. case IEEE80211_IF_TYPE_AP:
  2237. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2238. if (sta_id != IWL_INVALID_STATION)
  2239. return sta_id;
  2240. return priv->hw_setting.bcast_sta_id;
  2241. /* If this frame is part of a IBSS network, then we use the
  2242. * target specific station id */
  2243. case IEEE80211_IF_TYPE_IBSS: {
  2244. DECLARE_MAC_BUF(mac);
  2245. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2246. if (sta_id != IWL_INVALID_STATION)
  2247. return sta_id;
  2248. sta_id = iwl_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  2249. if (sta_id != IWL_INVALID_STATION)
  2250. return sta_id;
  2251. IWL_DEBUG_DROP("Station %s not in station map. "
  2252. "Defaulting to broadcast...\n",
  2253. print_mac(mac, hdr->addr1));
  2254. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2255. return priv->hw_setting.bcast_sta_id;
  2256. }
  2257. default:
  2258. IWL_WARNING("Unkown mode of operation: %d", priv->iw_mode);
  2259. return priv->hw_setting.bcast_sta_id;
  2260. }
  2261. }
  2262. /*
  2263. * start REPLY_TX command process
  2264. */
  2265. static int iwl_tx_skb(struct iwl_priv *priv,
  2266. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2267. {
  2268. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2269. struct iwl_tfd_frame *tfd;
  2270. u32 *control_flags;
  2271. int txq_id = ctl->queue;
  2272. struct iwl_tx_queue *txq = NULL;
  2273. struct iwl_queue *q = NULL;
  2274. dma_addr_t phys_addr;
  2275. dma_addr_t txcmd_phys;
  2276. struct iwl_cmd *out_cmd = NULL;
  2277. u16 len, idx, len_org;
  2278. u8 id, hdr_len, unicast;
  2279. u8 sta_id;
  2280. u16 seq_number = 0;
  2281. u16 fc;
  2282. __le16 *qc;
  2283. u8 wait_write_ptr = 0;
  2284. unsigned long flags;
  2285. int rc;
  2286. spin_lock_irqsave(&priv->lock, flags);
  2287. if (iwl_is_rfkill(priv)) {
  2288. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2289. goto drop_unlock;
  2290. }
  2291. if (!priv->interface_id) {
  2292. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2293. goto drop_unlock;
  2294. }
  2295. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2296. IWL_ERROR("ERROR: No TX rate available.\n");
  2297. goto drop_unlock;
  2298. }
  2299. unicast = !is_multicast_ether_addr(hdr->addr1);
  2300. id = 0;
  2301. fc = le16_to_cpu(hdr->frame_control);
  2302. #ifdef CONFIG_IWLWIFI_DEBUG
  2303. if (ieee80211_is_auth(fc))
  2304. IWL_DEBUG_TX("Sending AUTH frame\n");
  2305. else if (ieee80211_is_assoc_request(fc))
  2306. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2307. else if (ieee80211_is_reassoc_request(fc))
  2308. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2309. #endif
  2310. if (!iwl_is_associated(priv) &&
  2311. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2312. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  2313. goto drop_unlock;
  2314. }
  2315. spin_unlock_irqrestore(&priv->lock, flags);
  2316. hdr_len = ieee80211_get_hdrlen(fc);
  2317. sta_id = iwl_get_sta_id(priv, hdr);
  2318. if (sta_id == IWL_INVALID_STATION) {
  2319. DECLARE_MAC_BUF(mac);
  2320. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2321. print_mac(mac, hdr->addr1));
  2322. goto drop;
  2323. }
  2324. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2325. qc = ieee80211_get_qos_ctrl(hdr);
  2326. if (qc) {
  2327. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2328. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2329. IEEE80211_SCTL_SEQ;
  2330. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2331. (hdr->seq_ctrl &
  2332. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2333. seq_number += 0x10;
  2334. }
  2335. txq = &priv->txq[txq_id];
  2336. q = &txq->q;
  2337. spin_lock_irqsave(&priv->lock, flags);
  2338. tfd = &txq->bd[q->first_empty];
  2339. memset(tfd, 0, sizeof(*tfd));
  2340. control_flags = (u32 *) tfd;
  2341. idx = get_cmd_index(q, q->first_empty, 0);
  2342. memset(&(txq->txb[q->first_empty]), 0, sizeof(struct iwl_tx_info));
  2343. txq->txb[q->first_empty].skb[0] = skb;
  2344. memcpy(&(txq->txb[q->first_empty].status.control),
  2345. ctl, sizeof(struct ieee80211_tx_control));
  2346. out_cmd = &txq->cmd[idx];
  2347. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2348. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2349. out_cmd->hdr.cmd = REPLY_TX;
  2350. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2351. INDEX_TO_SEQ(q->first_empty)));
  2352. /* copy frags header */
  2353. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2354. /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
  2355. len = priv->hw_setting.tx_cmd_len +
  2356. sizeof(struct iwl_cmd_header) + hdr_len;
  2357. len_org = len;
  2358. len = (len + 3) & ~3;
  2359. if (len_org != len)
  2360. len_org = 1;
  2361. else
  2362. len_org = 0;
  2363. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2364. offsetof(struct iwl_cmd, hdr);
  2365. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2366. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2367. iwl_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2368. /* 802.11 null functions have no payload... */
  2369. len = skb->len - hdr_len;
  2370. if (len) {
  2371. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2372. len, PCI_DMA_TODEVICE);
  2373. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2374. }
  2375. /* If there is no payload, then only one TFD is used */
  2376. if (!len)
  2377. *control_flags = TFD_CTL_COUNT_SET(1);
  2378. else
  2379. *control_flags = TFD_CTL_COUNT_SET(2) |
  2380. TFD_CTL_PAD_SET(U32_PAD(len));
  2381. len = (u16)skb->len;
  2382. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2383. /* TODO need this for burst mode later on */
  2384. iwl_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2385. /* set is_hcca to 0; it probably will never be implemented */
  2386. iwl_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2387. out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  2388. out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  2389. if (!ieee80211_get_morefrag(hdr)) {
  2390. txq->need_update = 1;
  2391. if (qc) {
  2392. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2393. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2394. }
  2395. } else {
  2396. wait_write_ptr = 1;
  2397. txq->need_update = 0;
  2398. }
  2399. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2400. sizeof(out_cmd->cmd.tx));
  2401. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2402. ieee80211_get_hdrlen(fc));
  2403. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  2404. rc = iwl_tx_queue_update_write_ptr(priv, txq);
  2405. spin_unlock_irqrestore(&priv->lock, flags);
  2406. if (rc)
  2407. return rc;
  2408. if ((iwl_queue_space(q) < q->high_mark)
  2409. && priv->mac80211_registered) {
  2410. if (wait_write_ptr) {
  2411. spin_lock_irqsave(&priv->lock, flags);
  2412. txq->need_update = 1;
  2413. iwl_tx_queue_update_write_ptr(priv, txq);
  2414. spin_unlock_irqrestore(&priv->lock, flags);
  2415. }
  2416. ieee80211_stop_queue(priv->hw, ctl->queue);
  2417. }
  2418. return 0;
  2419. drop_unlock:
  2420. spin_unlock_irqrestore(&priv->lock, flags);
  2421. drop:
  2422. return -1;
  2423. }
  2424. static void iwl_set_rate(struct iwl_priv *priv)
  2425. {
  2426. const struct ieee80211_hw_mode *hw = NULL;
  2427. struct ieee80211_rate *rate;
  2428. int i;
  2429. hw = iwl_get_hw_mode(priv, priv->phymode);
  2430. priv->active_rate = 0;
  2431. priv->active_rate_basic = 0;
  2432. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2433. hw->mode == MODE_IEEE80211A ?
  2434. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2435. for (i = 0; i < hw->num_rates; i++) {
  2436. rate = &(hw->rates[i]);
  2437. if ((rate->val < IWL_RATE_COUNT) &&
  2438. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2439. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2440. rate->val, iwl_rates[rate->val].plcp,
  2441. (rate->flags & IEEE80211_RATE_BASIC) ?
  2442. "*" : "");
  2443. priv->active_rate |= (1 << rate->val);
  2444. if (rate->flags & IEEE80211_RATE_BASIC)
  2445. priv->active_rate_basic |= (1 << rate->val);
  2446. } else
  2447. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2448. rate->val, iwl_rates[rate->val].plcp);
  2449. }
  2450. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2451. priv->active_rate, priv->active_rate_basic);
  2452. /*
  2453. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2454. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2455. * OFDM
  2456. */
  2457. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2458. priv->staging_rxon.cck_basic_rates =
  2459. ((priv->active_rate_basic &
  2460. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2461. else
  2462. priv->staging_rxon.cck_basic_rates =
  2463. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2464. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2465. priv->staging_rxon.ofdm_basic_rates =
  2466. ((priv->active_rate_basic &
  2467. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2468. IWL_FIRST_OFDM_RATE) & 0xFF;
  2469. else
  2470. priv->staging_rxon.ofdm_basic_rates =
  2471. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2472. }
  2473. static void iwl_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2474. {
  2475. unsigned long flags;
  2476. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2477. return;
  2478. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2479. disable_radio ? "OFF" : "ON");
  2480. if (disable_radio) {
  2481. iwl_scan_cancel(priv);
  2482. /* FIXME: This is a workaround for AP */
  2483. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2484. spin_lock_irqsave(&priv->lock, flags);
  2485. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2486. CSR_UCODE_SW_BIT_RFKILL);
  2487. spin_unlock_irqrestore(&priv->lock, flags);
  2488. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2489. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2490. }
  2491. return;
  2492. }
  2493. spin_lock_irqsave(&priv->lock, flags);
  2494. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2495. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2496. spin_unlock_irqrestore(&priv->lock, flags);
  2497. /* wake up ucode */
  2498. msleep(10);
  2499. spin_lock_irqsave(&priv->lock, flags);
  2500. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2501. if (!iwl_grab_restricted_access(priv))
  2502. iwl_release_restricted_access(priv);
  2503. spin_unlock_irqrestore(&priv->lock, flags);
  2504. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2505. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2506. "disabled by HW switch\n");
  2507. return;
  2508. }
  2509. queue_work(priv->workqueue, &priv->restart);
  2510. return;
  2511. }
  2512. void iwl_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2513. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2514. {
  2515. u16 fc =
  2516. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2517. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2518. return;
  2519. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2520. return;
  2521. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2522. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2523. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2524. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2525. RX_RES_STATUS_BAD_ICV_MIC)
  2526. stats->flag |= RX_FLAG_MMIC_ERROR;
  2527. case RX_RES_STATUS_SEC_TYPE_WEP:
  2528. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2529. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2530. RX_RES_STATUS_DECRYPT_OK) {
  2531. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2532. stats->flag |= RX_FLAG_DECRYPTED;
  2533. }
  2534. break;
  2535. default:
  2536. break;
  2537. }
  2538. }
  2539. void iwl_handle_data_packet_monitor(struct iwl_priv *priv,
  2540. struct iwl_rx_mem_buffer *rxb,
  2541. void *data, short len,
  2542. struct ieee80211_rx_status *stats,
  2543. u16 phy_flags)
  2544. {
  2545. struct iwl_rt_rx_hdr *iwl_rt;
  2546. /* First cache any information we need before we overwrite
  2547. * the information provided in the skb from the hardware */
  2548. s8 signal = stats->ssi;
  2549. s8 noise = 0;
  2550. int rate = stats->rate;
  2551. u64 tsf = stats->mactime;
  2552. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2553. /* We received data from the HW, so stop the watchdog */
  2554. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl_rt)) {
  2555. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2556. return;
  2557. }
  2558. /* copy the frame data to write after where the radiotap header goes */
  2559. iwl_rt = (void *)rxb->skb->data;
  2560. memmove(iwl_rt->payload, data, len);
  2561. iwl_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2562. iwl_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2563. /* total header + data */
  2564. iwl_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl_rt));
  2565. /* Set the size of the skb to the size of the frame */
  2566. skb_put(rxb->skb, sizeof(*iwl_rt) + len);
  2567. /* Big bitfield of all the fields we provide in radiotap */
  2568. iwl_rt->rt_hdr.it_present =
  2569. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2570. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2571. (1 << IEEE80211_RADIOTAP_RATE) |
  2572. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2573. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2574. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2575. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2576. /* Zero the flags, we'll add to them as we go */
  2577. iwl_rt->rt_flags = 0;
  2578. iwl_rt->rt_tsf = cpu_to_le64(tsf);
  2579. /* Convert to dBm */
  2580. iwl_rt->rt_dbmsignal = signal;
  2581. iwl_rt->rt_dbmnoise = noise;
  2582. /* Convert the channel frequency and set the flags */
  2583. iwl_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2584. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2585. iwl_rt->rt_chbitmask =
  2586. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2587. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2588. iwl_rt->rt_chbitmask =
  2589. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2590. else /* 802.11g */
  2591. iwl_rt->rt_chbitmask =
  2592. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2593. rate = iwl_rate_index_from_plcp(rate);
  2594. if (rate == -1)
  2595. iwl_rt->rt_rate = 0;
  2596. else
  2597. iwl_rt->rt_rate = iwl_rates[rate].ieee;
  2598. /* antenna number */
  2599. iwl_rt->rt_antenna =
  2600. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2601. /* set the preamble flag if we have it */
  2602. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2603. iwl_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2604. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2605. stats->flag |= RX_FLAG_RADIOTAP;
  2606. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2607. rxb->skb = NULL;
  2608. }
  2609. #define IWL_PACKET_RETRY_TIME HZ
  2610. int is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2611. {
  2612. u16 sc = le16_to_cpu(header->seq_ctrl);
  2613. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2614. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2615. u16 *last_seq, *last_frag;
  2616. unsigned long *last_time;
  2617. switch (priv->iw_mode) {
  2618. case IEEE80211_IF_TYPE_IBSS:{
  2619. struct list_head *p;
  2620. struct iwl_ibss_seq *entry = NULL;
  2621. u8 *mac = header->addr2;
  2622. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2623. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2624. entry =
  2625. list_entry(p, struct iwl_ibss_seq, list);
  2626. if (!compare_ether_addr(entry->mac, mac))
  2627. break;
  2628. }
  2629. if (p == &priv->ibss_mac_hash[index]) {
  2630. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2631. if (!entry) {
  2632. IWL_ERROR
  2633. ("Cannot malloc new mac entry\n");
  2634. return 0;
  2635. }
  2636. memcpy(entry->mac, mac, ETH_ALEN);
  2637. entry->seq_num = seq;
  2638. entry->frag_num = frag;
  2639. entry->packet_time = jiffies;
  2640. list_add(&entry->list,
  2641. &priv->ibss_mac_hash[index]);
  2642. return 0;
  2643. }
  2644. last_seq = &entry->seq_num;
  2645. last_frag = &entry->frag_num;
  2646. last_time = &entry->packet_time;
  2647. break;
  2648. }
  2649. case IEEE80211_IF_TYPE_STA:
  2650. last_seq = &priv->last_seq_num;
  2651. last_frag = &priv->last_frag_num;
  2652. last_time = &priv->last_packet_time;
  2653. break;
  2654. default:
  2655. return 0;
  2656. }
  2657. if ((*last_seq == seq) &&
  2658. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2659. if (*last_frag == frag)
  2660. goto drop;
  2661. if (*last_frag + 1 != frag)
  2662. /* out-of-order fragment */
  2663. goto drop;
  2664. } else
  2665. *last_seq = seq;
  2666. *last_frag = frag;
  2667. *last_time = jiffies;
  2668. return 0;
  2669. drop:
  2670. return 1;
  2671. }
  2672. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2673. #include "iwl-spectrum.h"
  2674. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2675. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2676. #define TIME_UNIT 1024
  2677. /*
  2678. * extended beacon time format
  2679. * time in usec will be changed into a 32-bit value in 8:24 format
  2680. * the high 1 byte is the beacon counts
  2681. * the lower 3 bytes is the time in usec within one beacon interval
  2682. */
  2683. static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2684. {
  2685. u32 quot;
  2686. u32 rem;
  2687. u32 interval = beacon_interval * 1024;
  2688. if (!interval || !usec)
  2689. return 0;
  2690. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2691. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2692. return (quot << 24) + rem;
  2693. }
  2694. /* base is usually what we get from ucode with each received frame,
  2695. * the same as HW timer counter counting down
  2696. */
  2697. static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2698. {
  2699. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2700. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2701. u32 interval = beacon_interval * TIME_UNIT;
  2702. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2703. (addon & BEACON_TIME_MASK_HIGH);
  2704. if (base_low > addon_low)
  2705. res += base_low - addon_low;
  2706. else if (base_low < addon_low) {
  2707. res += interval + base_low - addon_low;
  2708. res += (1 << 24);
  2709. } else
  2710. res += (1 << 24);
  2711. return cpu_to_le32(res);
  2712. }
  2713. static int iwl_get_measurement(struct iwl_priv *priv,
  2714. struct ieee80211_measurement_params *params,
  2715. u8 type)
  2716. {
  2717. struct iwl_spectrum_cmd spectrum;
  2718. struct iwl_rx_packet *res;
  2719. struct iwl_host_cmd cmd = {
  2720. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2721. .data = (void *)&spectrum,
  2722. .meta.flags = CMD_WANT_SKB,
  2723. };
  2724. u32 add_time = le64_to_cpu(params->start_time);
  2725. int rc;
  2726. int spectrum_resp_status;
  2727. int duration = le16_to_cpu(params->duration);
  2728. if (iwl_is_associated(priv))
  2729. add_time =
  2730. iwl_usecs_to_beacons(
  2731. le64_to_cpu(params->start_time) - priv->last_tsf,
  2732. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2733. memset(&spectrum, 0, sizeof(spectrum));
  2734. spectrum.channel_count = cpu_to_le16(1);
  2735. spectrum.flags =
  2736. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2737. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2738. cmd.len = sizeof(spectrum);
  2739. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2740. if (iwl_is_associated(priv))
  2741. spectrum.start_time =
  2742. iwl_add_beacon_time(priv->last_beacon_time,
  2743. add_time,
  2744. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2745. else
  2746. spectrum.start_time = 0;
  2747. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2748. spectrum.channels[0].channel = params->channel;
  2749. spectrum.channels[0].type = type;
  2750. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2751. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2752. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2753. rc = iwl_send_cmd_sync(priv, &cmd);
  2754. if (rc)
  2755. return rc;
  2756. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2757. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2758. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2759. rc = -EIO;
  2760. }
  2761. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2762. switch (spectrum_resp_status) {
  2763. case 0: /* Command will be handled */
  2764. if (res->u.spectrum.id != 0xff) {
  2765. IWL_DEBUG_INFO
  2766. ("Replaced existing measurement: %d\n",
  2767. res->u.spectrum.id);
  2768. priv->measurement_status &= ~MEASUREMENT_READY;
  2769. }
  2770. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2771. rc = 0;
  2772. break;
  2773. case 1: /* Command will not be handled */
  2774. rc = -EAGAIN;
  2775. break;
  2776. }
  2777. dev_kfree_skb_any(cmd.meta.u.skb);
  2778. return rc;
  2779. }
  2780. #endif
  2781. static void iwl_txstatus_to_ieee(struct iwl_priv *priv,
  2782. struct iwl_tx_info *tx_sta)
  2783. {
  2784. tx_sta->status.ack_signal = 0;
  2785. tx_sta->status.excessive_retries = 0;
  2786. tx_sta->status.queue_length = 0;
  2787. tx_sta->status.queue_number = 0;
  2788. if (in_interrupt())
  2789. ieee80211_tx_status_irqsafe(priv->hw,
  2790. tx_sta->skb[0], &(tx_sta->status));
  2791. else
  2792. ieee80211_tx_status(priv->hw,
  2793. tx_sta->skb[0], &(tx_sta->status));
  2794. tx_sta->skb[0] = NULL;
  2795. }
  2796. /**
  2797. * iwl_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
  2798. *
  2799. * When FW advances 'R' index, all entries between old and
  2800. * new 'R' index need to be reclaimed. As result, some free space
  2801. * forms. If there is enough free space (> low mark), wake Tx queue.
  2802. */
  2803. int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2804. {
  2805. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2806. struct iwl_queue *q = &txq->q;
  2807. int nfreed = 0;
  2808. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2809. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2810. "is out of range [0-%d] %d %d.\n", txq_id,
  2811. index, q->n_bd, q->first_empty, q->last_used);
  2812. return 0;
  2813. }
  2814. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2815. q->last_used != index;
  2816. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd)) {
  2817. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2818. iwl_txstatus_to_ieee(priv,
  2819. &(txq->txb[txq->q.last_used]));
  2820. iwl_hw_txq_free_tfd(priv, txq);
  2821. } else if (nfreed > 1) {
  2822. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2823. q->first_empty, q->last_used);
  2824. queue_work(priv->workqueue, &priv->restart);
  2825. }
  2826. nfreed++;
  2827. }
  2828. if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2829. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2830. priv->mac80211_registered)
  2831. ieee80211_wake_queue(priv->hw, txq_id);
  2832. return nfreed;
  2833. }
  2834. static int iwl_is_tx_success(u32 status)
  2835. {
  2836. return (status & 0xFF) == 0x1;
  2837. }
  2838. /******************************************************************************
  2839. *
  2840. * Generic RX handler implementations
  2841. *
  2842. ******************************************************************************/
  2843. static void iwl_rx_reply_tx(struct iwl_priv *priv,
  2844. struct iwl_rx_mem_buffer *rxb)
  2845. {
  2846. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2847. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2848. int txq_id = SEQ_TO_QUEUE(sequence);
  2849. int index = SEQ_TO_INDEX(sequence);
  2850. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2851. struct ieee80211_tx_status *tx_status;
  2852. struct iwl_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2853. u32 status = le32_to_cpu(tx_resp->status);
  2854. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2855. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2856. "is out of range [0-%d] %d %d\n", txq_id,
  2857. index, txq->q.n_bd, txq->q.first_empty,
  2858. txq->q.last_used);
  2859. return;
  2860. }
  2861. tx_status = &(txq->txb[txq->q.last_used].status);
  2862. tx_status->retry_count = tx_resp->failure_frame;
  2863. tx_status->queue_number = status;
  2864. tx_status->queue_length = tx_resp->bt_kill_count;
  2865. tx_status->queue_length |= tx_resp->failure_rts;
  2866. tx_status->flags =
  2867. iwl_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2868. tx_status->control.tx_rate = iwl_rate_index_from_plcp(tx_resp->rate);
  2869. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
  2870. txq_id, iwl_get_tx_fail_reason(status), status,
  2871. tx_resp->rate, tx_resp->failure_frame);
  2872. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2873. if (index != -1)
  2874. iwl_tx_queue_reclaim(priv, txq_id, index);
  2875. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2876. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2877. }
  2878. static void iwl_rx_reply_alive(struct iwl_priv *priv,
  2879. struct iwl_rx_mem_buffer *rxb)
  2880. {
  2881. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2882. struct iwl_alive_resp *palive;
  2883. struct delayed_work *pwork;
  2884. palive = &pkt->u.alive_frame;
  2885. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2886. "0x%01X 0x%01X\n",
  2887. palive->is_valid, palive->ver_type,
  2888. palive->ver_subtype);
  2889. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2890. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2891. memcpy(&priv->card_alive_init,
  2892. &pkt->u.alive_frame,
  2893. sizeof(struct iwl_init_alive_resp));
  2894. pwork = &priv->init_alive_start;
  2895. } else {
  2896. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2897. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2898. sizeof(struct iwl_alive_resp));
  2899. pwork = &priv->alive_start;
  2900. iwl_disable_events(priv);
  2901. }
  2902. /* We delay the ALIVE response by 5ms to
  2903. * give the HW RF Kill time to activate... */
  2904. if (palive->is_valid == UCODE_VALID_OK)
  2905. queue_delayed_work(priv->workqueue, pwork,
  2906. msecs_to_jiffies(5));
  2907. else
  2908. IWL_WARNING("uCode did not respond OK.\n");
  2909. }
  2910. static void iwl_rx_reply_add_sta(struct iwl_priv *priv,
  2911. struct iwl_rx_mem_buffer *rxb)
  2912. {
  2913. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2914. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2915. return;
  2916. }
  2917. static void iwl_rx_reply_error(struct iwl_priv *priv,
  2918. struct iwl_rx_mem_buffer *rxb)
  2919. {
  2920. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2921. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2922. "seq 0x%04X ser 0x%08X\n",
  2923. le32_to_cpu(pkt->u.err_resp.error_type),
  2924. get_cmd_string(pkt->u.err_resp.cmd_id),
  2925. pkt->u.err_resp.cmd_id,
  2926. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2927. le32_to_cpu(pkt->u.err_resp.error_info));
  2928. }
  2929. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2930. static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  2931. {
  2932. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2933. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2934. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  2935. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2936. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2937. rxon->channel = csa->channel;
  2938. priv->staging_rxon.channel = csa->channel;
  2939. }
  2940. static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2941. struct iwl_rx_mem_buffer *rxb)
  2942. {
  2943. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2944. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2945. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2946. if (!report->state) {
  2947. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2948. "Spectrum Measure Notification: Start\n");
  2949. return;
  2950. }
  2951. memcpy(&priv->measure_report, report, sizeof(*report));
  2952. priv->measurement_status |= MEASUREMENT_READY;
  2953. #endif
  2954. }
  2955. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  2956. struct iwl_rx_mem_buffer *rxb)
  2957. {
  2958. #ifdef CONFIG_IWLWIFI_DEBUG
  2959. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2960. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2961. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2962. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2963. #endif
  2964. }
  2965. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2966. struct iwl_rx_mem_buffer *rxb)
  2967. {
  2968. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2969. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2970. "notification for %s:\n",
  2971. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2972. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2973. }
  2974. static void iwl_bg_beacon_update(struct work_struct *work)
  2975. {
  2976. struct iwl_priv *priv =
  2977. container_of(work, struct iwl_priv, beacon_update);
  2978. struct sk_buff *beacon;
  2979. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2980. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  2981. if (!beacon) {
  2982. IWL_ERROR("update beacon failed\n");
  2983. return;
  2984. }
  2985. mutex_lock(&priv->mutex);
  2986. /* new beacon skb is allocated every time; dispose previous.*/
  2987. if (priv->ibss_beacon)
  2988. dev_kfree_skb(priv->ibss_beacon);
  2989. priv->ibss_beacon = beacon;
  2990. mutex_unlock(&priv->mutex);
  2991. iwl_send_beacon_cmd(priv);
  2992. }
  2993. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  2994. struct iwl_rx_mem_buffer *rxb)
  2995. {
  2996. #ifdef CONFIG_IWLWIFI_DEBUG
  2997. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2998. struct iwl_beacon_notif *beacon = &(pkt->u.beacon_status);
  2999. u8 rate = beacon->beacon_notify_hdr.rate;
  3000. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3001. "tsf %d %d rate %d\n",
  3002. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3003. beacon->beacon_notify_hdr.failure_frame,
  3004. le32_to_cpu(beacon->ibss_mgr_status),
  3005. le32_to_cpu(beacon->high_tsf),
  3006. le32_to_cpu(beacon->low_tsf), rate);
  3007. #endif
  3008. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3009. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3010. queue_work(priv->workqueue, &priv->beacon_update);
  3011. }
  3012. /* Service response to REPLY_SCAN_CMD (0x80) */
  3013. static void iwl_rx_reply_scan(struct iwl_priv *priv,
  3014. struct iwl_rx_mem_buffer *rxb)
  3015. {
  3016. #ifdef CONFIG_IWLWIFI_DEBUG
  3017. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3018. struct iwl_scanreq_notification *notif =
  3019. (struct iwl_scanreq_notification *)pkt->u.raw;
  3020. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3021. #endif
  3022. }
  3023. /* Service SCAN_START_NOTIFICATION (0x82) */
  3024. static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
  3025. struct iwl_rx_mem_buffer *rxb)
  3026. {
  3027. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3028. struct iwl_scanstart_notification *notif =
  3029. (struct iwl_scanstart_notification *)pkt->u.raw;
  3030. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3031. IWL_DEBUG_SCAN("Scan start: "
  3032. "%d [802.11%s] "
  3033. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3034. notif->channel,
  3035. notif->band ? "bg" : "a",
  3036. notif->tsf_high,
  3037. notif->tsf_low, notif->status, notif->beacon_timer);
  3038. }
  3039. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3040. static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
  3041. struct iwl_rx_mem_buffer *rxb)
  3042. {
  3043. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3044. struct iwl_scanresults_notification *notif =
  3045. (struct iwl_scanresults_notification *)pkt->u.raw;
  3046. IWL_DEBUG_SCAN("Scan ch.res: "
  3047. "%d [802.11%s] "
  3048. "(TSF: 0x%08X:%08X) - %d "
  3049. "elapsed=%lu usec (%dms since last)\n",
  3050. notif->channel,
  3051. notif->band ? "bg" : "a",
  3052. le32_to_cpu(notif->tsf_high),
  3053. le32_to_cpu(notif->tsf_low),
  3054. le32_to_cpu(notif->statistics[0]),
  3055. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3056. jiffies_to_msecs(elapsed_jiffies
  3057. (priv->last_scan_jiffies, jiffies)));
  3058. priv->last_scan_jiffies = jiffies;
  3059. }
  3060. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3061. static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
  3062. struct iwl_rx_mem_buffer *rxb)
  3063. {
  3064. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3065. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3066. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3067. scan_notif->scanned_channels,
  3068. scan_notif->tsf_low,
  3069. scan_notif->tsf_high, scan_notif->status);
  3070. /* The HW is no longer scanning */
  3071. clear_bit(STATUS_SCAN_HW, &priv->status);
  3072. /* The scan completion notification came in, so kill that timer... */
  3073. cancel_delayed_work(&priv->scan_check);
  3074. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3075. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3076. jiffies_to_msecs(elapsed_jiffies
  3077. (priv->scan_pass_start, jiffies)));
  3078. /* Remove this scanned band from the list
  3079. * of pending bands to scan */
  3080. priv->scan_bands--;
  3081. /* If a request to abort was given, or the scan did not succeed
  3082. * then we reset the scan state machine and terminate,
  3083. * re-queuing another scan if one has been requested */
  3084. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3085. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3086. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3087. } else {
  3088. /* If there are more bands on this scan pass reschedule */
  3089. if (priv->scan_bands > 0)
  3090. goto reschedule;
  3091. }
  3092. priv->last_scan_jiffies = jiffies;
  3093. IWL_DEBUG_INFO("Setting scan to off\n");
  3094. clear_bit(STATUS_SCANNING, &priv->status);
  3095. IWL_DEBUG_INFO("Scan took %dms\n",
  3096. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3097. queue_work(priv->workqueue, &priv->scan_completed);
  3098. return;
  3099. reschedule:
  3100. priv->scan_pass_start = jiffies;
  3101. queue_work(priv->workqueue, &priv->request_scan);
  3102. }
  3103. /* Handle notification from uCode that card's power state is changing
  3104. * due to software, hardware, or critical temperature RFKILL */
  3105. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  3106. struct iwl_rx_mem_buffer *rxb)
  3107. {
  3108. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3109. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3110. unsigned long status = priv->status;
  3111. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3112. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3113. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3114. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3115. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3116. if (flags & HW_CARD_DISABLED)
  3117. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3118. else
  3119. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3120. if (flags & SW_CARD_DISABLED)
  3121. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3122. else
  3123. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3124. iwl_scan_cancel(priv);
  3125. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3126. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3127. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3128. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3129. queue_work(priv->workqueue, &priv->rf_kill);
  3130. else
  3131. wake_up_interruptible(&priv->wait_command_queue);
  3132. }
  3133. /**
  3134. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  3135. *
  3136. * Setup the RX handlers for each of the reply types sent from the uCode
  3137. * to the host.
  3138. *
  3139. * This function chains into the hardware specific files for them to setup
  3140. * any hardware specific handlers as well.
  3141. */
  3142. static void iwl_setup_rx_handlers(struct iwl_priv *priv)
  3143. {
  3144. priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
  3145. priv->rx_handlers[REPLY_ADD_STA] = iwl_rx_reply_add_sta;
  3146. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  3147. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  3148. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3149. iwl_rx_spectrum_measure_notif;
  3150. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  3151. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3152. iwl_rx_pm_debug_statistics_notif;
  3153. priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  3154. /* NOTE: iwl_rx_statistics is different based on whether
  3155. * the build is for the 3945 or the 4965. See the
  3156. * corresponding implementation in iwl-XXXX.c
  3157. *
  3158. * The same handler is used for both the REPLY to a
  3159. * discrete statistics request from the host as well as
  3160. * for the periodic statistics notification from the uCode
  3161. */
  3162. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_hw_rx_statistics;
  3163. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_hw_rx_statistics;
  3164. priv->rx_handlers[REPLY_SCAN_CMD] = iwl_rx_reply_scan;
  3165. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl_rx_scan_start_notif;
  3166. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3167. iwl_rx_scan_results_notif;
  3168. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3169. iwl_rx_scan_complete_notif;
  3170. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  3171. priv->rx_handlers[REPLY_TX] = iwl_rx_reply_tx;
  3172. /* Setup hardware specific Rx handlers */
  3173. iwl_hw_rx_handler_setup(priv);
  3174. }
  3175. /**
  3176. * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3177. * @rxb: Rx buffer to reclaim
  3178. *
  3179. * If an Rx buffer has an async callback associated with it the callback
  3180. * will be executed. The attached skb (if present) will only be freed
  3181. * if the callback returns 1
  3182. */
  3183. static void iwl_tx_cmd_complete(struct iwl_priv *priv,
  3184. struct iwl_rx_mem_buffer *rxb)
  3185. {
  3186. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3187. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3188. int txq_id = SEQ_TO_QUEUE(sequence);
  3189. int index = SEQ_TO_INDEX(sequence);
  3190. int huge = sequence & SEQ_HUGE_FRAME;
  3191. int cmd_index;
  3192. struct iwl_cmd *cmd;
  3193. /* If a Tx command is being handled and it isn't in the actual
  3194. * command queue then there a command routing bug has been introduced
  3195. * in the queue management code. */
  3196. if (txq_id != IWL_CMD_QUEUE_NUM)
  3197. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3198. txq_id, pkt->hdr.cmd);
  3199. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3200. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3201. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3202. /* Input error checking is done when commands are added to queue. */
  3203. if (cmd->meta.flags & CMD_WANT_SKB) {
  3204. cmd->meta.source->u.skb = rxb->skb;
  3205. rxb->skb = NULL;
  3206. } else if (cmd->meta.u.callback &&
  3207. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3208. rxb->skb = NULL;
  3209. iwl_tx_queue_reclaim(priv, txq_id, index);
  3210. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3211. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3212. wake_up_interruptible(&priv->wait_command_queue);
  3213. }
  3214. }
  3215. /************************** RX-FUNCTIONS ****************************/
  3216. /*
  3217. * Rx theory of operation
  3218. *
  3219. * The host allocates 32 DMA target addresses and passes the host address
  3220. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  3221. * 0 to 31
  3222. *
  3223. * Rx Queue Indexes
  3224. * The host/firmware share two index registers for managing the Rx buffers.
  3225. *
  3226. * The READ index maps to the first position that the firmware may be writing
  3227. * to -- the driver can read up to (but not including) this position and get
  3228. * good data.
  3229. * The READ index is managed by the firmware once the card is enabled.
  3230. *
  3231. * The WRITE index maps to the last position the driver has read from -- the
  3232. * position preceding WRITE is the last slot the firmware can place a packet.
  3233. *
  3234. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3235. * WRITE = READ.
  3236. *
  3237. * During initialization the host sets up the READ queue position to the first
  3238. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3239. *
  3240. * When the firmware places a packet in a buffer it will advance the READ index
  3241. * and fire the RX interrupt. The driver can then query the READ index and
  3242. * process as many packets as possible, moving the WRITE index forward as it
  3243. * resets the Rx queue buffers with new memory.
  3244. *
  3245. * The management in the driver is as follows:
  3246. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3247. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3248. * to replensish the iwl->rxq->rx_free.
  3249. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  3250. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3251. * 'processed' and 'read' driver indexes as well)
  3252. * + A received packet is processed and handed to the kernel network stack,
  3253. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3254. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3255. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3256. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3257. * were enough free buffers and RX_STALLED is set it is cleared.
  3258. *
  3259. *
  3260. * Driver sequence:
  3261. *
  3262. * iwl_rx_queue_alloc() Allocates rx_free
  3263. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3264. * iwl_rx_queue_restock
  3265. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  3266. * queue, updates firmware pointers, and updates
  3267. * the WRITE index. If insufficient rx_free buffers
  3268. * are available, schedules iwl_rx_replenish
  3269. *
  3270. * -- enable interrupts --
  3271. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  3272. * READ INDEX, detaching the SKB from the pool.
  3273. * Moves the packet buffer from queue to rx_used.
  3274. * Calls iwl_rx_queue_restock to refill any empty
  3275. * slots.
  3276. * ...
  3277. *
  3278. */
  3279. /**
  3280. * iwl_rx_queue_space - Return number of free slots available in queue.
  3281. */
  3282. static int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  3283. {
  3284. int s = q->read - q->write;
  3285. if (s <= 0)
  3286. s += RX_QUEUE_SIZE;
  3287. /* keep some buffer to not confuse full and empty queue */
  3288. s -= 2;
  3289. if (s < 0)
  3290. s = 0;
  3291. return s;
  3292. }
  3293. /**
  3294. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3295. *
  3296. * NOTE: This function has 3945 and 4965 specific code sections
  3297. * but is declared in base due to the majority of the
  3298. * implementation being the same (only a numeric constant is
  3299. * different)
  3300. *
  3301. */
  3302. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  3303. {
  3304. u32 reg = 0;
  3305. int rc = 0;
  3306. unsigned long flags;
  3307. spin_lock_irqsave(&q->lock, flags);
  3308. if (q->need_update == 0)
  3309. goto exit_unlock;
  3310. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3311. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3312. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3313. iwl_set_bit(priv, CSR_GP_CNTRL,
  3314. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3315. goto exit_unlock;
  3316. }
  3317. rc = iwl_grab_restricted_access(priv);
  3318. if (rc)
  3319. goto exit_unlock;
  3320. iwl_write_restricted(priv, FH_RSCSR_CHNL0_WPTR,
  3321. q->write & ~0x7);
  3322. iwl_release_restricted_access(priv);
  3323. } else
  3324. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3325. q->need_update = 0;
  3326. exit_unlock:
  3327. spin_unlock_irqrestore(&q->lock, flags);
  3328. return rc;
  3329. }
  3330. /**
  3331. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
  3332. *
  3333. * NOTE: This function has 3945 and 4965 specific code paths in it.
  3334. */
  3335. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3336. dma_addr_t dma_addr)
  3337. {
  3338. return cpu_to_le32((u32)dma_addr);
  3339. }
  3340. /**
  3341. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  3342. *
  3343. * If there are slots in the RX queue that need to be restocked,
  3344. * and we have free pre-allocated buffers, fill the ranks as much
  3345. * as we can pulling from rx_free.
  3346. *
  3347. * This moves the 'write' index forward to catch up with 'processed', and
  3348. * also updates the memory address in the firmware to reference the new
  3349. * target buffer.
  3350. */
  3351. int iwl_rx_queue_restock(struct iwl_priv *priv)
  3352. {
  3353. struct iwl_rx_queue *rxq = &priv->rxq;
  3354. struct list_head *element;
  3355. struct iwl_rx_mem_buffer *rxb;
  3356. unsigned long flags;
  3357. int write, rc;
  3358. spin_lock_irqsave(&rxq->lock, flags);
  3359. write = rxq->write & ~0x7;
  3360. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3361. element = rxq->rx_free.next;
  3362. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3363. list_del(element);
  3364. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3365. rxq->queue[rxq->write] = rxb;
  3366. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3367. rxq->free_count--;
  3368. }
  3369. spin_unlock_irqrestore(&rxq->lock, flags);
  3370. /* If the pre-allocated buffer pool is dropping low, schedule to
  3371. * refill it */
  3372. if (rxq->free_count <= RX_LOW_WATERMARK)
  3373. queue_work(priv->workqueue, &priv->rx_replenish);
  3374. /* If we've added more space for the firmware to place data, tell it */
  3375. if ((write != (rxq->write & ~0x7))
  3376. || (abs(rxq->write - rxq->read) > 7)) {
  3377. spin_lock_irqsave(&rxq->lock, flags);
  3378. rxq->need_update = 1;
  3379. spin_unlock_irqrestore(&rxq->lock, flags);
  3380. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  3381. if (rc)
  3382. return rc;
  3383. }
  3384. return 0;
  3385. }
  3386. /**
  3387. * iwl_rx_replensih - Move all used packet from rx_used to rx_free
  3388. *
  3389. * When moving to rx_free an SKB is allocated for the slot.
  3390. *
  3391. * Also restock the Rx queue via iwl_rx_queue_restock.
  3392. * This is called as a scheduled work item (except for during intialization)
  3393. */
  3394. void iwl_rx_replenish(void *data)
  3395. {
  3396. struct iwl_priv *priv = data;
  3397. struct iwl_rx_queue *rxq = &priv->rxq;
  3398. struct list_head *element;
  3399. struct iwl_rx_mem_buffer *rxb;
  3400. unsigned long flags;
  3401. spin_lock_irqsave(&rxq->lock, flags);
  3402. while (!list_empty(&rxq->rx_used)) {
  3403. element = rxq->rx_used.next;
  3404. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3405. rxb->skb =
  3406. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3407. if (!rxb->skb) {
  3408. if (net_ratelimit())
  3409. printk(KERN_CRIT DRV_NAME
  3410. ": Can not allocate SKB buffers\n");
  3411. /* We don't reschedule replenish work here -- we will
  3412. * call the restock method and if it still needs
  3413. * more buffers it will schedule replenish */
  3414. break;
  3415. }
  3416. priv->alloc_rxb_skb++;
  3417. list_del(element);
  3418. rxb->dma_addr =
  3419. pci_map_single(priv->pci_dev, rxb->skb->data,
  3420. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3421. list_add_tail(&rxb->list, &rxq->rx_free);
  3422. rxq->free_count++;
  3423. }
  3424. spin_unlock_irqrestore(&rxq->lock, flags);
  3425. spin_lock_irqsave(&priv->lock, flags);
  3426. iwl_rx_queue_restock(priv);
  3427. spin_unlock_irqrestore(&priv->lock, flags);
  3428. }
  3429. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3430. * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
  3431. * This free routine walks the list of POOL entries and if SKB is set to
  3432. * non NULL it is unmapped and freed
  3433. */
  3434. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3435. {
  3436. int i;
  3437. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3438. if (rxq->pool[i].skb != NULL) {
  3439. pci_unmap_single(priv->pci_dev,
  3440. rxq->pool[i].dma_addr,
  3441. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3442. dev_kfree_skb(rxq->pool[i].skb);
  3443. }
  3444. }
  3445. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3446. rxq->dma_addr);
  3447. rxq->bd = NULL;
  3448. }
  3449. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  3450. {
  3451. struct iwl_rx_queue *rxq = &priv->rxq;
  3452. struct pci_dev *dev = priv->pci_dev;
  3453. int i;
  3454. spin_lock_init(&rxq->lock);
  3455. INIT_LIST_HEAD(&rxq->rx_free);
  3456. INIT_LIST_HEAD(&rxq->rx_used);
  3457. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3458. if (!rxq->bd)
  3459. return -ENOMEM;
  3460. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3461. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3462. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3463. /* Set us so that we have processed and used all buffers, but have
  3464. * not restocked the Rx queue with fresh buffers */
  3465. rxq->read = rxq->write = 0;
  3466. rxq->free_count = 0;
  3467. rxq->need_update = 0;
  3468. return 0;
  3469. }
  3470. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3471. {
  3472. unsigned long flags;
  3473. int i;
  3474. spin_lock_irqsave(&rxq->lock, flags);
  3475. INIT_LIST_HEAD(&rxq->rx_free);
  3476. INIT_LIST_HEAD(&rxq->rx_used);
  3477. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3478. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3479. /* In the reset function, these buffers may have been allocated
  3480. * to an SKB, so we need to unmap and free potential storage */
  3481. if (rxq->pool[i].skb != NULL) {
  3482. pci_unmap_single(priv->pci_dev,
  3483. rxq->pool[i].dma_addr,
  3484. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3485. priv->alloc_rxb_skb--;
  3486. dev_kfree_skb(rxq->pool[i].skb);
  3487. rxq->pool[i].skb = NULL;
  3488. }
  3489. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3490. }
  3491. /* Set us so that we have processed and used all buffers, but have
  3492. * not restocked the Rx queue with fresh buffers */
  3493. rxq->read = rxq->write = 0;
  3494. rxq->free_count = 0;
  3495. spin_unlock_irqrestore(&rxq->lock, flags);
  3496. }
  3497. /* Convert linear signal-to-noise ratio into dB */
  3498. static u8 ratio2dB[100] = {
  3499. /* 0 1 2 3 4 5 6 7 8 9 */
  3500. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3501. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3502. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3503. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3504. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3505. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3506. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3507. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3508. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3509. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3510. };
  3511. /* Calculates a relative dB value from a ratio of linear
  3512. * (i.e. not dB) signal levels.
  3513. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3514. int iwl_calc_db_from_ratio(int sig_ratio)
  3515. {
  3516. /* Anything above 1000:1 just report as 60 dB */
  3517. if (sig_ratio > 1000)
  3518. return 60;
  3519. /* Above 100:1, divide by 10 and use table,
  3520. * add 20 dB to make up for divide by 10 */
  3521. if (sig_ratio > 100)
  3522. return (20 + (int)ratio2dB[sig_ratio/10]);
  3523. /* We shouldn't see this */
  3524. if (sig_ratio < 1)
  3525. return 0;
  3526. /* Use table for ratios 1:1 - 99:1 */
  3527. return (int)ratio2dB[sig_ratio];
  3528. }
  3529. #define PERFECT_RSSI (-20) /* dBm */
  3530. #define WORST_RSSI (-95) /* dBm */
  3531. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3532. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3533. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3534. * about formulas used below. */
  3535. int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3536. {
  3537. int sig_qual;
  3538. int degradation = PERFECT_RSSI - rssi_dbm;
  3539. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3540. * as indicator; formula is (signal dbm - noise dbm).
  3541. * SNR at or above 40 is a great signal (100%).
  3542. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3543. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3544. if (noise_dbm) {
  3545. if (rssi_dbm - noise_dbm >= 40)
  3546. return 100;
  3547. else if (rssi_dbm < noise_dbm)
  3548. return 0;
  3549. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3550. /* Else use just the signal level.
  3551. * This formula is a least squares fit of data points collected and
  3552. * compared with a reference system that had a percentage (%) display
  3553. * for signal quality. */
  3554. } else
  3555. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3556. (15 * RSSI_RANGE + 62 * degradation)) /
  3557. (RSSI_RANGE * RSSI_RANGE);
  3558. if (sig_qual > 100)
  3559. sig_qual = 100;
  3560. else if (sig_qual < 1)
  3561. sig_qual = 0;
  3562. return sig_qual;
  3563. }
  3564. /**
  3565. * iwl_rx_handle - Main entry function for receiving responses from the uCode
  3566. *
  3567. * Uses the priv->rx_handlers callback function array to invoke
  3568. * the appropriate handlers, including command responses,
  3569. * frame-received notifications, and other notifications.
  3570. */
  3571. static void iwl_rx_handle(struct iwl_priv *priv)
  3572. {
  3573. struct iwl_rx_mem_buffer *rxb;
  3574. struct iwl_rx_packet *pkt;
  3575. struct iwl_rx_queue *rxq = &priv->rxq;
  3576. u32 r, i;
  3577. int reclaim;
  3578. unsigned long flags;
  3579. r = iwl_hw_get_rx_read(priv);
  3580. i = rxq->read;
  3581. /* Rx interrupt, but nothing sent from uCode */
  3582. if (i == r)
  3583. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3584. while (i != r) {
  3585. rxb = rxq->queue[i];
  3586. /* If an RXB doesn't have a queue slot associated with it
  3587. * then a bug has been introduced in the queue refilling
  3588. * routines -- catch it here */
  3589. BUG_ON(rxb == NULL);
  3590. rxq->queue[i] = NULL;
  3591. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3592. IWL_RX_BUF_SIZE,
  3593. PCI_DMA_FROMDEVICE);
  3594. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3595. /* Reclaim a command buffer only if this packet is a response
  3596. * to a (driver-originated) command.
  3597. * If the packet (e.g. Rx frame) originated from uCode,
  3598. * there is no command buffer to reclaim.
  3599. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3600. * but apparently a few don't get set; catch them here. */
  3601. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3602. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3603. (pkt->hdr.cmd != REPLY_TX);
  3604. /* Based on type of command response or notification,
  3605. * handle those that need handling via function in
  3606. * rx_handlers table. See iwl_setup_rx_handlers() */
  3607. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3608. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3609. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3610. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3611. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3612. } else {
  3613. /* No handling needed */
  3614. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3615. "r %d i %d No handler needed for %s, 0x%02x\n",
  3616. r, i, get_cmd_string(pkt->hdr.cmd),
  3617. pkt->hdr.cmd);
  3618. }
  3619. if (reclaim) {
  3620. /* Invoke any callbacks, transfer the skb to caller,
  3621. * and fire off the (possibly) blocking iwl_send_cmd()
  3622. * as we reclaim the driver command queue */
  3623. if (rxb && rxb->skb)
  3624. iwl_tx_cmd_complete(priv, rxb);
  3625. else
  3626. IWL_WARNING("Claim null rxb?\n");
  3627. }
  3628. /* For now we just don't re-use anything. We can tweak this
  3629. * later to try and re-use notification packets and SKBs that
  3630. * fail to Rx correctly */
  3631. if (rxb->skb != NULL) {
  3632. priv->alloc_rxb_skb--;
  3633. dev_kfree_skb_any(rxb->skb);
  3634. rxb->skb = NULL;
  3635. }
  3636. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3637. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3638. spin_lock_irqsave(&rxq->lock, flags);
  3639. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3640. spin_unlock_irqrestore(&rxq->lock, flags);
  3641. i = (i + 1) & RX_QUEUE_MASK;
  3642. }
  3643. /* Backtrack one entry */
  3644. priv->rxq.read = i;
  3645. iwl_rx_queue_restock(priv);
  3646. }
  3647. int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3648. struct iwl_tx_queue *txq)
  3649. {
  3650. u32 reg = 0;
  3651. int rc = 0;
  3652. int txq_id = txq->q.id;
  3653. if (txq->need_update == 0)
  3654. return rc;
  3655. /* if we're trying to save power */
  3656. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3657. /* wake up nic if it's powered down ...
  3658. * uCode will wake up, and interrupt us again, so next
  3659. * time we'll skip this part. */
  3660. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3661. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3662. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3663. iwl_set_bit(priv, CSR_GP_CNTRL,
  3664. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3665. return rc;
  3666. }
  3667. /* restore this queue's parameters in nic hardware. */
  3668. rc = iwl_grab_restricted_access(priv);
  3669. if (rc)
  3670. return rc;
  3671. iwl_write_restricted(priv, HBUS_TARG_WRPTR,
  3672. txq->q.first_empty | (txq_id << 8));
  3673. iwl_release_restricted_access(priv);
  3674. /* else not in power-save mode, uCode will never sleep when we're
  3675. * trying to tx (during RFKILL, we're not trying to tx). */
  3676. } else
  3677. iwl_write32(priv, HBUS_TARG_WRPTR,
  3678. txq->q.first_empty | (txq_id << 8));
  3679. txq->need_update = 0;
  3680. return rc;
  3681. }
  3682. #ifdef CONFIG_IWLWIFI_DEBUG
  3683. static void iwl_print_rx_config_cmd(struct iwl_rxon_cmd *rxon)
  3684. {
  3685. DECLARE_MAC_BUF(mac);
  3686. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3687. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3688. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3689. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3690. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3691. le32_to_cpu(rxon->filter_flags));
  3692. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3693. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3694. rxon->ofdm_basic_rates);
  3695. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3696. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3697. print_mac(mac, rxon->node_addr));
  3698. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3699. print_mac(mac, rxon->bssid_addr));
  3700. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3701. }
  3702. #endif
  3703. static void iwl_enable_interrupts(struct iwl_priv *priv)
  3704. {
  3705. IWL_DEBUG_ISR("Enabling interrupts\n");
  3706. set_bit(STATUS_INT_ENABLED, &priv->status);
  3707. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3708. }
  3709. static inline void iwl_disable_interrupts(struct iwl_priv *priv)
  3710. {
  3711. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3712. /* disable interrupts from uCode/NIC to host */
  3713. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3714. /* acknowledge/clear/reset any interrupts still pending
  3715. * from uCode or flow handler (Rx/Tx DMA) */
  3716. iwl_write32(priv, CSR_INT, 0xffffffff);
  3717. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3718. IWL_DEBUG_ISR("Disabled interrupts\n");
  3719. }
  3720. static const char *desc_lookup(int i)
  3721. {
  3722. switch (i) {
  3723. case 1:
  3724. return "FAIL";
  3725. case 2:
  3726. return "BAD_PARAM";
  3727. case 3:
  3728. return "BAD_CHECKSUM";
  3729. case 4:
  3730. return "NMI_INTERRUPT";
  3731. case 5:
  3732. return "SYSASSERT";
  3733. case 6:
  3734. return "FATAL_ERROR";
  3735. }
  3736. return "UNKNOWN";
  3737. }
  3738. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3739. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3740. static void iwl_dump_nic_error_log(struct iwl_priv *priv)
  3741. {
  3742. u32 i;
  3743. u32 desc, time, count, base, data1;
  3744. u32 blink1, blink2, ilink1, ilink2;
  3745. int rc;
  3746. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3747. if (!iwl_hw_valid_rtc_data_addr(base)) {
  3748. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3749. return;
  3750. }
  3751. rc = iwl_grab_restricted_access(priv);
  3752. if (rc) {
  3753. IWL_WARNING("Can not read from adapter at this time.\n");
  3754. return;
  3755. }
  3756. count = iwl_read_restricted_mem(priv, base);
  3757. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3758. IWL_ERROR("Start IWL Error Log Dump:\n");
  3759. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  3760. priv->status, priv->config, count);
  3761. }
  3762. IWL_ERROR("Desc Time asrtPC blink2 "
  3763. "ilink1 nmiPC Line\n");
  3764. for (i = ERROR_START_OFFSET;
  3765. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  3766. i += ERROR_ELEM_SIZE) {
  3767. desc = iwl_read_restricted_mem(priv, base + i);
  3768. time =
  3769. iwl_read_restricted_mem(priv, base + i + 1 * sizeof(u32));
  3770. blink1 =
  3771. iwl_read_restricted_mem(priv, base + i + 2 * sizeof(u32));
  3772. blink2 =
  3773. iwl_read_restricted_mem(priv, base + i + 3 * sizeof(u32));
  3774. ilink1 =
  3775. iwl_read_restricted_mem(priv, base + i + 4 * sizeof(u32));
  3776. ilink2 =
  3777. iwl_read_restricted_mem(priv, base + i + 5 * sizeof(u32));
  3778. data1 =
  3779. iwl_read_restricted_mem(priv, base + i + 6 * sizeof(u32));
  3780. IWL_ERROR
  3781. ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  3782. desc_lookup(desc), desc, time, blink1, blink2,
  3783. ilink1, ilink2, data1);
  3784. }
  3785. iwl_release_restricted_access(priv);
  3786. }
  3787. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3788. /**
  3789. * iwl_print_event_log - Dump error event log to syslog
  3790. *
  3791. * NOTE: Must be called with iwl_grab_restricted_access() already obtained!
  3792. */
  3793. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3794. u32 num_events, u32 mode)
  3795. {
  3796. u32 i;
  3797. u32 base; /* SRAM byte address of event log header */
  3798. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3799. u32 ptr; /* SRAM byte address of log data */
  3800. u32 ev, time, data; /* event log data */
  3801. if (num_events == 0)
  3802. return;
  3803. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3804. if (mode == 0)
  3805. event_size = 2 * sizeof(u32);
  3806. else
  3807. event_size = 3 * sizeof(u32);
  3808. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3809. /* "time" is actually "data" for mode 0 (no timestamp).
  3810. * place event id # at far right for easier visual parsing. */
  3811. for (i = 0; i < num_events; i++) {
  3812. ev = iwl_read_restricted_mem(priv, ptr);
  3813. ptr += sizeof(u32);
  3814. time = iwl_read_restricted_mem(priv, ptr);
  3815. ptr += sizeof(u32);
  3816. if (mode == 0)
  3817. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3818. else {
  3819. data = iwl_read_restricted_mem(priv, ptr);
  3820. ptr += sizeof(u32);
  3821. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3822. }
  3823. }
  3824. }
  3825. static void iwl_dump_nic_event_log(struct iwl_priv *priv)
  3826. {
  3827. int rc;
  3828. u32 base; /* SRAM byte address of event log header */
  3829. u32 capacity; /* event log capacity in # entries */
  3830. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3831. u32 num_wraps; /* # times uCode wrapped to top of log */
  3832. u32 next_entry; /* index of next entry to be written by uCode */
  3833. u32 size; /* # entries that we'll print */
  3834. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3835. if (!iwl_hw_valid_rtc_data_addr(base)) {
  3836. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3837. return;
  3838. }
  3839. rc = iwl_grab_restricted_access(priv);
  3840. if (rc) {
  3841. IWL_WARNING("Can not read from adapter at this time.\n");
  3842. return;
  3843. }
  3844. /* event log header */
  3845. capacity = iwl_read_restricted_mem(priv, base);
  3846. mode = iwl_read_restricted_mem(priv, base + (1 * sizeof(u32)));
  3847. num_wraps = iwl_read_restricted_mem(priv, base + (2 * sizeof(u32)));
  3848. next_entry = iwl_read_restricted_mem(priv, base + (3 * sizeof(u32)));
  3849. size = num_wraps ? capacity : next_entry;
  3850. /* bail out if nothing in log */
  3851. if (size == 0) {
  3852. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3853. iwl_release_restricted_access(priv);
  3854. return;
  3855. }
  3856. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3857. size, num_wraps);
  3858. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3859. * i.e the next one that uCode would fill. */
  3860. if (num_wraps)
  3861. iwl_print_event_log(priv, next_entry,
  3862. capacity - next_entry, mode);
  3863. /* (then/else) start at top of log */
  3864. iwl_print_event_log(priv, 0, next_entry, mode);
  3865. iwl_release_restricted_access(priv);
  3866. }
  3867. /**
  3868. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  3869. */
  3870. static void iwl_irq_handle_error(struct iwl_priv *priv)
  3871. {
  3872. /* Set the FW error flag -- cleared on iwl_down */
  3873. set_bit(STATUS_FW_ERROR, &priv->status);
  3874. /* Cancel currently queued command. */
  3875. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3876. #ifdef CONFIG_IWLWIFI_DEBUG
  3877. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3878. iwl_dump_nic_error_log(priv);
  3879. iwl_dump_nic_event_log(priv);
  3880. iwl_print_rx_config_cmd(&priv->staging_rxon);
  3881. }
  3882. #endif
  3883. wake_up_interruptible(&priv->wait_command_queue);
  3884. /* Keep the restart process from trying to send host
  3885. * commands by clearing the INIT status bit */
  3886. clear_bit(STATUS_READY, &priv->status);
  3887. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3888. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3889. "Restarting adapter due to uCode error.\n");
  3890. if (iwl_is_associated(priv)) {
  3891. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3892. sizeof(priv->recovery_rxon));
  3893. priv->error_recovering = 1;
  3894. }
  3895. queue_work(priv->workqueue, &priv->restart);
  3896. }
  3897. }
  3898. static void iwl_error_recovery(struct iwl_priv *priv)
  3899. {
  3900. unsigned long flags;
  3901. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3902. sizeof(priv->staging_rxon));
  3903. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3904. iwl_commit_rxon(priv);
  3905. iwl_add_station(priv, priv->bssid, 1, 0);
  3906. spin_lock_irqsave(&priv->lock, flags);
  3907. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3908. priv->error_recovering = 0;
  3909. spin_unlock_irqrestore(&priv->lock, flags);
  3910. }
  3911. static void iwl_irq_tasklet(struct iwl_priv *priv)
  3912. {
  3913. u32 inta, handled = 0;
  3914. u32 inta_fh;
  3915. unsigned long flags;
  3916. #ifdef CONFIG_IWLWIFI_DEBUG
  3917. u32 inta_mask;
  3918. #endif
  3919. spin_lock_irqsave(&priv->lock, flags);
  3920. /* Ack/clear/reset pending uCode interrupts.
  3921. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3922. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3923. inta = iwl_read32(priv, CSR_INT);
  3924. iwl_write32(priv, CSR_INT, inta);
  3925. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3926. * Any new interrupts that happen after this, either while we're
  3927. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3928. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3929. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3930. #ifdef CONFIG_IWLWIFI_DEBUG
  3931. if (iwl_debug_level & IWL_DL_ISR) {
  3932. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3933. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3934. inta, inta_mask, inta_fh);
  3935. }
  3936. #endif
  3937. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3938. * atomic, make sure that inta covers all the interrupts that
  3939. * we've discovered, even if FH interrupt came in just after
  3940. * reading CSR_INT. */
  3941. if (inta_fh & CSR_FH_INT_RX_MASK)
  3942. inta |= CSR_INT_BIT_FH_RX;
  3943. if (inta_fh & CSR_FH_INT_TX_MASK)
  3944. inta |= CSR_INT_BIT_FH_TX;
  3945. /* Now service all interrupt bits discovered above. */
  3946. if (inta & CSR_INT_BIT_HW_ERR) {
  3947. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3948. /* Tell the device to stop sending interrupts */
  3949. iwl_disable_interrupts(priv);
  3950. iwl_irq_handle_error(priv);
  3951. handled |= CSR_INT_BIT_HW_ERR;
  3952. spin_unlock_irqrestore(&priv->lock, flags);
  3953. return;
  3954. }
  3955. #ifdef CONFIG_IWLWIFI_DEBUG
  3956. if (iwl_debug_level & (IWL_DL_ISR)) {
  3957. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3958. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  3959. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  3960. /* Alive notification via Rx interrupt will do the real work */
  3961. if (inta & CSR_INT_BIT_ALIVE)
  3962. IWL_DEBUG_ISR("Alive interrupt\n");
  3963. }
  3964. #endif
  3965. /* Safely ignore these bits for debug checks below */
  3966. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  3967. /* HW RF KILL switch toggled (4965 only) */
  3968. if (inta & CSR_INT_BIT_RF_KILL) {
  3969. int hw_rf_kill = 0;
  3970. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3971. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3972. hw_rf_kill = 1;
  3973. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3974. "RF_KILL bit toggled to %s.\n",
  3975. hw_rf_kill ? "disable radio":"enable radio");
  3976. /* Queue restart only if RF_KILL switch was set to "kill"
  3977. * when we loaded driver, and is now set to "enable".
  3978. * After we're Alive, RF_KILL gets handled by
  3979. * iwl_rx_card_state_notif() */
  3980. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
  3981. queue_work(priv->workqueue, &priv->restart);
  3982. handled |= CSR_INT_BIT_RF_KILL;
  3983. }
  3984. /* Chip got too hot and stopped itself (4965 only) */
  3985. if (inta & CSR_INT_BIT_CT_KILL) {
  3986. IWL_ERROR("Microcode CT kill error detected.\n");
  3987. handled |= CSR_INT_BIT_CT_KILL;
  3988. }
  3989. /* Error detected by uCode */
  3990. if (inta & CSR_INT_BIT_SW_ERR) {
  3991. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  3992. inta);
  3993. iwl_irq_handle_error(priv);
  3994. handled |= CSR_INT_BIT_SW_ERR;
  3995. }
  3996. /* uCode wakes up after power-down sleep */
  3997. if (inta & CSR_INT_BIT_WAKEUP) {
  3998. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3999. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  4000. iwl_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4001. iwl_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4002. iwl_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4003. iwl_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4004. iwl_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4005. iwl_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4006. handled |= CSR_INT_BIT_WAKEUP;
  4007. }
  4008. /* All uCode command responses, including Tx command responses,
  4009. * Rx "responses" (frame-received notification), and other
  4010. * notifications from uCode come through here*/
  4011. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4012. iwl_rx_handle(priv);
  4013. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4014. }
  4015. if (inta & CSR_INT_BIT_FH_TX) {
  4016. IWL_DEBUG_ISR("Tx interrupt\n");
  4017. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  4018. if (!iwl_grab_restricted_access(priv)) {
  4019. iwl_write_restricted(priv,
  4020. FH_TCSR_CREDIT
  4021. (ALM_FH_SRVC_CHNL), 0x0);
  4022. iwl_release_restricted_access(priv);
  4023. }
  4024. handled |= CSR_INT_BIT_FH_TX;
  4025. }
  4026. if (inta & ~handled)
  4027. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4028. if (inta & ~CSR_INI_SET_MASK) {
  4029. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4030. inta & ~CSR_INI_SET_MASK);
  4031. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4032. }
  4033. /* Re-enable all interrupts */
  4034. iwl_enable_interrupts(priv);
  4035. #ifdef CONFIG_IWLWIFI_DEBUG
  4036. if (iwl_debug_level & (IWL_DL_ISR)) {
  4037. inta = iwl_read32(priv, CSR_INT);
  4038. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  4039. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4040. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4041. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4042. }
  4043. #endif
  4044. spin_unlock_irqrestore(&priv->lock, flags);
  4045. }
  4046. static irqreturn_t iwl_isr(int irq, void *data)
  4047. {
  4048. struct iwl_priv *priv = data;
  4049. u32 inta, inta_mask;
  4050. u32 inta_fh;
  4051. if (!priv)
  4052. return IRQ_NONE;
  4053. spin_lock(&priv->lock);
  4054. /* Disable (but don't clear!) interrupts here to avoid
  4055. * back-to-back ISRs and sporadic interrupts from our NIC.
  4056. * If we have something to service, the tasklet will re-enable ints.
  4057. * If we *don't* have something, we'll re-enable before leaving here. */
  4058. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4059. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  4060. /* Discover which interrupts are active/pending */
  4061. inta = iwl_read32(priv, CSR_INT);
  4062. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4063. /* Ignore interrupt if there's nothing in NIC to service.
  4064. * This may be due to IRQ shared with another device,
  4065. * or due to sporadic interrupts thrown from our NIC. */
  4066. if (!inta && !inta_fh) {
  4067. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4068. goto none;
  4069. }
  4070. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4071. /* Hardware disappeared */
  4072. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4073. goto none;
  4074. }
  4075. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4076. inta, inta_mask, inta_fh);
  4077. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  4078. tasklet_schedule(&priv->irq_tasklet);
  4079. spin_unlock(&priv->lock);
  4080. return IRQ_HANDLED;
  4081. none:
  4082. /* re-enable interrupts here since we don't have anything to service. */
  4083. iwl_enable_interrupts(priv);
  4084. spin_unlock(&priv->lock);
  4085. return IRQ_NONE;
  4086. }
  4087. /************************** EEPROM BANDS ****************************
  4088. *
  4089. * The iwl_eeprom_band definitions below provide the mapping from the
  4090. * EEPROM contents to the specific channel number supported for each
  4091. * band.
  4092. *
  4093. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  4094. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4095. * The specific geography and calibration information for that channel
  4096. * is contained in the eeprom map itself.
  4097. *
  4098. * During init, we copy the eeprom information and channel map
  4099. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4100. *
  4101. * channel_map_24/52 provides the index in the channel_info array for a
  4102. * given channel. We have to have two separate maps as there is channel
  4103. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4104. * band_2
  4105. *
  4106. * A value of 0xff stored in the channel_map indicates that the channel
  4107. * is not supported by the hardware at all.
  4108. *
  4109. * A value of 0xfe in the channel_map indicates that the channel is not
  4110. * valid for Tx with the current hardware. This means that
  4111. * while the system can tune and receive on a given channel, it may not
  4112. * be able to associate or transmit any frames on that
  4113. * channel. There is no corresponding channel information for that
  4114. * entry.
  4115. *
  4116. *********************************************************************/
  4117. /* 2.4 GHz */
  4118. static const u8 iwl_eeprom_band_1[14] = {
  4119. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4120. };
  4121. /* 5.2 GHz bands */
  4122. static const u8 iwl_eeprom_band_2[] = {
  4123. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4124. };
  4125. static const u8 iwl_eeprom_band_3[] = { /* 5205-5320MHz */
  4126. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4127. };
  4128. static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
  4129. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4130. };
  4131. static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
  4132. 145, 149, 153, 157, 161, 165
  4133. };
  4134. static void iwl_init_band_reference(const struct iwl_priv *priv, int band,
  4135. int *eeprom_ch_count,
  4136. const struct iwl_eeprom_channel
  4137. **eeprom_ch_info,
  4138. const u8 **eeprom_ch_index)
  4139. {
  4140. switch (band) {
  4141. case 1: /* 2.4GHz band */
  4142. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
  4143. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4144. *eeprom_ch_index = iwl_eeprom_band_1;
  4145. break;
  4146. case 2: /* 5.2GHz band */
  4147. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
  4148. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4149. *eeprom_ch_index = iwl_eeprom_band_2;
  4150. break;
  4151. case 3: /* 5.2GHz band */
  4152. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
  4153. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4154. *eeprom_ch_index = iwl_eeprom_band_3;
  4155. break;
  4156. case 4: /* 5.2GHz band */
  4157. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
  4158. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4159. *eeprom_ch_index = iwl_eeprom_band_4;
  4160. break;
  4161. case 5: /* 5.2GHz band */
  4162. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
  4163. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4164. *eeprom_ch_index = iwl_eeprom_band_5;
  4165. break;
  4166. default:
  4167. BUG();
  4168. return;
  4169. }
  4170. }
  4171. const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
  4172. int phymode, u16 channel)
  4173. {
  4174. int i;
  4175. switch (phymode) {
  4176. case MODE_IEEE80211A:
  4177. for (i = 14; i < priv->channel_count; i++) {
  4178. if (priv->channel_info[i].channel == channel)
  4179. return &priv->channel_info[i];
  4180. }
  4181. break;
  4182. case MODE_IEEE80211B:
  4183. case MODE_IEEE80211G:
  4184. if (channel >= 1 && channel <= 14)
  4185. return &priv->channel_info[channel - 1];
  4186. break;
  4187. }
  4188. return NULL;
  4189. }
  4190. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4191. ? # x " " : "")
  4192. static int iwl_init_channel_map(struct iwl_priv *priv)
  4193. {
  4194. int eeprom_ch_count = 0;
  4195. const u8 *eeprom_ch_index = NULL;
  4196. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  4197. int band, ch;
  4198. struct iwl_channel_info *ch_info;
  4199. if (priv->channel_count) {
  4200. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4201. return 0;
  4202. }
  4203. if (priv->eeprom.version < 0x2f) {
  4204. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4205. priv->eeprom.version);
  4206. return -EINVAL;
  4207. }
  4208. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4209. priv->channel_count =
  4210. ARRAY_SIZE(iwl_eeprom_band_1) +
  4211. ARRAY_SIZE(iwl_eeprom_band_2) +
  4212. ARRAY_SIZE(iwl_eeprom_band_3) +
  4213. ARRAY_SIZE(iwl_eeprom_band_4) +
  4214. ARRAY_SIZE(iwl_eeprom_band_5);
  4215. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4216. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  4217. priv->channel_count, GFP_KERNEL);
  4218. if (!priv->channel_info) {
  4219. IWL_ERROR("Could not allocate channel_info\n");
  4220. priv->channel_count = 0;
  4221. return -ENOMEM;
  4222. }
  4223. ch_info = priv->channel_info;
  4224. /* Loop through the 5 EEPROM bands adding them in order to the
  4225. * channel map we maintain (that contains additional information than
  4226. * what just in the EEPROM) */
  4227. for (band = 1; band <= 5; band++) {
  4228. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4229. &eeprom_ch_info, &eeprom_ch_index);
  4230. /* Loop through each band adding each of the channels */
  4231. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4232. ch_info->channel = eeprom_ch_index[ch];
  4233. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4234. MODE_IEEE80211A;
  4235. /* permanently store EEPROM's channel regulatory flags
  4236. * and max power in channel info database. */
  4237. ch_info->eeprom = eeprom_ch_info[ch];
  4238. /* Copy the run-time flags so they are there even on
  4239. * invalid channels */
  4240. ch_info->flags = eeprom_ch_info[ch].flags;
  4241. if (!(is_channel_valid(ch_info))) {
  4242. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4243. "No traffic\n",
  4244. ch_info->channel,
  4245. ch_info->flags,
  4246. is_channel_a_band(ch_info) ?
  4247. "5.2" : "2.4");
  4248. ch_info++;
  4249. continue;
  4250. }
  4251. /* Initialize regulatory-based run-time data */
  4252. ch_info->max_power_avg = ch_info->curr_txpow =
  4253. eeprom_ch_info[ch].max_power_avg;
  4254. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4255. ch_info->min_power = 0;
  4256. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4257. " %ddBm): Ad-Hoc %ssupported\n",
  4258. ch_info->channel,
  4259. is_channel_a_band(ch_info) ?
  4260. "5.2" : "2.4",
  4261. CHECK_AND_PRINT(IBSS),
  4262. CHECK_AND_PRINT(ACTIVE),
  4263. CHECK_AND_PRINT(RADAR),
  4264. CHECK_AND_PRINT(WIDE),
  4265. CHECK_AND_PRINT(NARROW),
  4266. CHECK_AND_PRINT(DFS),
  4267. eeprom_ch_info[ch].flags,
  4268. eeprom_ch_info[ch].max_power_avg,
  4269. ((eeprom_ch_info[ch].
  4270. flags & EEPROM_CHANNEL_IBSS)
  4271. && !(eeprom_ch_info[ch].
  4272. flags & EEPROM_CHANNEL_RADAR))
  4273. ? "" : "not ");
  4274. /* Set the user_txpower_limit to the highest power
  4275. * supported by any channel */
  4276. if (eeprom_ch_info[ch].max_power_avg >
  4277. priv->user_txpower_limit)
  4278. priv->user_txpower_limit =
  4279. eeprom_ch_info[ch].max_power_avg;
  4280. ch_info++;
  4281. }
  4282. }
  4283. if (iwl3945_txpower_set_from_eeprom(priv))
  4284. return -EIO;
  4285. return 0;
  4286. }
  4287. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4288. * sending probe req. This should be set long enough to hear probe responses
  4289. * from more than one AP. */
  4290. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4291. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4292. /* For faster active scanning, scan will move to the next channel if fewer than
  4293. * PLCP_QUIET_THRESH packets are heard on this channel within
  4294. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4295. * time if it's a quiet channel (nothing responded to our probe, and there's
  4296. * no other traffic).
  4297. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4298. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4299. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4300. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4301. * Must be set longer than active dwell time.
  4302. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4303. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4304. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4305. #define IWL_PASSIVE_DWELL_BASE (100)
  4306. #define IWL_CHANNEL_TUNE_TIME 5
  4307. static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, int phymode)
  4308. {
  4309. if (phymode == MODE_IEEE80211A)
  4310. return IWL_ACTIVE_DWELL_TIME_52;
  4311. else
  4312. return IWL_ACTIVE_DWELL_TIME_24;
  4313. }
  4314. static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, int phymode)
  4315. {
  4316. u16 active = iwl_get_active_dwell_time(priv, phymode);
  4317. u16 passive = (phymode != MODE_IEEE80211A) ?
  4318. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4319. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4320. if (iwl_is_associated(priv)) {
  4321. /* If we're associated, we clamp the maximum passive
  4322. * dwell time to be 98% of the beacon interval (minus
  4323. * 2 * channel tune time) */
  4324. passive = priv->beacon_int;
  4325. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4326. passive = IWL_PASSIVE_DWELL_BASE;
  4327. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4328. }
  4329. if (passive <= active)
  4330. passive = active + 1;
  4331. return passive;
  4332. }
  4333. static int iwl_get_channels_for_scan(struct iwl_priv *priv, int phymode,
  4334. u8 is_active, u8 direct_mask,
  4335. struct iwl_scan_channel *scan_ch)
  4336. {
  4337. const struct ieee80211_channel *channels = NULL;
  4338. const struct ieee80211_hw_mode *hw_mode;
  4339. const struct iwl_channel_info *ch_info;
  4340. u16 passive_dwell = 0;
  4341. u16 active_dwell = 0;
  4342. int added, i;
  4343. hw_mode = iwl_get_hw_mode(priv, phymode);
  4344. if (!hw_mode)
  4345. return 0;
  4346. channels = hw_mode->channels;
  4347. active_dwell = iwl_get_active_dwell_time(priv, phymode);
  4348. passive_dwell = iwl_get_passive_dwell_time(priv, phymode);
  4349. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4350. if (channels[i].chan ==
  4351. le16_to_cpu(priv->active_rxon.channel)) {
  4352. if (iwl_is_associated(priv)) {
  4353. IWL_DEBUG_SCAN
  4354. ("Skipping current channel %d\n",
  4355. le16_to_cpu(priv->active_rxon.channel));
  4356. continue;
  4357. }
  4358. } else if (priv->only_active_channel)
  4359. continue;
  4360. scan_ch->channel = channels[i].chan;
  4361. ch_info = iwl_get_channel_info(priv, phymode, scan_ch->channel);
  4362. if (!is_channel_valid(ch_info)) {
  4363. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4364. scan_ch->channel);
  4365. continue;
  4366. }
  4367. if (!is_active || is_channel_passive(ch_info) ||
  4368. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4369. scan_ch->type = 0; /* passive */
  4370. else
  4371. scan_ch->type = 1; /* active */
  4372. if (scan_ch->type & 1)
  4373. scan_ch->type |= (direct_mask << 1);
  4374. if (is_channel_narrow(ch_info))
  4375. scan_ch->type |= (1 << 7);
  4376. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4377. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4378. /* Set power levels to defaults */
  4379. scan_ch->tpc.dsp_atten = 110;
  4380. /* scan_pwr_info->tpc.dsp_atten; */
  4381. /*scan_pwr_info->tpc.tx_gain; */
  4382. if (phymode == MODE_IEEE80211A)
  4383. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4384. else {
  4385. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4386. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4387. * power level
  4388. scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4389. */
  4390. }
  4391. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4392. scan_ch->channel,
  4393. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4394. (scan_ch->type & 1) ?
  4395. active_dwell : passive_dwell);
  4396. scan_ch++;
  4397. added++;
  4398. }
  4399. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4400. return added;
  4401. }
  4402. static void iwl_reset_channel_flag(struct iwl_priv *priv)
  4403. {
  4404. int i, j;
  4405. for (i = 0; i < 3; i++) {
  4406. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4407. for (j = 0; j < hw_mode->num_channels; j++)
  4408. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4409. }
  4410. }
  4411. static void iwl_init_hw_rates(struct iwl_priv *priv,
  4412. struct ieee80211_rate *rates)
  4413. {
  4414. int i;
  4415. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4416. rates[i].rate = iwl_rates[i].ieee * 5;
  4417. rates[i].val = i; /* Rate scaling will work on indexes */
  4418. rates[i].val2 = i;
  4419. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4420. /* Only OFDM have the bits-per-symbol set */
  4421. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4422. rates[i].flags |= IEEE80211_RATE_OFDM;
  4423. else {
  4424. /*
  4425. * If CCK 1M then set rate flag to CCK else CCK_2
  4426. * which is CCK | PREAMBLE2
  4427. */
  4428. rates[i].flags |= (iwl_rates[i].plcp == 10) ?
  4429. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4430. }
  4431. /* Set up which ones are basic rates... */
  4432. if (IWL_BASIC_RATES_MASK & (1 << i))
  4433. rates[i].flags |= IEEE80211_RATE_BASIC;
  4434. }
  4435. }
  4436. /**
  4437. * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4438. */
  4439. static int iwl_init_geos(struct iwl_priv *priv)
  4440. {
  4441. struct iwl_channel_info *ch;
  4442. struct ieee80211_hw_mode *modes;
  4443. struct ieee80211_channel *channels;
  4444. struct ieee80211_channel *geo_ch;
  4445. struct ieee80211_rate *rates;
  4446. int i = 0;
  4447. enum {
  4448. A = 0,
  4449. B = 1,
  4450. G = 2,
  4451. };
  4452. int mode_count = 3;
  4453. if (priv->modes) {
  4454. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4455. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4456. return 0;
  4457. }
  4458. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4459. GFP_KERNEL);
  4460. if (!modes)
  4461. return -ENOMEM;
  4462. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4463. priv->channel_count, GFP_KERNEL);
  4464. if (!channels) {
  4465. kfree(modes);
  4466. return -ENOMEM;
  4467. }
  4468. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4469. GFP_KERNEL);
  4470. if (!rates) {
  4471. kfree(modes);
  4472. kfree(channels);
  4473. return -ENOMEM;
  4474. }
  4475. /* 0 = 802.11a
  4476. * 1 = 802.11b
  4477. * 2 = 802.11g
  4478. */
  4479. /* 5.2GHz channels start after the 2.4GHz channels */
  4480. modes[A].mode = MODE_IEEE80211A;
  4481. modes[A].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4482. modes[A].rates = rates;
  4483. modes[A].num_rates = 8; /* just OFDM */
  4484. modes[A].num_channels = 0;
  4485. modes[B].mode = MODE_IEEE80211B;
  4486. modes[B].channels = channels;
  4487. modes[B].rates = &rates[8];
  4488. modes[B].num_rates = 4; /* just CCK */
  4489. modes[B].num_channels = 0;
  4490. modes[G].mode = MODE_IEEE80211G;
  4491. modes[G].channels = channels;
  4492. modes[G].rates = rates;
  4493. modes[G].num_rates = 12; /* OFDM & CCK */
  4494. modes[G].num_channels = 0;
  4495. priv->ieee_channels = channels;
  4496. priv->ieee_rates = rates;
  4497. iwl_init_hw_rates(priv, rates);
  4498. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4499. ch = &priv->channel_info[i];
  4500. if (!is_channel_valid(ch)) {
  4501. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4502. "skipping.\n",
  4503. ch->channel, is_channel_a_band(ch) ?
  4504. "5.2" : "2.4");
  4505. continue;
  4506. }
  4507. if (is_channel_a_band(ch))
  4508. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4509. else {
  4510. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4511. modes[G].num_channels++;
  4512. }
  4513. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4514. geo_ch->chan = ch->channel;
  4515. geo_ch->power_level = ch->max_power_avg;
  4516. geo_ch->antenna_max = 0xff;
  4517. if (is_channel_valid(ch)) {
  4518. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4519. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4520. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4521. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4522. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4523. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4524. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4525. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4526. priv->max_channel_txpower_limit =
  4527. ch->max_power_avg;
  4528. }
  4529. geo_ch->val = geo_ch->flag;
  4530. }
  4531. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4532. printk(KERN_INFO DRV_NAME
  4533. ": Incorrectly detected BG card as ABG. Please send "
  4534. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4535. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4536. priv->is_abg = 0;
  4537. }
  4538. printk(KERN_INFO DRV_NAME
  4539. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4540. modes[G].num_channels, modes[A].num_channels);
  4541. /*
  4542. * NOTE: We register these in preference of order -- the
  4543. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4544. * a phymode based on rates or AP capabilities but seems to
  4545. * configure it purely on if the channel being configured
  4546. * is supported by a mode -- and the first match is taken
  4547. */
  4548. if (modes[G].num_channels)
  4549. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4550. if (modes[B].num_channels)
  4551. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4552. if (modes[A].num_channels)
  4553. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4554. priv->modes = modes;
  4555. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4556. return 0;
  4557. }
  4558. /******************************************************************************
  4559. *
  4560. * uCode download functions
  4561. *
  4562. ******************************************************************************/
  4563. static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
  4564. {
  4565. if (priv->ucode_code.v_addr != NULL) {
  4566. pci_free_consistent(priv->pci_dev,
  4567. priv->ucode_code.len,
  4568. priv->ucode_code.v_addr,
  4569. priv->ucode_code.p_addr);
  4570. priv->ucode_code.v_addr = NULL;
  4571. }
  4572. if (priv->ucode_data.v_addr != NULL) {
  4573. pci_free_consistent(priv->pci_dev,
  4574. priv->ucode_data.len,
  4575. priv->ucode_data.v_addr,
  4576. priv->ucode_data.p_addr);
  4577. priv->ucode_data.v_addr = NULL;
  4578. }
  4579. if (priv->ucode_data_backup.v_addr != NULL) {
  4580. pci_free_consistent(priv->pci_dev,
  4581. priv->ucode_data_backup.len,
  4582. priv->ucode_data_backup.v_addr,
  4583. priv->ucode_data_backup.p_addr);
  4584. priv->ucode_data_backup.v_addr = NULL;
  4585. }
  4586. if (priv->ucode_init.v_addr != NULL) {
  4587. pci_free_consistent(priv->pci_dev,
  4588. priv->ucode_init.len,
  4589. priv->ucode_init.v_addr,
  4590. priv->ucode_init.p_addr);
  4591. priv->ucode_init.v_addr = NULL;
  4592. }
  4593. if (priv->ucode_init_data.v_addr != NULL) {
  4594. pci_free_consistent(priv->pci_dev,
  4595. priv->ucode_init_data.len,
  4596. priv->ucode_init_data.v_addr,
  4597. priv->ucode_init_data.p_addr);
  4598. priv->ucode_init_data.v_addr = NULL;
  4599. }
  4600. if (priv->ucode_boot.v_addr != NULL) {
  4601. pci_free_consistent(priv->pci_dev,
  4602. priv->ucode_boot.len,
  4603. priv->ucode_boot.v_addr,
  4604. priv->ucode_boot.p_addr);
  4605. priv->ucode_boot.v_addr = NULL;
  4606. }
  4607. }
  4608. /**
  4609. * iwl_verify_inst_full - verify runtime uCode image in card vs. host,
  4610. * looking at all data.
  4611. */
  4612. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 * image, u32 len)
  4613. {
  4614. u32 val;
  4615. u32 save_len = len;
  4616. int rc = 0;
  4617. u32 errcnt;
  4618. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4619. rc = iwl_grab_restricted_access(priv);
  4620. if (rc)
  4621. return rc;
  4622. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4623. errcnt = 0;
  4624. for (; len > 0; len -= sizeof(u32), image++) {
  4625. /* read data comes through single port, auto-incr addr */
  4626. /* NOTE: Use the debugless read so we don't flood kernel log
  4627. * if IWL_DL_IO is set */
  4628. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4629. if (val != le32_to_cpu(*image)) {
  4630. IWL_ERROR("uCode INST section is invalid at "
  4631. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4632. save_len - len, val, le32_to_cpu(*image));
  4633. rc = -EIO;
  4634. errcnt++;
  4635. if (errcnt >= 20)
  4636. break;
  4637. }
  4638. }
  4639. iwl_release_restricted_access(priv);
  4640. if (!errcnt)
  4641. IWL_DEBUG_INFO
  4642. ("ucode image in INSTRUCTION memory is good\n");
  4643. return rc;
  4644. }
  4645. /**
  4646. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4647. * using sample data 100 bytes apart. If these sample points are good,
  4648. * it's a pretty good bet that everything between them is good, too.
  4649. */
  4650. static int iwl_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4651. {
  4652. u32 val;
  4653. int rc = 0;
  4654. u32 errcnt = 0;
  4655. u32 i;
  4656. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4657. rc = iwl_grab_restricted_access(priv);
  4658. if (rc)
  4659. return rc;
  4660. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4661. /* read data comes through single port, auto-incr addr */
  4662. /* NOTE: Use the debugless read so we don't flood kernel log
  4663. * if IWL_DL_IO is set */
  4664. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR,
  4665. i + RTC_INST_LOWER_BOUND);
  4666. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4667. if (val != le32_to_cpu(*image)) {
  4668. #if 0 /* Enable this if you want to see details */
  4669. IWL_ERROR("uCode INST section is invalid at "
  4670. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4671. i, val, *image);
  4672. #endif
  4673. rc = -EIO;
  4674. errcnt++;
  4675. if (errcnt >= 3)
  4676. break;
  4677. }
  4678. }
  4679. iwl_release_restricted_access(priv);
  4680. return rc;
  4681. }
  4682. /**
  4683. * iwl_verify_ucode - determine which instruction image is in SRAM,
  4684. * and verify its contents
  4685. */
  4686. static int iwl_verify_ucode(struct iwl_priv *priv)
  4687. {
  4688. __le32 *image;
  4689. u32 len;
  4690. int rc = 0;
  4691. /* Try bootstrap */
  4692. image = (__le32 *)priv->ucode_boot.v_addr;
  4693. len = priv->ucode_boot.len;
  4694. rc = iwl_verify_inst_sparse(priv, image, len);
  4695. if (rc == 0) {
  4696. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4697. return 0;
  4698. }
  4699. /* Try initialize */
  4700. image = (__le32 *)priv->ucode_init.v_addr;
  4701. len = priv->ucode_init.len;
  4702. rc = iwl_verify_inst_sparse(priv, image, len);
  4703. if (rc == 0) {
  4704. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4705. return 0;
  4706. }
  4707. /* Try runtime/protocol */
  4708. image = (__le32 *)priv->ucode_code.v_addr;
  4709. len = priv->ucode_code.len;
  4710. rc = iwl_verify_inst_sparse(priv, image, len);
  4711. if (rc == 0) {
  4712. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4713. return 0;
  4714. }
  4715. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4716. /* Show first several data entries in instruction SRAM.
  4717. * Selection of bootstrap image is arbitrary. */
  4718. image = (__le32 *)priv->ucode_boot.v_addr;
  4719. len = priv->ucode_boot.len;
  4720. rc = iwl_verify_inst_full(priv, image, len);
  4721. return rc;
  4722. }
  4723. /* check contents of special bootstrap uCode SRAM */
  4724. static int iwl_verify_bsm(struct iwl_priv *priv)
  4725. {
  4726. __le32 *image = priv->ucode_boot.v_addr;
  4727. u32 len = priv->ucode_boot.len;
  4728. u32 reg;
  4729. u32 val;
  4730. IWL_DEBUG_INFO("Begin verify bsm\n");
  4731. /* verify BSM SRAM contents */
  4732. val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG);
  4733. for (reg = BSM_SRAM_LOWER_BOUND;
  4734. reg < BSM_SRAM_LOWER_BOUND + len;
  4735. reg += sizeof(u32), image ++) {
  4736. val = iwl_read_restricted_reg(priv, reg);
  4737. if (val != le32_to_cpu(*image)) {
  4738. IWL_ERROR("BSM uCode verification failed at "
  4739. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4740. BSM_SRAM_LOWER_BOUND,
  4741. reg - BSM_SRAM_LOWER_BOUND, len,
  4742. val, le32_to_cpu(*image));
  4743. return -EIO;
  4744. }
  4745. }
  4746. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4747. return 0;
  4748. }
  4749. /**
  4750. * iwl_load_bsm - Load bootstrap instructions
  4751. *
  4752. * BSM operation:
  4753. *
  4754. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4755. * in special SRAM that does not power down during RFKILL. When powering back
  4756. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4757. * the bootstrap program into the on-board processor, and starts it.
  4758. *
  4759. * The bootstrap program loads (via DMA) instructions and data for a new
  4760. * program from host DRAM locations indicated by the host driver in the
  4761. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4762. * automatically.
  4763. *
  4764. * When initializing the NIC, the host driver points the BSM to the
  4765. * "initialize" uCode image. This uCode sets up some internal data, then
  4766. * notifies host via "initialize alive" that it is complete.
  4767. *
  4768. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4769. * normal runtime uCode instructions and a backup uCode data cache buffer
  4770. * (filled initially with starting data values for the on-board processor),
  4771. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4772. * which begins normal operation.
  4773. *
  4774. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4775. * the backup data cache in DRAM before SRAM is powered down.
  4776. *
  4777. * When powering back up, the BSM loads the bootstrap program. This reloads
  4778. * the runtime uCode instructions and the backup data cache into SRAM,
  4779. * and re-launches the runtime uCode from where it left off.
  4780. */
  4781. static int iwl_load_bsm(struct iwl_priv *priv)
  4782. {
  4783. __le32 *image = priv->ucode_boot.v_addr;
  4784. u32 len = priv->ucode_boot.len;
  4785. dma_addr_t pinst;
  4786. dma_addr_t pdata;
  4787. u32 inst_len;
  4788. u32 data_len;
  4789. int rc;
  4790. int i;
  4791. u32 done;
  4792. u32 reg_offset;
  4793. IWL_DEBUG_INFO("Begin load bsm\n");
  4794. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4795. if (len > IWL_MAX_BSM_SIZE)
  4796. return -EINVAL;
  4797. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4798. * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
  4799. * NOTE: iwl_initialize_alive_start() will replace these values,
  4800. * after the "initialize" uCode has run, to point to
  4801. * runtime/protocol instructions and backup data cache. */
  4802. pinst = priv->ucode_init.p_addr;
  4803. pdata = priv->ucode_init_data.p_addr;
  4804. inst_len = priv->ucode_init.len;
  4805. data_len = priv->ucode_init_data.len;
  4806. rc = iwl_grab_restricted_access(priv);
  4807. if (rc)
  4808. return rc;
  4809. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4810. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4811. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4812. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4813. /* Fill BSM memory with bootstrap instructions */
  4814. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4815. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4816. reg_offset += sizeof(u32), image++)
  4817. _iwl_write_restricted_reg(priv, reg_offset,
  4818. le32_to_cpu(*image));
  4819. rc = iwl_verify_bsm(priv);
  4820. if (rc) {
  4821. iwl_release_restricted_access(priv);
  4822. return rc;
  4823. }
  4824. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4825. iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4826. iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG,
  4827. RTC_INST_LOWER_BOUND);
  4828. iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4829. /* Load bootstrap code into instruction SRAM now,
  4830. * to prepare to load "initialize" uCode */
  4831. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  4832. BSM_WR_CTRL_REG_BIT_START);
  4833. /* Wait for load of bootstrap uCode to finish */
  4834. for (i = 0; i < 100; i++) {
  4835. done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG);
  4836. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4837. break;
  4838. udelay(10);
  4839. }
  4840. if (i < 100)
  4841. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4842. else {
  4843. IWL_ERROR("BSM write did not complete!\n");
  4844. return -EIO;
  4845. }
  4846. /* Enable future boot loads whenever power management unit triggers it
  4847. * (e.g. when powering back up after power-save shutdown) */
  4848. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  4849. BSM_WR_CTRL_REG_BIT_START_EN);
  4850. iwl_release_restricted_access(priv);
  4851. return 0;
  4852. }
  4853. static void iwl_nic_start(struct iwl_priv *priv)
  4854. {
  4855. /* Remove all resets to allow NIC to operate */
  4856. iwl_write32(priv, CSR_RESET, 0);
  4857. }
  4858. /**
  4859. * iwl_read_ucode - Read uCode images from disk file.
  4860. *
  4861. * Copy into buffers for card to fetch via bus-mastering
  4862. */
  4863. static int iwl_read_ucode(struct iwl_priv *priv)
  4864. {
  4865. struct iwl_ucode *ucode;
  4866. int rc = 0;
  4867. const struct firmware *ucode_raw;
  4868. /* firmware file name contains uCode/driver compatibility version */
  4869. const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
  4870. u8 *src;
  4871. size_t len;
  4872. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4873. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4874. * request_firmware() is synchronous, file is in memory on return. */
  4875. rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4876. if (rc < 0) {
  4877. IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
  4878. goto error;
  4879. }
  4880. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4881. name, ucode_raw->size);
  4882. /* Make sure that we got at least our header! */
  4883. if (ucode_raw->size < sizeof(*ucode)) {
  4884. IWL_ERROR("File size way too small!\n");
  4885. rc = -EINVAL;
  4886. goto err_release;
  4887. }
  4888. /* Data from ucode file: header followed by uCode images */
  4889. ucode = (void *)ucode_raw->data;
  4890. ver = le32_to_cpu(ucode->ver);
  4891. inst_size = le32_to_cpu(ucode->inst_size);
  4892. data_size = le32_to_cpu(ucode->data_size);
  4893. init_size = le32_to_cpu(ucode->init_size);
  4894. init_data_size = le32_to_cpu(ucode->init_data_size);
  4895. boot_size = le32_to_cpu(ucode->boot_size);
  4896. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4897. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4898. inst_size);
  4899. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4900. data_size);
  4901. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4902. init_size);
  4903. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4904. init_data_size);
  4905. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4906. boot_size);
  4907. /* Verify size of file vs. image size info in file's header */
  4908. if (ucode_raw->size < sizeof(*ucode) +
  4909. inst_size + data_size + init_size +
  4910. init_data_size + boot_size) {
  4911. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4912. (int)ucode_raw->size);
  4913. rc = -EINVAL;
  4914. goto err_release;
  4915. }
  4916. /* Verify that uCode images will fit in card's SRAM */
  4917. if (inst_size > IWL_MAX_INST_SIZE) {
  4918. IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
  4919. (int)inst_size);
  4920. rc = -EINVAL;
  4921. goto err_release;
  4922. }
  4923. if (data_size > IWL_MAX_DATA_SIZE) {
  4924. IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
  4925. (int)data_size);
  4926. rc = -EINVAL;
  4927. goto err_release;
  4928. }
  4929. if (init_size > IWL_MAX_INST_SIZE) {
  4930. IWL_DEBUG_INFO
  4931. ("uCode init instr len %d too large to fit in card\n",
  4932. (int)init_size);
  4933. rc = -EINVAL;
  4934. goto err_release;
  4935. }
  4936. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4937. IWL_DEBUG_INFO
  4938. ("uCode init data len %d too large to fit in card\n",
  4939. (int)init_data_size);
  4940. rc = -EINVAL;
  4941. goto err_release;
  4942. }
  4943. if (boot_size > IWL_MAX_BSM_SIZE) {
  4944. IWL_DEBUG_INFO
  4945. ("uCode boot instr len %d too large to fit in bsm\n",
  4946. (int)boot_size);
  4947. rc = -EINVAL;
  4948. goto err_release;
  4949. }
  4950. /* Allocate ucode buffers for card's bus-master loading ... */
  4951. /* Runtime instructions and 2 copies of data:
  4952. * 1) unmodified from disk
  4953. * 2) backup cache for save/restore during power-downs */
  4954. priv->ucode_code.len = inst_size;
  4955. priv->ucode_code.v_addr =
  4956. pci_alloc_consistent(priv->pci_dev,
  4957. priv->ucode_code.len,
  4958. &(priv->ucode_code.p_addr));
  4959. priv->ucode_data.len = data_size;
  4960. priv->ucode_data.v_addr =
  4961. pci_alloc_consistent(priv->pci_dev,
  4962. priv->ucode_data.len,
  4963. &(priv->ucode_data.p_addr));
  4964. priv->ucode_data_backup.len = data_size;
  4965. priv->ucode_data_backup.v_addr =
  4966. pci_alloc_consistent(priv->pci_dev,
  4967. priv->ucode_data_backup.len,
  4968. &(priv->ucode_data_backup.p_addr));
  4969. /* Initialization instructions and data */
  4970. priv->ucode_init.len = init_size;
  4971. priv->ucode_init.v_addr =
  4972. pci_alloc_consistent(priv->pci_dev,
  4973. priv->ucode_init.len,
  4974. &(priv->ucode_init.p_addr));
  4975. priv->ucode_init_data.len = init_data_size;
  4976. priv->ucode_init_data.v_addr =
  4977. pci_alloc_consistent(priv->pci_dev,
  4978. priv->ucode_init_data.len,
  4979. &(priv->ucode_init_data.p_addr));
  4980. /* Bootstrap (instructions only, no data) */
  4981. priv->ucode_boot.len = boot_size;
  4982. priv->ucode_boot.v_addr =
  4983. pci_alloc_consistent(priv->pci_dev,
  4984. priv->ucode_boot.len,
  4985. &(priv->ucode_boot.p_addr));
  4986. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  4987. !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
  4988. !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
  4989. goto err_pci_alloc;
  4990. /* Copy images into buffers for card's bus-master reads ... */
  4991. /* Runtime instructions (first block of data in file) */
  4992. src = &ucode->data[0];
  4993. len = priv->ucode_code.len;
  4994. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
  4995. (int)len);
  4996. memcpy(priv->ucode_code.v_addr, src, len);
  4997. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4998. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4999. /* Runtime data (2nd block)
  5000. * NOTE: Copy into backup buffer will be done in iwl_up() */
  5001. src = &ucode->data[inst_size];
  5002. len = priv->ucode_data.len;
  5003. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
  5004. (int)len);
  5005. memcpy(priv->ucode_data.v_addr, src, len);
  5006. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5007. /* Initialization instructions (3rd block) */
  5008. if (init_size) {
  5009. src = &ucode->data[inst_size + data_size];
  5010. len = priv->ucode_init.len;
  5011. IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
  5012. (int)len);
  5013. memcpy(priv->ucode_init.v_addr, src, len);
  5014. }
  5015. /* Initialization data (4th block) */
  5016. if (init_data_size) {
  5017. src = &ucode->data[inst_size + data_size + init_size];
  5018. len = priv->ucode_init_data.len;
  5019. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  5020. (int)len);
  5021. memcpy(priv->ucode_init_data.v_addr, src, len);
  5022. }
  5023. /* Bootstrap instructions (5th block) */
  5024. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5025. len = priv->ucode_boot.len;
  5026. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  5027. (int)len);
  5028. memcpy(priv->ucode_boot.v_addr, src, len);
  5029. /* We have our copies now, allow OS release its copies */
  5030. release_firmware(ucode_raw);
  5031. return 0;
  5032. err_pci_alloc:
  5033. IWL_ERROR("failed to allocate pci memory\n");
  5034. rc = -ENOMEM;
  5035. iwl_dealloc_ucode_pci(priv);
  5036. err_release:
  5037. release_firmware(ucode_raw);
  5038. error:
  5039. return rc;
  5040. }
  5041. /**
  5042. * iwl_set_ucode_ptrs - Set uCode address location
  5043. *
  5044. * Tell initialization uCode where to find runtime uCode.
  5045. *
  5046. * BSM registers initially contain pointers to initialization uCode.
  5047. * We need to replace them to load runtime uCode inst and data,
  5048. * and to save runtime data when powering down.
  5049. */
  5050. static int iwl_set_ucode_ptrs(struct iwl_priv *priv)
  5051. {
  5052. dma_addr_t pinst;
  5053. dma_addr_t pdata;
  5054. int rc = 0;
  5055. unsigned long flags;
  5056. /* bits 31:0 for 3945 */
  5057. pinst = priv->ucode_code.p_addr;
  5058. pdata = priv->ucode_data_backup.p_addr;
  5059. spin_lock_irqsave(&priv->lock, flags);
  5060. rc = iwl_grab_restricted_access(priv);
  5061. if (rc) {
  5062. spin_unlock_irqrestore(&priv->lock, flags);
  5063. return rc;
  5064. }
  5065. /* Tell bootstrap uCode where to find image to load */
  5066. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5067. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5068. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5069. priv->ucode_data.len);
  5070. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5071. * that all new ptr/size info is in place */
  5072. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5073. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5074. iwl_release_restricted_access(priv);
  5075. spin_unlock_irqrestore(&priv->lock, flags);
  5076. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5077. return rc;
  5078. }
  5079. /**
  5080. * iwl_init_alive_start - Called after REPLY_ALIVE notification receieved
  5081. *
  5082. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5083. *
  5084. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5085. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5086. * (3945 does not contain this data).
  5087. *
  5088. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5089. */
  5090. static void iwl_init_alive_start(struct iwl_priv *priv)
  5091. {
  5092. /* Check alive response for "valid" sign from uCode */
  5093. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5094. /* We had an error bringing up the hardware, so take it
  5095. * all the way back down so we can try again */
  5096. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5097. goto restart;
  5098. }
  5099. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5100. * This is a paranoid check, because we would not have gotten the
  5101. * "initialize" alive if code weren't properly loaded. */
  5102. if (iwl_verify_ucode(priv)) {
  5103. /* Runtime instruction load was bad;
  5104. * take it all the way back down so we can try again */
  5105. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5106. goto restart;
  5107. }
  5108. /* Send pointers to protocol/runtime uCode image ... init code will
  5109. * load and launch runtime uCode, which will send us another "Alive"
  5110. * notification. */
  5111. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5112. if (iwl_set_ucode_ptrs(priv)) {
  5113. /* Runtime instruction load won't happen;
  5114. * take it all the way back down so we can try again */
  5115. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5116. goto restart;
  5117. }
  5118. return;
  5119. restart:
  5120. queue_work(priv->workqueue, &priv->restart);
  5121. }
  5122. /**
  5123. * iwl_alive_start - called after REPLY_ALIVE notification received
  5124. * from protocol/runtime uCode (initialization uCode's
  5125. * Alive gets handled by iwl_init_alive_start()).
  5126. */
  5127. static void iwl_alive_start(struct iwl_priv *priv)
  5128. {
  5129. int rc = 0;
  5130. int thermal_spin = 0;
  5131. u32 rfkill;
  5132. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5133. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5134. /* We had an error bringing up the hardware, so take it
  5135. * all the way back down so we can try again */
  5136. IWL_DEBUG_INFO("Alive failed.\n");
  5137. goto restart;
  5138. }
  5139. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5140. * This is a paranoid check, because we would not have gotten the
  5141. * "runtime" alive if code weren't properly loaded. */
  5142. if (iwl_verify_ucode(priv)) {
  5143. /* Runtime instruction load was bad;
  5144. * take it all the way back down so we can try again */
  5145. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5146. goto restart;
  5147. }
  5148. iwl_clear_stations_table(priv);
  5149. rc = iwl_grab_restricted_access(priv);
  5150. if (rc) {
  5151. IWL_WARNING("Can not read rfkill status from adapter\n");
  5152. return;
  5153. }
  5154. rfkill = iwl_read_restricted_reg(priv, APMG_RFKILL_REG);
  5155. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  5156. iwl_release_restricted_access(priv);
  5157. if (rfkill & 0x1) {
  5158. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5159. /* if rfkill is not on, then wait for thermal
  5160. * sensor in adapter to kick in */
  5161. while (iwl_hw_get_temperature(priv) == 0) {
  5162. thermal_spin++;
  5163. udelay(10);
  5164. }
  5165. if (thermal_spin)
  5166. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  5167. thermal_spin * 10);
  5168. } else
  5169. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5170. /* After the ALIVE response, we can process host commands */
  5171. set_bit(STATUS_ALIVE, &priv->status);
  5172. /* Clear out the uCode error bit if it is set */
  5173. clear_bit(STATUS_FW_ERROR, &priv->status);
  5174. rc = iwl_init_channel_map(priv);
  5175. if (rc) {
  5176. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5177. return;
  5178. }
  5179. iwl_init_geos(priv);
  5180. if (iwl_is_rfkill(priv))
  5181. return;
  5182. if (!priv->mac80211_registered) {
  5183. /* Unlock so any user space entry points can call back into
  5184. * the driver without a deadlock... */
  5185. mutex_unlock(&priv->mutex);
  5186. iwl_rate_control_register(priv->hw);
  5187. rc = ieee80211_register_hw(priv->hw);
  5188. priv->hw->conf.beacon_int = 100;
  5189. mutex_lock(&priv->mutex);
  5190. if (rc) {
  5191. IWL_ERROR("Failed to register network "
  5192. "device (error %d)\n", rc);
  5193. return;
  5194. }
  5195. priv->mac80211_registered = 1;
  5196. iwl_reset_channel_flag(priv);
  5197. } else
  5198. ieee80211_start_queues(priv->hw);
  5199. priv->active_rate = priv->rates_mask;
  5200. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5201. iwl_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5202. if (iwl_is_associated(priv)) {
  5203. struct iwl_rxon_cmd *active_rxon =
  5204. (struct iwl_rxon_cmd *)(&priv->active_rxon);
  5205. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5206. sizeof(priv->staging_rxon));
  5207. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5208. } else {
  5209. /* Initialize our rx_config data */
  5210. iwl_connection_init_rx_config(priv);
  5211. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5212. }
  5213. /* Configure BT coexistence */
  5214. iwl_send_bt_config(priv);
  5215. /* Configure the adapter for unassociated operation */
  5216. iwl_commit_rxon(priv);
  5217. /* At this point, the NIC is initialized and operational */
  5218. priv->notif_missed_beacons = 0;
  5219. set_bit(STATUS_READY, &priv->status);
  5220. iwl3945_reg_txpower_periodic(priv);
  5221. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5222. if (priv->error_recovering)
  5223. iwl_error_recovery(priv);
  5224. return;
  5225. restart:
  5226. queue_work(priv->workqueue, &priv->restart);
  5227. }
  5228. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  5229. static void __iwl_down(struct iwl_priv *priv)
  5230. {
  5231. unsigned long flags;
  5232. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5233. struct ieee80211_conf *conf = NULL;
  5234. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5235. conf = ieee80211_get_hw_conf(priv->hw);
  5236. if (!exit_pending)
  5237. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5238. iwl_clear_stations_table(priv);
  5239. /* Unblock any waiting calls */
  5240. wake_up_interruptible_all(&priv->wait_command_queue);
  5241. iwl_cancel_deferred_work(priv);
  5242. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5243. * exiting the module */
  5244. if (!exit_pending)
  5245. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5246. /* stop and reset the on-board processor */
  5247. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5248. /* tell the device to stop sending interrupts */
  5249. iwl_disable_interrupts(priv);
  5250. if (priv->mac80211_registered)
  5251. ieee80211_stop_queues(priv->hw);
  5252. /* If we have not previously called iwl_init() then
  5253. * clear all bits but the RF Kill and SUSPEND bits and return */
  5254. if (!iwl_is_init(priv)) {
  5255. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5256. STATUS_RF_KILL_HW |
  5257. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5258. STATUS_RF_KILL_SW |
  5259. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5260. STATUS_IN_SUSPEND;
  5261. goto exit;
  5262. }
  5263. /* ...otherwise clear out all the status bits but the RF Kill and
  5264. * SUSPEND bits and continue taking the NIC down. */
  5265. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5266. STATUS_RF_KILL_HW |
  5267. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5268. STATUS_RF_KILL_SW |
  5269. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5270. STATUS_IN_SUSPEND |
  5271. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5272. STATUS_FW_ERROR;
  5273. spin_lock_irqsave(&priv->lock, flags);
  5274. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5275. spin_unlock_irqrestore(&priv->lock, flags);
  5276. iwl_hw_txq_ctx_stop(priv);
  5277. iwl_hw_rxq_stop(priv);
  5278. spin_lock_irqsave(&priv->lock, flags);
  5279. if (!iwl_grab_restricted_access(priv)) {
  5280. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  5281. APMG_CLK_VAL_DMA_CLK_RQT);
  5282. iwl_release_restricted_access(priv);
  5283. }
  5284. spin_unlock_irqrestore(&priv->lock, flags);
  5285. udelay(5);
  5286. iwl_hw_nic_stop_master(priv);
  5287. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5288. iwl_hw_nic_reset(priv);
  5289. exit:
  5290. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  5291. if (priv->ibss_beacon)
  5292. dev_kfree_skb(priv->ibss_beacon);
  5293. priv->ibss_beacon = NULL;
  5294. /* clear out any free frames */
  5295. iwl_clear_free_frames(priv);
  5296. }
  5297. static void iwl_down(struct iwl_priv *priv)
  5298. {
  5299. mutex_lock(&priv->mutex);
  5300. __iwl_down(priv);
  5301. mutex_unlock(&priv->mutex);
  5302. }
  5303. #define MAX_HW_RESTARTS 5
  5304. static int __iwl_up(struct iwl_priv *priv)
  5305. {
  5306. DECLARE_MAC_BUF(mac);
  5307. int rc, i;
  5308. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5309. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5310. return -EIO;
  5311. }
  5312. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5313. IWL_WARNING("Radio disabled by SW RF kill (module "
  5314. "parameter)\n");
  5315. return 0;
  5316. }
  5317. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5318. rc = iwl_hw_nic_init(priv);
  5319. if (rc) {
  5320. IWL_ERROR("Unable to int nic\n");
  5321. return rc;
  5322. }
  5323. /* make sure rfkill handshake bits are cleared */
  5324. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5325. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5326. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5327. /* clear (again), then enable host interrupts */
  5328. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5329. iwl_enable_interrupts(priv);
  5330. /* really make sure rfkill handshake bits are cleared */
  5331. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5332. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5333. /* Copy original ucode data image from disk into backup cache.
  5334. * This will be used to initialize the on-board processor's
  5335. * data SRAM for a clean start when the runtime program first loads. */
  5336. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5337. priv->ucode_data.len);
  5338. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5339. iwl_clear_stations_table(priv);
  5340. /* load bootstrap state machine,
  5341. * load bootstrap program into processor's memory,
  5342. * prepare to load the "initialize" uCode */
  5343. rc = iwl_load_bsm(priv);
  5344. if (rc) {
  5345. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5346. continue;
  5347. }
  5348. /* start card; "initialize" will load runtime ucode */
  5349. iwl_nic_start(priv);
  5350. /* MAC Address location in EEPROM same for 3945/4965 */
  5351. get_eeprom_mac(priv, priv->mac_addr);
  5352. IWL_DEBUG_INFO("MAC address: %s\n",
  5353. print_mac(mac, priv->mac_addr));
  5354. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5355. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5356. return 0;
  5357. }
  5358. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5359. __iwl_down(priv);
  5360. /* tried to restart and config the device for as long as our
  5361. * patience could withstand */
  5362. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5363. return -EIO;
  5364. }
  5365. /*****************************************************************************
  5366. *
  5367. * Workqueue callbacks
  5368. *
  5369. *****************************************************************************/
  5370. static void iwl_bg_init_alive_start(struct work_struct *data)
  5371. {
  5372. struct iwl_priv *priv =
  5373. container_of(data, struct iwl_priv, init_alive_start.work);
  5374. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5375. return;
  5376. mutex_lock(&priv->mutex);
  5377. iwl_init_alive_start(priv);
  5378. mutex_unlock(&priv->mutex);
  5379. }
  5380. static void iwl_bg_alive_start(struct work_struct *data)
  5381. {
  5382. struct iwl_priv *priv =
  5383. container_of(data, struct iwl_priv, alive_start.work);
  5384. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5385. return;
  5386. mutex_lock(&priv->mutex);
  5387. iwl_alive_start(priv);
  5388. mutex_unlock(&priv->mutex);
  5389. }
  5390. static void iwl_bg_rf_kill(struct work_struct *work)
  5391. {
  5392. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5393. wake_up_interruptible(&priv->wait_command_queue);
  5394. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5395. return;
  5396. mutex_lock(&priv->mutex);
  5397. if (!iwl_is_rfkill(priv)) {
  5398. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5399. "HW and/or SW RF Kill no longer active, restarting "
  5400. "device\n");
  5401. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5402. queue_work(priv->workqueue, &priv->restart);
  5403. } else {
  5404. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5405. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5406. "disabled by SW switch\n");
  5407. else
  5408. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5409. "Kill switch must be turned off for "
  5410. "wireless networking to work.\n");
  5411. }
  5412. mutex_unlock(&priv->mutex);
  5413. }
  5414. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5415. static void iwl_bg_scan_check(struct work_struct *data)
  5416. {
  5417. struct iwl_priv *priv =
  5418. container_of(data, struct iwl_priv, scan_check.work);
  5419. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5420. return;
  5421. mutex_lock(&priv->mutex);
  5422. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5423. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5424. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5425. "Scan completion watchdog resetting adapter (%dms)\n",
  5426. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5427. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5428. queue_work(priv->workqueue, &priv->restart);
  5429. }
  5430. mutex_unlock(&priv->mutex);
  5431. }
  5432. static void iwl_bg_request_scan(struct work_struct *data)
  5433. {
  5434. struct iwl_priv *priv =
  5435. container_of(data, struct iwl_priv, request_scan);
  5436. struct iwl_host_cmd cmd = {
  5437. .id = REPLY_SCAN_CMD,
  5438. .len = sizeof(struct iwl_scan_cmd),
  5439. .meta.flags = CMD_SIZE_HUGE,
  5440. };
  5441. int rc = 0;
  5442. struct iwl_scan_cmd *scan;
  5443. struct ieee80211_conf *conf = NULL;
  5444. u8 direct_mask;
  5445. int phymode;
  5446. conf = ieee80211_get_hw_conf(priv->hw);
  5447. mutex_lock(&priv->mutex);
  5448. if (!iwl_is_ready(priv)) {
  5449. IWL_WARNING("request scan called when driver not ready.\n");
  5450. goto done;
  5451. }
  5452. /* Make sure the scan wasn't cancelled before this queued work
  5453. * was given the chance to run... */
  5454. if (!test_bit(STATUS_SCANNING, &priv->status))
  5455. goto done;
  5456. /* This should never be called or scheduled if there is currently
  5457. * a scan active in the hardware. */
  5458. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5459. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5460. "Ignoring second request.\n");
  5461. rc = -EIO;
  5462. goto done;
  5463. }
  5464. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5465. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5466. goto done;
  5467. }
  5468. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5469. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5470. goto done;
  5471. }
  5472. if (iwl_is_rfkill(priv)) {
  5473. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5474. goto done;
  5475. }
  5476. if (!test_bit(STATUS_READY, &priv->status)) {
  5477. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5478. goto done;
  5479. }
  5480. if (!priv->scan_bands) {
  5481. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5482. goto done;
  5483. }
  5484. if (!priv->scan) {
  5485. priv->scan = kmalloc(sizeof(struct iwl_scan_cmd) +
  5486. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5487. if (!priv->scan) {
  5488. rc = -ENOMEM;
  5489. goto done;
  5490. }
  5491. }
  5492. scan = priv->scan;
  5493. memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5494. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5495. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5496. if (iwl_is_associated(priv)) {
  5497. u16 interval = 0;
  5498. u32 extra;
  5499. u32 suspend_time = 100;
  5500. u32 scan_suspend_time = 100;
  5501. unsigned long flags;
  5502. IWL_DEBUG_INFO("Scanning while associated...\n");
  5503. spin_lock_irqsave(&priv->lock, flags);
  5504. interval = priv->beacon_int;
  5505. spin_unlock_irqrestore(&priv->lock, flags);
  5506. scan->suspend_time = 0;
  5507. scan->max_out_time = cpu_to_le32(600 * 1024);
  5508. if (!interval)
  5509. interval = suspend_time;
  5510. /*
  5511. * suspend time format:
  5512. * 0-19: beacon interval in usec (time before exec.)
  5513. * 20-23: 0
  5514. * 24-31: number of beacons (suspend between channels)
  5515. */
  5516. extra = (suspend_time / interval) << 24;
  5517. scan_suspend_time = 0xFF0FFFFF &
  5518. (extra | ((suspend_time % interval) * 1024));
  5519. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5520. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5521. scan_suspend_time, interval);
  5522. }
  5523. /* We should add the ability for user to lock to PASSIVE ONLY */
  5524. if (priv->one_direct_scan) {
  5525. IWL_DEBUG_SCAN
  5526. ("Kicking off one direct scan for '%s'\n",
  5527. iwl_escape_essid(priv->direct_ssid,
  5528. priv->direct_ssid_len));
  5529. scan->direct_scan[0].id = WLAN_EID_SSID;
  5530. scan->direct_scan[0].len = priv->direct_ssid_len;
  5531. memcpy(scan->direct_scan[0].ssid,
  5532. priv->direct_ssid, priv->direct_ssid_len);
  5533. direct_mask = 1;
  5534. } else if (!iwl_is_associated(priv)) {
  5535. scan->direct_scan[0].id = WLAN_EID_SSID;
  5536. scan->direct_scan[0].len = priv->essid_len;
  5537. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5538. direct_mask = 1;
  5539. } else
  5540. direct_mask = 0;
  5541. /* We don't build a direct scan probe request; the uCode will do
  5542. * that based on the direct_mask added to each channel entry */
  5543. scan->tx_cmd.len = cpu_to_le16(
  5544. iwl_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5545. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5546. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5547. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5548. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5549. /* flags + rate selection */
  5550. switch (priv->scan_bands) {
  5551. case 2:
  5552. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5553. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  5554. scan->good_CRC_th = 0;
  5555. phymode = MODE_IEEE80211G;
  5556. break;
  5557. case 1:
  5558. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  5559. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5560. phymode = MODE_IEEE80211A;
  5561. break;
  5562. default:
  5563. IWL_WARNING("Invalid scan band count\n");
  5564. goto done;
  5565. }
  5566. /* select Rx antennas */
  5567. scan->flags |= iwl3945_get_antenna_flags(priv);
  5568. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5569. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5570. if (direct_mask)
  5571. IWL_DEBUG_SCAN
  5572. ("Initiating direct scan for %s.\n",
  5573. iwl_escape_essid(priv->essid, priv->essid_len));
  5574. else
  5575. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5576. scan->channel_count =
  5577. iwl_get_channels_for_scan(
  5578. priv, phymode, 1, /* active */
  5579. direct_mask,
  5580. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5581. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5582. scan->channel_count * sizeof(struct iwl_scan_channel);
  5583. cmd.data = scan;
  5584. scan->len = cpu_to_le16(cmd.len);
  5585. set_bit(STATUS_SCAN_HW, &priv->status);
  5586. rc = iwl_send_cmd_sync(priv, &cmd);
  5587. if (rc)
  5588. goto done;
  5589. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5590. IWL_SCAN_CHECK_WATCHDOG);
  5591. mutex_unlock(&priv->mutex);
  5592. return;
  5593. done:
  5594. /* inform mac80211 sacn aborted */
  5595. queue_work(priv->workqueue, &priv->scan_completed);
  5596. mutex_unlock(&priv->mutex);
  5597. }
  5598. static void iwl_bg_up(struct work_struct *data)
  5599. {
  5600. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5601. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5602. return;
  5603. mutex_lock(&priv->mutex);
  5604. __iwl_up(priv);
  5605. mutex_unlock(&priv->mutex);
  5606. }
  5607. static void iwl_bg_restart(struct work_struct *data)
  5608. {
  5609. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5610. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5611. return;
  5612. iwl_down(priv);
  5613. queue_work(priv->workqueue, &priv->up);
  5614. }
  5615. static void iwl_bg_rx_replenish(struct work_struct *data)
  5616. {
  5617. struct iwl_priv *priv =
  5618. container_of(data, struct iwl_priv, rx_replenish);
  5619. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5620. return;
  5621. mutex_lock(&priv->mutex);
  5622. iwl_rx_replenish(priv);
  5623. mutex_unlock(&priv->mutex);
  5624. }
  5625. static void iwl_bg_post_associate(struct work_struct *data)
  5626. {
  5627. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5628. post_associate.work);
  5629. int rc = 0;
  5630. struct ieee80211_conf *conf = NULL;
  5631. DECLARE_MAC_BUF(mac);
  5632. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5633. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5634. return;
  5635. }
  5636. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5637. priv->assoc_id,
  5638. print_mac(mac, priv->active_rxon.bssid_addr));
  5639. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5640. return;
  5641. mutex_lock(&priv->mutex);
  5642. conf = ieee80211_get_hw_conf(priv->hw);
  5643. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5644. iwl_commit_rxon(priv);
  5645. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5646. iwl_setup_rxon_timing(priv);
  5647. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5648. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5649. if (rc)
  5650. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5651. "Attempting to continue.\n");
  5652. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5653. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5654. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5655. priv->assoc_id, priv->beacon_int);
  5656. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5657. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5658. else
  5659. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5660. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5661. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5662. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5663. else
  5664. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5665. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5666. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5667. }
  5668. iwl_commit_rxon(priv);
  5669. switch (priv->iw_mode) {
  5670. case IEEE80211_IF_TYPE_STA:
  5671. iwl_rate_scale_init(priv->hw, IWL_AP_ID);
  5672. break;
  5673. case IEEE80211_IF_TYPE_IBSS:
  5674. /* clear out the station table */
  5675. iwl_clear_stations_table(priv);
  5676. iwl_add_station(priv, BROADCAST_ADDR, 0, 0);
  5677. iwl_add_station(priv, priv->bssid, 0, 0);
  5678. iwl3945_sync_sta(priv, IWL_STA_ID,
  5679. (priv->phymode == MODE_IEEE80211A)?
  5680. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  5681. CMD_ASYNC);
  5682. iwl_rate_scale_init(priv->hw, IWL_STA_ID);
  5683. iwl_send_beacon_cmd(priv);
  5684. break;
  5685. default:
  5686. IWL_ERROR("%s Should not be called in %d mode\n",
  5687. __FUNCTION__, priv->iw_mode);
  5688. break;
  5689. }
  5690. iwl_sequence_reset(priv);
  5691. #ifdef CONFIG_IWLWIFI_QOS
  5692. iwl_activate_qos(priv, 0);
  5693. #endif /* CONFIG_IWLWIFI_QOS */
  5694. mutex_unlock(&priv->mutex);
  5695. }
  5696. static void iwl_bg_abort_scan(struct work_struct *work)
  5697. {
  5698. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  5699. abort_scan);
  5700. if (!iwl_is_ready(priv))
  5701. return;
  5702. mutex_lock(&priv->mutex);
  5703. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5704. iwl_send_scan_abort(priv);
  5705. mutex_unlock(&priv->mutex);
  5706. }
  5707. static void iwl_bg_scan_completed(struct work_struct *work)
  5708. {
  5709. struct iwl_priv *priv =
  5710. container_of(work, struct iwl_priv, scan_completed);
  5711. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5712. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5713. return;
  5714. ieee80211_scan_completed(priv->hw);
  5715. /* Since setting the TXPOWER may have been deferred while
  5716. * performing the scan, fire one off */
  5717. mutex_lock(&priv->mutex);
  5718. iwl_hw_reg_send_txpower(priv);
  5719. mutex_unlock(&priv->mutex);
  5720. }
  5721. /*****************************************************************************
  5722. *
  5723. * mac80211 entry point functions
  5724. *
  5725. *****************************************************************************/
  5726. static int iwl_mac_start(struct ieee80211_hw *hw)
  5727. {
  5728. struct iwl_priv *priv = hw->priv;
  5729. IWL_DEBUG_MAC80211("enter\n");
  5730. /* we should be verifying the device is ready to be opened */
  5731. mutex_lock(&priv->mutex);
  5732. priv->is_open = 1;
  5733. if (!iwl_is_rfkill(priv))
  5734. ieee80211_start_queues(priv->hw);
  5735. mutex_unlock(&priv->mutex);
  5736. IWL_DEBUG_MAC80211("leave\n");
  5737. return 0;
  5738. }
  5739. static void iwl_mac_stop(struct ieee80211_hw *hw)
  5740. {
  5741. struct iwl_priv *priv = hw->priv;
  5742. IWL_DEBUG_MAC80211("enter\n");
  5743. priv->is_open = 0;
  5744. /*netif_stop_queue(dev); */
  5745. flush_workqueue(priv->workqueue);
  5746. IWL_DEBUG_MAC80211("leave\n");
  5747. }
  5748. static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5749. struct ieee80211_tx_control *ctl)
  5750. {
  5751. struct iwl_priv *priv = hw->priv;
  5752. IWL_DEBUG_MAC80211("enter\n");
  5753. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5754. IWL_DEBUG_MAC80211("leave - monitor\n");
  5755. return -1;
  5756. }
  5757. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5758. ctl->tx_rate);
  5759. if (iwl_tx_skb(priv, skb, ctl))
  5760. dev_kfree_skb_any(skb);
  5761. IWL_DEBUG_MAC80211("leave\n");
  5762. return 0;
  5763. }
  5764. static int iwl_mac_add_interface(struct ieee80211_hw *hw,
  5765. struct ieee80211_if_init_conf *conf)
  5766. {
  5767. struct iwl_priv *priv = hw->priv;
  5768. unsigned long flags;
  5769. DECLARE_MAC_BUF(mac);
  5770. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  5771. if (conf->mac_addr)
  5772. IWL_DEBUG_MAC80211("enter: MAC %s\n",
  5773. print_mac(mac, conf->mac_addr));
  5774. if (priv->interface_id) {
  5775. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  5776. return 0;
  5777. }
  5778. spin_lock_irqsave(&priv->lock, flags);
  5779. priv->interface_id = conf->if_id;
  5780. spin_unlock_irqrestore(&priv->lock, flags);
  5781. mutex_lock(&priv->mutex);
  5782. iwl_set_mode(priv, conf->type);
  5783. IWL_DEBUG_MAC80211("leave\n");
  5784. mutex_unlock(&priv->mutex);
  5785. return 0;
  5786. }
  5787. /**
  5788. * iwl_mac_config - mac80211 config callback
  5789. *
  5790. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5791. * be set inappropriately and the driver currently sets the hardware up to
  5792. * use it whenever needed.
  5793. */
  5794. static int iwl_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5795. {
  5796. struct iwl_priv *priv = hw->priv;
  5797. const struct iwl_channel_info *ch_info;
  5798. unsigned long flags;
  5799. mutex_lock(&priv->mutex);
  5800. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  5801. if (!iwl_is_ready(priv)) {
  5802. IWL_DEBUG_MAC80211("leave - not ready\n");
  5803. mutex_unlock(&priv->mutex);
  5804. return -EIO;
  5805. }
  5806. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  5807. * what is exposed through include/ declrations */
  5808. if (unlikely(!iwl_param_disable_hw_scan &&
  5809. test_bit(STATUS_SCANNING, &priv->status))) {
  5810. IWL_DEBUG_MAC80211("leave - scanning\n");
  5811. mutex_unlock(&priv->mutex);
  5812. return 0;
  5813. }
  5814. spin_lock_irqsave(&priv->lock, flags);
  5815. ch_info = iwl_get_channel_info(priv, conf->phymode, conf->channel);
  5816. if (!is_channel_valid(ch_info)) {
  5817. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  5818. conf->channel, conf->phymode);
  5819. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5820. spin_unlock_irqrestore(&priv->lock, flags);
  5821. mutex_unlock(&priv->mutex);
  5822. return -EINVAL;
  5823. }
  5824. iwl_set_rxon_channel(priv, conf->phymode, conf->channel);
  5825. iwl_set_flags_for_phymode(priv, conf->phymode);
  5826. /* The list of supported rates and rate mask can be different
  5827. * for each phymode; since the phymode may have changed, reset
  5828. * the rate mask to what mac80211 lists */
  5829. iwl_set_rate(priv);
  5830. spin_unlock_irqrestore(&priv->lock, flags);
  5831. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5832. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5833. iwl_hw_channel_switch(priv, conf->channel);
  5834. mutex_unlock(&priv->mutex);
  5835. return 0;
  5836. }
  5837. #endif
  5838. iwl_radio_kill_sw(priv, !conf->radio_enabled);
  5839. if (!conf->radio_enabled) {
  5840. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5841. mutex_unlock(&priv->mutex);
  5842. return 0;
  5843. }
  5844. if (iwl_is_rfkill(priv)) {
  5845. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5846. mutex_unlock(&priv->mutex);
  5847. return -EIO;
  5848. }
  5849. iwl_set_rate(priv);
  5850. if (memcmp(&priv->active_rxon,
  5851. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5852. iwl_commit_rxon(priv);
  5853. else
  5854. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5855. IWL_DEBUG_MAC80211("leave\n");
  5856. mutex_unlock(&priv->mutex);
  5857. return 0;
  5858. }
  5859. static void iwl_config_ap(struct iwl_priv *priv)
  5860. {
  5861. int rc = 0;
  5862. if (priv->status & STATUS_EXIT_PENDING)
  5863. return;
  5864. /* The following should be done only at AP bring up */
  5865. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5866. /* RXON - unassoc (to set timing command) */
  5867. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5868. iwl_commit_rxon(priv);
  5869. /* RXON Timing */
  5870. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5871. iwl_setup_rxon_timing(priv);
  5872. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5873. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5874. if (rc)
  5875. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5876. "Attempting to continue.\n");
  5877. /* FIXME: what should be the assoc_id for AP? */
  5878. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5879. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5880. priv->staging_rxon.flags |=
  5881. RXON_FLG_SHORT_PREAMBLE_MSK;
  5882. else
  5883. priv->staging_rxon.flags &=
  5884. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5885. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5886. if (priv->assoc_capability &
  5887. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5888. priv->staging_rxon.flags |=
  5889. RXON_FLG_SHORT_SLOT_MSK;
  5890. else
  5891. priv->staging_rxon.flags &=
  5892. ~RXON_FLG_SHORT_SLOT_MSK;
  5893. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5894. priv->staging_rxon.flags &=
  5895. ~RXON_FLG_SHORT_SLOT_MSK;
  5896. }
  5897. /* restore RXON assoc */
  5898. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5899. iwl_commit_rxon(priv);
  5900. iwl_add_station(priv, BROADCAST_ADDR, 0, 0);
  5901. }
  5902. iwl_send_beacon_cmd(priv);
  5903. /* FIXME - we need to add code here to detect a totally new
  5904. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5905. * clear sta table, add BCAST sta... */
  5906. }
  5907. static int iwl_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  5908. struct ieee80211_if_conf *conf)
  5909. {
  5910. struct iwl_priv *priv = hw->priv;
  5911. DECLARE_MAC_BUF(mac);
  5912. unsigned long flags;
  5913. int rc;
  5914. if (conf == NULL)
  5915. return -EIO;
  5916. /* XXX: this MUST use conf->mac_addr */
  5917. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5918. (!conf->beacon || !conf->ssid_len)) {
  5919. IWL_DEBUG_MAC80211
  5920. ("Leaving in AP mode because HostAPD is not ready.\n");
  5921. return 0;
  5922. }
  5923. mutex_lock(&priv->mutex);
  5924. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  5925. if (conf->bssid)
  5926. IWL_DEBUG_MAC80211("bssid: %s\n",
  5927. print_mac(mac, conf->bssid));
  5928. /*
  5929. * very dubious code was here; the probe filtering flag is never set:
  5930. *
  5931. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5932. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5933. */
  5934. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  5935. IWL_DEBUG_MAC80211("leave - scanning\n");
  5936. mutex_unlock(&priv->mutex);
  5937. return 0;
  5938. }
  5939. if (priv->interface_id != if_id) {
  5940. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  5941. mutex_unlock(&priv->mutex);
  5942. return 0;
  5943. }
  5944. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5945. if (!conf->bssid) {
  5946. conf->bssid = priv->mac_addr;
  5947. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5948. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5949. print_mac(mac, conf->bssid));
  5950. }
  5951. if (priv->ibss_beacon)
  5952. dev_kfree_skb(priv->ibss_beacon);
  5953. priv->ibss_beacon = conf->beacon;
  5954. }
  5955. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5956. !is_multicast_ether_addr(conf->bssid)) {
  5957. /* If there is currently a HW scan going on in the background
  5958. * then we need to cancel it else the RXON below will fail. */
  5959. if (iwl_scan_cancel_timeout(priv, 100)) {
  5960. IWL_WARNING("Aborted scan still in progress "
  5961. "after 100ms\n");
  5962. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5963. mutex_unlock(&priv->mutex);
  5964. return -EAGAIN;
  5965. }
  5966. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5967. /* TODO: Audit driver for usage of these members and see
  5968. * if mac80211 deprecates them (priv->bssid looks like it
  5969. * shouldn't be there, but I haven't scanned the IBSS code
  5970. * to verify) - jpk */
  5971. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5972. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5973. iwl_config_ap(priv);
  5974. else {
  5975. priv->staging_rxon.filter_flags |=
  5976. RXON_FILTER_ASSOC_MSK;
  5977. rc = iwl_commit_rxon(priv);
  5978. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5979. iwl_add_station(priv,
  5980. priv->active_rxon.bssid_addr, 1, 0);
  5981. }
  5982. } else {
  5983. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5984. iwl_commit_rxon(priv);
  5985. }
  5986. spin_lock_irqsave(&priv->lock, flags);
  5987. if (!conf->ssid_len)
  5988. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5989. else
  5990. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5991. priv->essid_len = conf->ssid_len;
  5992. spin_unlock_irqrestore(&priv->lock, flags);
  5993. IWL_DEBUG_MAC80211("leave\n");
  5994. mutex_unlock(&priv->mutex);
  5995. return 0;
  5996. }
  5997. static void iwl_configure_filter(struct ieee80211_hw *hw,
  5998. unsigned int changed_flags,
  5999. unsigned int *total_flags,
  6000. int mc_count, struct dev_addr_list *mc_list)
  6001. {
  6002. /*
  6003. * XXX: dummy
  6004. * see also iwl_connection_init_rx_config
  6005. */
  6006. *total_flags = 0;
  6007. }
  6008. static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  6009. struct ieee80211_if_init_conf *conf)
  6010. {
  6011. struct iwl_priv *priv = hw->priv;
  6012. IWL_DEBUG_MAC80211("enter\n");
  6013. mutex_lock(&priv->mutex);
  6014. if (priv->interface_id == conf->if_id) {
  6015. priv->interface_id = 0;
  6016. memset(priv->bssid, 0, ETH_ALEN);
  6017. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6018. priv->essid_len = 0;
  6019. }
  6020. mutex_unlock(&priv->mutex);
  6021. IWL_DEBUG_MAC80211("leave\n");
  6022. }
  6023. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6024. static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6025. {
  6026. int rc = 0;
  6027. unsigned long flags;
  6028. struct iwl_priv *priv = hw->priv;
  6029. IWL_DEBUG_MAC80211("enter\n");
  6030. spin_lock_irqsave(&priv->lock, flags);
  6031. if (!iwl_is_ready_rf(priv)) {
  6032. rc = -EIO;
  6033. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6034. goto out_unlock;
  6035. }
  6036. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6037. rc = -EIO;
  6038. IWL_ERROR("ERROR: APs don't scan\n");
  6039. goto out_unlock;
  6040. }
  6041. /* if we just finished scan ask for delay */
  6042. if (priv->last_scan_jiffies &&
  6043. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  6044. jiffies)) {
  6045. rc = -EAGAIN;
  6046. goto out_unlock;
  6047. }
  6048. if (len) {
  6049. IWL_DEBUG_SCAN("direct scan for "
  6050. "%s [%d]\n ",
  6051. iwl_escape_essid(ssid, len), (int)len);
  6052. priv->one_direct_scan = 1;
  6053. priv->direct_ssid_len = (u8)
  6054. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6055. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6056. }
  6057. rc = iwl_scan_initiate(priv);
  6058. IWL_DEBUG_MAC80211("leave\n");
  6059. out_unlock:
  6060. spin_unlock_irqrestore(&priv->lock, flags);
  6061. return rc;
  6062. }
  6063. static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6064. const u8 *local_addr, const u8 *addr,
  6065. struct ieee80211_key_conf *key)
  6066. {
  6067. struct iwl_priv *priv = hw->priv;
  6068. int rc = 0;
  6069. u8 sta_id;
  6070. IWL_DEBUG_MAC80211("enter\n");
  6071. if (!iwl_param_hwcrypto) {
  6072. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6073. return -EOPNOTSUPP;
  6074. }
  6075. if (is_zero_ether_addr(addr))
  6076. /* only support pairwise keys */
  6077. return -EOPNOTSUPP;
  6078. sta_id = iwl_hw_find_station(priv, addr);
  6079. if (sta_id == IWL_INVALID_STATION) {
  6080. DECLARE_MAC_BUF(mac);
  6081. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6082. print_mac(mac, addr));
  6083. return -EINVAL;
  6084. }
  6085. mutex_lock(&priv->mutex);
  6086. switch (cmd) {
  6087. case SET_KEY:
  6088. rc = iwl_update_sta_key_info(priv, key, sta_id);
  6089. if (!rc) {
  6090. iwl_set_rxon_hwcrypto(priv, 1);
  6091. iwl_commit_rxon(priv);
  6092. key->hw_key_idx = sta_id;
  6093. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6094. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6095. }
  6096. break;
  6097. case DISABLE_KEY:
  6098. rc = iwl_clear_sta_key_info(priv, sta_id);
  6099. if (!rc) {
  6100. iwl_set_rxon_hwcrypto(priv, 0);
  6101. iwl_commit_rxon(priv);
  6102. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6103. }
  6104. break;
  6105. default:
  6106. rc = -EINVAL;
  6107. }
  6108. IWL_DEBUG_MAC80211("leave\n");
  6109. mutex_unlock(&priv->mutex);
  6110. return rc;
  6111. }
  6112. static int iwl_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6113. const struct ieee80211_tx_queue_params *params)
  6114. {
  6115. struct iwl_priv *priv = hw->priv;
  6116. #ifdef CONFIG_IWLWIFI_QOS
  6117. unsigned long flags;
  6118. int q;
  6119. #endif /* CONFIG_IWL_QOS */
  6120. IWL_DEBUG_MAC80211("enter\n");
  6121. if (!iwl_is_ready_rf(priv)) {
  6122. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6123. return -EIO;
  6124. }
  6125. if (queue >= AC_NUM) {
  6126. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6127. return 0;
  6128. }
  6129. #ifdef CONFIG_IWLWIFI_QOS
  6130. if (!priv->qos_data.qos_enable) {
  6131. priv->qos_data.qos_active = 0;
  6132. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6133. return 0;
  6134. }
  6135. q = AC_NUM - 1 - queue;
  6136. spin_lock_irqsave(&priv->lock, flags);
  6137. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6138. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6139. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6140. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6141. cpu_to_le16((params->burst_time * 100));
  6142. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6143. priv->qos_data.qos_active = 1;
  6144. spin_unlock_irqrestore(&priv->lock, flags);
  6145. mutex_lock(&priv->mutex);
  6146. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6147. iwl_activate_qos(priv, 1);
  6148. else if (priv->assoc_id && iwl_is_associated(priv))
  6149. iwl_activate_qos(priv, 0);
  6150. mutex_unlock(&priv->mutex);
  6151. #endif /*CONFIG_IWLWIFI_QOS */
  6152. IWL_DEBUG_MAC80211("leave\n");
  6153. return 0;
  6154. }
  6155. static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  6156. struct ieee80211_tx_queue_stats *stats)
  6157. {
  6158. struct iwl_priv *priv = hw->priv;
  6159. int i, avail;
  6160. struct iwl_tx_queue *txq;
  6161. struct iwl_queue *q;
  6162. unsigned long flags;
  6163. IWL_DEBUG_MAC80211("enter\n");
  6164. if (!iwl_is_ready_rf(priv)) {
  6165. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6166. return -EIO;
  6167. }
  6168. spin_lock_irqsave(&priv->lock, flags);
  6169. for (i = 0; i < AC_NUM; i++) {
  6170. txq = &priv->txq[i];
  6171. q = &txq->q;
  6172. avail = iwl_queue_space(q);
  6173. stats->data[i].len = q->n_window - avail;
  6174. stats->data[i].limit = q->n_window - q->high_mark;
  6175. stats->data[i].count = q->n_window;
  6176. }
  6177. spin_unlock_irqrestore(&priv->lock, flags);
  6178. IWL_DEBUG_MAC80211("leave\n");
  6179. return 0;
  6180. }
  6181. static int iwl_mac_get_stats(struct ieee80211_hw *hw,
  6182. struct ieee80211_low_level_stats *stats)
  6183. {
  6184. IWL_DEBUG_MAC80211("enter\n");
  6185. IWL_DEBUG_MAC80211("leave\n");
  6186. return 0;
  6187. }
  6188. static u64 iwl_mac_get_tsf(struct ieee80211_hw *hw)
  6189. {
  6190. IWL_DEBUG_MAC80211("enter\n");
  6191. IWL_DEBUG_MAC80211("leave\n");
  6192. return 0;
  6193. }
  6194. static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  6195. {
  6196. struct iwl_priv *priv = hw->priv;
  6197. unsigned long flags;
  6198. mutex_lock(&priv->mutex);
  6199. IWL_DEBUG_MAC80211("enter\n");
  6200. #ifdef CONFIG_IWLWIFI_QOS
  6201. iwl_reset_qos(priv);
  6202. #endif
  6203. cancel_delayed_work(&priv->post_associate);
  6204. spin_lock_irqsave(&priv->lock, flags);
  6205. priv->assoc_id = 0;
  6206. priv->assoc_capability = 0;
  6207. priv->call_post_assoc_from_beacon = 0;
  6208. /* new association get rid of ibss beacon skb */
  6209. if (priv->ibss_beacon)
  6210. dev_kfree_skb(priv->ibss_beacon);
  6211. priv->ibss_beacon = NULL;
  6212. priv->beacon_int = priv->hw->conf.beacon_int;
  6213. priv->timestamp1 = 0;
  6214. priv->timestamp0 = 0;
  6215. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6216. priv->beacon_int = 0;
  6217. spin_unlock_irqrestore(&priv->lock, flags);
  6218. /* Per mac80211.h: This is only used in IBSS mode... */
  6219. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6220. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6221. mutex_unlock(&priv->mutex);
  6222. return;
  6223. }
  6224. if (!iwl_is_ready_rf(priv)) {
  6225. IWL_DEBUG_MAC80211("leave - not ready\n");
  6226. mutex_unlock(&priv->mutex);
  6227. return;
  6228. }
  6229. priv->only_active_channel = 0;
  6230. iwl_set_rate(priv);
  6231. mutex_unlock(&priv->mutex);
  6232. IWL_DEBUG_MAC80211("leave\n");
  6233. }
  6234. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6235. struct ieee80211_tx_control *control)
  6236. {
  6237. struct iwl_priv *priv = hw->priv;
  6238. unsigned long flags;
  6239. mutex_lock(&priv->mutex);
  6240. IWL_DEBUG_MAC80211("enter\n");
  6241. if (!iwl_is_ready_rf(priv)) {
  6242. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6243. mutex_unlock(&priv->mutex);
  6244. return -EIO;
  6245. }
  6246. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6247. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6248. mutex_unlock(&priv->mutex);
  6249. return -EIO;
  6250. }
  6251. spin_lock_irqsave(&priv->lock, flags);
  6252. if (priv->ibss_beacon)
  6253. dev_kfree_skb(priv->ibss_beacon);
  6254. priv->ibss_beacon = skb;
  6255. priv->assoc_id = 0;
  6256. IWL_DEBUG_MAC80211("leave\n");
  6257. spin_unlock_irqrestore(&priv->lock, flags);
  6258. #ifdef CONFIG_IWLWIFI_QOS
  6259. iwl_reset_qos(priv);
  6260. #endif
  6261. queue_work(priv->workqueue, &priv->post_associate.work);
  6262. mutex_unlock(&priv->mutex);
  6263. return 0;
  6264. }
  6265. /*****************************************************************************
  6266. *
  6267. * sysfs attributes
  6268. *
  6269. *****************************************************************************/
  6270. #ifdef CONFIG_IWLWIFI_DEBUG
  6271. /*
  6272. * The following adds a new attribute to the sysfs representation
  6273. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6274. * used for controlling the debug level.
  6275. *
  6276. * See the level definitions in iwl for details.
  6277. */
  6278. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6279. {
  6280. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6281. }
  6282. static ssize_t store_debug_level(struct device_driver *d,
  6283. const char *buf, size_t count)
  6284. {
  6285. char *p = (char *)buf;
  6286. u32 val;
  6287. val = simple_strtoul(p, &p, 0);
  6288. if (p == buf)
  6289. printk(KERN_INFO DRV_NAME
  6290. ": %s is not in hex or decimal form.\n", buf);
  6291. else
  6292. iwl_debug_level = val;
  6293. return strnlen(buf, count);
  6294. }
  6295. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6296. show_debug_level, store_debug_level);
  6297. #endif /* CONFIG_IWLWIFI_DEBUG */
  6298. static ssize_t show_rf_kill(struct device *d,
  6299. struct device_attribute *attr, char *buf)
  6300. {
  6301. /*
  6302. * 0 - RF kill not enabled
  6303. * 1 - SW based RF kill active (sysfs)
  6304. * 2 - HW based RF kill active
  6305. * 3 - Both HW and SW based RF kill active
  6306. */
  6307. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6308. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6309. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6310. return sprintf(buf, "%i\n", val);
  6311. }
  6312. static ssize_t store_rf_kill(struct device *d,
  6313. struct device_attribute *attr,
  6314. const char *buf, size_t count)
  6315. {
  6316. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6317. mutex_lock(&priv->mutex);
  6318. iwl_radio_kill_sw(priv, buf[0] == '1');
  6319. mutex_unlock(&priv->mutex);
  6320. return count;
  6321. }
  6322. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6323. static ssize_t show_temperature(struct device *d,
  6324. struct device_attribute *attr, char *buf)
  6325. {
  6326. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6327. if (!iwl_is_alive(priv))
  6328. return -EAGAIN;
  6329. return sprintf(buf, "%d\n", iwl_hw_get_temperature(priv));
  6330. }
  6331. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6332. static ssize_t show_rs_window(struct device *d,
  6333. struct device_attribute *attr,
  6334. char *buf)
  6335. {
  6336. struct iwl_priv *priv = d->driver_data;
  6337. return iwl_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6338. }
  6339. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6340. static ssize_t show_tx_power(struct device *d,
  6341. struct device_attribute *attr, char *buf)
  6342. {
  6343. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6344. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6345. }
  6346. static ssize_t store_tx_power(struct device *d,
  6347. struct device_attribute *attr,
  6348. const char *buf, size_t count)
  6349. {
  6350. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6351. char *p = (char *)buf;
  6352. u32 val;
  6353. val = simple_strtoul(p, &p, 10);
  6354. if (p == buf)
  6355. printk(KERN_INFO DRV_NAME
  6356. ": %s is not in decimal form.\n", buf);
  6357. else
  6358. iwl_hw_reg_set_txpower(priv, val);
  6359. return count;
  6360. }
  6361. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6362. static ssize_t show_flags(struct device *d,
  6363. struct device_attribute *attr, char *buf)
  6364. {
  6365. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6366. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6367. }
  6368. static ssize_t store_flags(struct device *d,
  6369. struct device_attribute *attr,
  6370. const char *buf, size_t count)
  6371. {
  6372. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6373. u32 flags = simple_strtoul(buf, NULL, 0);
  6374. mutex_lock(&priv->mutex);
  6375. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6376. /* Cancel any currently running scans... */
  6377. if (iwl_scan_cancel_timeout(priv, 100))
  6378. IWL_WARNING("Could not cancel scan.\n");
  6379. else {
  6380. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6381. flags);
  6382. priv->staging_rxon.flags = cpu_to_le32(flags);
  6383. iwl_commit_rxon(priv);
  6384. }
  6385. }
  6386. mutex_unlock(&priv->mutex);
  6387. return count;
  6388. }
  6389. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6390. static ssize_t show_filter_flags(struct device *d,
  6391. struct device_attribute *attr, char *buf)
  6392. {
  6393. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6394. return sprintf(buf, "0x%04X\n",
  6395. le32_to_cpu(priv->active_rxon.filter_flags));
  6396. }
  6397. static ssize_t store_filter_flags(struct device *d,
  6398. struct device_attribute *attr,
  6399. const char *buf, size_t count)
  6400. {
  6401. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6402. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6403. mutex_lock(&priv->mutex);
  6404. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6405. /* Cancel any currently running scans... */
  6406. if (iwl_scan_cancel_timeout(priv, 100))
  6407. IWL_WARNING("Could not cancel scan.\n");
  6408. else {
  6409. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6410. "0x%04X\n", filter_flags);
  6411. priv->staging_rxon.filter_flags =
  6412. cpu_to_le32(filter_flags);
  6413. iwl_commit_rxon(priv);
  6414. }
  6415. }
  6416. mutex_unlock(&priv->mutex);
  6417. return count;
  6418. }
  6419. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6420. store_filter_flags);
  6421. static ssize_t show_tune(struct device *d,
  6422. struct device_attribute *attr, char *buf)
  6423. {
  6424. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6425. return sprintf(buf, "0x%04X\n",
  6426. (priv->phymode << 8) |
  6427. le16_to_cpu(priv->active_rxon.channel));
  6428. }
  6429. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode);
  6430. static ssize_t store_tune(struct device *d,
  6431. struct device_attribute *attr,
  6432. const char *buf, size_t count)
  6433. {
  6434. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6435. char *p = (char *)buf;
  6436. u16 tune = simple_strtoul(p, &p, 0);
  6437. u8 phymode = (tune >> 8) & 0xff;
  6438. u16 channel = tune & 0xff;
  6439. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  6440. mutex_lock(&priv->mutex);
  6441. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  6442. (priv->phymode != phymode)) {
  6443. const struct iwl_channel_info *ch_info;
  6444. ch_info = iwl_get_channel_info(priv, phymode, channel);
  6445. if (!ch_info) {
  6446. IWL_WARNING("Requested invalid phymode/channel "
  6447. "combination: %d %d\n", phymode, channel);
  6448. mutex_unlock(&priv->mutex);
  6449. return -EINVAL;
  6450. }
  6451. /* Cancel any currently running scans... */
  6452. if (iwl_scan_cancel_timeout(priv, 100))
  6453. IWL_WARNING("Could not cancel scan.\n");
  6454. else {
  6455. IWL_DEBUG_INFO("Committing phymode and "
  6456. "rxon.channel = %d %d\n",
  6457. phymode, channel);
  6458. iwl_set_rxon_channel(priv, phymode, channel);
  6459. iwl_set_flags_for_phymode(priv, phymode);
  6460. iwl_set_rate(priv);
  6461. iwl_commit_rxon(priv);
  6462. }
  6463. }
  6464. mutex_unlock(&priv->mutex);
  6465. return count;
  6466. }
  6467. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  6468. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6469. static ssize_t show_measurement(struct device *d,
  6470. struct device_attribute *attr, char *buf)
  6471. {
  6472. struct iwl_priv *priv = dev_get_drvdata(d);
  6473. struct iwl_spectrum_notification measure_report;
  6474. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6475. u8 *data = (u8 *) & measure_report;
  6476. unsigned long flags;
  6477. spin_lock_irqsave(&priv->lock, flags);
  6478. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6479. spin_unlock_irqrestore(&priv->lock, flags);
  6480. return 0;
  6481. }
  6482. memcpy(&measure_report, &priv->measure_report, size);
  6483. priv->measurement_status = 0;
  6484. spin_unlock_irqrestore(&priv->lock, flags);
  6485. while (size && (PAGE_SIZE - len)) {
  6486. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6487. PAGE_SIZE - len, 1);
  6488. len = strlen(buf);
  6489. if (PAGE_SIZE - len)
  6490. buf[len++] = '\n';
  6491. ofs += 16;
  6492. size -= min(size, 16U);
  6493. }
  6494. return len;
  6495. }
  6496. static ssize_t store_measurement(struct device *d,
  6497. struct device_attribute *attr,
  6498. const char *buf, size_t count)
  6499. {
  6500. struct iwl_priv *priv = dev_get_drvdata(d);
  6501. struct ieee80211_measurement_params params = {
  6502. .channel = le16_to_cpu(priv->active_rxon.channel),
  6503. .start_time = cpu_to_le64(priv->last_tsf),
  6504. .duration = cpu_to_le16(1),
  6505. };
  6506. u8 type = IWL_MEASURE_BASIC;
  6507. u8 buffer[32];
  6508. u8 channel;
  6509. if (count) {
  6510. char *p = buffer;
  6511. strncpy(buffer, buf, min(sizeof(buffer), count));
  6512. channel = simple_strtoul(p, NULL, 0);
  6513. if (channel)
  6514. params.channel = channel;
  6515. p = buffer;
  6516. while (*p && *p != ' ')
  6517. p++;
  6518. if (*p)
  6519. type = simple_strtoul(p + 1, NULL, 0);
  6520. }
  6521. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6522. "channel %d (for '%s')\n", type, params.channel, buf);
  6523. iwl_get_measurement(priv, &params, type);
  6524. return count;
  6525. }
  6526. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6527. show_measurement, store_measurement);
  6528. #endif /* CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT */
  6529. static ssize_t show_rate(struct device *d,
  6530. struct device_attribute *attr, char *buf)
  6531. {
  6532. struct iwl_priv *priv = dev_get_drvdata(d);
  6533. unsigned long flags;
  6534. int i;
  6535. spin_lock_irqsave(&priv->sta_lock, flags);
  6536. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  6537. i = priv->stations[IWL_AP_ID].current_rate.s.rate;
  6538. else
  6539. i = priv->stations[IWL_STA_ID].current_rate.s.rate;
  6540. spin_unlock_irqrestore(&priv->sta_lock, flags);
  6541. i = iwl_rate_index_from_plcp(i);
  6542. if (i == -1)
  6543. return sprintf(buf, "0\n");
  6544. return sprintf(buf, "%d%s\n",
  6545. (iwl_rates[i].ieee >> 1),
  6546. (iwl_rates[i].ieee & 0x1) ? ".5" : "");
  6547. }
  6548. static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
  6549. static ssize_t store_retry_rate(struct device *d,
  6550. struct device_attribute *attr,
  6551. const char *buf, size_t count)
  6552. {
  6553. struct iwl_priv *priv = dev_get_drvdata(d);
  6554. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6555. if (priv->retry_rate <= 0)
  6556. priv->retry_rate = 1;
  6557. return count;
  6558. }
  6559. static ssize_t show_retry_rate(struct device *d,
  6560. struct device_attribute *attr, char *buf)
  6561. {
  6562. struct iwl_priv *priv = dev_get_drvdata(d);
  6563. return sprintf(buf, "%d", priv->retry_rate);
  6564. }
  6565. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6566. store_retry_rate);
  6567. static ssize_t store_power_level(struct device *d,
  6568. struct device_attribute *attr,
  6569. const char *buf, size_t count)
  6570. {
  6571. struct iwl_priv *priv = dev_get_drvdata(d);
  6572. int rc;
  6573. int mode;
  6574. mode = simple_strtoul(buf, NULL, 0);
  6575. mutex_lock(&priv->mutex);
  6576. if (!iwl_is_ready(priv)) {
  6577. rc = -EAGAIN;
  6578. goto out;
  6579. }
  6580. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6581. mode = IWL_POWER_AC;
  6582. else
  6583. mode |= IWL_POWER_ENABLED;
  6584. if (mode != priv->power_mode) {
  6585. rc = iwl_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6586. if (rc) {
  6587. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6588. goto out;
  6589. }
  6590. priv->power_mode = mode;
  6591. }
  6592. rc = count;
  6593. out:
  6594. mutex_unlock(&priv->mutex);
  6595. return rc;
  6596. }
  6597. #define MAX_WX_STRING 80
  6598. /* Values are in microsecond */
  6599. static const s32 timeout_duration[] = {
  6600. 350000,
  6601. 250000,
  6602. 75000,
  6603. 37000,
  6604. 25000,
  6605. };
  6606. static const s32 period_duration[] = {
  6607. 400000,
  6608. 700000,
  6609. 1000000,
  6610. 1000000,
  6611. 1000000
  6612. };
  6613. static ssize_t show_power_level(struct device *d,
  6614. struct device_attribute *attr, char *buf)
  6615. {
  6616. struct iwl_priv *priv = dev_get_drvdata(d);
  6617. int level = IWL_POWER_LEVEL(priv->power_mode);
  6618. char *p = buf;
  6619. p += sprintf(p, "%d ", level);
  6620. switch (level) {
  6621. case IWL_POWER_MODE_CAM:
  6622. case IWL_POWER_AC:
  6623. p += sprintf(p, "(AC)");
  6624. break;
  6625. case IWL_POWER_BATTERY:
  6626. p += sprintf(p, "(BATTERY)");
  6627. break;
  6628. default:
  6629. p += sprintf(p,
  6630. "(Timeout %dms, Period %dms)",
  6631. timeout_duration[level - 1] / 1000,
  6632. period_duration[level - 1] / 1000);
  6633. }
  6634. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6635. p += sprintf(p, " OFF\n");
  6636. else
  6637. p += sprintf(p, " \n");
  6638. return (p - buf + 1);
  6639. }
  6640. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6641. store_power_level);
  6642. static ssize_t show_channels(struct device *d,
  6643. struct device_attribute *attr, char *buf)
  6644. {
  6645. struct iwl_priv *priv = dev_get_drvdata(d);
  6646. int len = 0, i;
  6647. struct ieee80211_channel *channels = NULL;
  6648. const struct ieee80211_hw_mode *hw_mode = NULL;
  6649. int count = 0;
  6650. if (!iwl_is_ready(priv))
  6651. return -EAGAIN;
  6652. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211G);
  6653. if (!hw_mode)
  6654. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211B);
  6655. if (hw_mode) {
  6656. channels = hw_mode->channels;
  6657. count = hw_mode->num_channels;
  6658. }
  6659. len +=
  6660. sprintf(&buf[len],
  6661. "Displaying %d channels in 2.4GHz band "
  6662. "(802.11bg):\n", count);
  6663. for (i = 0; i < count; i++)
  6664. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  6665. channels[i].chan,
  6666. channels[i].power_level,
  6667. channels[i].
  6668. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  6669. " (IEEE 802.11h required)" : "",
  6670. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  6671. || (channels[i].
  6672. flag &
  6673. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  6674. ", IBSS",
  6675. channels[i].
  6676. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  6677. "active/passive" : "passive only");
  6678. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211A);
  6679. if (hw_mode) {
  6680. channels = hw_mode->channels;
  6681. count = hw_mode->num_channels;
  6682. } else {
  6683. channels = NULL;
  6684. count = 0;
  6685. }
  6686. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  6687. "(802.11a):\n", count);
  6688. for (i = 0; i < count; i++)
  6689. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  6690. channels[i].chan,
  6691. channels[i].power_level,
  6692. channels[i].
  6693. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  6694. " (IEEE 802.11h required)" : "",
  6695. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  6696. || (channels[i].
  6697. flag &
  6698. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  6699. ", IBSS",
  6700. channels[i].
  6701. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  6702. "active/passive" : "passive only");
  6703. return len;
  6704. }
  6705. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6706. static ssize_t show_statistics(struct device *d,
  6707. struct device_attribute *attr, char *buf)
  6708. {
  6709. struct iwl_priv *priv = dev_get_drvdata(d);
  6710. u32 size = sizeof(struct iwl_notif_statistics);
  6711. u32 len = 0, ofs = 0;
  6712. u8 *data = (u8 *) & priv->statistics;
  6713. int rc = 0;
  6714. if (!iwl_is_alive(priv))
  6715. return -EAGAIN;
  6716. mutex_lock(&priv->mutex);
  6717. rc = iwl_send_statistics_request(priv);
  6718. mutex_unlock(&priv->mutex);
  6719. if (rc) {
  6720. len = sprintf(buf,
  6721. "Error sending statistics request: 0x%08X\n", rc);
  6722. return len;
  6723. }
  6724. while (size && (PAGE_SIZE - len)) {
  6725. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6726. PAGE_SIZE - len, 1);
  6727. len = strlen(buf);
  6728. if (PAGE_SIZE - len)
  6729. buf[len++] = '\n';
  6730. ofs += 16;
  6731. size -= min(size, 16U);
  6732. }
  6733. return len;
  6734. }
  6735. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6736. static ssize_t show_antenna(struct device *d,
  6737. struct device_attribute *attr, char *buf)
  6738. {
  6739. struct iwl_priv *priv = dev_get_drvdata(d);
  6740. if (!iwl_is_alive(priv))
  6741. return -EAGAIN;
  6742. return sprintf(buf, "%d\n", priv->antenna);
  6743. }
  6744. static ssize_t store_antenna(struct device *d,
  6745. struct device_attribute *attr,
  6746. const char *buf, size_t count)
  6747. {
  6748. int ant;
  6749. struct iwl_priv *priv = dev_get_drvdata(d);
  6750. if (count == 0)
  6751. return 0;
  6752. if (sscanf(buf, "%1i", &ant) != 1) {
  6753. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6754. return count;
  6755. }
  6756. if ((ant >= 0) && (ant <= 2)) {
  6757. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6758. priv->antenna = (enum iwl_antenna)ant;
  6759. } else
  6760. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6761. return count;
  6762. }
  6763. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6764. static ssize_t show_status(struct device *d,
  6765. struct device_attribute *attr, char *buf)
  6766. {
  6767. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6768. if (!iwl_is_alive(priv))
  6769. return -EAGAIN;
  6770. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6771. }
  6772. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6773. static ssize_t dump_error_log(struct device *d,
  6774. struct device_attribute *attr,
  6775. const char *buf, size_t count)
  6776. {
  6777. char *p = (char *)buf;
  6778. if (p[0] == '1')
  6779. iwl_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6780. return strnlen(buf, count);
  6781. }
  6782. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6783. static ssize_t dump_event_log(struct device *d,
  6784. struct device_attribute *attr,
  6785. const char *buf, size_t count)
  6786. {
  6787. char *p = (char *)buf;
  6788. if (p[0] == '1')
  6789. iwl_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6790. return strnlen(buf, count);
  6791. }
  6792. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6793. /*****************************************************************************
  6794. *
  6795. * driver setup and teardown
  6796. *
  6797. *****************************************************************************/
  6798. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  6799. {
  6800. priv->workqueue = create_workqueue(DRV_NAME);
  6801. init_waitqueue_head(&priv->wait_command_queue);
  6802. INIT_WORK(&priv->up, iwl_bg_up);
  6803. INIT_WORK(&priv->restart, iwl_bg_restart);
  6804. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  6805. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  6806. INIT_WORK(&priv->request_scan, iwl_bg_request_scan);
  6807. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  6808. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  6809. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  6810. INIT_DELAYED_WORK(&priv->post_associate, iwl_bg_post_associate);
  6811. INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
  6812. INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
  6813. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  6814. iwl_hw_setup_deferred_work(priv);
  6815. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6816. iwl_irq_tasklet, (unsigned long)priv);
  6817. }
  6818. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  6819. {
  6820. iwl_hw_cancel_deferred_work(priv);
  6821. cancel_delayed_work(&priv->scan_check);
  6822. cancel_delayed_work(&priv->alive_start);
  6823. cancel_delayed_work(&priv->post_associate);
  6824. cancel_work_sync(&priv->beacon_update);
  6825. }
  6826. static struct attribute *iwl_sysfs_entries[] = {
  6827. &dev_attr_antenna.attr,
  6828. &dev_attr_channels.attr,
  6829. &dev_attr_dump_errors.attr,
  6830. &dev_attr_dump_events.attr,
  6831. &dev_attr_flags.attr,
  6832. &dev_attr_filter_flags.attr,
  6833. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6834. &dev_attr_measurement.attr,
  6835. #endif
  6836. &dev_attr_power_level.attr,
  6837. &dev_attr_rate.attr,
  6838. &dev_attr_retry_rate.attr,
  6839. &dev_attr_rf_kill.attr,
  6840. &dev_attr_rs_window.attr,
  6841. &dev_attr_statistics.attr,
  6842. &dev_attr_status.attr,
  6843. &dev_attr_temperature.attr,
  6844. &dev_attr_tune.attr,
  6845. &dev_attr_tx_power.attr,
  6846. NULL
  6847. };
  6848. static struct attribute_group iwl_attribute_group = {
  6849. .name = NULL, /* put in device directory */
  6850. .attrs = iwl_sysfs_entries,
  6851. };
  6852. static struct ieee80211_ops iwl_hw_ops = {
  6853. .tx = iwl_mac_tx,
  6854. .start = iwl_mac_start,
  6855. .stop = iwl_mac_stop,
  6856. .add_interface = iwl_mac_add_interface,
  6857. .remove_interface = iwl_mac_remove_interface,
  6858. .config = iwl_mac_config,
  6859. .config_interface = iwl_mac_config_interface,
  6860. .configure_filter = iwl_configure_filter,
  6861. .set_key = iwl_mac_set_key,
  6862. .get_stats = iwl_mac_get_stats,
  6863. .get_tx_stats = iwl_mac_get_tx_stats,
  6864. .conf_tx = iwl_mac_conf_tx,
  6865. .get_tsf = iwl_mac_get_tsf,
  6866. .reset_tsf = iwl_mac_reset_tsf,
  6867. .beacon_update = iwl_mac_beacon_update,
  6868. .hw_scan = iwl_mac_hw_scan
  6869. };
  6870. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6871. {
  6872. int err = 0;
  6873. u32 pci_id;
  6874. struct iwl_priv *priv;
  6875. struct ieee80211_hw *hw;
  6876. int i;
  6877. if (iwl_param_disable_hw_scan) {
  6878. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6879. iwl_hw_ops.hw_scan = NULL;
  6880. }
  6881. if ((iwl_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  6882. (iwl_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  6883. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  6884. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  6885. err = -EINVAL;
  6886. goto out;
  6887. }
  6888. /* mac80211 allocates memory for this device instance, including
  6889. * space for this driver's private structure */
  6890. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl_hw_ops);
  6891. if (hw == NULL) {
  6892. IWL_ERROR("Can not allocate network device\n");
  6893. err = -ENOMEM;
  6894. goto out;
  6895. }
  6896. SET_IEEE80211_DEV(hw, &pdev->dev);
  6897. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6898. priv = hw->priv;
  6899. priv->hw = hw;
  6900. priv->pci_dev = pdev;
  6901. priv->antenna = (enum iwl_antenna)iwl_param_antenna;
  6902. #ifdef CONFIG_IWLWIFI_DEBUG
  6903. iwl_debug_level = iwl_param_debug;
  6904. atomic_set(&priv->restrict_refcnt, 0);
  6905. #endif
  6906. priv->retry_rate = 1;
  6907. priv->ibss_beacon = NULL;
  6908. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  6909. * the range of signal quality values that we'll provide.
  6910. * Negative values for level/noise indicate that we'll provide dBm.
  6911. * For WE, at least, non-0 values here *enable* display of values
  6912. * in app (iwconfig). */
  6913. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  6914. hw->max_noise = -20; /* noise level, negative indicates dBm */
  6915. hw->max_signal = 100; /* link quality indication (%) */
  6916. /* Tell mac80211 our Tx characteristics */
  6917. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  6918. hw->queues = 4;
  6919. spin_lock_init(&priv->lock);
  6920. spin_lock_init(&priv->power_data.lock);
  6921. spin_lock_init(&priv->sta_lock);
  6922. spin_lock_init(&priv->hcmd_lock);
  6923. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  6924. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  6925. INIT_LIST_HEAD(&priv->free_frames);
  6926. mutex_init(&priv->mutex);
  6927. if (pci_enable_device(pdev)) {
  6928. err = -ENODEV;
  6929. goto out_ieee80211_free_hw;
  6930. }
  6931. pci_set_master(pdev);
  6932. iwl_clear_stations_table(priv);
  6933. priv->data_retry_limit = -1;
  6934. priv->ieee_channels = NULL;
  6935. priv->ieee_rates = NULL;
  6936. priv->phymode = -1;
  6937. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6938. if (!err)
  6939. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6940. if (err) {
  6941. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  6942. goto out_pci_disable_device;
  6943. }
  6944. pci_set_drvdata(pdev, priv);
  6945. err = pci_request_regions(pdev, DRV_NAME);
  6946. if (err)
  6947. goto out_pci_disable_device;
  6948. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6949. * PCI Tx retries from interfering with C3 CPU state */
  6950. pci_write_config_byte(pdev, 0x41, 0x00);
  6951. priv->hw_base = pci_iomap(pdev, 0, 0);
  6952. if (!priv->hw_base) {
  6953. err = -ENODEV;
  6954. goto out_pci_release_regions;
  6955. }
  6956. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6957. (unsigned long long) pci_resource_len(pdev, 0));
  6958. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6959. /* Initialize module parameter values here */
  6960. if (iwl_param_disable) {
  6961. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6962. IWL_DEBUG_INFO("Radio disabled.\n");
  6963. }
  6964. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  6965. pci_id =
  6966. (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
  6967. switch (pci_id) {
  6968. case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
  6969. case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
  6970. case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
  6971. case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
  6972. priv->is_abg = 0;
  6973. break;
  6974. /*
  6975. * Rest are assumed ABG SKU -- if this is not the
  6976. * case then the card will get the wrong 'Detected'
  6977. * line in the kernel log however the code that
  6978. * initializes the GEO table will detect no A-band
  6979. * channels and remove the is_abg mask.
  6980. */
  6981. default:
  6982. priv->is_abg = 1;
  6983. break;
  6984. }
  6985. printk(KERN_INFO DRV_NAME
  6986. ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
  6987. priv->is_abg ? "A" : "");
  6988. /* Device-specific setup */
  6989. if (iwl_hw_set_hw_setting(priv)) {
  6990. IWL_ERROR("failed to set hw settings\n");
  6991. mutex_unlock(&priv->mutex);
  6992. goto out_iounmap;
  6993. }
  6994. #ifdef CONFIG_IWLWIFI_QOS
  6995. if (iwl_param_qos_enable)
  6996. priv->qos_data.qos_enable = 1;
  6997. iwl_reset_qos(priv);
  6998. priv->qos_data.qos_active = 0;
  6999. priv->qos_data.qos_cap.val = 0;
  7000. #endif /* CONFIG_IWLWIFI_QOS */
  7001. iwl_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7002. iwl_setup_deferred_work(priv);
  7003. iwl_setup_rx_handlers(priv);
  7004. priv->rates_mask = IWL_RATES_MASK;
  7005. /* If power management is turned on, default to AC mode */
  7006. priv->power_mode = IWL_POWER_AC;
  7007. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7008. pci_enable_msi(pdev);
  7009. err = request_irq(pdev->irq, iwl_isr, IRQF_SHARED, DRV_NAME, priv);
  7010. if (err) {
  7011. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7012. goto out_disable_msi;
  7013. }
  7014. mutex_lock(&priv->mutex);
  7015. err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
  7016. if (err) {
  7017. IWL_ERROR("failed to create sysfs device attributes\n");
  7018. mutex_unlock(&priv->mutex);
  7019. goto out_release_irq;
  7020. }
  7021. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7022. * ucode filename and max sizes are card-specific. */
  7023. err = iwl_read_ucode(priv);
  7024. if (err) {
  7025. IWL_ERROR("Could not read microcode: %d\n", err);
  7026. mutex_unlock(&priv->mutex);
  7027. goto out_pci_alloc;
  7028. }
  7029. mutex_unlock(&priv->mutex);
  7030. IWL_DEBUG_INFO("Queing UP work.\n");
  7031. queue_work(priv->workqueue, &priv->up);
  7032. return 0;
  7033. out_pci_alloc:
  7034. iwl_dealloc_ucode_pci(priv);
  7035. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7036. out_release_irq:
  7037. free_irq(pdev->irq, priv);
  7038. out_disable_msi:
  7039. pci_disable_msi(pdev);
  7040. destroy_workqueue(priv->workqueue);
  7041. priv->workqueue = NULL;
  7042. iwl_unset_hw_setting(priv);
  7043. out_iounmap:
  7044. pci_iounmap(pdev, priv->hw_base);
  7045. out_pci_release_regions:
  7046. pci_release_regions(pdev);
  7047. out_pci_disable_device:
  7048. pci_disable_device(pdev);
  7049. pci_set_drvdata(pdev, NULL);
  7050. out_ieee80211_free_hw:
  7051. ieee80211_free_hw(priv->hw);
  7052. out:
  7053. return err;
  7054. }
  7055. static void iwl_pci_remove(struct pci_dev *pdev)
  7056. {
  7057. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7058. struct list_head *p, *q;
  7059. int i;
  7060. if (!priv)
  7061. return;
  7062. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7063. mutex_lock(&priv->mutex);
  7064. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7065. __iwl_down(priv);
  7066. mutex_unlock(&priv->mutex);
  7067. /* Free MAC hash list for ADHOC */
  7068. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7069. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7070. list_del(p);
  7071. kfree(list_entry(p, struct iwl_ibss_seq, list));
  7072. }
  7073. }
  7074. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7075. iwl_dealloc_ucode_pci(priv);
  7076. if (priv->rxq.bd)
  7077. iwl_rx_queue_free(priv, &priv->rxq);
  7078. iwl_hw_txq_ctx_free(priv);
  7079. iwl_unset_hw_setting(priv);
  7080. iwl_clear_stations_table(priv);
  7081. if (priv->mac80211_registered) {
  7082. ieee80211_unregister_hw(priv->hw);
  7083. iwl_rate_control_unregister(priv->hw);
  7084. }
  7085. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  7086. * priv->workqueue... so we can't take down the workqueue
  7087. * until now... */
  7088. destroy_workqueue(priv->workqueue);
  7089. priv->workqueue = NULL;
  7090. free_irq(pdev->irq, priv);
  7091. pci_disable_msi(pdev);
  7092. pci_iounmap(pdev, priv->hw_base);
  7093. pci_release_regions(pdev);
  7094. pci_disable_device(pdev);
  7095. pci_set_drvdata(pdev, NULL);
  7096. kfree(priv->channel_info);
  7097. kfree(priv->ieee_channels);
  7098. kfree(priv->ieee_rates);
  7099. if (priv->ibss_beacon)
  7100. dev_kfree_skb(priv->ibss_beacon);
  7101. ieee80211_free_hw(priv->hw);
  7102. }
  7103. #ifdef CONFIG_PM
  7104. static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7105. {
  7106. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7107. mutex_lock(&priv->mutex);
  7108. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7109. /* Take down the device; powers it off, etc. */
  7110. __iwl_down(priv);
  7111. if (priv->mac80211_registered)
  7112. ieee80211_stop_queues(priv->hw);
  7113. pci_save_state(pdev);
  7114. pci_disable_device(pdev);
  7115. pci_set_power_state(pdev, PCI_D3hot);
  7116. mutex_unlock(&priv->mutex);
  7117. return 0;
  7118. }
  7119. static void iwl_resume(struct iwl_priv *priv)
  7120. {
  7121. unsigned long flags;
  7122. /* The following it a temporary work around due to the
  7123. * suspend / resume not fully initializing the NIC correctly.
  7124. * Without all of the following, resume will not attempt to take
  7125. * down the NIC (it shouldn't really need to) and will just try
  7126. * and bring the NIC back up. However that fails during the
  7127. * ucode verification process. This then causes iwl_down to be
  7128. * called *after* iwl_hw_nic_init() has succeeded -- which
  7129. * then lets the next init sequence succeed. So, we've
  7130. * replicated all of that NIC init code here... */
  7131. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7132. iwl_hw_nic_init(priv);
  7133. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7134. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7135. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7136. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7137. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7138. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7139. /* tell the device to stop sending interrupts */
  7140. iwl_disable_interrupts(priv);
  7141. spin_lock_irqsave(&priv->lock, flags);
  7142. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7143. if (!iwl_grab_restricted_access(priv)) {
  7144. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  7145. APMG_CLK_VAL_DMA_CLK_RQT);
  7146. iwl_release_restricted_access(priv);
  7147. }
  7148. spin_unlock_irqrestore(&priv->lock, flags);
  7149. udelay(5);
  7150. iwl_hw_nic_reset(priv);
  7151. /* Bring the device back up */
  7152. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7153. queue_work(priv->workqueue, &priv->up);
  7154. }
  7155. static int iwl_pci_resume(struct pci_dev *pdev)
  7156. {
  7157. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7158. int err;
  7159. printk(KERN_INFO "Coming out of suspend...\n");
  7160. mutex_lock(&priv->mutex);
  7161. pci_set_power_state(pdev, PCI_D0);
  7162. err = pci_enable_device(pdev);
  7163. pci_restore_state(pdev);
  7164. /*
  7165. * Suspend/Resume resets the PCI configuration space, so we have to
  7166. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7167. * from interfering with C3 CPU state. pci_restore_state won't help
  7168. * here since it only restores the first 64 bytes pci config header.
  7169. */
  7170. pci_write_config_byte(pdev, 0x41, 0x00);
  7171. iwl_resume(priv);
  7172. mutex_unlock(&priv->mutex);
  7173. return 0;
  7174. }
  7175. #endif /* CONFIG_PM */
  7176. /*****************************************************************************
  7177. *
  7178. * driver and module entry point
  7179. *
  7180. *****************************************************************************/
  7181. static struct pci_driver iwl_driver = {
  7182. .name = DRV_NAME,
  7183. .id_table = iwl_hw_card_ids,
  7184. .probe = iwl_pci_probe,
  7185. .remove = __devexit_p(iwl_pci_remove),
  7186. #ifdef CONFIG_PM
  7187. .suspend = iwl_pci_suspend,
  7188. .resume = iwl_pci_resume,
  7189. #endif
  7190. };
  7191. static int __init iwl_init(void)
  7192. {
  7193. int ret;
  7194. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7195. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7196. ret = pci_register_driver(&iwl_driver);
  7197. if (ret) {
  7198. IWL_ERROR("Unable to initialize PCI module\n");
  7199. return ret;
  7200. }
  7201. #ifdef CONFIG_IWLWIFI_DEBUG
  7202. ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
  7203. if (ret) {
  7204. IWL_ERROR("Unable to create driver sysfs file\n");
  7205. pci_unregister_driver(&iwl_driver);
  7206. return ret;
  7207. }
  7208. #endif
  7209. return ret;
  7210. }
  7211. static void __exit iwl_exit(void)
  7212. {
  7213. #ifdef CONFIG_IWLWIFI_DEBUG
  7214. driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
  7215. #endif
  7216. pci_unregister_driver(&iwl_driver);
  7217. }
  7218. module_param_named(antenna, iwl_param_antenna, int, 0444);
  7219. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7220. module_param_named(disable, iwl_param_disable, int, 0444);
  7221. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7222. module_param_named(hwcrypto, iwl_param_hwcrypto, int, 0444);
  7223. MODULE_PARM_DESC(hwcrypto,
  7224. "using hardware crypto engine (default 0 [software])\n");
  7225. module_param_named(debug, iwl_param_debug, int, 0444);
  7226. MODULE_PARM_DESC(debug, "debug output mask");
  7227. module_param_named(disable_hw_scan, iwl_param_disable_hw_scan, int, 0444);
  7228. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7229. module_param_named(queues_num, iwl_param_queues_num, int, 0444);
  7230. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7231. /* QoS */
  7232. module_param_named(qos_enable, iwl_param_qos_enable, int, 0444);
  7233. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7234. module_exit(iwl_exit);
  7235. module_init(iwl_init);