tc35815.c 88 KB

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  1. /*
  2. * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
  3. *
  4. * Based on skelton.c by Donald Becker.
  5. *
  6. * This driver is a replacement of older and less maintained version.
  7. * This is a header of the older version:
  8. * -----<snip>-----
  9. * Copyright 2001 MontaVista Software Inc.
  10. * Author: MontaVista Software, Inc.
  11. * ahennessy@mvista.com
  12. * Copyright (C) 2000-2001 Toshiba Corporation
  13. * static const char *version =
  14. * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
  15. * -----<snip>-----
  16. *
  17. * This file is subject to the terms and conditions of the GNU General Public
  18. * License. See the file "COPYING" in the main directory of this archive
  19. * for more details.
  20. *
  21. * (C) Copyright TOSHIBA CORPORATION 2004-2005
  22. * All Rights Reserved.
  23. */
  24. #ifdef TC35815_NAPI
  25. #define DRV_VERSION "1.36-NAPI"
  26. #else
  27. #define DRV_VERSION "1.36"
  28. #endif
  29. static const char *version = "tc35815.c:v" DRV_VERSION "\n";
  30. #define MODNAME "tc35815"
  31. #include <linux/module.h>
  32. #include <linux/kernel.h>
  33. #include <linux/types.h>
  34. #include <linux/fcntl.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/ioport.h>
  37. #include <linux/in.h>
  38. #include <linux/slab.h>
  39. #include <linux/string.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/errno.h>
  42. #include <linux/init.h>
  43. #include <linux/netdevice.h>
  44. #include <linux/etherdevice.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/delay.h>
  47. #include <linux/pci.h>
  48. #include <linux/mii.h>
  49. #include <linux/ethtool.h>
  50. #include <linux/platform_device.h>
  51. #include <asm/io.h>
  52. #include <asm/byteorder.h>
  53. /* First, a few definitions that the brave might change. */
  54. #define GATHER_TXINT /* On-Demand Tx Interrupt */
  55. #define WORKAROUND_LOSTCAR
  56. #define WORKAROUND_100HALF_PROMISC
  57. /* #define TC35815_USE_PACKEDBUFFER */
  58. typedef enum {
  59. TC35815CF = 0,
  60. TC35815_NWU,
  61. TC35815_TX4939,
  62. } board_t;
  63. /* indexed by board_t, above */
  64. static const struct {
  65. const char *name;
  66. } board_info[] __devinitdata = {
  67. { "TOSHIBA TC35815CF 10/100BaseTX" },
  68. { "TOSHIBA TC35815 with Wake on LAN" },
  69. { "TOSHIBA TC35815/TX4939" },
  70. };
  71. static const struct pci_device_id tc35815_pci_tbl[] = {
  72. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
  73. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
  74. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
  75. {0,}
  76. };
  77. MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
  78. /* see MODULE_PARM_DESC */
  79. static struct tc35815_options {
  80. int speed;
  81. int duplex;
  82. int doforce;
  83. } options;
  84. /*
  85. * Registers
  86. */
  87. struct tc35815_regs {
  88. volatile __u32 DMA_Ctl; /* 0x00 */
  89. volatile __u32 TxFrmPtr;
  90. volatile __u32 TxThrsh;
  91. volatile __u32 TxPollCtr;
  92. volatile __u32 BLFrmPtr;
  93. volatile __u32 RxFragSize;
  94. volatile __u32 Int_En;
  95. volatile __u32 FDA_Bas;
  96. volatile __u32 FDA_Lim; /* 0x20 */
  97. volatile __u32 Int_Src;
  98. volatile __u32 unused0[2];
  99. volatile __u32 PauseCnt;
  100. volatile __u32 RemPauCnt;
  101. volatile __u32 TxCtlFrmStat;
  102. volatile __u32 unused1;
  103. volatile __u32 MAC_Ctl; /* 0x40 */
  104. volatile __u32 CAM_Ctl;
  105. volatile __u32 Tx_Ctl;
  106. volatile __u32 Tx_Stat;
  107. volatile __u32 Rx_Ctl;
  108. volatile __u32 Rx_Stat;
  109. volatile __u32 MD_Data;
  110. volatile __u32 MD_CA;
  111. volatile __u32 CAM_Adr; /* 0x60 */
  112. volatile __u32 CAM_Data;
  113. volatile __u32 CAM_Ena;
  114. volatile __u32 PROM_Ctl;
  115. volatile __u32 PROM_Data;
  116. volatile __u32 Algn_Cnt;
  117. volatile __u32 CRC_Cnt;
  118. volatile __u32 Miss_Cnt;
  119. };
  120. /*
  121. * Bit assignments
  122. */
  123. /* DMA_Ctl bit asign ------------------------------------------------------- */
  124. #define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
  125. #define DMA_RxAlign_1 0x00400000
  126. #define DMA_RxAlign_2 0x00800000
  127. #define DMA_RxAlign_3 0x00c00000
  128. #define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
  129. #define DMA_IntMask 0x00040000 /* 1:Interupt mask */
  130. #define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
  131. #define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
  132. #define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
  133. #define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
  134. #define DMA_TestMode 0x00002000 /* 1:Test Mode */
  135. #define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
  136. #define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
  137. /* RxFragSize bit asign ---------------------------------------------------- */
  138. #define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
  139. #define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
  140. /* MAC_Ctl bit asign ------------------------------------------------------- */
  141. #define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
  142. #define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
  143. #define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
  144. #define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
  145. #define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
  146. #define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
  147. #define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
  148. #define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
  149. #define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
  150. #define MAC_Reset 0x00000004 /* 1:Software Reset */
  151. #define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
  152. #define MAC_HaltReq 0x00000001 /* 1:Halt request */
  153. /* PROM_Ctl bit asign ------------------------------------------------------ */
  154. #define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
  155. #define PROM_Read 0x00004000 /*10:Read operation */
  156. #define PROM_Write 0x00002000 /*01:Write operation */
  157. #define PROM_Erase 0x00006000 /*11:Erase operation */
  158. /*00:Enable or Disable Writting, */
  159. /* as specified in PROM_Addr. */
  160. #define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
  161. /*00xxxx: disable */
  162. /* CAM_Ctl bit asign ------------------------------------------------------- */
  163. #define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
  164. #define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
  165. /* accept other */
  166. #define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
  167. #define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
  168. #define CAM_StationAcc 0x00000001 /* 1:unicast accept */
  169. /* CAM_Ena bit asign ------------------------------------------------------- */
  170. #define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
  171. #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
  172. #define CAM_Ena_Bit(index) (1<<(index))
  173. #define CAM_ENTRY_DESTINATION 0
  174. #define CAM_ENTRY_SOURCE 1
  175. #define CAM_ENTRY_MACCTL 20
  176. /* Tx_Ctl bit asign -------------------------------------------------------- */
  177. #define Tx_En 0x00000001 /* 1:Transmit enable */
  178. #define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
  179. #define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
  180. #define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
  181. #define Tx_FBack 0x00000010 /* 1:Fast Back-off */
  182. #define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
  183. #define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
  184. #define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
  185. #define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
  186. #define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
  187. #define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
  188. #define Tx_EnComp 0x00004000 /* 1:Enable Completion */
  189. /* Tx_Stat bit asign ------------------------------------------------------- */
  190. #define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
  191. #define Tx_ExColl 0x00000010 /* Excessive Collision */
  192. #define Tx_TXDefer 0x00000020 /* Transmit Defered */
  193. #define Tx_Paused 0x00000040 /* Transmit Paused */
  194. #define Tx_IntTx 0x00000080 /* Interrupt on Tx */
  195. #define Tx_Under 0x00000100 /* Underrun */
  196. #define Tx_Defer 0x00000200 /* Deferral */
  197. #define Tx_NCarr 0x00000400 /* No Carrier */
  198. #define Tx_10Stat 0x00000800 /* 10Mbps Status */
  199. #define Tx_LateColl 0x00001000 /* Late Collision */
  200. #define Tx_TxPar 0x00002000 /* Tx Parity Error */
  201. #define Tx_Comp 0x00004000 /* Completion */
  202. #define Tx_Halted 0x00008000 /* Tx Halted */
  203. #define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
  204. /* Rx_Ctl bit asign -------------------------------------------------------- */
  205. #define Rx_EnGood 0x00004000 /* 1:Enable Good */
  206. #define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
  207. #define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
  208. #define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
  209. #define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
  210. #define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
  211. #define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
  212. #define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
  213. #define Rx_ShortEn 0x00000008 /* 1:Short Enable */
  214. #define Rx_LongEn 0x00000004 /* 1:Long Enable */
  215. #define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
  216. #define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
  217. /* Rx_Stat bit asign ------------------------------------------------------- */
  218. #define Rx_Halted 0x00008000 /* Rx Halted */
  219. #define Rx_Good 0x00004000 /* Rx Good */
  220. #define Rx_RxPar 0x00002000 /* Rx Parity Error */
  221. /* 0x00001000 not use */
  222. #define Rx_LongErr 0x00000800 /* Rx Long Error */
  223. #define Rx_Over 0x00000400 /* Rx Overflow */
  224. #define Rx_CRCErr 0x00000200 /* Rx CRC Error */
  225. #define Rx_Align 0x00000100 /* Rx Alignment Error */
  226. #define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
  227. #define Rx_IntRx 0x00000040 /* Rx Interrupt */
  228. #define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
  229. #define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
  230. /* Int_En bit asign -------------------------------------------------------- */
  231. #define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
  232. #define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
  233. #define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
  234. #define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
  235. #define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
  236. #define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
  237. #define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
  238. #define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
  239. #define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
  240. #define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
  241. #define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
  242. #define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
  243. /* Exhausted Enable */
  244. /* Int_Src bit asign ------------------------------------------------------- */
  245. #define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
  246. #define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
  247. #define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
  248. #define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
  249. #define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
  250. #define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
  251. #define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
  252. #define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
  253. #define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
  254. #define Int_SWInt 0x00000020 /* 1:Software request & Clear */
  255. #define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
  256. #define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
  257. #define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
  258. #define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
  259. #define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
  260. /* MD_CA bit asign --------------------------------------------------------- */
  261. #define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
  262. #define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
  263. #define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
  264. /*
  265. * Descriptors
  266. */
  267. /* Frame descripter */
  268. struct FDesc {
  269. volatile __u32 FDNext;
  270. volatile __u32 FDSystem;
  271. volatile __u32 FDStat;
  272. volatile __u32 FDCtl;
  273. };
  274. /* Buffer descripter */
  275. struct BDesc {
  276. volatile __u32 BuffData;
  277. volatile __u32 BDCtl;
  278. };
  279. #define FD_ALIGN 16
  280. /* Frame Descripter bit asign ---------------------------------------------- */
  281. #define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
  282. #define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
  283. #define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
  284. #define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
  285. #define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
  286. #define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
  287. #define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
  288. #define FD_FrmOpt_Packing 0x04000000 /* Rx only */
  289. #define FD_CownsFD 0x80000000 /* FD Controller owner bit */
  290. #define FD_Next_EOL 0x00000001 /* FD EOL indicator */
  291. #define FD_BDCnt_SHIFT 16
  292. /* Buffer Descripter bit asign --------------------------------------------- */
  293. #define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
  294. #define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
  295. #define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
  296. #define BD_CownsBD 0x80000000 /* BD Controller owner bit */
  297. #define BD_RxBDID_SHIFT 16
  298. #define BD_RxBDSeqN_SHIFT 24
  299. /* Some useful constants. */
  300. #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
  301. #ifdef NO_CHECK_CARRIER
  302. #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
  303. Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
  304. Tx_En) /* maybe 0x7b01 */
  305. #else
  306. #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
  307. Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
  308. Tx_En) /* maybe 0x7b01 */
  309. #endif
  310. #define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
  311. | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
  312. #define INT_EN_CMD (Int_NRAbtEn | \
  313. Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
  314. Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \
  315. Int_STargAbtEn | \
  316. Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
  317. #define DMA_CTL_CMD DMA_BURST_SIZE
  318. #define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
  319. /* Tuning parameters */
  320. #define DMA_BURST_SIZE 32
  321. #define TX_THRESHOLD 1024
  322. #define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
  323. #define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
  324. /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
  325. #ifdef TC35815_USE_PACKEDBUFFER
  326. #define FD_PAGE_NUM 2
  327. #define RX_BUF_NUM 8 /* >= 2 */
  328. #define RX_FD_NUM 250 /* >= 32 */
  329. #define TX_FD_NUM 128
  330. #define RX_BUF_SIZE PAGE_SIZE
  331. #else /* TC35815_USE_PACKEDBUFFER */
  332. #define FD_PAGE_NUM 4
  333. #define RX_BUF_NUM 128 /* < 256 */
  334. #define RX_FD_NUM 256 /* >= 32 */
  335. #define TX_FD_NUM 128
  336. #if RX_CTL_CMD & Rx_LongEn
  337. #define RX_BUF_SIZE PAGE_SIZE
  338. #elif RX_CTL_CMD & Rx_StripCRC
  339. #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
  340. #else
  341. #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
  342. #endif
  343. #endif /* TC35815_USE_PACKEDBUFFER */
  344. #define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */
  345. #define NAPI_WEIGHT 16
  346. struct TxFD {
  347. struct FDesc fd;
  348. struct BDesc bd;
  349. struct BDesc unused;
  350. };
  351. struct RxFD {
  352. struct FDesc fd;
  353. struct BDesc bd[0]; /* variable length */
  354. };
  355. struct FrFD {
  356. struct FDesc fd;
  357. struct BDesc bd[RX_BUF_NUM];
  358. };
  359. #define tc_readl(addr) readl(addr)
  360. #define tc_writel(d, addr) writel(d, addr)
  361. #define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
  362. /* Timer state engine. */
  363. enum tc35815_timer_state {
  364. arbwait = 0, /* Waiting for auto negotiation to complete. */
  365. lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
  366. ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
  367. asleep = 3, /* Time inactive. */
  368. lcheck = 4, /* Check link status. */
  369. };
  370. /* Information that need to be kept for each board. */
  371. struct tc35815_local {
  372. struct pci_dev *pci_dev;
  373. struct net_device *dev;
  374. struct napi_struct napi;
  375. /* statistics */
  376. struct net_device_stats stats;
  377. struct {
  378. int max_tx_qlen;
  379. int tx_ints;
  380. int rx_ints;
  381. int tx_underrun;
  382. } lstats;
  383. /* Tx control lock. This protects the transmit buffer ring
  384. * state along with the "tx full" state of the driver. This
  385. * means all netif_queue flow control actions are protected
  386. * by this lock as well.
  387. */
  388. spinlock_t lock;
  389. int phy_addr;
  390. int fullduplex;
  391. unsigned short saved_lpa;
  392. struct timer_list timer;
  393. enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
  394. unsigned int timer_ticks; /* Number of clicks at each state */
  395. /*
  396. * Transmitting: Batch Mode.
  397. * 1 BD in 1 TxFD.
  398. * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
  399. * 1 circular FD for Free Buffer List.
  400. * RX_BUF_NUM BD in Free Buffer FD.
  401. * One Free Buffer BD has PAGE_SIZE data buffer.
  402. * Or Non-Packing Mode.
  403. * 1 circular FD for Free Buffer List.
  404. * RX_BUF_NUM BD in Free Buffer FD.
  405. * One Free Buffer BD has ETH_FRAME_LEN data buffer.
  406. */
  407. void * fd_buf; /* for TxFD, RxFD, FrFD */
  408. dma_addr_t fd_buf_dma;
  409. struct TxFD *tfd_base;
  410. unsigned int tfd_start;
  411. unsigned int tfd_end;
  412. struct RxFD *rfd_base;
  413. struct RxFD *rfd_limit;
  414. struct RxFD *rfd_cur;
  415. struct FrFD *fbl_ptr;
  416. #ifdef TC35815_USE_PACKEDBUFFER
  417. unsigned char fbl_curid;
  418. void * data_buf[RX_BUF_NUM]; /* packing */
  419. dma_addr_t data_buf_dma[RX_BUF_NUM];
  420. struct {
  421. struct sk_buff *skb;
  422. dma_addr_t skb_dma;
  423. } tx_skbs[TX_FD_NUM];
  424. #else
  425. unsigned int fbl_count;
  426. struct {
  427. struct sk_buff *skb;
  428. dma_addr_t skb_dma;
  429. } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
  430. #endif
  431. struct mii_if_info mii;
  432. unsigned short mii_id[2];
  433. u32 msg_enable;
  434. board_t boardtype;
  435. };
  436. static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
  437. {
  438. return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
  439. }
  440. #ifdef DEBUG
  441. static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
  442. {
  443. return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
  444. }
  445. #endif
  446. #ifdef TC35815_USE_PACKEDBUFFER
  447. static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
  448. {
  449. int i;
  450. for (i = 0; i < RX_BUF_NUM; i++) {
  451. if (bus >= lp->data_buf_dma[i] &&
  452. bus < lp->data_buf_dma[i] + PAGE_SIZE)
  453. return (void *)((u8 *)lp->data_buf[i] +
  454. (bus - lp->data_buf_dma[i]));
  455. }
  456. return NULL;
  457. }
  458. #define TC35815_DMA_SYNC_ONDEMAND
  459. static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
  460. {
  461. #ifdef TC35815_DMA_SYNC_ONDEMAND
  462. void *buf;
  463. /* pci_map + pci_dma_sync will be more effective than
  464. * pci_alloc_consistent on some archs. */
  465. if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
  466. return NULL;
  467. *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
  468. PCI_DMA_FROMDEVICE);
  469. if (pci_dma_mapping_error(*dma_handle)) {
  470. free_page((unsigned long)buf);
  471. return NULL;
  472. }
  473. return buf;
  474. #else
  475. return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
  476. #endif
  477. }
  478. static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
  479. {
  480. #ifdef TC35815_DMA_SYNC_ONDEMAND
  481. pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
  482. free_page((unsigned long)buf);
  483. #else
  484. pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
  485. #endif
  486. }
  487. #else /* TC35815_USE_PACKEDBUFFER */
  488. static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
  489. struct pci_dev *hwdev,
  490. dma_addr_t *dma_handle)
  491. {
  492. struct sk_buff *skb;
  493. skb = dev_alloc_skb(RX_BUF_SIZE);
  494. if (!skb)
  495. return NULL;
  496. *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
  497. PCI_DMA_FROMDEVICE);
  498. if (pci_dma_mapping_error(*dma_handle)) {
  499. dev_kfree_skb_any(skb);
  500. return NULL;
  501. }
  502. skb_reserve(skb, 2); /* make IP header 4byte aligned */
  503. return skb;
  504. }
  505. static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
  506. {
  507. pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
  508. PCI_DMA_FROMDEVICE);
  509. dev_kfree_skb_any(skb);
  510. }
  511. #endif /* TC35815_USE_PACKEDBUFFER */
  512. /* Index to functions, as function prototypes. */
  513. static int tc35815_open(struct net_device *dev);
  514. static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
  515. static irqreturn_t tc35815_interrupt(int irq, void *dev_id);
  516. #ifdef TC35815_NAPI
  517. static int tc35815_rx(struct net_device *dev, int limit);
  518. static int tc35815_poll(struct napi_struct *napi, int budget);
  519. #else
  520. static void tc35815_rx(struct net_device *dev);
  521. #endif
  522. static void tc35815_txdone(struct net_device *dev);
  523. static int tc35815_close(struct net_device *dev);
  524. static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
  525. static void tc35815_set_multicast_list(struct net_device *dev);
  526. static void tc35815_tx_timeout(struct net_device *dev);
  527. static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
  528. #ifdef CONFIG_NET_POLL_CONTROLLER
  529. static void tc35815_poll_controller(struct net_device *dev);
  530. #endif
  531. static const struct ethtool_ops tc35815_ethtool_ops;
  532. /* Example routines you must write ;->. */
  533. static void tc35815_chip_reset(struct net_device *dev);
  534. static void tc35815_chip_init(struct net_device *dev);
  535. static void tc35815_find_phy(struct net_device *dev);
  536. static void tc35815_phy_chip_init(struct net_device *dev);
  537. #ifdef DEBUG
  538. static void panic_queues(struct net_device *dev);
  539. #endif
  540. static void tc35815_timer(unsigned long data);
  541. static void tc35815_start_auto_negotiation(struct net_device *dev,
  542. struct ethtool_cmd *ep);
  543. static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
  544. static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
  545. int val);
  546. #ifdef CONFIG_CPU_TX49XX
  547. /*
  548. * Find a platform_device providing a MAC address. The platform code
  549. * should provide a "tc35815-mac" device with a MAC address in its
  550. * platform_data.
  551. */
  552. static int __devinit tc35815_mac_match(struct device *dev, void *data)
  553. {
  554. struct platform_device *plat_dev = to_platform_device(dev);
  555. struct pci_dev *pci_dev = data;
  556. unsigned int id = (pci_dev->bus->number << 8) | pci_dev->devfn;
  557. return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
  558. }
  559. static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
  560. {
  561. struct tc35815_local *lp = dev->priv;
  562. struct device *pd = bus_find_device(&platform_bus_type, NULL,
  563. lp->pci_dev, tc35815_mac_match);
  564. if (pd) {
  565. if (pd->platform_data)
  566. memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
  567. put_device(pd);
  568. return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
  569. }
  570. return -ENODEV;
  571. }
  572. #else
  573. static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
  574. {
  575. return -ENODEV;
  576. }
  577. #endif
  578. static int __devinit tc35815_init_dev_addr (struct net_device *dev)
  579. {
  580. struct tc35815_regs __iomem *tr =
  581. (struct tc35815_regs __iomem *)dev->base_addr;
  582. int i;
  583. while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
  584. ;
  585. for (i = 0; i < 6; i += 2) {
  586. unsigned short data;
  587. tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
  588. while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
  589. ;
  590. data = tc_readl(&tr->PROM_Data);
  591. dev->dev_addr[i] = data & 0xff;
  592. dev->dev_addr[i+1] = data >> 8;
  593. }
  594. if (!is_valid_ether_addr(dev->dev_addr))
  595. return tc35815_read_plat_dev_addr(dev);
  596. return 0;
  597. }
  598. static int __devinit tc35815_init_one (struct pci_dev *pdev,
  599. const struct pci_device_id *ent)
  600. {
  601. void __iomem *ioaddr = NULL;
  602. struct net_device *dev;
  603. struct tc35815_local *lp;
  604. int rc;
  605. unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
  606. static int printed_version;
  607. if (!printed_version++) {
  608. printk(version);
  609. dev_printk(KERN_DEBUG, &pdev->dev,
  610. "speed:%d duplex:%d doforce:%d\n",
  611. options.speed, options.duplex, options.doforce);
  612. }
  613. if (!pdev->irq) {
  614. dev_warn(&pdev->dev, "no IRQ assigned.\n");
  615. return -ENODEV;
  616. }
  617. /* dev zeroed in alloc_etherdev */
  618. dev = alloc_etherdev (sizeof (*lp));
  619. if (dev == NULL) {
  620. dev_err(&pdev->dev, "unable to alloc new ethernet\n");
  621. return -ENOMEM;
  622. }
  623. SET_NETDEV_DEV(dev, &pdev->dev);
  624. lp = dev->priv;
  625. lp->dev = dev;
  626. /* enable device (incl. PCI PM wakeup), and bus-mastering */
  627. rc = pci_enable_device (pdev);
  628. if (rc)
  629. goto err_out;
  630. mmio_start = pci_resource_start (pdev, 1);
  631. mmio_end = pci_resource_end (pdev, 1);
  632. mmio_flags = pci_resource_flags (pdev, 1);
  633. mmio_len = pci_resource_len (pdev, 1);
  634. /* set this immediately, we need to know before
  635. * we talk to the chip directly */
  636. /* make sure PCI base addr 1 is MMIO */
  637. if (!(mmio_flags & IORESOURCE_MEM)) {
  638. dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
  639. rc = -ENODEV;
  640. goto err_out;
  641. }
  642. /* check for weird/broken PCI region reporting */
  643. if ((mmio_len < sizeof(struct tc35815_regs))) {
  644. dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
  645. rc = -ENODEV;
  646. goto err_out;
  647. }
  648. rc = pci_request_regions (pdev, MODNAME);
  649. if (rc)
  650. goto err_out;
  651. pci_set_master (pdev);
  652. /* ioremap MMIO region */
  653. ioaddr = ioremap (mmio_start, mmio_len);
  654. if (ioaddr == NULL) {
  655. dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
  656. rc = -EIO;
  657. goto err_out_free_res;
  658. }
  659. /* Initialize the device structure. */
  660. dev->open = tc35815_open;
  661. dev->hard_start_xmit = tc35815_send_packet;
  662. dev->stop = tc35815_close;
  663. dev->get_stats = tc35815_get_stats;
  664. dev->set_multicast_list = tc35815_set_multicast_list;
  665. dev->do_ioctl = tc35815_ioctl;
  666. dev->ethtool_ops = &tc35815_ethtool_ops;
  667. dev->tx_timeout = tc35815_tx_timeout;
  668. dev->watchdog_timeo = TC35815_TX_TIMEOUT;
  669. #ifdef TC35815_NAPI
  670. netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT);
  671. #endif
  672. #ifdef CONFIG_NET_POLL_CONTROLLER
  673. dev->poll_controller = tc35815_poll_controller;
  674. #endif
  675. dev->irq = pdev->irq;
  676. dev->base_addr = (unsigned long) ioaddr;
  677. spin_lock_init(&lp->lock);
  678. lp->pci_dev = pdev;
  679. lp->boardtype = ent->driver_data;
  680. lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
  681. pci_set_drvdata(pdev, dev);
  682. /* Soft reset the chip. */
  683. tc35815_chip_reset(dev);
  684. /* Retrieve the ethernet address. */
  685. if (tc35815_init_dev_addr(dev)) {
  686. dev_warn(&pdev->dev, "not valid ether addr\n");
  687. random_ether_addr(dev->dev_addr);
  688. }
  689. rc = register_netdev (dev);
  690. if (rc)
  691. goto err_out_unmap;
  692. memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
  693. printk(KERN_INFO "%s: %s at 0x%lx, "
  694. "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
  695. "IRQ %d\n",
  696. dev->name,
  697. board_info[ent->driver_data].name,
  698. dev->base_addr,
  699. dev->dev_addr[0], dev->dev_addr[1],
  700. dev->dev_addr[2], dev->dev_addr[3],
  701. dev->dev_addr[4], dev->dev_addr[5],
  702. dev->irq);
  703. setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
  704. lp->mii.dev = dev;
  705. lp->mii.mdio_read = tc_mdio_read;
  706. lp->mii.mdio_write = tc_mdio_write;
  707. lp->mii.phy_id_mask = 0x1f;
  708. lp->mii.reg_num_mask = 0x1f;
  709. tc35815_find_phy(dev);
  710. lp->mii.phy_id = lp->phy_addr;
  711. lp->mii.full_duplex = 0;
  712. lp->mii.force_media = 0;
  713. return 0;
  714. err_out_unmap:
  715. iounmap(ioaddr);
  716. err_out_free_res:
  717. pci_release_regions (pdev);
  718. err_out:
  719. free_netdev (dev);
  720. return rc;
  721. }
  722. static void __devexit tc35815_remove_one (struct pci_dev *pdev)
  723. {
  724. struct net_device *dev = pci_get_drvdata (pdev);
  725. unsigned long mmio_addr;
  726. mmio_addr = dev->base_addr;
  727. unregister_netdev (dev);
  728. if (mmio_addr) {
  729. iounmap ((void __iomem *)mmio_addr);
  730. pci_release_regions (pdev);
  731. }
  732. free_netdev (dev);
  733. pci_set_drvdata (pdev, NULL);
  734. }
  735. static int
  736. tc35815_init_queues(struct net_device *dev)
  737. {
  738. struct tc35815_local *lp = dev->priv;
  739. int i;
  740. unsigned long fd_addr;
  741. if (!lp->fd_buf) {
  742. BUG_ON(sizeof(struct FDesc) +
  743. sizeof(struct BDesc) * RX_BUF_NUM +
  744. sizeof(struct FDesc) * RX_FD_NUM +
  745. sizeof(struct TxFD) * TX_FD_NUM >
  746. PAGE_SIZE * FD_PAGE_NUM);
  747. if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
  748. return -ENOMEM;
  749. for (i = 0; i < RX_BUF_NUM; i++) {
  750. #ifdef TC35815_USE_PACKEDBUFFER
  751. if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
  752. while (--i >= 0) {
  753. free_rxbuf_page(lp->pci_dev,
  754. lp->data_buf[i],
  755. lp->data_buf_dma[i]);
  756. lp->data_buf[i] = NULL;
  757. }
  758. pci_free_consistent(lp->pci_dev,
  759. PAGE_SIZE * FD_PAGE_NUM,
  760. lp->fd_buf,
  761. lp->fd_buf_dma);
  762. lp->fd_buf = NULL;
  763. return -ENOMEM;
  764. }
  765. #else
  766. lp->rx_skbs[i].skb =
  767. alloc_rxbuf_skb(dev, lp->pci_dev,
  768. &lp->rx_skbs[i].skb_dma);
  769. if (!lp->rx_skbs[i].skb) {
  770. while (--i >= 0) {
  771. free_rxbuf_skb(lp->pci_dev,
  772. lp->rx_skbs[i].skb,
  773. lp->rx_skbs[i].skb_dma);
  774. lp->rx_skbs[i].skb = NULL;
  775. }
  776. pci_free_consistent(lp->pci_dev,
  777. PAGE_SIZE * FD_PAGE_NUM,
  778. lp->fd_buf,
  779. lp->fd_buf_dma);
  780. lp->fd_buf = NULL;
  781. return -ENOMEM;
  782. }
  783. #endif
  784. }
  785. printk(KERN_DEBUG "%s: FD buf %p DataBuf",
  786. dev->name, lp->fd_buf);
  787. #ifdef TC35815_USE_PACKEDBUFFER
  788. printk(" DataBuf");
  789. for (i = 0; i < RX_BUF_NUM; i++)
  790. printk(" %p", lp->data_buf[i]);
  791. #endif
  792. printk("\n");
  793. } else {
  794. for (i = 0; i < FD_PAGE_NUM; i++) {
  795. clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
  796. }
  797. }
  798. fd_addr = (unsigned long)lp->fd_buf;
  799. /* Free Descriptors (for Receive) */
  800. lp->rfd_base = (struct RxFD *)fd_addr;
  801. fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
  802. for (i = 0; i < RX_FD_NUM; i++) {
  803. lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
  804. }
  805. lp->rfd_cur = lp->rfd_base;
  806. lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
  807. /* Transmit Descriptors */
  808. lp->tfd_base = (struct TxFD *)fd_addr;
  809. fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
  810. for (i = 0; i < TX_FD_NUM; i++) {
  811. lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
  812. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  813. lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
  814. }
  815. lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
  816. lp->tfd_start = 0;
  817. lp->tfd_end = 0;
  818. /* Buffer List (for Receive) */
  819. lp->fbl_ptr = (struct FrFD *)fd_addr;
  820. lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
  821. lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
  822. #ifndef TC35815_USE_PACKEDBUFFER
  823. /*
  824. * move all allocated skbs to head of rx_skbs[] array.
  825. * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
  826. * tc35815_rx() had failed.
  827. */
  828. lp->fbl_count = 0;
  829. for (i = 0; i < RX_BUF_NUM; i++) {
  830. if (lp->rx_skbs[i].skb) {
  831. if (i != lp->fbl_count) {
  832. lp->rx_skbs[lp->fbl_count].skb =
  833. lp->rx_skbs[i].skb;
  834. lp->rx_skbs[lp->fbl_count].skb_dma =
  835. lp->rx_skbs[i].skb_dma;
  836. }
  837. lp->fbl_count++;
  838. }
  839. }
  840. #endif
  841. for (i = 0; i < RX_BUF_NUM; i++) {
  842. #ifdef TC35815_USE_PACKEDBUFFER
  843. lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
  844. #else
  845. if (i >= lp->fbl_count) {
  846. lp->fbl_ptr->bd[i].BuffData = 0;
  847. lp->fbl_ptr->bd[i].BDCtl = 0;
  848. continue;
  849. }
  850. lp->fbl_ptr->bd[i].BuffData =
  851. cpu_to_le32(lp->rx_skbs[i].skb_dma);
  852. #endif
  853. /* BDID is index of FrFD.bd[] */
  854. lp->fbl_ptr->bd[i].BDCtl =
  855. cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
  856. RX_BUF_SIZE);
  857. }
  858. #ifdef TC35815_USE_PACKEDBUFFER
  859. lp->fbl_curid = 0;
  860. #endif
  861. printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
  862. dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
  863. return 0;
  864. }
  865. static void
  866. tc35815_clear_queues(struct net_device *dev)
  867. {
  868. struct tc35815_local *lp = dev->priv;
  869. int i;
  870. for (i = 0; i < TX_FD_NUM; i++) {
  871. u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
  872. struct sk_buff *skb =
  873. fdsystem != 0xffffffff ?
  874. lp->tx_skbs[fdsystem].skb : NULL;
  875. #ifdef DEBUG
  876. if (lp->tx_skbs[i].skb != skb) {
  877. printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
  878. panic_queues(dev);
  879. }
  880. #else
  881. BUG_ON(lp->tx_skbs[i].skb != skb);
  882. #endif
  883. if (skb) {
  884. pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
  885. lp->tx_skbs[i].skb = NULL;
  886. lp->tx_skbs[i].skb_dma = 0;
  887. dev_kfree_skb_any(skb);
  888. }
  889. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  890. }
  891. tc35815_init_queues(dev);
  892. }
  893. static void
  894. tc35815_free_queues(struct net_device *dev)
  895. {
  896. struct tc35815_local *lp = dev->priv;
  897. int i;
  898. if (lp->tfd_base) {
  899. for (i = 0; i < TX_FD_NUM; i++) {
  900. u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
  901. struct sk_buff *skb =
  902. fdsystem != 0xffffffff ?
  903. lp->tx_skbs[fdsystem].skb : NULL;
  904. #ifdef DEBUG
  905. if (lp->tx_skbs[i].skb != skb) {
  906. printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
  907. panic_queues(dev);
  908. }
  909. #else
  910. BUG_ON(lp->tx_skbs[i].skb != skb);
  911. #endif
  912. if (skb) {
  913. dev_kfree_skb(skb);
  914. pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
  915. lp->tx_skbs[i].skb = NULL;
  916. lp->tx_skbs[i].skb_dma = 0;
  917. }
  918. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  919. }
  920. }
  921. lp->rfd_base = NULL;
  922. lp->rfd_limit = NULL;
  923. lp->rfd_cur = NULL;
  924. lp->fbl_ptr = NULL;
  925. for (i = 0; i < RX_BUF_NUM; i++) {
  926. #ifdef TC35815_USE_PACKEDBUFFER
  927. if (lp->data_buf[i]) {
  928. free_rxbuf_page(lp->pci_dev,
  929. lp->data_buf[i], lp->data_buf_dma[i]);
  930. lp->data_buf[i] = NULL;
  931. }
  932. #else
  933. if (lp->rx_skbs[i].skb) {
  934. free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
  935. lp->rx_skbs[i].skb_dma);
  936. lp->rx_skbs[i].skb = NULL;
  937. }
  938. #endif
  939. }
  940. if (lp->fd_buf) {
  941. pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
  942. lp->fd_buf, lp->fd_buf_dma);
  943. lp->fd_buf = NULL;
  944. }
  945. }
  946. static void
  947. dump_txfd(struct TxFD *fd)
  948. {
  949. printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
  950. le32_to_cpu(fd->fd.FDNext),
  951. le32_to_cpu(fd->fd.FDSystem),
  952. le32_to_cpu(fd->fd.FDStat),
  953. le32_to_cpu(fd->fd.FDCtl));
  954. printk("BD: ");
  955. printk(" %08x %08x",
  956. le32_to_cpu(fd->bd.BuffData),
  957. le32_to_cpu(fd->bd.BDCtl));
  958. printk("\n");
  959. }
  960. static int
  961. dump_rxfd(struct RxFD *fd)
  962. {
  963. int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
  964. if (bd_count > 8)
  965. bd_count = 8;
  966. printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
  967. le32_to_cpu(fd->fd.FDNext),
  968. le32_to_cpu(fd->fd.FDSystem),
  969. le32_to_cpu(fd->fd.FDStat),
  970. le32_to_cpu(fd->fd.FDCtl));
  971. if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
  972. return 0;
  973. printk("BD: ");
  974. for (i = 0; i < bd_count; i++)
  975. printk(" %08x %08x",
  976. le32_to_cpu(fd->bd[i].BuffData),
  977. le32_to_cpu(fd->bd[i].BDCtl));
  978. printk("\n");
  979. return bd_count;
  980. }
  981. #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
  982. static void
  983. dump_frfd(struct FrFD *fd)
  984. {
  985. int i;
  986. printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
  987. le32_to_cpu(fd->fd.FDNext),
  988. le32_to_cpu(fd->fd.FDSystem),
  989. le32_to_cpu(fd->fd.FDStat),
  990. le32_to_cpu(fd->fd.FDCtl));
  991. printk("BD: ");
  992. for (i = 0; i < RX_BUF_NUM; i++)
  993. printk(" %08x %08x",
  994. le32_to_cpu(fd->bd[i].BuffData),
  995. le32_to_cpu(fd->bd[i].BDCtl));
  996. printk("\n");
  997. }
  998. #endif
  999. #ifdef DEBUG
  1000. static void
  1001. panic_queues(struct net_device *dev)
  1002. {
  1003. struct tc35815_local *lp = dev->priv;
  1004. int i;
  1005. printk("TxFD base %p, start %u, end %u\n",
  1006. lp->tfd_base, lp->tfd_start, lp->tfd_end);
  1007. printk("RxFD base %p limit %p cur %p\n",
  1008. lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
  1009. printk("FrFD %p\n", lp->fbl_ptr);
  1010. for (i = 0; i < TX_FD_NUM; i++)
  1011. dump_txfd(&lp->tfd_base[i]);
  1012. for (i = 0; i < RX_FD_NUM; i++) {
  1013. int bd_count = dump_rxfd(&lp->rfd_base[i]);
  1014. i += (bd_count + 1) / 2; /* skip BDs */
  1015. }
  1016. dump_frfd(lp->fbl_ptr);
  1017. panic("%s: Illegal queue state.", dev->name);
  1018. }
  1019. #endif
  1020. static void print_eth(char *add)
  1021. {
  1022. int i;
  1023. printk("print_eth(%p)\n", add);
  1024. for (i = 0; i < 6; i++)
  1025. printk(" %2.2X", (unsigned char) add[i + 6]);
  1026. printk(" =>");
  1027. for (i = 0; i < 6; i++)
  1028. printk(" %2.2X", (unsigned char) add[i]);
  1029. printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
  1030. }
  1031. static int tc35815_tx_full(struct net_device *dev)
  1032. {
  1033. struct tc35815_local *lp = dev->priv;
  1034. return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
  1035. }
  1036. static void tc35815_restart(struct net_device *dev)
  1037. {
  1038. struct tc35815_local *lp = dev->priv;
  1039. int pid = lp->phy_addr;
  1040. int do_phy_reset = 1;
  1041. del_timer(&lp->timer); /* Kill if running */
  1042. if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
  1043. /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
  1044. do_phy_reset = 0;
  1045. }
  1046. if (do_phy_reset) {
  1047. int timeout;
  1048. tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
  1049. timeout = 100;
  1050. while (--timeout) {
  1051. if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
  1052. break;
  1053. udelay(1);
  1054. }
  1055. if (!timeout)
  1056. printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
  1057. }
  1058. tc35815_chip_reset(dev);
  1059. tc35815_clear_queues(dev);
  1060. tc35815_chip_init(dev);
  1061. /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
  1062. tc35815_set_multicast_list(dev);
  1063. }
  1064. static void tc35815_tx_timeout(struct net_device *dev)
  1065. {
  1066. struct tc35815_local *lp = dev->priv;
  1067. struct tc35815_regs __iomem *tr =
  1068. (struct tc35815_regs __iomem *)dev->base_addr;
  1069. printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
  1070. dev->name, tc_readl(&tr->Tx_Stat));
  1071. /* Try to restart the adaptor. */
  1072. spin_lock_irq(&lp->lock);
  1073. tc35815_restart(dev);
  1074. spin_unlock_irq(&lp->lock);
  1075. lp->stats.tx_errors++;
  1076. /* If we have space available to accept new transmit
  1077. * requests, wake up the queueing layer. This would
  1078. * be the case if the chipset_init() call above just
  1079. * flushes out the tx queue and empties it.
  1080. *
  1081. * If instead, the tx queue is retained then the
  1082. * netif_wake_queue() call should be placed in the
  1083. * TX completion interrupt handler of the driver instead
  1084. * of here.
  1085. */
  1086. if (!tc35815_tx_full(dev))
  1087. netif_wake_queue(dev);
  1088. }
  1089. /*
  1090. * Open/initialize the board. This is called (in the current kernel)
  1091. * sometime after booting when the 'ifconfig' program is run.
  1092. *
  1093. * This routine should set everything up anew at each open, even
  1094. * registers that "should" only need to be set once at boot, so that
  1095. * there is non-reboot way to recover if something goes wrong.
  1096. */
  1097. static int
  1098. tc35815_open(struct net_device *dev)
  1099. {
  1100. struct tc35815_local *lp = dev->priv;
  1101. /*
  1102. * This is used if the interrupt line can turned off (shared).
  1103. * See 3c503.c for an example of selecting the IRQ at config-time.
  1104. */
  1105. if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
  1106. return -EAGAIN;
  1107. }
  1108. del_timer(&lp->timer); /* Kill if running */
  1109. tc35815_chip_reset(dev);
  1110. if (tc35815_init_queues(dev) != 0) {
  1111. free_irq(dev->irq, dev);
  1112. return -EAGAIN;
  1113. }
  1114. #ifdef TC35815_NAPI
  1115. napi_enable(&lp->napi);
  1116. #endif
  1117. /* Reset the hardware here. Don't forget to set the station address. */
  1118. spin_lock_irq(&lp->lock);
  1119. tc35815_chip_init(dev);
  1120. spin_unlock_irq(&lp->lock);
  1121. /* We are now ready to accept transmit requeusts from
  1122. * the queueing layer of the networking.
  1123. */
  1124. netif_start_queue(dev);
  1125. return 0;
  1126. }
  1127. /* This will only be invoked if your driver is _not_ in XOFF state.
  1128. * What this means is that you need not check it, and that this
  1129. * invariant will hold if you make sure that the netif_*_queue()
  1130. * calls are done at the proper times.
  1131. */
  1132. static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
  1133. {
  1134. struct tc35815_local *lp = dev->priv;
  1135. struct TxFD *txfd;
  1136. unsigned long flags;
  1137. /* If some error occurs while trying to transmit this
  1138. * packet, you should return '1' from this function.
  1139. * In such a case you _may not_ do anything to the
  1140. * SKB, it is still owned by the network queueing
  1141. * layer when an error is returned. This means you
  1142. * may not modify any SKB fields, you may not free
  1143. * the SKB, etc.
  1144. */
  1145. /* This is the most common case for modern hardware.
  1146. * The spinlock protects this code from the TX complete
  1147. * hardware interrupt handler. Queue flow control is
  1148. * thus managed under this lock as well.
  1149. */
  1150. spin_lock_irqsave(&lp->lock, flags);
  1151. /* failsafe... (handle txdone now if half of FDs are used) */
  1152. if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
  1153. TX_FD_NUM / 2)
  1154. tc35815_txdone(dev);
  1155. if (netif_msg_pktdata(lp))
  1156. print_eth(skb->data);
  1157. #ifdef DEBUG
  1158. if (lp->tx_skbs[lp->tfd_start].skb) {
  1159. printk("%s: tx_skbs conflict.\n", dev->name);
  1160. panic_queues(dev);
  1161. }
  1162. #else
  1163. BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
  1164. #endif
  1165. lp->tx_skbs[lp->tfd_start].skb = skb;
  1166. lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
  1167. /*add to ring */
  1168. txfd = &lp->tfd_base[lp->tfd_start];
  1169. txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
  1170. txfd->bd.BDCtl = cpu_to_le32(skb->len);
  1171. txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
  1172. txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
  1173. if (lp->tfd_start == lp->tfd_end) {
  1174. struct tc35815_regs __iomem *tr =
  1175. (struct tc35815_regs __iomem *)dev->base_addr;
  1176. /* Start DMA Transmitter. */
  1177. txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
  1178. #ifdef GATHER_TXINT
  1179. txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
  1180. #endif
  1181. if (netif_msg_tx_queued(lp)) {
  1182. printk("%s: starting TxFD.\n", dev->name);
  1183. dump_txfd(txfd);
  1184. }
  1185. tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
  1186. } else {
  1187. txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
  1188. if (netif_msg_tx_queued(lp)) {
  1189. printk("%s: queueing TxFD.\n", dev->name);
  1190. dump_txfd(txfd);
  1191. }
  1192. }
  1193. lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
  1194. dev->trans_start = jiffies;
  1195. /* If we just used up the very last entry in the
  1196. * TX ring on this device, tell the queueing
  1197. * layer to send no more.
  1198. */
  1199. if (tc35815_tx_full(dev)) {
  1200. if (netif_msg_tx_queued(lp))
  1201. printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
  1202. netif_stop_queue(dev);
  1203. }
  1204. /* When the TX completion hw interrupt arrives, this
  1205. * is when the transmit statistics are updated.
  1206. */
  1207. spin_unlock_irqrestore(&lp->lock, flags);
  1208. return 0;
  1209. }
  1210. #define FATAL_ERROR_INT \
  1211. (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
  1212. static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
  1213. {
  1214. static int count;
  1215. printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
  1216. dev->name, status);
  1217. if (status & Int_IntPCI)
  1218. printk(" IntPCI");
  1219. if (status & Int_DmParErr)
  1220. printk(" DmParErr");
  1221. if (status & Int_IntNRAbt)
  1222. printk(" IntNRAbt");
  1223. printk("\n");
  1224. if (count++ > 100)
  1225. panic("%s: Too many fatal errors.", dev->name);
  1226. printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
  1227. /* Try to restart the adaptor. */
  1228. tc35815_restart(dev);
  1229. }
  1230. #ifdef TC35815_NAPI
  1231. static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
  1232. #else
  1233. static int tc35815_do_interrupt(struct net_device *dev, u32 status)
  1234. #endif
  1235. {
  1236. struct tc35815_local *lp = dev->priv;
  1237. struct tc35815_regs __iomem *tr =
  1238. (struct tc35815_regs __iomem *)dev->base_addr;
  1239. int ret = -1;
  1240. /* Fatal errors... */
  1241. if (status & FATAL_ERROR_INT) {
  1242. tc35815_fatal_error_interrupt(dev, status);
  1243. return 0;
  1244. }
  1245. /* recoverable errors */
  1246. if (status & Int_IntFDAEx) {
  1247. /* disable FDAEx int. (until we make rooms...) */
  1248. tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
  1249. printk(KERN_WARNING
  1250. "%s: Free Descriptor Area Exhausted (%#x).\n",
  1251. dev->name, status);
  1252. lp->stats.rx_dropped++;
  1253. ret = 0;
  1254. }
  1255. if (status & Int_IntBLEx) {
  1256. /* disable BLEx int. (until we make rooms...) */
  1257. tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
  1258. printk(KERN_WARNING
  1259. "%s: Buffer List Exhausted (%#x).\n",
  1260. dev->name, status);
  1261. lp->stats.rx_dropped++;
  1262. ret = 0;
  1263. }
  1264. if (status & Int_IntExBD) {
  1265. printk(KERN_WARNING
  1266. "%s: Excessive Buffer Descriptiors (%#x).\n",
  1267. dev->name, status);
  1268. lp->stats.rx_length_errors++;
  1269. ret = 0;
  1270. }
  1271. /* normal notification */
  1272. if (status & Int_IntMacRx) {
  1273. /* Got a packet(s). */
  1274. #ifdef TC35815_NAPI
  1275. ret = tc35815_rx(dev, limit);
  1276. #else
  1277. tc35815_rx(dev);
  1278. ret = 0;
  1279. #endif
  1280. lp->lstats.rx_ints++;
  1281. }
  1282. if (status & Int_IntMacTx) {
  1283. /* Transmit complete. */
  1284. lp->lstats.tx_ints++;
  1285. tc35815_txdone(dev);
  1286. netif_wake_queue(dev);
  1287. ret = 0;
  1288. }
  1289. return ret;
  1290. }
  1291. /*
  1292. * The typical workload of the driver:
  1293. * Handle the network interface interrupts.
  1294. */
  1295. static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
  1296. {
  1297. struct net_device *dev = dev_id;
  1298. struct tc35815_local *lp = netdev_priv(dev);
  1299. struct tc35815_regs __iomem *tr =
  1300. (struct tc35815_regs __iomem *)dev->base_addr;
  1301. #ifdef TC35815_NAPI
  1302. u32 dmactl = tc_readl(&tr->DMA_Ctl);
  1303. if (!(dmactl & DMA_IntMask)) {
  1304. /* disable interrupts */
  1305. tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
  1306. if (netif_rx_schedule_prep(dev, &lp->napi))
  1307. __netif_rx_schedule(dev, &lp->napi);
  1308. else {
  1309. printk(KERN_ERR "%s: interrupt taken in poll\n",
  1310. dev->name);
  1311. BUG();
  1312. }
  1313. (void)tc_readl(&tr->Int_Src); /* flush */
  1314. return IRQ_HANDLED;
  1315. }
  1316. return IRQ_NONE;
  1317. #else
  1318. struct tc35815_local *lp = dev->priv;
  1319. int handled;
  1320. u32 status;
  1321. spin_lock(&lp->lock);
  1322. status = tc_readl(&tr->Int_Src);
  1323. tc_writel(status, &tr->Int_Src); /* write to clear */
  1324. handled = tc35815_do_interrupt(dev, status);
  1325. (void)tc_readl(&tr->Int_Src); /* flush */
  1326. spin_unlock(&lp->lock);
  1327. return IRQ_RETVAL(handled >= 0);
  1328. #endif /* TC35815_NAPI */
  1329. }
  1330. #ifdef CONFIG_NET_POLL_CONTROLLER
  1331. static void tc35815_poll_controller(struct net_device *dev)
  1332. {
  1333. disable_irq(dev->irq);
  1334. tc35815_interrupt(dev->irq, dev);
  1335. enable_irq(dev->irq);
  1336. }
  1337. #endif
  1338. /* We have a good packet(s), get it/them out of the buffers. */
  1339. #ifdef TC35815_NAPI
  1340. static int
  1341. tc35815_rx(struct net_device *dev, int limit)
  1342. #else
  1343. static void
  1344. tc35815_rx(struct net_device *dev)
  1345. #endif
  1346. {
  1347. struct tc35815_local *lp = dev->priv;
  1348. unsigned int fdctl;
  1349. int i;
  1350. int buf_free_count = 0;
  1351. int fd_free_count = 0;
  1352. #ifdef TC35815_NAPI
  1353. int received = 0;
  1354. #endif
  1355. while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
  1356. int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
  1357. int pkt_len = fdctl & FD_FDLength_MASK;
  1358. int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
  1359. #ifdef DEBUG
  1360. struct RxFD *next_rfd;
  1361. #endif
  1362. #if (RX_CTL_CMD & Rx_StripCRC) == 0
  1363. pkt_len -= 4;
  1364. #endif
  1365. if (netif_msg_rx_status(lp))
  1366. dump_rxfd(lp->rfd_cur);
  1367. if (status & Rx_Good) {
  1368. struct sk_buff *skb;
  1369. unsigned char *data;
  1370. int cur_bd;
  1371. #ifdef TC35815_USE_PACKEDBUFFER
  1372. int offset;
  1373. #endif
  1374. #ifdef TC35815_NAPI
  1375. if (--limit < 0)
  1376. break;
  1377. #endif
  1378. #ifdef TC35815_USE_PACKEDBUFFER
  1379. BUG_ON(bd_count > 2);
  1380. skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
  1381. if (skb == NULL) {
  1382. printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
  1383. dev->name);
  1384. lp->stats.rx_dropped++;
  1385. break;
  1386. }
  1387. skb_reserve(skb, 2); /* 16 bit alignment */
  1388. data = skb_put(skb, pkt_len);
  1389. /* copy from receive buffer */
  1390. cur_bd = 0;
  1391. offset = 0;
  1392. while (offset < pkt_len && cur_bd < bd_count) {
  1393. int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
  1394. BD_BuffLength_MASK;
  1395. dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
  1396. void *rxbuf = rxbuf_bus_to_virt(lp, dma);
  1397. if (offset + len > pkt_len)
  1398. len = pkt_len - offset;
  1399. #ifdef TC35815_DMA_SYNC_ONDEMAND
  1400. pci_dma_sync_single_for_cpu(lp->pci_dev,
  1401. dma, len,
  1402. PCI_DMA_FROMDEVICE);
  1403. #endif
  1404. memcpy(data + offset, rxbuf, len);
  1405. #ifdef TC35815_DMA_SYNC_ONDEMAND
  1406. pci_dma_sync_single_for_device(lp->pci_dev,
  1407. dma, len,
  1408. PCI_DMA_FROMDEVICE);
  1409. #endif
  1410. offset += len;
  1411. cur_bd++;
  1412. }
  1413. #else /* TC35815_USE_PACKEDBUFFER */
  1414. BUG_ON(bd_count > 1);
  1415. cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
  1416. & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
  1417. #ifdef DEBUG
  1418. if (cur_bd >= RX_BUF_NUM) {
  1419. printk("%s: invalid BDID.\n", dev->name);
  1420. panic_queues(dev);
  1421. }
  1422. BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
  1423. (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
  1424. if (!lp->rx_skbs[cur_bd].skb) {
  1425. printk("%s: NULL skb.\n", dev->name);
  1426. panic_queues(dev);
  1427. }
  1428. #else
  1429. BUG_ON(cur_bd >= RX_BUF_NUM);
  1430. #endif
  1431. skb = lp->rx_skbs[cur_bd].skb;
  1432. prefetch(skb->data);
  1433. lp->rx_skbs[cur_bd].skb = NULL;
  1434. lp->fbl_count--;
  1435. pci_unmap_single(lp->pci_dev,
  1436. lp->rx_skbs[cur_bd].skb_dma,
  1437. RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  1438. if (!HAVE_DMA_RXALIGN(lp))
  1439. memmove(skb->data, skb->data - 2, pkt_len);
  1440. data = skb_put(skb, pkt_len);
  1441. #endif /* TC35815_USE_PACKEDBUFFER */
  1442. if (netif_msg_pktdata(lp))
  1443. print_eth(data);
  1444. skb->protocol = eth_type_trans(skb, dev);
  1445. #ifdef TC35815_NAPI
  1446. netif_receive_skb(skb);
  1447. received++;
  1448. #else
  1449. netif_rx(skb);
  1450. #endif
  1451. dev->last_rx = jiffies;
  1452. lp->stats.rx_packets++;
  1453. lp->stats.rx_bytes += pkt_len;
  1454. } else {
  1455. lp->stats.rx_errors++;
  1456. printk(KERN_DEBUG "%s: Rx error (status %x)\n",
  1457. dev->name, status & Rx_Stat_Mask);
  1458. /* WORKAROUND: LongErr and CRCErr means Overflow. */
  1459. if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
  1460. status &= ~(Rx_LongErr|Rx_CRCErr);
  1461. status |= Rx_Over;
  1462. }
  1463. if (status & Rx_LongErr) lp->stats.rx_length_errors++;
  1464. if (status & Rx_Over) lp->stats.rx_fifo_errors++;
  1465. if (status & Rx_CRCErr) lp->stats.rx_crc_errors++;
  1466. if (status & Rx_Align) lp->stats.rx_frame_errors++;
  1467. }
  1468. if (bd_count > 0) {
  1469. /* put Free Buffer back to controller */
  1470. int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
  1471. unsigned char id =
  1472. (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
  1473. #ifdef DEBUG
  1474. if (id >= RX_BUF_NUM) {
  1475. printk("%s: invalid BDID.\n", dev->name);
  1476. panic_queues(dev);
  1477. }
  1478. #else
  1479. BUG_ON(id >= RX_BUF_NUM);
  1480. #endif
  1481. /* free old buffers */
  1482. #ifdef TC35815_USE_PACKEDBUFFER
  1483. while (lp->fbl_curid != id)
  1484. #else
  1485. while (lp->fbl_count < RX_BUF_NUM)
  1486. #endif
  1487. {
  1488. #ifdef TC35815_USE_PACKEDBUFFER
  1489. unsigned char curid = lp->fbl_curid;
  1490. #else
  1491. unsigned char curid =
  1492. (id + 1 + lp->fbl_count) % RX_BUF_NUM;
  1493. #endif
  1494. struct BDesc *bd = &lp->fbl_ptr->bd[curid];
  1495. #ifdef DEBUG
  1496. bdctl = le32_to_cpu(bd->BDCtl);
  1497. if (bdctl & BD_CownsBD) {
  1498. printk("%s: Freeing invalid BD.\n",
  1499. dev->name);
  1500. panic_queues(dev);
  1501. }
  1502. #endif
  1503. /* pass BD to controler */
  1504. #ifndef TC35815_USE_PACKEDBUFFER
  1505. if (!lp->rx_skbs[curid].skb) {
  1506. lp->rx_skbs[curid].skb =
  1507. alloc_rxbuf_skb(dev,
  1508. lp->pci_dev,
  1509. &lp->rx_skbs[curid].skb_dma);
  1510. if (!lp->rx_skbs[curid].skb)
  1511. break; /* try on next reception */
  1512. bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
  1513. }
  1514. #endif /* TC35815_USE_PACKEDBUFFER */
  1515. /* Note: BDLength was modified by chip. */
  1516. bd->BDCtl = cpu_to_le32(BD_CownsBD |
  1517. (curid << BD_RxBDID_SHIFT) |
  1518. RX_BUF_SIZE);
  1519. #ifdef TC35815_USE_PACKEDBUFFER
  1520. lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
  1521. if (netif_msg_rx_status(lp)) {
  1522. printk("%s: Entering new FBD %d\n",
  1523. dev->name, lp->fbl_curid);
  1524. dump_frfd(lp->fbl_ptr);
  1525. }
  1526. #else
  1527. lp->fbl_count++;
  1528. #endif
  1529. buf_free_count++;
  1530. }
  1531. }
  1532. /* put RxFD back to controller */
  1533. #ifdef DEBUG
  1534. next_rfd = fd_bus_to_virt(lp,
  1535. le32_to_cpu(lp->rfd_cur->fd.FDNext));
  1536. if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
  1537. printk("%s: RxFD FDNext invalid.\n", dev->name);
  1538. panic_queues(dev);
  1539. }
  1540. #endif
  1541. for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
  1542. /* pass FD to controler */
  1543. #ifdef DEBUG
  1544. lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
  1545. #else
  1546. lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
  1547. #endif
  1548. lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
  1549. lp->rfd_cur++;
  1550. fd_free_count++;
  1551. }
  1552. if (lp->rfd_cur > lp->rfd_limit)
  1553. lp->rfd_cur = lp->rfd_base;
  1554. #ifdef DEBUG
  1555. if (lp->rfd_cur != next_rfd)
  1556. printk("rfd_cur = %p, next_rfd %p\n",
  1557. lp->rfd_cur, next_rfd);
  1558. #endif
  1559. }
  1560. /* re-enable BL/FDA Exhaust interrupts. */
  1561. if (fd_free_count) {
  1562. struct tc35815_regs __iomem *tr =
  1563. (struct tc35815_regs __iomem *)dev->base_addr;
  1564. u32 en, en_old = tc_readl(&tr->Int_En);
  1565. en = en_old | Int_FDAExEn;
  1566. if (buf_free_count)
  1567. en |= Int_BLExEn;
  1568. if (en != en_old)
  1569. tc_writel(en, &tr->Int_En);
  1570. }
  1571. #ifdef TC35815_NAPI
  1572. return received;
  1573. #endif
  1574. }
  1575. #ifdef TC35815_NAPI
  1576. static int tc35815_poll(struct napi_struct *napi, int budget)
  1577. {
  1578. struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi);
  1579. struct net_device *dev = lp->dev;
  1580. struct tc35815_regs __iomem *tr =
  1581. (struct tc35815_regs __iomem *)dev->base_addr;
  1582. int received = 0, handled;
  1583. u32 status;
  1584. spin_lock(&lp->lock);
  1585. status = tc_readl(&tr->Int_Src);
  1586. do {
  1587. tc_writel(status, &tr->Int_Src); /* write to clear */
  1588. handled = tc35815_do_interrupt(dev, status, limit);
  1589. if (handled >= 0) {
  1590. received += handled;
  1591. if (received >= budget)
  1592. break;
  1593. }
  1594. status = tc_readl(&tr->Int_Src);
  1595. } while (status);
  1596. spin_unlock(&lp->lock);
  1597. if (received < budget) {
  1598. netif_rx_complete(dev, napi);
  1599. /* enable interrupts */
  1600. tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
  1601. }
  1602. return received;
  1603. }
  1604. #endif
  1605. #ifdef NO_CHECK_CARRIER
  1606. #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
  1607. #else
  1608. #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
  1609. #endif
  1610. static void
  1611. tc35815_check_tx_stat(struct net_device *dev, int status)
  1612. {
  1613. struct tc35815_local *lp = dev->priv;
  1614. const char *msg = NULL;
  1615. /* count collisions */
  1616. if (status & Tx_ExColl)
  1617. lp->stats.collisions += 16;
  1618. if (status & Tx_TxColl_MASK)
  1619. lp->stats.collisions += status & Tx_TxColl_MASK;
  1620. #ifndef NO_CHECK_CARRIER
  1621. /* TX4939 does not have NCarr */
  1622. if (lp->boardtype == TC35815_TX4939)
  1623. status &= ~Tx_NCarr;
  1624. #ifdef WORKAROUND_LOSTCAR
  1625. /* WORKAROUND: ignore LostCrS in full duplex operation */
  1626. if ((lp->timer_state != asleep && lp->timer_state != lcheck)
  1627. || lp->fullduplex)
  1628. status &= ~Tx_NCarr;
  1629. #endif
  1630. #endif
  1631. if (!(status & TX_STA_ERR)) {
  1632. /* no error. */
  1633. lp->stats.tx_packets++;
  1634. return;
  1635. }
  1636. lp->stats.tx_errors++;
  1637. if (status & Tx_ExColl) {
  1638. lp->stats.tx_aborted_errors++;
  1639. msg = "Excessive Collision.";
  1640. }
  1641. if (status & Tx_Under) {
  1642. lp->stats.tx_fifo_errors++;
  1643. msg = "Tx FIFO Underrun.";
  1644. if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
  1645. lp->lstats.tx_underrun++;
  1646. if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
  1647. struct tc35815_regs __iomem *tr =
  1648. (struct tc35815_regs __iomem *)dev->base_addr;
  1649. tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
  1650. msg = "Tx FIFO Underrun.Change Tx threshold to max.";
  1651. }
  1652. }
  1653. }
  1654. if (status & Tx_Defer) {
  1655. lp->stats.tx_fifo_errors++;
  1656. msg = "Excessive Deferral.";
  1657. }
  1658. #ifndef NO_CHECK_CARRIER
  1659. if (status & Tx_NCarr) {
  1660. lp->stats.tx_carrier_errors++;
  1661. msg = "Lost Carrier Sense.";
  1662. }
  1663. #endif
  1664. if (status & Tx_LateColl) {
  1665. lp->stats.tx_aborted_errors++;
  1666. msg = "Late Collision.";
  1667. }
  1668. if (status & Tx_TxPar) {
  1669. lp->stats.tx_fifo_errors++;
  1670. msg = "Transmit Parity Error.";
  1671. }
  1672. if (status & Tx_SQErr) {
  1673. lp->stats.tx_heartbeat_errors++;
  1674. msg = "Signal Quality Error.";
  1675. }
  1676. if (msg && netif_msg_tx_err(lp))
  1677. printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
  1678. }
  1679. /* This handles TX complete events posted by the device
  1680. * via interrupts.
  1681. */
  1682. static void
  1683. tc35815_txdone(struct net_device *dev)
  1684. {
  1685. struct tc35815_local *lp = dev->priv;
  1686. struct TxFD *txfd;
  1687. unsigned int fdctl;
  1688. txfd = &lp->tfd_base[lp->tfd_end];
  1689. while (lp->tfd_start != lp->tfd_end &&
  1690. !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
  1691. int status = le32_to_cpu(txfd->fd.FDStat);
  1692. struct sk_buff *skb;
  1693. unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
  1694. u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
  1695. if (netif_msg_tx_done(lp)) {
  1696. printk("%s: complete TxFD.\n", dev->name);
  1697. dump_txfd(txfd);
  1698. }
  1699. tc35815_check_tx_stat(dev, status);
  1700. skb = fdsystem != 0xffffffff ?
  1701. lp->tx_skbs[fdsystem].skb : NULL;
  1702. #ifdef DEBUG
  1703. if (lp->tx_skbs[lp->tfd_end].skb != skb) {
  1704. printk("%s: tx_skbs mismatch.\n", dev->name);
  1705. panic_queues(dev);
  1706. }
  1707. #else
  1708. BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
  1709. #endif
  1710. if (skb) {
  1711. lp->stats.tx_bytes += skb->len;
  1712. pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
  1713. lp->tx_skbs[lp->tfd_end].skb = NULL;
  1714. lp->tx_skbs[lp->tfd_end].skb_dma = 0;
  1715. #ifdef TC35815_NAPI
  1716. dev_kfree_skb_any(skb);
  1717. #else
  1718. dev_kfree_skb_irq(skb);
  1719. #endif
  1720. }
  1721. txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
  1722. lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
  1723. txfd = &lp->tfd_base[lp->tfd_end];
  1724. #ifdef DEBUG
  1725. if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
  1726. printk("%s: TxFD FDNext invalid.\n", dev->name);
  1727. panic_queues(dev);
  1728. }
  1729. #endif
  1730. if (fdnext & FD_Next_EOL) {
  1731. /* DMA Transmitter has been stopping... */
  1732. if (lp->tfd_end != lp->tfd_start) {
  1733. struct tc35815_regs __iomem *tr =
  1734. (struct tc35815_regs __iomem *)dev->base_addr;
  1735. int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
  1736. struct TxFD* txhead = &lp->tfd_base[head];
  1737. int qlen = (lp->tfd_start + TX_FD_NUM
  1738. - lp->tfd_end) % TX_FD_NUM;
  1739. #ifdef DEBUG
  1740. if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
  1741. printk("%s: TxFD FDCtl invalid.\n", dev->name);
  1742. panic_queues(dev);
  1743. }
  1744. #endif
  1745. /* log max queue length */
  1746. if (lp->lstats.max_tx_qlen < qlen)
  1747. lp->lstats.max_tx_qlen = qlen;
  1748. /* start DMA Transmitter again */
  1749. txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
  1750. #ifdef GATHER_TXINT
  1751. txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
  1752. #endif
  1753. if (netif_msg_tx_queued(lp)) {
  1754. printk("%s: start TxFD on queue.\n",
  1755. dev->name);
  1756. dump_txfd(txfd);
  1757. }
  1758. tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
  1759. }
  1760. break;
  1761. }
  1762. }
  1763. /* If we had stopped the queue due to a "tx full"
  1764. * condition, and space has now been made available,
  1765. * wake up the queue.
  1766. */
  1767. if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
  1768. netif_wake_queue(dev);
  1769. }
  1770. /* The inverse routine to tc35815_open(). */
  1771. static int
  1772. tc35815_close(struct net_device *dev)
  1773. {
  1774. struct tc35815_local *lp = dev->priv;
  1775. netif_stop_queue(dev);
  1776. #ifdef TC35815_NAPI
  1777. napi_disable(&lp->napi);
  1778. #endif
  1779. /* Flush the Tx and disable Rx here. */
  1780. del_timer(&lp->timer); /* Kill if running */
  1781. tc35815_chip_reset(dev);
  1782. free_irq(dev->irq, dev);
  1783. tc35815_free_queues(dev);
  1784. return 0;
  1785. }
  1786. /*
  1787. * Get the current statistics.
  1788. * This may be called with the card open or closed.
  1789. */
  1790. static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
  1791. {
  1792. struct tc35815_local *lp = dev->priv;
  1793. struct tc35815_regs __iomem *tr =
  1794. (struct tc35815_regs __iomem *)dev->base_addr;
  1795. if (netif_running(dev)) {
  1796. /* Update the statistics from the device registers. */
  1797. lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
  1798. }
  1799. return &lp->stats;
  1800. }
  1801. static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
  1802. {
  1803. struct tc35815_local *lp = dev->priv;
  1804. struct tc35815_regs __iomem *tr =
  1805. (struct tc35815_regs __iomem *)dev->base_addr;
  1806. int cam_index = index * 6;
  1807. u32 cam_data;
  1808. u32 saved_addr;
  1809. saved_addr = tc_readl(&tr->CAM_Adr);
  1810. if (netif_msg_hw(lp)) {
  1811. int i;
  1812. printk(KERN_DEBUG "%s: CAM %d:", dev->name, index);
  1813. for (i = 0; i < 6; i++)
  1814. printk(" %02x", addr[i]);
  1815. printk("\n");
  1816. }
  1817. if (index & 1) {
  1818. /* read modify write */
  1819. tc_writel(cam_index - 2, &tr->CAM_Adr);
  1820. cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
  1821. cam_data |= addr[0] << 8 | addr[1];
  1822. tc_writel(cam_data, &tr->CAM_Data);
  1823. /* write whole word */
  1824. tc_writel(cam_index + 2, &tr->CAM_Adr);
  1825. cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
  1826. tc_writel(cam_data, &tr->CAM_Data);
  1827. } else {
  1828. /* write whole word */
  1829. tc_writel(cam_index, &tr->CAM_Adr);
  1830. cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
  1831. tc_writel(cam_data, &tr->CAM_Data);
  1832. /* read modify write */
  1833. tc_writel(cam_index + 4, &tr->CAM_Adr);
  1834. cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
  1835. cam_data |= addr[4] << 24 | (addr[5] << 16);
  1836. tc_writel(cam_data, &tr->CAM_Data);
  1837. }
  1838. tc_writel(saved_addr, &tr->CAM_Adr);
  1839. }
  1840. /*
  1841. * Set or clear the multicast filter for this adaptor.
  1842. * num_addrs == -1 Promiscuous mode, receive all packets
  1843. * num_addrs == 0 Normal mode, clear multicast list
  1844. * num_addrs > 0 Multicast mode, receive normal and MC packets,
  1845. * and do best-effort filtering.
  1846. */
  1847. static void
  1848. tc35815_set_multicast_list(struct net_device *dev)
  1849. {
  1850. struct tc35815_regs __iomem *tr =
  1851. (struct tc35815_regs __iomem *)dev->base_addr;
  1852. if (dev->flags&IFF_PROMISC)
  1853. {
  1854. #ifdef WORKAROUND_100HALF_PROMISC
  1855. /* With some (all?) 100MHalf HUB, controller will hang
  1856. * if we enabled promiscuous mode before linkup... */
  1857. struct tc35815_local *lp = dev->priv;
  1858. int pid = lp->phy_addr;
  1859. if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
  1860. return;
  1861. #endif
  1862. /* Enable promiscuous mode */
  1863. tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
  1864. }
  1865. else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
  1866. {
  1867. /* CAM 0, 1, 20 are reserved. */
  1868. /* Disable promiscuous mode, use normal mode. */
  1869. tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
  1870. }
  1871. else if(dev->mc_count)
  1872. {
  1873. struct dev_mc_list* cur_addr = dev->mc_list;
  1874. int i;
  1875. int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
  1876. tc_writel(0, &tr->CAM_Ctl);
  1877. /* Walk the address list, and load the filter */
  1878. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1879. if (!cur_addr)
  1880. break;
  1881. /* entry 0,1 is reserved. */
  1882. tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
  1883. ena_bits |= CAM_Ena_Bit(i + 2);
  1884. }
  1885. tc_writel(ena_bits, &tr->CAM_Ena);
  1886. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  1887. }
  1888. else {
  1889. tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
  1890. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  1891. }
  1892. }
  1893. static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1894. {
  1895. struct tc35815_local *lp = dev->priv;
  1896. strcpy(info->driver, MODNAME);
  1897. strcpy(info->version, DRV_VERSION);
  1898. strcpy(info->bus_info, pci_name(lp->pci_dev));
  1899. }
  1900. static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1901. {
  1902. struct tc35815_local *lp = dev->priv;
  1903. spin_lock_irq(&lp->lock);
  1904. mii_ethtool_gset(&lp->mii, cmd);
  1905. spin_unlock_irq(&lp->lock);
  1906. return 0;
  1907. }
  1908. static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1909. {
  1910. struct tc35815_local *lp = dev->priv;
  1911. int rc;
  1912. #if 1 /* use our negotiation method... */
  1913. /* Verify the settings we care about. */
  1914. if (cmd->autoneg != AUTONEG_ENABLE &&
  1915. cmd->autoneg != AUTONEG_DISABLE)
  1916. return -EINVAL;
  1917. if (cmd->autoneg == AUTONEG_DISABLE &&
  1918. ((cmd->speed != SPEED_100 &&
  1919. cmd->speed != SPEED_10) ||
  1920. (cmd->duplex != DUPLEX_HALF &&
  1921. cmd->duplex != DUPLEX_FULL)))
  1922. return -EINVAL;
  1923. /* Ok, do it to it. */
  1924. spin_lock_irq(&lp->lock);
  1925. del_timer(&lp->timer);
  1926. tc35815_start_auto_negotiation(dev, cmd);
  1927. spin_unlock_irq(&lp->lock);
  1928. rc = 0;
  1929. #else
  1930. spin_lock_irq(&lp->lock);
  1931. rc = mii_ethtool_sset(&lp->mii, cmd);
  1932. spin_unlock_irq(&lp->lock);
  1933. #endif
  1934. return rc;
  1935. }
  1936. static int tc35815_nway_reset(struct net_device *dev)
  1937. {
  1938. struct tc35815_local *lp = dev->priv;
  1939. int rc;
  1940. spin_lock_irq(&lp->lock);
  1941. rc = mii_nway_restart(&lp->mii);
  1942. spin_unlock_irq(&lp->lock);
  1943. return rc;
  1944. }
  1945. static u32 tc35815_get_link(struct net_device *dev)
  1946. {
  1947. struct tc35815_local *lp = dev->priv;
  1948. int rc;
  1949. spin_lock_irq(&lp->lock);
  1950. rc = mii_link_ok(&lp->mii);
  1951. spin_unlock_irq(&lp->lock);
  1952. return rc;
  1953. }
  1954. static u32 tc35815_get_msglevel(struct net_device *dev)
  1955. {
  1956. struct tc35815_local *lp = dev->priv;
  1957. return lp->msg_enable;
  1958. }
  1959. static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
  1960. {
  1961. struct tc35815_local *lp = dev->priv;
  1962. lp->msg_enable = datum;
  1963. }
  1964. static int tc35815_get_sset_count(struct net_device *dev, int sset)
  1965. {
  1966. struct tc35815_local *lp = dev->priv;
  1967. switch (sset) {
  1968. case ETH_SS_STATS:
  1969. return sizeof(lp->lstats) / sizeof(int);
  1970. default:
  1971. return -EOPNOTSUPP;
  1972. }
  1973. }
  1974. static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
  1975. {
  1976. struct tc35815_local *lp = dev->priv;
  1977. data[0] = lp->lstats.max_tx_qlen;
  1978. data[1] = lp->lstats.tx_ints;
  1979. data[2] = lp->lstats.rx_ints;
  1980. data[3] = lp->lstats.tx_underrun;
  1981. }
  1982. static struct {
  1983. const char str[ETH_GSTRING_LEN];
  1984. } ethtool_stats_keys[] = {
  1985. { "max_tx_qlen" },
  1986. { "tx_ints" },
  1987. { "rx_ints" },
  1988. { "tx_underrun" },
  1989. };
  1990. static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  1991. {
  1992. memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
  1993. }
  1994. static const struct ethtool_ops tc35815_ethtool_ops = {
  1995. .get_drvinfo = tc35815_get_drvinfo,
  1996. .get_settings = tc35815_get_settings,
  1997. .set_settings = tc35815_set_settings,
  1998. .nway_reset = tc35815_nway_reset,
  1999. .get_link = tc35815_get_link,
  2000. .get_msglevel = tc35815_get_msglevel,
  2001. .set_msglevel = tc35815_set_msglevel,
  2002. .get_strings = tc35815_get_strings,
  2003. .get_sset_count = tc35815_get_sset_count,
  2004. .get_ethtool_stats = tc35815_get_ethtool_stats,
  2005. };
  2006. static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2007. {
  2008. struct tc35815_local *lp = dev->priv;
  2009. int rc;
  2010. if (!netif_running(dev))
  2011. return -EINVAL;
  2012. spin_lock_irq(&lp->lock);
  2013. rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
  2014. spin_unlock_irq(&lp->lock);
  2015. return rc;
  2016. }
  2017. static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
  2018. {
  2019. struct tc35815_regs __iomem *tr =
  2020. (struct tc35815_regs __iomem *)dev->base_addr;
  2021. u32 data;
  2022. tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
  2023. while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
  2024. ;
  2025. data = tc_readl(&tr->MD_Data);
  2026. return data & 0xffff;
  2027. }
  2028. static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
  2029. int val)
  2030. {
  2031. struct tc35815_regs __iomem *tr =
  2032. (struct tc35815_regs __iomem *)dev->base_addr;
  2033. tc_writel(val, &tr->MD_Data);
  2034. tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
  2035. while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
  2036. ;
  2037. }
  2038. /* Auto negotiation. The scheme is very simple. We have a timer routine
  2039. * that keeps watching the auto negotiation process as it progresses.
  2040. * The DP83840 is first told to start doing it's thing, we set up the time
  2041. * and place the timer state machine in it's initial state.
  2042. *
  2043. * Here the timer peeks at the DP83840 status registers at each click to see
  2044. * if the auto negotiation has completed, we assume here that the DP83840 PHY
  2045. * will time out at some point and just tell us what (didn't) happen. For
  2046. * complete coverage we only allow so many of the ticks at this level to run,
  2047. * when this has expired we print a warning message and try another strategy.
  2048. * This "other" strategy is to force the interface into various speed/duplex
  2049. * configurations and we stop when we see a link-up condition before the
  2050. * maximum number of "peek" ticks have occurred.
  2051. *
  2052. * Once a valid link status has been detected we configure the BigMAC and
  2053. * the rest of the Happy Meal to speak the most efficient protocol we could
  2054. * get a clean link for. The priority for link configurations, highest first
  2055. * is:
  2056. * 100 Base-T Full Duplex
  2057. * 100 Base-T Half Duplex
  2058. * 10 Base-T Full Duplex
  2059. * 10 Base-T Half Duplex
  2060. *
  2061. * We start a new timer now, after a successful auto negotiation status has
  2062. * been detected. This timer just waits for the link-up bit to get set in
  2063. * the BMCR of the DP83840. When this occurs we print a kernel log message
  2064. * describing the link type in use and the fact that it is up.
  2065. *
  2066. * If a fatal error of some sort is signalled and detected in the interrupt
  2067. * service routine, and the chip is reset, or the link is ifconfig'd down
  2068. * and then back up, this entire process repeats itself all over again.
  2069. */
  2070. /* Note: Above comments are come from sunhme driver. */
  2071. static int tc35815_try_next_permutation(struct net_device *dev)
  2072. {
  2073. struct tc35815_local *lp = dev->priv;
  2074. int pid = lp->phy_addr;
  2075. unsigned short bmcr;
  2076. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2077. /* Downgrade from full to half duplex. Only possible via ethtool. */
  2078. if (bmcr & BMCR_FULLDPLX) {
  2079. bmcr &= ~BMCR_FULLDPLX;
  2080. printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
  2081. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2082. return 0;
  2083. }
  2084. /* Downgrade from 100 to 10. */
  2085. if (bmcr & BMCR_SPEED100) {
  2086. bmcr &= ~BMCR_SPEED100;
  2087. printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
  2088. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2089. return 0;
  2090. }
  2091. /* We've tried everything. */
  2092. return -1;
  2093. }
  2094. static void
  2095. tc35815_display_link_mode(struct net_device *dev)
  2096. {
  2097. struct tc35815_local *lp = dev->priv;
  2098. int pid = lp->phy_addr;
  2099. unsigned short lpa, bmcr;
  2100. char *speed = "", *duplex = "";
  2101. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2102. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2103. if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
  2104. speed = "100Mb/s";
  2105. else
  2106. speed = "10Mb/s";
  2107. if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
  2108. duplex = "Full Duplex";
  2109. else
  2110. duplex = "Half Duplex";
  2111. if (netif_msg_link(lp))
  2112. printk(KERN_INFO "%s: Link is up at %s, %s.\n",
  2113. dev->name, speed, duplex);
  2114. printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
  2115. dev->name,
  2116. bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
  2117. }
  2118. static void tc35815_display_forced_link_mode(struct net_device *dev)
  2119. {
  2120. struct tc35815_local *lp = dev->priv;
  2121. int pid = lp->phy_addr;
  2122. unsigned short bmcr;
  2123. char *speed = "", *duplex = "";
  2124. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2125. if (bmcr & BMCR_SPEED100)
  2126. speed = "100Mb/s";
  2127. else
  2128. speed = "10Mb/s";
  2129. if (bmcr & BMCR_FULLDPLX)
  2130. duplex = "Full Duplex.\n";
  2131. else
  2132. duplex = "Half Duplex.\n";
  2133. if (netif_msg_link(lp))
  2134. printk(KERN_INFO "%s: Link has been forced up at %s, %s",
  2135. dev->name, speed, duplex);
  2136. }
  2137. static void tc35815_set_link_modes(struct net_device *dev)
  2138. {
  2139. struct tc35815_local *lp = dev->priv;
  2140. struct tc35815_regs __iomem *tr =
  2141. (struct tc35815_regs __iomem *)dev->base_addr;
  2142. int pid = lp->phy_addr;
  2143. unsigned short bmcr, lpa;
  2144. int speed;
  2145. if (lp->timer_state == arbwait) {
  2146. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2147. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2148. printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
  2149. dev->name,
  2150. bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
  2151. if (!(lpa & (LPA_10HALF | LPA_10FULL |
  2152. LPA_100HALF | LPA_100FULL))) {
  2153. /* fall back to 10HALF */
  2154. printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
  2155. dev->name, lpa);
  2156. lpa = LPA_10HALF;
  2157. }
  2158. if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
  2159. lp->fullduplex = 1;
  2160. else
  2161. lp->fullduplex = 0;
  2162. if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
  2163. speed = 100;
  2164. else
  2165. speed = 10;
  2166. } else {
  2167. /* Forcing a link mode. */
  2168. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2169. if (bmcr & BMCR_FULLDPLX)
  2170. lp->fullduplex = 1;
  2171. else
  2172. lp->fullduplex = 0;
  2173. if (bmcr & BMCR_SPEED100)
  2174. speed = 100;
  2175. else
  2176. speed = 10;
  2177. }
  2178. tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
  2179. if (lp->fullduplex) {
  2180. tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
  2181. } else {
  2182. tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
  2183. }
  2184. tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
  2185. /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
  2186. #ifndef NO_CHECK_CARRIER
  2187. /* TX4939 does not have EnLCarr */
  2188. if (lp->boardtype != TC35815_TX4939) {
  2189. #ifdef WORKAROUND_LOSTCAR
  2190. /* WORKAROUND: enable LostCrS only if half duplex operation */
  2191. if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
  2192. tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
  2193. #endif
  2194. }
  2195. #endif
  2196. lp->mii.full_duplex = lp->fullduplex;
  2197. }
  2198. static void tc35815_timer(unsigned long data)
  2199. {
  2200. struct net_device *dev = (struct net_device *)data;
  2201. struct tc35815_local *lp = dev->priv;
  2202. int pid = lp->phy_addr;
  2203. unsigned short bmsr, bmcr, lpa;
  2204. int restart_timer = 0;
  2205. spin_lock_irq(&lp->lock);
  2206. lp->timer_ticks++;
  2207. switch (lp->timer_state) {
  2208. case arbwait:
  2209. /*
  2210. * Only allow for 5 ticks, thats 10 seconds and much too
  2211. * long to wait for arbitration to complete.
  2212. */
  2213. /* TC35815 need more times... */
  2214. if (lp->timer_ticks >= 10) {
  2215. /* Enter force mode. */
  2216. if (!options.doforce) {
  2217. printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
  2218. " cable probblem?\n", dev->name);
  2219. /* Try to restart the adaptor. */
  2220. tc35815_restart(dev);
  2221. goto out;
  2222. }
  2223. printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
  2224. " trying force link mode\n", dev->name);
  2225. printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
  2226. tc_mdio_read(dev, pid, MII_BMCR),
  2227. tc_mdio_read(dev, pid, MII_BMSR));
  2228. bmcr = BMCR_SPEED100;
  2229. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2230. /*
  2231. * OK, seems we need do disable the transceiver
  2232. * for the first tick to make sure we get an
  2233. * accurate link state at the second tick.
  2234. */
  2235. lp->timer_state = ltrywait;
  2236. lp->timer_ticks = 0;
  2237. restart_timer = 1;
  2238. } else {
  2239. /* Anything interesting happen? */
  2240. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2241. if (bmsr & BMSR_ANEGCOMPLETE) {
  2242. /* Just what we've been waiting for... */
  2243. tc35815_set_link_modes(dev);
  2244. /*
  2245. * Success, at least so far, advance our state
  2246. * engine.
  2247. */
  2248. lp->timer_state = lupwait;
  2249. restart_timer = 1;
  2250. } else {
  2251. restart_timer = 1;
  2252. }
  2253. }
  2254. break;
  2255. case lupwait:
  2256. /*
  2257. * Auto negotiation was successful and we are awaiting a
  2258. * link up status. I have decided to let this timer run
  2259. * forever until some sort of error is signalled, reporting
  2260. * a message to the user at 10 second intervals.
  2261. */
  2262. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2263. if (bmsr & BMSR_LSTATUS) {
  2264. /*
  2265. * Wheee, it's up, display the link mode in use and put
  2266. * the timer to sleep.
  2267. */
  2268. tc35815_display_link_mode(dev);
  2269. netif_carrier_on(dev);
  2270. #ifdef WORKAROUND_100HALF_PROMISC
  2271. /* delayed promiscuous enabling */
  2272. if (dev->flags & IFF_PROMISC)
  2273. tc35815_set_multicast_list(dev);
  2274. #endif
  2275. #if 1
  2276. lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
  2277. lp->timer_state = lcheck;
  2278. restart_timer = 1;
  2279. #else
  2280. lp->timer_state = asleep;
  2281. restart_timer = 0;
  2282. #endif
  2283. } else {
  2284. if (lp->timer_ticks >= 10) {
  2285. printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
  2286. "not completely up.\n", dev->name);
  2287. lp->timer_ticks = 0;
  2288. restart_timer = 1;
  2289. } else {
  2290. restart_timer = 1;
  2291. }
  2292. }
  2293. break;
  2294. case ltrywait:
  2295. /*
  2296. * Making the timeout here too long can make it take
  2297. * annoyingly long to attempt all of the link mode
  2298. * permutations, but then again this is essentially
  2299. * error recovery code for the most part.
  2300. */
  2301. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2302. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2303. if (lp->timer_ticks == 1) {
  2304. /*
  2305. * Re-enable transceiver, we'll re-enable the
  2306. * transceiver next tick, then check link state
  2307. * on the following tick.
  2308. */
  2309. restart_timer = 1;
  2310. break;
  2311. }
  2312. if (lp->timer_ticks == 2) {
  2313. restart_timer = 1;
  2314. break;
  2315. }
  2316. if (bmsr & BMSR_LSTATUS) {
  2317. /* Force mode selection success. */
  2318. tc35815_display_forced_link_mode(dev);
  2319. netif_carrier_on(dev);
  2320. tc35815_set_link_modes(dev);
  2321. #ifdef WORKAROUND_100HALF_PROMISC
  2322. /* delayed promiscuous enabling */
  2323. if (dev->flags & IFF_PROMISC)
  2324. tc35815_set_multicast_list(dev);
  2325. #endif
  2326. #if 1
  2327. lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
  2328. lp->timer_state = lcheck;
  2329. restart_timer = 1;
  2330. #else
  2331. lp->timer_state = asleep;
  2332. restart_timer = 0;
  2333. #endif
  2334. } else {
  2335. if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
  2336. int ret;
  2337. ret = tc35815_try_next_permutation(dev);
  2338. if (ret == -1) {
  2339. /*
  2340. * Aieee, tried them all, reset the
  2341. * chip and try all over again.
  2342. */
  2343. printk(KERN_NOTICE "%s: Link down, "
  2344. "cable problem?\n",
  2345. dev->name);
  2346. /* Try to restart the adaptor. */
  2347. tc35815_restart(dev);
  2348. goto out;
  2349. }
  2350. lp->timer_ticks = 0;
  2351. restart_timer = 1;
  2352. } else {
  2353. restart_timer = 1;
  2354. }
  2355. }
  2356. break;
  2357. case lcheck:
  2358. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2359. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2360. if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
  2361. printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
  2362. bmcr);
  2363. } else if ((lp->saved_lpa ^ lpa) &
  2364. (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
  2365. printk(KERN_NOTICE "%s: link status changed"
  2366. " (BMCR %x LPA %x->%x)\n", dev->name,
  2367. bmcr, lp->saved_lpa, lpa);
  2368. } else {
  2369. /* go on */
  2370. restart_timer = 1;
  2371. break;
  2372. }
  2373. /* Try to restart the adaptor. */
  2374. tc35815_restart(dev);
  2375. goto out;
  2376. case asleep:
  2377. default:
  2378. /* Can't happens.... */
  2379. printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
  2380. "one anyways!\n", dev->name);
  2381. restart_timer = 0;
  2382. lp->timer_ticks = 0;
  2383. lp->timer_state = asleep; /* foo on you */
  2384. break;
  2385. }
  2386. if (restart_timer) {
  2387. lp->timer.expires = jiffies + msecs_to_jiffies(1200);
  2388. add_timer(&lp->timer);
  2389. }
  2390. out:
  2391. spin_unlock_irq(&lp->lock);
  2392. }
  2393. static void tc35815_start_auto_negotiation(struct net_device *dev,
  2394. struct ethtool_cmd *ep)
  2395. {
  2396. struct tc35815_local *lp = dev->priv;
  2397. int pid = lp->phy_addr;
  2398. unsigned short bmsr, bmcr, advertize;
  2399. int timeout;
  2400. netif_carrier_off(dev);
  2401. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2402. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2403. advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
  2404. if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
  2405. if (options.speed || options.duplex) {
  2406. /* Advertise only specified configuration. */
  2407. advertize &= ~(ADVERTISE_10HALF |
  2408. ADVERTISE_10FULL |
  2409. ADVERTISE_100HALF |
  2410. ADVERTISE_100FULL);
  2411. if (options.speed != 10) {
  2412. if (options.duplex != 1)
  2413. advertize |= ADVERTISE_100FULL;
  2414. if (options.duplex != 2)
  2415. advertize |= ADVERTISE_100HALF;
  2416. }
  2417. if (options.speed != 100) {
  2418. if (options.duplex != 1)
  2419. advertize |= ADVERTISE_10FULL;
  2420. if (options.duplex != 2)
  2421. advertize |= ADVERTISE_10HALF;
  2422. }
  2423. if (options.speed == 100)
  2424. bmcr |= BMCR_SPEED100;
  2425. else if (options.speed == 10)
  2426. bmcr &= ~BMCR_SPEED100;
  2427. if (options.duplex == 2)
  2428. bmcr |= BMCR_FULLDPLX;
  2429. else if (options.duplex == 1)
  2430. bmcr &= ~BMCR_FULLDPLX;
  2431. } else {
  2432. /* Advertise everything we can support. */
  2433. if (bmsr & BMSR_10HALF)
  2434. advertize |= ADVERTISE_10HALF;
  2435. else
  2436. advertize &= ~ADVERTISE_10HALF;
  2437. if (bmsr & BMSR_10FULL)
  2438. advertize |= ADVERTISE_10FULL;
  2439. else
  2440. advertize &= ~ADVERTISE_10FULL;
  2441. if (bmsr & BMSR_100HALF)
  2442. advertize |= ADVERTISE_100HALF;
  2443. else
  2444. advertize &= ~ADVERTISE_100HALF;
  2445. if (bmsr & BMSR_100FULL)
  2446. advertize |= ADVERTISE_100FULL;
  2447. else
  2448. advertize &= ~ADVERTISE_100FULL;
  2449. }
  2450. tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
  2451. /* Enable Auto-Negotiation, this is usually on already... */
  2452. bmcr |= BMCR_ANENABLE;
  2453. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2454. /* Restart it to make sure it is going. */
  2455. bmcr |= BMCR_ANRESTART;
  2456. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2457. printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
  2458. /* BMCR_ANRESTART self clears when the process has begun. */
  2459. timeout = 64; /* More than enough. */
  2460. while (--timeout) {
  2461. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2462. if (!(bmcr & BMCR_ANRESTART))
  2463. break; /* got it. */
  2464. udelay(10);
  2465. }
  2466. if (!timeout) {
  2467. printk(KERN_ERR "%s: TC35815 would not start auto "
  2468. "negotiation BMCR=0x%04x\n",
  2469. dev->name, bmcr);
  2470. printk(KERN_NOTICE "%s: Performing force link "
  2471. "detection.\n", dev->name);
  2472. goto force_link;
  2473. } else {
  2474. printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
  2475. lp->timer_state = arbwait;
  2476. }
  2477. } else {
  2478. force_link:
  2479. /* Force the link up, trying first a particular mode.
  2480. * Either we are here at the request of ethtool or
  2481. * because the Happy Meal would not start to autoneg.
  2482. */
  2483. /* Disable auto-negotiation in BMCR, enable the duplex and
  2484. * speed setting, init the timer state machine, and fire it off.
  2485. */
  2486. if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
  2487. bmcr = BMCR_SPEED100;
  2488. } else {
  2489. if (ep->speed == SPEED_100)
  2490. bmcr = BMCR_SPEED100;
  2491. else
  2492. bmcr = 0;
  2493. if (ep->duplex == DUPLEX_FULL)
  2494. bmcr |= BMCR_FULLDPLX;
  2495. }
  2496. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2497. /* OK, seems we need do disable the transceiver for the first
  2498. * tick to make sure we get an accurate link state at the
  2499. * second tick.
  2500. */
  2501. lp->timer_state = ltrywait;
  2502. }
  2503. del_timer(&lp->timer);
  2504. lp->timer_ticks = 0;
  2505. lp->timer.expires = jiffies + msecs_to_jiffies(1200);
  2506. add_timer(&lp->timer);
  2507. }
  2508. static void tc35815_find_phy(struct net_device *dev)
  2509. {
  2510. struct tc35815_local *lp = dev->priv;
  2511. int pid = lp->phy_addr;
  2512. unsigned short id0;
  2513. /* find MII phy */
  2514. for (pid = 31; pid >= 0; pid--) {
  2515. id0 = tc_mdio_read(dev, pid, MII_BMSR);
  2516. if (id0 != 0xffff && id0 != 0x0000 &&
  2517. (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
  2518. ) {
  2519. lp->phy_addr = pid;
  2520. break;
  2521. }
  2522. }
  2523. if (pid < 0) {
  2524. printk(KERN_ERR "%s: No MII Phy found.\n",
  2525. dev->name);
  2526. lp->phy_addr = pid = 0;
  2527. }
  2528. lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
  2529. lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
  2530. if (netif_msg_hw(lp))
  2531. printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
  2532. pid, lp->mii_id[0], lp->mii_id[1]);
  2533. }
  2534. static void tc35815_phy_chip_init(struct net_device *dev)
  2535. {
  2536. struct tc35815_local *lp = dev->priv;
  2537. int pid = lp->phy_addr;
  2538. unsigned short bmcr;
  2539. struct ethtool_cmd ecmd, *ep;
  2540. /* dis-isolate if needed. */
  2541. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2542. if (bmcr & BMCR_ISOLATE) {
  2543. int count = 32;
  2544. printk(KERN_DEBUG "%s: unisolating...", dev->name);
  2545. tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
  2546. while (--count) {
  2547. if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
  2548. break;
  2549. udelay(20);
  2550. }
  2551. printk(" %s.\n", count ? "done" : "failed");
  2552. }
  2553. if (options.speed && options.duplex) {
  2554. ecmd.autoneg = AUTONEG_DISABLE;
  2555. ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
  2556. ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
  2557. ep = &ecmd;
  2558. } else {
  2559. ep = NULL;
  2560. }
  2561. tc35815_start_auto_negotiation(dev, ep);
  2562. }
  2563. static void tc35815_chip_reset(struct net_device *dev)
  2564. {
  2565. struct tc35815_regs __iomem *tr =
  2566. (struct tc35815_regs __iomem *)dev->base_addr;
  2567. int i;
  2568. /* reset the controller */
  2569. tc_writel(MAC_Reset, &tr->MAC_Ctl);
  2570. udelay(4); /* 3200ns */
  2571. i = 0;
  2572. while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
  2573. if (i++ > 100) {
  2574. printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
  2575. break;
  2576. }
  2577. mdelay(1);
  2578. }
  2579. tc_writel(0, &tr->MAC_Ctl);
  2580. /* initialize registers to default value */
  2581. tc_writel(0, &tr->DMA_Ctl);
  2582. tc_writel(0, &tr->TxThrsh);
  2583. tc_writel(0, &tr->TxPollCtr);
  2584. tc_writel(0, &tr->RxFragSize);
  2585. tc_writel(0, &tr->Int_En);
  2586. tc_writel(0, &tr->FDA_Bas);
  2587. tc_writel(0, &tr->FDA_Lim);
  2588. tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */
  2589. tc_writel(0, &tr->CAM_Ctl);
  2590. tc_writel(0, &tr->Tx_Ctl);
  2591. tc_writel(0, &tr->Rx_Ctl);
  2592. tc_writel(0, &tr->CAM_Ena);
  2593. (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */
  2594. /* initialize internal SRAM */
  2595. tc_writel(DMA_TestMode, &tr->DMA_Ctl);
  2596. for (i = 0; i < 0x1000; i += 4) {
  2597. tc_writel(i, &tr->CAM_Adr);
  2598. tc_writel(0, &tr->CAM_Data);
  2599. }
  2600. tc_writel(0, &tr->DMA_Ctl);
  2601. }
  2602. static void tc35815_chip_init(struct net_device *dev)
  2603. {
  2604. struct tc35815_local *lp = dev->priv;
  2605. struct tc35815_regs __iomem *tr =
  2606. (struct tc35815_regs __iomem *)dev->base_addr;
  2607. unsigned long txctl = TX_CTL_CMD;
  2608. tc35815_phy_chip_init(dev);
  2609. /* load station address to CAM */
  2610. tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
  2611. /* Enable CAM (broadcast and unicast) */
  2612. tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
  2613. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  2614. /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
  2615. if (HAVE_DMA_RXALIGN(lp))
  2616. tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
  2617. else
  2618. tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
  2619. #ifdef TC35815_USE_PACKEDBUFFER
  2620. tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */
  2621. #else
  2622. tc_writel(ETH_ZLEN, &tr->RxFragSize);
  2623. #endif
  2624. tc_writel(0, &tr->TxPollCtr); /* Batch mode */
  2625. tc_writel(TX_THRESHOLD, &tr->TxThrsh);
  2626. tc_writel(INT_EN_CMD, &tr->Int_En);
  2627. /* set queues */
  2628. tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
  2629. tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
  2630. &tr->FDA_Lim);
  2631. /*
  2632. * Activation method:
  2633. * First, enable the MAC Transmitter and the DMA Receive circuits.
  2634. * Then enable the DMA Transmitter and the MAC Receive circuits.
  2635. */
  2636. tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */
  2637. tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */
  2638. /* start MAC transmitter */
  2639. #ifndef NO_CHECK_CARRIER
  2640. /* TX4939 does not have EnLCarr */
  2641. if (lp->boardtype == TC35815_TX4939)
  2642. txctl &= ~Tx_EnLCarr;
  2643. #ifdef WORKAROUND_LOSTCAR
  2644. /* WORKAROUND: ignore LostCrS in full duplex operation */
  2645. if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
  2646. lp->fullduplex)
  2647. txctl &= ~Tx_EnLCarr;
  2648. #endif
  2649. #endif /* !NO_CHECK_CARRIER */
  2650. #ifdef GATHER_TXINT
  2651. txctl &= ~Tx_EnComp; /* disable global tx completion int. */
  2652. #endif
  2653. tc_writel(txctl, &tr->Tx_Ctl);
  2654. }
  2655. #ifdef CONFIG_PM
  2656. static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
  2657. {
  2658. struct net_device *dev = pci_get_drvdata(pdev);
  2659. struct tc35815_local *lp = dev->priv;
  2660. unsigned long flags;
  2661. pci_save_state(pdev);
  2662. if (!netif_running(dev))
  2663. return 0;
  2664. netif_device_detach(dev);
  2665. spin_lock_irqsave(&lp->lock, flags);
  2666. del_timer(&lp->timer); /* Kill if running */
  2667. tc35815_chip_reset(dev);
  2668. spin_unlock_irqrestore(&lp->lock, flags);
  2669. pci_set_power_state(pdev, PCI_D3hot);
  2670. return 0;
  2671. }
  2672. static int tc35815_resume(struct pci_dev *pdev)
  2673. {
  2674. struct net_device *dev = pci_get_drvdata(pdev);
  2675. struct tc35815_local *lp = dev->priv;
  2676. unsigned long flags;
  2677. pci_restore_state(pdev);
  2678. if (!netif_running(dev))
  2679. return 0;
  2680. pci_set_power_state(pdev, PCI_D0);
  2681. spin_lock_irqsave(&lp->lock, flags);
  2682. tc35815_restart(dev);
  2683. spin_unlock_irqrestore(&lp->lock, flags);
  2684. netif_device_attach(dev);
  2685. return 0;
  2686. }
  2687. #endif /* CONFIG_PM */
  2688. static struct pci_driver tc35815_pci_driver = {
  2689. .name = MODNAME,
  2690. .id_table = tc35815_pci_tbl,
  2691. .probe = tc35815_init_one,
  2692. .remove = __devexit_p(tc35815_remove_one),
  2693. #ifdef CONFIG_PM
  2694. .suspend = tc35815_suspend,
  2695. .resume = tc35815_resume,
  2696. #endif
  2697. };
  2698. module_param_named(speed, options.speed, int, 0);
  2699. MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
  2700. module_param_named(duplex, options.duplex, int, 0);
  2701. MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
  2702. module_param_named(doforce, options.doforce, int, 0);
  2703. MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
  2704. static int __init tc35815_init_module(void)
  2705. {
  2706. return pci_register_driver(&tc35815_pci_driver);
  2707. }
  2708. static void __exit tc35815_cleanup_module(void)
  2709. {
  2710. pci_unregister_driver(&tc35815_pci_driver);
  2711. }
  2712. module_init(tc35815_init_module);
  2713. module_exit(tc35815_cleanup_module);
  2714. MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
  2715. MODULE_LICENSE("GPL");