ucb1400_ts.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593
  1. /*
  2. * Philips UCB1400 touchscreen driver
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: September 25, 2006
  6. * Copyright: MontaVista Software, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
  13. * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has
  14. * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
  15. */
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/init.h>
  19. #include <linux/completion.h>
  20. #include <linux/delay.h>
  21. #include <linux/input.h>
  22. #include <linux/device.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/suspend.h>
  25. #include <linux/slab.h>
  26. #include <linux/kthread.h>
  27. #include <linux/freezer.h>
  28. #include <sound/driver.h>
  29. #include <sound/core.h>
  30. #include <sound/ac97_codec.h>
  31. /*
  32. * Interesting UCB1400 AC-link registers
  33. */
  34. #define UCB_IE_RIS 0x5e
  35. #define UCB_IE_FAL 0x60
  36. #define UCB_IE_STATUS 0x62
  37. #define UCB_IE_CLEAR 0x62
  38. #define UCB_IE_ADC (1 << 11)
  39. #define UCB_IE_TSPX (1 << 12)
  40. #define UCB_TS_CR 0x64
  41. #define UCB_TS_CR_TSMX_POW (1 << 0)
  42. #define UCB_TS_CR_TSPX_POW (1 << 1)
  43. #define UCB_TS_CR_TSMY_POW (1 << 2)
  44. #define UCB_TS_CR_TSPY_POW (1 << 3)
  45. #define UCB_TS_CR_TSMX_GND (1 << 4)
  46. #define UCB_TS_CR_TSPX_GND (1 << 5)
  47. #define UCB_TS_CR_TSMY_GND (1 << 6)
  48. #define UCB_TS_CR_TSPY_GND (1 << 7)
  49. #define UCB_TS_CR_MODE_INT (0 << 8)
  50. #define UCB_TS_CR_MODE_PRES (1 << 8)
  51. #define UCB_TS_CR_MODE_POS (2 << 8)
  52. #define UCB_TS_CR_BIAS_ENA (1 << 11)
  53. #define UCB_TS_CR_TSPX_LOW (1 << 12)
  54. #define UCB_TS_CR_TSMX_LOW (1 << 13)
  55. #define UCB_ADC_CR 0x66
  56. #define UCB_ADC_SYNC_ENA (1 << 0)
  57. #define UCB_ADC_VREFBYP_CON (1 << 1)
  58. #define UCB_ADC_INP_TSPX (0 << 2)
  59. #define UCB_ADC_INP_TSMX (1 << 2)
  60. #define UCB_ADC_INP_TSPY (2 << 2)
  61. #define UCB_ADC_INP_TSMY (3 << 2)
  62. #define UCB_ADC_INP_AD0 (4 << 2)
  63. #define UCB_ADC_INP_AD1 (5 << 2)
  64. #define UCB_ADC_INP_AD2 (6 << 2)
  65. #define UCB_ADC_INP_AD3 (7 << 2)
  66. #define UCB_ADC_EXT_REF (1 << 5)
  67. #define UCB_ADC_START (1 << 7)
  68. #define UCB_ADC_ENA (1 << 15)
  69. #define UCB_ADC_DATA 0x68
  70. #define UCB_ADC_DAT_VALID (1 << 15)
  71. #define UCB_ADC_DAT_VALUE(x) ((x) & 0x3ff)
  72. #define UCB_ID 0x7e
  73. #define UCB_ID_1400 0x4304
  74. struct ucb1400 {
  75. struct snd_ac97 *ac97;
  76. struct input_dev *ts_idev;
  77. int irq;
  78. wait_queue_head_t ts_wait;
  79. struct task_struct *ts_task;
  80. unsigned int irq_pending; /* not bit field shared */
  81. unsigned int ts_restart:1;
  82. unsigned int adcsync:1;
  83. };
  84. static int adcsync;
  85. static int ts_delay = 55; /* us */
  86. static int ts_delay_pressure; /* us */
  87. static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg)
  88. {
  89. return ucb->ac97->bus->ops->read(ucb->ac97, reg);
  90. }
  91. static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val)
  92. {
  93. ucb->ac97->bus->ops->write(ucb->ac97, reg, val);
  94. }
  95. static inline void ucb1400_adc_enable(struct ucb1400 *ucb)
  96. {
  97. ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
  98. }
  99. static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel)
  100. {
  101. unsigned int val;
  102. if (ucb->adcsync)
  103. adc_channel |= UCB_ADC_SYNC_ENA;
  104. ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel);
  105. ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | UCB_ADC_START);
  106. for (;;) {
  107. val = ucb1400_reg_read(ucb, UCB_ADC_DATA);
  108. if (val & UCB_ADC_DAT_VALID)
  109. break;
  110. /* yield to other processes */
  111. set_current_state(TASK_INTERRUPTIBLE);
  112. schedule_timeout(1);
  113. }
  114. return UCB_ADC_DAT_VALUE(val);
  115. }
  116. static inline void ucb1400_adc_disable(struct ucb1400 *ucb)
  117. {
  118. ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
  119. }
  120. /* Switch to interrupt mode. */
  121. static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb)
  122. {
  123. ucb1400_reg_write(ucb, UCB_TS_CR,
  124. UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
  125. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
  126. UCB_TS_CR_MODE_INT);
  127. }
  128. /*
  129. * Switch to pressure mode, and read pressure. We don't need to wait
  130. * here, since both plates are being driven.
  131. */
  132. static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb)
  133. {
  134. ucb1400_reg_write(ucb, UCB_TS_CR,
  135. UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
  136. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
  137. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  138. udelay(ts_delay_pressure);
  139. return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
  140. }
  141. /*
  142. * Switch to X position mode and measure Y plate. We switch the plate
  143. * configuration in pressure mode, then switch to position mode. This
  144. * gives a faster response time. Even so, we need to wait about 55us
  145. * for things to stabilise.
  146. */
  147. static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb)
  148. {
  149. ucb1400_reg_write(ucb, UCB_TS_CR,
  150. UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
  151. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  152. ucb1400_reg_write(ucb, UCB_TS_CR,
  153. UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
  154. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  155. ucb1400_reg_write(ucb, UCB_TS_CR,
  156. UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
  157. UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
  158. udelay(ts_delay);
  159. return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
  160. }
  161. /*
  162. * Switch to Y position mode and measure X plate. We switch the plate
  163. * configuration in pressure mode, then switch to position mode. This
  164. * gives a faster response time. Even so, we need to wait about 55us
  165. * for things to stabilise.
  166. */
  167. static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb)
  168. {
  169. ucb1400_reg_write(ucb, UCB_TS_CR,
  170. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
  171. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  172. ucb1400_reg_write(ucb, UCB_TS_CR,
  173. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
  174. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  175. ucb1400_reg_write(ucb, UCB_TS_CR,
  176. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
  177. UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
  178. udelay(ts_delay);
  179. return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX);
  180. }
  181. /*
  182. * Switch to X plate resistance mode. Set MX to ground, PX to
  183. * supply. Measure current.
  184. */
  185. static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb)
  186. {
  187. ucb1400_reg_write(ucb, UCB_TS_CR,
  188. UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
  189. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  190. return ucb1400_adc_read(ucb, 0);
  191. }
  192. /*
  193. * Switch to Y plate resistance mode. Set MY to ground, PY to
  194. * supply. Measure current.
  195. */
  196. static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb)
  197. {
  198. ucb1400_reg_write(ucb, UCB_TS_CR,
  199. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
  200. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  201. return ucb1400_adc_read(ucb, 0);
  202. }
  203. static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb)
  204. {
  205. unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR);
  206. return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW));
  207. }
  208. static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb)
  209. {
  210. ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX);
  211. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
  212. ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX);
  213. }
  214. static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb)
  215. {
  216. ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
  217. }
  218. static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
  219. {
  220. input_report_abs(idev, ABS_X, x);
  221. input_report_abs(idev, ABS_Y, y);
  222. input_report_abs(idev, ABS_PRESSURE, pressure);
  223. input_sync(idev);
  224. }
  225. static void ucb1400_ts_event_release(struct input_dev *idev)
  226. {
  227. input_report_abs(idev, ABS_PRESSURE, 0);
  228. input_sync(idev);
  229. }
  230. static void ucb1400_handle_pending_irq(struct ucb1400 *ucb)
  231. {
  232. unsigned int isr;
  233. isr = ucb1400_reg_read(ucb, UCB_IE_STATUS);
  234. ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr);
  235. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
  236. if (isr & UCB_IE_TSPX)
  237. ucb1400_ts_irq_disable(ucb);
  238. else
  239. printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr);
  240. enable_irq(ucb->irq);
  241. }
  242. static int ucb1400_ts_thread(void *_ucb)
  243. {
  244. struct ucb1400 *ucb = _ucb;
  245. struct task_struct *tsk = current;
  246. int valid = 0;
  247. struct sched_param param = { .sched_priority = 1 };
  248. sched_setscheduler(tsk, SCHED_FIFO, &param);
  249. set_freezable();
  250. while (!kthread_should_stop()) {
  251. unsigned int x, y, p;
  252. long timeout;
  253. ucb->ts_restart = 0;
  254. if (ucb->irq_pending) {
  255. ucb->irq_pending = 0;
  256. ucb1400_handle_pending_irq(ucb);
  257. }
  258. ucb1400_adc_enable(ucb);
  259. x = ucb1400_ts_read_xpos(ucb);
  260. y = ucb1400_ts_read_ypos(ucb);
  261. p = ucb1400_ts_read_pressure(ucb);
  262. ucb1400_adc_disable(ucb);
  263. /* Switch back to interrupt mode. */
  264. ucb1400_ts_mode_int(ucb);
  265. msleep(10);
  266. if (ucb1400_ts_pen_down(ucb)) {
  267. ucb1400_ts_irq_enable(ucb);
  268. /*
  269. * If we spat out a valid sample set last time,
  270. * spit out a "pen off" sample here.
  271. */
  272. if (valid) {
  273. ucb1400_ts_event_release(ucb->ts_idev);
  274. valid = 0;
  275. }
  276. timeout = MAX_SCHEDULE_TIMEOUT;
  277. } else {
  278. valid = 1;
  279. ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
  280. timeout = msecs_to_jiffies(10);
  281. }
  282. wait_event_interruptible_timeout(ucb->ts_wait,
  283. ucb->irq_pending || ucb->ts_restart || kthread_should_stop(),
  284. timeout);
  285. try_to_freeze();
  286. }
  287. /* Send the "pen off" if we are stopping with the pen still active */
  288. if (valid)
  289. ucb1400_ts_event_release(ucb->ts_idev);
  290. ucb->ts_task = NULL;
  291. return 0;
  292. }
  293. /*
  294. * A restriction with interrupts exists when using the ucb1400, as
  295. * the codec read/write routines may sleep while waiting for codec
  296. * access completion and uses semaphores for access control to the
  297. * AC97 bus. A complete codec read cycle could take anywhere from
  298. * 60 to 100uSec so we *definitely* don't want to spin inside the
  299. * interrupt handler waiting for codec access. So, we handle the
  300. * interrupt by scheduling a RT kernel thread to run in process
  301. * context instead of interrupt context.
  302. */
  303. static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
  304. {
  305. struct ucb1400 *ucb = devid;
  306. if (irqnr == ucb->irq) {
  307. disable_irq(ucb->irq);
  308. ucb->irq_pending = 1;
  309. wake_up(&ucb->ts_wait);
  310. return IRQ_HANDLED;
  311. }
  312. return IRQ_NONE;
  313. }
  314. static int ucb1400_ts_open(struct input_dev *idev)
  315. {
  316. struct ucb1400 *ucb = input_get_drvdata(idev);
  317. int ret = 0;
  318. BUG_ON(ucb->ts_task);
  319. ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
  320. if (IS_ERR(ucb->ts_task)) {
  321. ret = PTR_ERR(ucb->ts_task);
  322. ucb->ts_task = NULL;
  323. }
  324. return ret;
  325. }
  326. static void ucb1400_ts_close(struct input_dev *idev)
  327. {
  328. struct ucb1400 *ucb = input_get_drvdata(idev);
  329. if (ucb->ts_task)
  330. kthread_stop(ucb->ts_task);
  331. ucb1400_ts_irq_disable(ucb);
  332. ucb1400_reg_write(ucb, UCB_TS_CR, 0);
  333. }
  334. #ifdef CONFIG_PM
  335. static int ucb1400_ts_resume(struct device *dev)
  336. {
  337. struct ucb1400 *ucb = dev_get_drvdata(dev);
  338. if (ucb->ts_task) {
  339. /*
  340. * Restart the TS thread to ensure the
  341. * TS interrupt mode is set up again
  342. * after sleep.
  343. */
  344. ucb->ts_restart = 1;
  345. wake_up(&ucb->ts_wait);
  346. }
  347. return 0;
  348. }
  349. #else
  350. #define ucb1400_ts_resume NULL
  351. #endif
  352. #ifndef NO_IRQ
  353. #define NO_IRQ 0
  354. #endif
  355. /*
  356. * Try to probe our interrupt, rather than relying on lots of
  357. * hard-coded machine dependencies.
  358. */
  359. static int ucb1400_detect_irq(struct ucb1400 *ucb)
  360. {
  361. unsigned long mask, timeout;
  362. mask = probe_irq_on();
  363. if (!mask) {
  364. probe_irq_off(mask);
  365. return -EBUSY;
  366. }
  367. /* Enable the ADC interrupt. */
  368. ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
  369. ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
  370. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
  371. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
  372. /* Cause an ADC interrupt. */
  373. ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
  374. ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
  375. /* Wait for the conversion to complete. */
  376. timeout = jiffies + HZ/2;
  377. while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) {
  378. cpu_relax();
  379. if (time_after(jiffies, timeout)) {
  380. printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
  381. probe_irq_off(mask);
  382. return -ENODEV;
  383. }
  384. }
  385. ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
  386. /* Disable and clear interrupt. */
  387. ucb1400_reg_write(ucb, UCB_IE_RIS, 0);
  388. ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
  389. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
  390. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
  391. /* Read triggered interrupt. */
  392. ucb->irq = probe_irq_off(mask);
  393. if (ucb->irq < 0 || ucb->irq == NO_IRQ)
  394. return -ENODEV;
  395. return 0;
  396. }
  397. static int ucb1400_ts_probe(struct device *dev)
  398. {
  399. struct ucb1400 *ucb;
  400. struct input_dev *idev;
  401. int error, id, x_res, y_res;
  402. ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL);
  403. idev = input_allocate_device();
  404. if (!ucb || !idev) {
  405. error = -ENOMEM;
  406. goto err_free_devs;
  407. }
  408. ucb->ts_idev = idev;
  409. ucb->adcsync = adcsync;
  410. ucb->ac97 = to_ac97_t(dev);
  411. init_waitqueue_head(&ucb->ts_wait);
  412. id = ucb1400_reg_read(ucb, UCB_ID);
  413. if (id != UCB_ID_1400) {
  414. error = -ENODEV;
  415. goto err_free_devs;
  416. }
  417. error = ucb1400_detect_irq(ucb);
  418. if (error) {
  419. printk(KERN_ERR "UCB1400: IRQ probe failed\n");
  420. goto err_free_devs;
  421. }
  422. error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
  423. "UCB1400", ucb);
  424. if (error) {
  425. printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
  426. ucb->irq, error);
  427. goto err_free_devs;
  428. }
  429. printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
  430. input_set_drvdata(idev, ucb);
  431. idev->dev.parent = dev;
  432. idev->name = "UCB1400 touchscreen interface";
  433. idev->id.vendor = ucb1400_reg_read(ucb, AC97_VENDOR_ID1);
  434. idev->id.product = id;
  435. idev->open = ucb1400_ts_open;
  436. idev->close = ucb1400_ts_close;
  437. idev->evbit[0] = BIT(EV_ABS);
  438. ucb1400_adc_enable(ucb);
  439. x_res = ucb1400_ts_read_xres(ucb);
  440. y_res = ucb1400_ts_read_yres(ucb);
  441. ucb1400_adc_disable(ucb);
  442. printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
  443. input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0);
  444. input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0);
  445. input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0);
  446. error = input_register_device(idev);
  447. if (error)
  448. goto err_free_irq;
  449. dev_set_drvdata(dev, ucb);
  450. return 0;
  451. err_free_irq:
  452. free_irq(ucb->irq, ucb);
  453. err_free_devs:
  454. input_free_device(idev);
  455. kfree(ucb);
  456. return error;
  457. }
  458. static int ucb1400_ts_remove(struct device *dev)
  459. {
  460. struct ucb1400 *ucb = dev_get_drvdata(dev);
  461. free_irq(ucb->irq, ucb);
  462. input_unregister_device(ucb->ts_idev);
  463. dev_set_drvdata(dev, NULL);
  464. kfree(ucb);
  465. return 0;
  466. }
  467. static struct device_driver ucb1400_ts_driver = {
  468. .name = "ucb1400_ts",
  469. .owner = THIS_MODULE,
  470. .bus = &ac97_bus_type,
  471. .probe = ucb1400_ts_probe,
  472. .remove = ucb1400_ts_remove,
  473. .resume = ucb1400_ts_resume,
  474. };
  475. static int __init ucb1400_ts_init(void)
  476. {
  477. return driver_register(&ucb1400_ts_driver);
  478. }
  479. static void __exit ucb1400_ts_exit(void)
  480. {
  481. driver_unregister(&ucb1400_ts_driver);
  482. }
  483. module_param(adcsync, bool, 0444);
  484. MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");
  485. module_param(ts_delay, int, 0444);
  486. MODULE_PARM_DESC(ts_delay, "Delay between panel setup and position read. Default = 55us.");
  487. module_param(ts_delay_pressure, int, 0444);
  488. MODULE_PARM_DESC(ts_delay_pressure,
  489. "delay between panel setup and pressure read. Default = 0us.");
  490. module_init(ucb1400_ts_init);
  491. module_exit(ucb1400_ts_exit);
  492. MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
  493. MODULE_LICENSE("GPL");