i8042.c 28 KB

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  1. /*
  2. * i8042 keyboard and mouse controller driver for Linux
  3. *
  4. * Copyright (c) 1999-2004 Vojtech Pavlik
  5. */
  6. /*
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. */
  11. #include <linux/delay.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/ioport.h>
  16. #include <linux/init.h>
  17. #include <linux/serio.h>
  18. #include <linux/err.h>
  19. #include <linux/rcupdate.h>
  20. #include <linux/platform_device.h>
  21. #include <asm/io.h>
  22. MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
  23. MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int i8042_nokbd;
  26. module_param_named(nokbd, i8042_nokbd, bool, 0);
  27. MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
  28. static unsigned int i8042_noaux;
  29. module_param_named(noaux, i8042_noaux, bool, 0);
  30. MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
  31. static unsigned int i8042_nomux;
  32. module_param_named(nomux, i8042_nomux, bool, 0);
  33. MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
  34. static unsigned int i8042_unlock;
  35. module_param_named(unlock, i8042_unlock, bool, 0);
  36. MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
  37. static unsigned int i8042_reset;
  38. module_param_named(reset, i8042_reset, bool, 0);
  39. MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
  40. static unsigned int i8042_direct;
  41. module_param_named(direct, i8042_direct, bool, 0);
  42. MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
  43. static unsigned int i8042_dumbkbd;
  44. module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
  45. MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
  46. static unsigned int i8042_noloop;
  47. module_param_named(noloop, i8042_noloop, bool, 0);
  48. MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
  49. static unsigned int i8042_blink_frequency = 500;
  50. module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
  51. MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
  52. #ifdef CONFIG_PNP
  53. static int i8042_nopnp;
  54. module_param_named(nopnp, i8042_nopnp, bool, 0);
  55. MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
  56. #endif
  57. #define DEBUG
  58. #ifdef DEBUG
  59. static int i8042_debug;
  60. module_param_named(debug, i8042_debug, bool, 0600);
  61. MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
  62. #endif
  63. #include "i8042.h"
  64. static DEFINE_SPINLOCK(i8042_lock);
  65. struct i8042_port {
  66. struct serio *serio;
  67. int irq;
  68. unsigned char exists;
  69. signed char mux;
  70. };
  71. #define I8042_KBD_PORT_NO 0
  72. #define I8042_AUX_PORT_NO 1
  73. #define I8042_MUX_PORT_NO 2
  74. #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
  75. static struct i8042_port i8042_ports[I8042_NUM_PORTS];
  76. static unsigned char i8042_initial_ctr;
  77. static unsigned char i8042_ctr;
  78. static unsigned char i8042_mux_present;
  79. static unsigned char i8042_kbd_irq_registered;
  80. static unsigned char i8042_aux_irq_registered;
  81. static unsigned char i8042_suppress_kbd_ack;
  82. static struct platform_device *i8042_platform_device;
  83. static irqreturn_t i8042_interrupt(int irq, void *dev_id);
  84. /*
  85. * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
  86. * be ready for reading values from it / writing values to it.
  87. * Called always with i8042_lock held.
  88. */
  89. static int i8042_wait_read(void)
  90. {
  91. int i = 0;
  92. while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
  93. udelay(50);
  94. i++;
  95. }
  96. return -(i == I8042_CTL_TIMEOUT);
  97. }
  98. static int i8042_wait_write(void)
  99. {
  100. int i = 0;
  101. while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
  102. udelay(50);
  103. i++;
  104. }
  105. return -(i == I8042_CTL_TIMEOUT);
  106. }
  107. /*
  108. * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
  109. * of the i8042 down the toilet.
  110. */
  111. static int i8042_flush(void)
  112. {
  113. unsigned long flags;
  114. unsigned char data, str;
  115. int i = 0;
  116. spin_lock_irqsave(&i8042_lock, flags);
  117. while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
  118. udelay(50);
  119. data = i8042_read_data();
  120. i++;
  121. dbg("%02x <- i8042 (flush, %s)", data,
  122. str & I8042_STR_AUXDATA ? "aux" : "kbd");
  123. }
  124. spin_unlock_irqrestore(&i8042_lock, flags);
  125. return i;
  126. }
  127. /*
  128. * i8042_command() executes a command on the i8042. It also sends the input
  129. * parameter(s) of the commands to it, and receives the output value(s). The
  130. * parameters are to be stored in the param array, and the output is placed
  131. * into the same array. The number of the parameters and output values is
  132. * encoded in bits 8-11 of the command number.
  133. */
  134. static int __i8042_command(unsigned char *param, int command)
  135. {
  136. int i, error;
  137. if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
  138. return -1;
  139. error = i8042_wait_write();
  140. if (error)
  141. return error;
  142. dbg("%02x -> i8042 (command)", command & 0xff);
  143. i8042_write_command(command & 0xff);
  144. for (i = 0; i < ((command >> 12) & 0xf); i++) {
  145. error = i8042_wait_write();
  146. if (error)
  147. return error;
  148. dbg("%02x -> i8042 (parameter)", param[i]);
  149. i8042_write_data(param[i]);
  150. }
  151. for (i = 0; i < ((command >> 8) & 0xf); i++) {
  152. error = i8042_wait_read();
  153. if (error) {
  154. dbg(" -- i8042 (timeout)");
  155. return error;
  156. }
  157. if (command == I8042_CMD_AUX_LOOP &&
  158. !(i8042_read_status() & I8042_STR_AUXDATA)) {
  159. dbg(" -- i8042 (auxerr)");
  160. return -1;
  161. }
  162. param[i] = i8042_read_data();
  163. dbg("%02x <- i8042 (return)", param[i]);
  164. }
  165. return 0;
  166. }
  167. static int i8042_command(unsigned char *param, int command)
  168. {
  169. unsigned long flags;
  170. int retval;
  171. spin_lock_irqsave(&i8042_lock, flags);
  172. retval = __i8042_command(param, command);
  173. spin_unlock_irqrestore(&i8042_lock, flags);
  174. return retval;
  175. }
  176. /*
  177. * i8042_kbd_write() sends a byte out through the keyboard interface.
  178. */
  179. static int i8042_kbd_write(struct serio *port, unsigned char c)
  180. {
  181. unsigned long flags;
  182. int retval = 0;
  183. spin_lock_irqsave(&i8042_lock, flags);
  184. if (!(retval = i8042_wait_write())) {
  185. dbg("%02x -> i8042 (kbd-data)", c);
  186. i8042_write_data(c);
  187. }
  188. spin_unlock_irqrestore(&i8042_lock, flags);
  189. return retval;
  190. }
  191. /*
  192. * i8042_aux_write() sends a byte out through the aux interface.
  193. */
  194. static int i8042_aux_write(struct serio *serio, unsigned char c)
  195. {
  196. struct i8042_port *port = serio->port_data;
  197. return i8042_command(&c, port->mux == -1 ?
  198. I8042_CMD_AUX_SEND :
  199. I8042_CMD_MUX_SEND + port->mux);
  200. }
  201. /*
  202. * i8042_start() is called by serio core when port is about to finish
  203. * registering. It will mark port as existing so i8042_interrupt can
  204. * start sending data through it.
  205. */
  206. static int i8042_start(struct serio *serio)
  207. {
  208. struct i8042_port *port = serio->port_data;
  209. port->exists = 1;
  210. mb();
  211. return 0;
  212. }
  213. /*
  214. * i8042_stop() marks serio port as non-existing so i8042_interrupt
  215. * will not try to send data to the port that is about to go away.
  216. * The function is called by serio core as part of unregister procedure.
  217. */
  218. static void i8042_stop(struct serio *serio)
  219. {
  220. struct i8042_port *port = serio->port_data;
  221. port->exists = 0;
  222. synchronize_sched();
  223. port->serio = NULL;
  224. }
  225. /*
  226. * i8042_interrupt() is the most important function in this driver -
  227. * it handles the interrupts from the i8042, and sends incoming bytes
  228. * to the upper layers.
  229. */
  230. static irqreturn_t i8042_interrupt(int irq, void *dev_id)
  231. {
  232. struct i8042_port *port;
  233. unsigned long flags;
  234. unsigned char str, data;
  235. unsigned int dfl;
  236. unsigned int port_no;
  237. int ret = 1;
  238. spin_lock_irqsave(&i8042_lock, flags);
  239. str = i8042_read_status();
  240. if (unlikely(~str & I8042_STR_OBF)) {
  241. spin_unlock_irqrestore(&i8042_lock, flags);
  242. if (irq) dbg("Interrupt %d, without any data", irq);
  243. ret = 0;
  244. goto out;
  245. }
  246. data = i8042_read_data();
  247. spin_unlock_irqrestore(&i8042_lock, flags);
  248. if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
  249. static unsigned long last_transmit;
  250. static unsigned char last_str;
  251. dfl = 0;
  252. if (str & I8042_STR_MUXERR) {
  253. dbg("MUX error, status is %02x, data is %02x", str, data);
  254. /*
  255. * When MUXERR condition is signalled the data register can only contain
  256. * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
  257. * it is not always the case. Some KBCs also report 0xfc when there is
  258. * nothing connected to the port while others sometimes get confused which
  259. * port the data came from and signal error leaving the data intact. They
  260. * _do not_ revert to legacy mode (actually I've never seen KBC reverting
  261. * to legacy mode yet, when we see one we'll add proper handling).
  262. * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
  263. * rest assume that the data came from the same serio last byte
  264. * was transmitted (if transmission happened not too long ago).
  265. */
  266. switch (data) {
  267. default:
  268. if (time_before(jiffies, last_transmit + HZ/10)) {
  269. str = last_str;
  270. break;
  271. }
  272. /* fall through - report timeout */
  273. case 0xfc:
  274. case 0xfd:
  275. case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
  276. case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
  277. }
  278. }
  279. port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
  280. last_str = str;
  281. last_transmit = jiffies;
  282. } else {
  283. dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
  284. ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
  285. port_no = (str & I8042_STR_AUXDATA) ?
  286. I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
  287. }
  288. port = &i8042_ports[port_no];
  289. dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
  290. data, port_no, irq,
  291. dfl & SERIO_PARITY ? ", bad parity" : "",
  292. dfl & SERIO_TIMEOUT ? ", timeout" : "");
  293. if (unlikely(i8042_suppress_kbd_ack))
  294. if (port_no == I8042_KBD_PORT_NO &&
  295. (data == 0xfa || data == 0xfe)) {
  296. i8042_suppress_kbd_ack--;
  297. goto out;
  298. }
  299. if (likely(port->exists))
  300. serio_interrupt(port->serio, data, dfl);
  301. out:
  302. return IRQ_RETVAL(ret);
  303. }
  304. /*
  305. * i8042_enable_kbd_port enables keybaord port on chip
  306. */
  307. static int i8042_enable_kbd_port(void)
  308. {
  309. i8042_ctr &= ~I8042_CTR_KBDDIS;
  310. i8042_ctr |= I8042_CTR_KBDINT;
  311. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  312. printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
  313. return -EIO;
  314. }
  315. return 0;
  316. }
  317. /*
  318. * i8042_enable_aux_port enables AUX (mouse) port on chip
  319. */
  320. static int i8042_enable_aux_port(void)
  321. {
  322. i8042_ctr &= ~I8042_CTR_AUXDIS;
  323. i8042_ctr |= I8042_CTR_AUXINT;
  324. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  325. printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
  326. return -EIO;
  327. }
  328. return 0;
  329. }
  330. /*
  331. * i8042_enable_mux_ports enables 4 individual AUX ports after
  332. * the controller has been switched into Multiplexed mode
  333. */
  334. static int i8042_enable_mux_ports(void)
  335. {
  336. unsigned char param;
  337. int i;
  338. for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
  339. i8042_command(&param, I8042_CMD_MUX_PFX + i);
  340. i8042_command(&param, I8042_CMD_AUX_ENABLE);
  341. }
  342. return i8042_enable_aux_port();
  343. }
  344. /*
  345. * i8042_set_mux_mode checks whether the controller has an active
  346. * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
  347. */
  348. static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
  349. {
  350. unsigned char param;
  351. /*
  352. * Get rid of bytes in the queue.
  353. */
  354. i8042_flush();
  355. /*
  356. * Internal loopback test - send three bytes, they should come back from the
  357. * mouse interface, the last should be version.
  358. */
  359. param = 0xf0;
  360. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != 0xf0)
  361. return -1;
  362. param = mode ? 0x56 : 0xf6;
  363. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
  364. return -1;
  365. param = mode ? 0xa4 : 0xa5;
  366. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
  367. return -1;
  368. if (mux_version)
  369. *mux_version = param;
  370. return 0;
  371. }
  372. /*
  373. * i8042_check_mux() checks whether the controller supports the PS/2 Active
  374. * Multiplexing specification by Synaptics, Phoenix, Insyde and
  375. * LCS/Telegraphics.
  376. */
  377. static int __devinit i8042_check_mux(void)
  378. {
  379. unsigned char mux_version;
  380. if (i8042_set_mux_mode(1, &mux_version))
  381. return -1;
  382. /*
  383. * Workaround for interference with USB Legacy emulation
  384. * that causes a v10.12 MUX to be found.
  385. */
  386. if (mux_version == 0xAC)
  387. return -1;
  388. printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
  389. (mux_version >> 4) & 0xf, mux_version & 0xf);
  390. /*
  391. * Disable all muxed ports by disabling AUX.
  392. */
  393. i8042_ctr |= I8042_CTR_AUXDIS;
  394. i8042_ctr &= ~I8042_CTR_AUXINT;
  395. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  396. printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
  397. return -EIO;
  398. }
  399. i8042_mux_present = 1;
  400. return 0;
  401. }
  402. /*
  403. * The following is used to test AUX IRQ delivery.
  404. */
  405. static struct completion i8042_aux_irq_delivered __devinitdata;
  406. static int i8042_irq_being_tested __devinitdata;
  407. static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
  408. {
  409. unsigned long flags;
  410. unsigned char str, data;
  411. int ret = 0;
  412. spin_lock_irqsave(&i8042_lock, flags);
  413. str = i8042_read_status();
  414. if (str & I8042_STR_OBF) {
  415. data = i8042_read_data();
  416. if (i8042_irq_being_tested &&
  417. data == 0xa5 && (str & I8042_STR_AUXDATA))
  418. complete(&i8042_aux_irq_delivered);
  419. ret = 1;
  420. }
  421. spin_unlock_irqrestore(&i8042_lock, flags);
  422. return IRQ_RETVAL(ret);
  423. }
  424. /*
  425. * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
  426. * verifies success by readinng CTR. Used when testing for presence of AUX
  427. * port.
  428. */
  429. static int __devinit i8042_toggle_aux(int on)
  430. {
  431. unsigned char param;
  432. int i;
  433. if (i8042_command(&param,
  434. on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
  435. return -1;
  436. /* some chips need some time to set the I8042_CTR_AUXDIS bit */
  437. for (i = 0; i < 100; i++) {
  438. udelay(50);
  439. if (i8042_command(&param, I8042_CMD_CTL_RCTR))
  440. return -1;
  441. if (!(param & I8042_CTR_AUXDIS) == on)
  442. return 0;
  443. }
  444. return -1;
  445. }
  446. /*
  447. * i8042_check_aux() applies as much paranoia as it can at detecting
  448. * the presence of an AUX interface.
  449. */
  450. static int __devinit i8042_check_aux(void)
  451. {
  452. int retval = -1;
  453. int irq_registered = 0;
  454. int aux_loop_broken = 0;
  455. unsigned long flags;
  456. unsigned char param;
  457. /*
  458. * Get rid of bytes in the queue.
  459. */
  460. i8042_flush();
  461. /*
  462. * Internal loopback test - filters out AT-type i8042's. Unfortunately
  463. * SiS screwed up and their 5597 doesn't support the LOOP command even
  464. * though it has an AUX port.
  465. */
  466. param = 0x5a;
  467. retval = i8042_command(&param, I8042_CMD_AUX_LOOP);
  468. if (retval || param != 0x5a) {
  469. /*
  470. * External connection test - filters out AT-soldered PS/2 i8042's
  471. * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
  472. * 0xfa - no error on some notebooks which ignore the spec
  473. * Because it's common for chipsets to return error on perfectly functioning
  474. * AUX ports, we test for this only when the LOOP command failed.
  475. */
  476. if (i8042_command(&param, I8042_CMD_AUX_TEST) ||
  477. (param && param != 0xfa && param != 0xff))
  478. return -1;
  479. /*
  480. * If AUX_LOOP completed without error but returned unexpected data
  481. * mark it as broken
  482. */
  483. if (!retval)
  484. aux_loop_broken = 1;
  485. }
  486. /*
  487. * Bit assignment test - filters out PS/2 i8042's in AT mode
  488. */
  489. if (i8042_toggle_aux(0)) {
  490. printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
  491. printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
  492. }
  493. if (i8042_toggle_aux(1))
  494. return -1;
  495. /*
  496. * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
  497. * used it for a PCI card or somethig else.
  498. */
  499. if (i8042_noloop || aux_loop_broken) {
  500. /*
  501. * Without LOOP command we can't test AUX IRQ delivery. Assume the port
  502. * is working and hope we are right.
  503. */
  504. retval = 0;
  505. goto out;
  506. }
  507. if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
  508. "i8042", i8042_platform_device))
  509. goto out;
  510. irq_registered = 1;
  511. if (i8042_enable_aux_port())
  512. goto out;
  513. spin_lock_irqsave(&i8042_lock, flags);
  514. init_completion(&i8042_aux_irq_delivered);
  515. i8042_irq_being_tested = 1;
  516. param = 0xa5;
  517. retval = __i8042_command(&param, I8042_CMD_AUX_LOOP & 0xf0ff);
  518. spin_unlock_irqrestore(&i8042_lock, flags);
  519. if (retval)
  520. goto out;
  521. if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
  522. msecs_to_jiffies(250)) == 0) {
  523. /*
  524. * AUX IRQ was never delivered so we need to flush the controller to
  525. * get rid of the byte we put there; otherwise keyboard may not work.
  526. */
  527. i8042_flush();
  528. retval = -1;
  529. }
  530. out:
  531. /*
  532. * Disable the interface.
  533. */
  534. i8042_ctr |= I8042_CTR_AUXDIS;
  535. i8042_ctr &= ~I8042_CTR_AUXINT;
  536. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
  537. retval = -1;
  538. if (irq_registered)
  539. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  540. return retval;
  541. }
  542. static int i8042_controller_check(void)
  543. {
  544. if (i8042_flush() == I8042_BUFFER_SIZE) {
  545. printk(KERN_ERR "i8042.c: No controller found.\n");
  546. return -ENODEV;
  547. }
  548. return 0;
  549. }
  550. static int i8042_controller_selftest(void)
  551. {
  552. unsigned char param;
  553. if (!i8042_reset)
  554. return 0;
  555. if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
  556. printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
  557. return -ENODEV;
  558. }
  559. if (param != I8042_RET_CTL_TEST) {
  560. printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
  561. param, I8042_RET_CTL_TEST);
  562. return -EIO;
  563. }
  564. return 0;
  565. }
  566. /*
  567. * i8042_controller init initializes the i8042 controller, and,
  568. * most importantly, sets it into non-xlated mode if that's
  569. * desired.
  570. */
  571. static int i8042_controller_init(void)
  572. {
  573. unsigned long flags;
  574. /*
  575. * Save the CTR for restoral on unload / reboot.
  576. */
  577. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
  578. printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
  579. return -EIO;
  580. }
  581. i8042_initial_ctr = i8042_ctr;
  582. /*
  583. * Disable the keyboard interface and interrupt.
  584. */
  585. i8042_ctr |= I8042_CTR_KBDDIS;
  586. i8042_ctr &= ~I8042_CTR_KBDINT;
  587. /*
  588. * Handle keylock.
  589. */
  590. spin_lock_irqsave(&i8042_lock, flags);
  591. if (~i8042_read_status() & I8042_STR_KEYLOCK) {
  592. if (i8042_unlock)
  593. i8042_ctr |= I8042_CTR_IGNKEYLOCK;
  594. else
  595. printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
  596. }
  597. spin_unlock_irqrestore(&i8042_lock, flags);
  598. /*
  599. * If the chip is configured into nontranslated mode by the BIOS, don't
  600. * bother enabling translating and be happy.
  601. */
  602. if (~i8042_ctr & I8042_CTR_XLATE)
  603. i8042_direct = 1;
  604. /*
  605. * Set nontranslated mode for the kbd interface if requested by an option.
  606. * After this the kbd interface becomes a simple serial in/out, like the aux
  607. * interface is. We don't do this by default, since it can confuse notebook
  608. * BIOSes.
  609. */
  610. if (i8042_direct)
  611. i8042_ctr &= ~I8042_CTR_XLATE;
  612. /*
  613. * Write CTR back.
  614. */
  615. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  616. printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
  617. return -EIO;
  618. }
  619. return 0;
  620. }
  621. /*
  622. * Reset the controller and reset CRT to the original value set by BIOS.
  623. */
  624. static void i8042_controller_reset(void)
  625. {
  626. i8042_flush();
  627. /*
  628. * Disable both KBD and AUX interfaces so they don't get in the way
  629. */
  630. i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
  631. i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
  632. /*
  633. * Disable MUX mode if present.
  634. */
  635. if (i8042_mux_present)
  636. i8042_set_mux_mode(0, NULL);
  637. /*
  638. * Reset the controller if requested.
  639. */
  640. i8042_controller_selftest();
  641. /*
  642. * Restore the original control register setting.
  643. */
  644. if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
  645. printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
  646. }
  647. /*
  648. * i8042_panic_blink() will flash the keyboard LEDs and is called when
  649. * kernel panics. Flashing LEDs is useful for users running X who may
  650. * not see the console and will help distingushing panics from "real"
  651. * lockups.
  652. *
  653. * Note that DELAY has a limit of 10ms so we will not get stuck here
  654. * waiting for KBC to free up even if KBD interrupt is off
  655. */
  656. #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
  657. static long i8042_panic_blink(long count)
  658. {
  659. long delay = 0;
  660. static long last_blink;
  661. static char led;
  662. /*
  663. * We expect frequency to be about 1/2s. KDB uses about 1s.
  664. * Make sure they are different.
  665. */
  666. if (!i8042_blink_frequency)
  667. return 0;
  668. if (count - last_blink < i8042_blink_frequency)
  669. return 0;
  670. led ^= 0x01 | 0x04;
  671. while (i8042_read_status() & I8042_STR_IBF)
  672. DELAY;
  673. dbg("%02x -> i8042 (panic blink)", 0xed);
  674. i8042_suppress_kbd_ack = 2;
  675. i8042_write_data(0xed); /* set leds */
  676. DELAY;
  677. while (i8042_read_status() & I8042_STR_IBF)
  678. DELAY;
  679. DELAY;
  680. dbg("%02x -> i8042 (panic blink)", led);
  681. i8042_write_data(led);
  682. DELAY;
  683. last_blink = count;
  684. return delay;
  685. }
  686. #undef DELAY
  687. #ifdef CONFIG_PM
  688. /*
  689. * Here we try to restore the original BIOS settings. We only want to
  690. * do that once, when we really suspend, not when we taking memory
  691. * snapshot for swsusp (in this case we'll perform required cleanup
  692. * as part of shutdown process).
  693. */
  694. static int i8042_suspend(struct platform_device *dev, pm_message_t state)
  695. {
  696. if (dev->dev.power.power_state.event != state.event) {
  697. if (state.event == PM_EVENT_SUSPEND)
  698. i8042_controller_reset();
  699. dev->dev.power.power_state = state;
  700. }
  701. return 0;
  702. }
  703. /*
  704. * Here we try to reset everything back to a state in which suspended
  705. */
  706. static int i8042_resume(struct platform_device *dev)
  707. {
  708. int error;
  709. /*
  710. * Do not bother with restoring state if we haven't suspened yet
  711. */
  712. if (dev->dev.power.power_state.event == PM_EVENT_ON)
  713. return 0;
  714. error = i8042_controller_check();
  715. if (error)
  716. return error;
  717. error = i8042_controller_selftest();
  718. if (error)
  719. return error;
  720. /*
  721. * Restore original CTR value and disable all ports
  722. */
  723. i8042_ctr = i8042_initial_ctr;
  724. if (i8042_direct)
  725. i8042_ctr &= ~I8042_CTR_XLATE;
  726. i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
  727. i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
  728. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  729. printk(KERN_ERR "i8042: Can't write CTR to resume\n");
  730. return -EIO;
  731. }
  732. if (i8042_mux_present) {
  733. if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
  734. printk(KERN_WARNING
  735. "i8042: failed to resume active multiplexor, "
  736. "mouse won't work.\n");
  737. } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
  738. i8042_enable_aux_port();
  739. if (i8042_ports[I8042_KBD_PORT_NO].serio)
  740. i8042_enable_kbd_port();
  741. i8042_interrupt(0, NULL);
  742. dev->dev.power.power_state = PMSG_ON;
  743. return 0;
  744. }
  745. #endif /* CONFIG_PM */
  746. /*
  747. * We need to reset the 8042 back to original mode on system shutdown,
  748. * because otherwise BIOSes will be confused.
  749. */
  750. static void i8042_shutdown(struct platform_device *dev)
  751. {
  752. i8042_controller_reset();
  753. }
  754. static int __devinit i8042_create_kbd_port(void)
  755. {
  756. struct serio *serio;
  757. struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
  758. serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
  759. if (!serio)
  760. return -ENOMEM;
  761. serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
  762. serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
  763. serio->start = i8042_start;
  764. serio->stop = i8042_stop;
  765. serio->port_data = port;
  766. serio->dev.parent = &i8042_platform_device->dev;
  767. strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
  768. strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
  769. port->serio = serio;
  770. port->irq = I8042_KBD_IRQ;
  771. return 0;
  772. }
  773. static int __devinit i8042_create_aux_port(int idx)
  774. {
  775. struct serio *serio;
  776. int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
  777. struct i8042_port *port = &i8042_ports[port_no];
  778. serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
  779. if (!serio)
  780. return -ENOMEM;
  781. serio->id.type = SERIO_8042;
  782. serio->write = i8042_aux_write;
  783. serio->start = i8042_start;
  784. serio->stop = i8042_stop;
  785. serio->port_data = port;
  786. serio->dev.parent = &i8042_platform_device->dev;
  787. if (idx < 0) {
  788. strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
  789. strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
  790. } else {
  791. snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
  792. snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
  793. }
  794. port->serio = serio;
  795. port->mux = idx;
  796. port->irq = I8042_AUX_IRQ;
  797. return 0;
  798. }
  799. static void __devinit i8042_free_kbd_port(void)
  800. {
  801. kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
  802. i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
  803. }
  804. static void __devinit i8042_free_aux_ports(void)
  805. {
  806. int i;
  807. for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
  808. kfree(i8042_ports[i].serio);
  809. i8042_ports[i].serio = NULL;
  810. }
  811. }
  812. static void __devinit i8042_register_ports(void)
  813. {
  814. int i;
  815. for (i = 0; i < I8042_NUM_PORTS; i++) {
  816. if (i8042_ports[i].serio) {
  817. printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
  818. i8042_ports[i].serio->name,
  819. (unsigned long) I8042_DATA_REG,
  820. (unsigned long) I8042_COMMAND_REG,
  821. i8042_ports[i].irq);
  822. serio_register_port(i8042_ports[i].serio);
  823. }
  824. }
  825. }
  826. static void __devexit i8042_unregister_ports(void)
  827. {
  828. int i;
  829. for (i = 0; i < I8042_NUM_PORTS; i++) {
  830. if (i8042_ports[i].serio) {
  831. serio_unregister_port(i8042_ports[i].serio);
  832. i8042_ports[i].serio = NULL;
  833. }
  834. }
  835. }
  836. static void i8042_free_irqs(void)
  837. {
  838. if (i8042_aux_irq_registered)
  839. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  840. if (i8042_kbd_irq_registered)
  841. free_irq(I8042_KBD_IRQ, i8042_platform_device);
  842. i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
  843. }
  844. static int __devinit i8042_setup_aux(void)
  845. {
  846. int (*aux_enable)(void);
  847. int error;
  848. int i;
  849. if (i8042_check_aux())
  850. return -ENODEV;
  851. if (i8042_nomux || i8042_check_mux()) {
  852. error = i8042_create_aux_port(-1);
  853. if (error)
  854. goto err_free_ports;
  855. aux_enable = i8042_enable_aux_port;
  856. } else {
  857. for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
  858. error = i8042_create_aux_port(i);
  859. if (error)
  860. goto err_free_ports;
  861. }
  862. aux_enable = i8042_enable_mux_ports;
  863. }
  864. error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
  865. "i8042", i8042_platform_device);
  866. if (error)
  867. goto err_free_ports;
  868. if (aux_enable())
  869. goto err_free_irq;
  870. i8042_aux_irq_registered = 1;
  871. return 0;
  872. err_free_irq:
  873. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  874. err_free_ports:
  875. i8042_free_aux_ports();
  876. return error;
  877. }
  878. static int __devinit i8042_setup_kbd(void)
  879. {
  880. int error;
  881. error = i8042_create_kbd_port();
  882. if (error)
  883. return error;
  884. error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
  885. "i8042", i8042_platform_device);
  886. if (error)
  887. goto err_free_port;
  888. error = i8042_enable_kbd_port();
  889. if (error)
  890. goto err_free_irq;
  891. i8042_kbd_irq_registered = 1;
  892. return 0;
  893. err_free_irq:
  894. free_irq(I8042_KBD_IRQ, i8042_platform_device);
  895. err_free_port:
  896. i8042_free_kbd_port();
  897. return error;
  898. }
  899. static int __devinit i8042_probe(struct platform_device *dev)
  900. {
  901. int error;
  902. error = i8042_controller_selftest();
  903. if (error)
  904. return error;
  905. error = i8042_controller_init();
  906. if (error)
  907. return error;
  908. if (!i8042_noaux) {
  909. error = i8042_setup_aux();
  910. if (error && error != -ENODEV && error != -EBUSY)
  911. goto out_fail;
  912. }
  913. if (!i8042_nokbd) {
  914. error = i8042_setup_kbd();
  915. if (error)
  916. goto out_fail;
  917. }
  918. /*
  919. * Ok, everything is ready, let's register all serio ports
  920. */
  921. i8042_register_ports();
  922. return 0;
  923. out_fail:
  924. i8042_free_aux_ports(); /* in case KBD failed but AUX not */
  925. i8042_free_irqs();
  926. i8042_controller_reset();
  927. return error;
  928. }
  929. static int __devexit i8042_remove(struct platform_device *dev)
  930. {
  931. i8042_unregister_ports();
  932. i8042_free_irqs();
  933. i8042_controller_reset();
  934. return 0;
  935. }
  936. static struct platform_driver i8042_driver = {
  937. .driver = {
  938. .name = "i8042",
  939. .owner = THIS_MODULE,
  940. },
  941. .probe = i8042_probe,
  942. .remove = __devexit_p(i8042_remove),
  943. .shutdown = i8042_shutdown,
  944. #ifdef CONFIG_PM
  945. .suspend = i8042_suspend,
  946. .resume = i8042_resume,
  947. #endif
  948. };
  949. static int __init i8042_init(void)
  950. {
  951. int err;
  952. dbg_init();
  953. err = i8042_platform_init();
  954. if (err)
  955. return err;
  956. err = i8042_controller_check();
  957. if (err)
  958. goto err_platform_exit;
  959. err = platform_driver_register(&i8042_driver);
  960. if (err)
  961. goto err_platform_exit;
  962. i8042_platform_device = platform_device_alloc("i8042", -1);
  963. if (!i8042_platform_device) {
  964. err = -ENOMEM;
  965. goto err_unregister_driver;
  966. }
  967. err = platform_device_add(i8042_platform_device);
  968. if (err)
  969. goto err_free_device;
  970. panic_blink = i8042_panic_blink;
  971. return 0;
  972. err_free_device:
  973. platform_device_put(i8042_platform_device);
  974. err_unregister_driver:
  975. platform_driver_unregister(&i8042_driver);
  976. err_platform_exit:
  977. i8042_platform_exit();
  978. return err;
  979. }
  980. static void __exit i8042_exit(void)
  981. {
  982. platform_device_unregister(i8042_platform_device);
  983. platform_driver_unregister(&i8042_driver);
  984. i8042_platform_exit();
  985. panic_blink = NULL;
  986. }
  987. module_init(i8042_init);
  988. module_exit(i8042_exit);