mthca_main.c 38 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. *
  34. * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
  35. */
  36. #include <linux/module.h>
  37. #include <linux/init.h>
  38. #include <linux/errno.h>
  39. #include <linux/pci.h>
  40. #include <linux/interrupt.h>
  41. #include "mthca_dev.h"
  42. #include "mthca_config_reg.h"
  43. #include "mthca_cmd.h"
  44. #include "mthca_profile.h"
  45. #include "mthca_memfree.h"
  46. MODULE_AUTHOR("Roland Dreier");
  47. MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
  48. MODULE_LICENSE("Dual BSD/GPL");
  49. MODULE_VERSION(DRV_VERSION);
  50. #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
  51. int mthca_debug_level = 0;
  52. module_param_named(debug_level, mthca_debug_level, int, 0644);
  53. MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  54. #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
  55. #ifdef CONFIG_PCI_MSI
  56. static int msi_x = 1;
  57. module_param(msi_x, int, 0444);
  58. MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  59. static int msi = 0;
  60. module_param(msi, int, 0444);
  61. MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero (deprecated, use MSI-X instead)");
  62. #else /* CONFIG_PCI_MSI */
  63. #define msi_x (0)
  64. #define msi (0)
  65. #endif /* CONFIG_PCI_MSI */
  66. static int tune_pci = 0;
  67. module_param(tune_pci, int, 0444);
  68. MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero");
  69. DEFINE_MUTEX(mthca_device_mutex);
  70. #define MTHCA_DEFAULT_NUM_QP (1 << 16)
  71. #define MTHCA_DEFAULT_RDB_PER_QP (1 << 2)
  72. #define MTHCA_DEFAULT_NUM_CQ (1 << 16)
  73. #define MTHCA_DEFAULT_NUM_MCG (1 << 13)
  74. #define MTHCA_DEFAULT_NUM_MPT (1 << 17)
  75. #define MTHCA_DEFAULT_NUM_MTT (1 << 20)
  76. #define MTHCA_DEFAULT_NUM_UDAV (1 << 15)
  77. #define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18)
  78. #define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18)
  79. static struct mthca_profile hca_profile = {
  80. .num_qp = MTHCA_DEFAULT_NUM_QP,
  81. .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP,
  82. .num_cq = MTHCA_DEFAULT_NUM_CQ,
  83. .num_mcg = MTHCA_DEFAULT_NUM_MCG,
  84. .num_mpt = MTHCA_DEFAULT_NUM_MPT,
  85. .num_mtt = MTHCA_DEFAULT_NUM_MTT,
  86. .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */
  87. .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */
  88. .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */
  89. };
  90. module_param_named(num_qp, hca_profile.num_qp, int, 0444);
  91. MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA");
  92. module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444);
  93. MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP");
  94. module_param_named(num_cq, hca_profile.num_cq, int, 0444);
  95. MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA");
  96. module_param_named(num_mcg, hca_profile.num_mcg, int, 0444);
  97. MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA");
  98. module_param_named(num_mpt, hca_profile.num_mpt, int, 0444);
  99. MODULE_PARM_DESC(num_mpt,
  100. "maximum number of memory protection table entries per HCA");
  101. module_param_named(num_mtt, hca_profile.num_mtt, int, 0444);
  102. MODULE_PARM_DESC(num_mtt,
  103. "maximum number of memory translation table segments per HCA");
  104. module_param_named(num_udav, hca_profile.num_udav, int, 0444);
  105. MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA");
  106. module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444);
  107. MODULE_PARM_DESC(fmr_reserved_mtts,
  108. "number of memory translation table segments reserved for FMR");
  109. static const char mthca_version[] __devinitdata =
  110. DRV_NAME ": Mellanox InfiniBand HCA driver v"
  111. DRV_VERSION " (" DRV_RELDATE ")\n";
  112. static int mthca_tune_pci(struct mthca_dev *mdev)
  113. {
  114. if (!tune_pci)
  115. return 0;
  116. /* First try to max out Read Byte Count */
  117. if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) {
  118. if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) {
  119. mthca_err(mdev, "Couldn't set PCI-X max read count, "
  120. "aborting.\n");
  121. return -ENODEV;
  122. }
  123. } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
  124. mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
  125. if (pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP)) {
  126. if (pcie_set_readrq(mdev->pdev, 4096)) {
  127. mthca_err(mdev, "Couldn't write PCI Express read request, "
  128. "aborting.\n");
  129. return -ENODEV;
  130. }
  131. } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
  132. mthca_info(mdev, "No PCI Express capability, "
  133. "not setting Max Read Request Size.\n");
  134. return 0;
  135. }
  136. static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
  137. {
  138. int err;
  139. u8 status;
  140. err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
  141. if (err) {
  142. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  143. return err;
  144. }
  145. if (status) {
  146. mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
  147. "aborting.\n", status);
  148. return -EINVAL;
  149. }
  150. if (dev_lim->min_page_sz > PAGE_SIZE) {
  151. mthca_err(mdev, "HCA minimum page size of %d bigger than "
  152. "kernel PAGE_SIZE of %ld, aborting.\n",
  153. dev_lim->min_page_sz, PAGE_SIZE);
  154. return -ENODEV;
  155. }
  156. if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
  157. mthca_err(mdev, "HCA has %d ports, but we only support %d, "
  158. "aborting.\n",
  159. dev_lim->num_ports, MTHCA_MAX_PORTS);
  160. return -ENODEV;
  161. }
  162. if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) {
  163. mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than "
  164. "PCI resource 2 size of 0x%llx, aborting.\n",
  165. dev_lim->uar_size,
  166. (unsigned long long)pci_resource_len(mdev->pdev, 2));
  167. return -ENODEV;
  168. }
  169. mdev->limits.num_ports = dev_lim->num_ports;
  170. mdev->limits.vl_cap = dev_lim->max_vl;
  171. mdev->limits.mtu_cap = dev_lim->max_mtu;
  172. mdev->limits.gid_table_len = dev_lim->max_gids;
  173. mdev->limits.pkey_table_len = dev_lim->max_pkeys;
  174. mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
  175. mdev->limits.max_sg = dev_lim->max_sg;
  176. mdev->limits.max_wqes = dev_lim->max_qp_sz;
  177. mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp;
  178. mdev->limits.reserved_qps = dev_lim->reserved_qps;
  179. mdev->limits.max_srq_wqes = dev_lim->max_srq_sz;
  180. mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
  181. mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
  182. mdev->limits.max_desc_sz = dev_lim->max_desc_sz;
  183. mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev);
  184. /*
  185. * Subtract 1 from the limit because we need to allocate a
  186. * spare CQE so the HCA HW can tell the difference between an
  187. * empty CQ and a full CQ.
  188. */
  189. mdev->limits.max_cqes = dev_lim->max_cq_sz - 1;
  190. mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
  191. mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
  192. mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
  193. mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
  194. mdev->limits.reserved_uars = dev_lim->reserved_uars;
  195. mdev->limits.reserved_pds = dev_lim->reserved_pds;
  196. mdev->limits.port_width_cap = dev_lim->max_port_width;
  197. mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1);
  198. mdev->limits.flags = dev_lim->flags;
  199. /*
  200. * For old FW that doesn't return static rate support, use a
  201. * value of 0x3 (only static rate values of 0 or 1 are handled),
  202. * except on Sinai, where even old FW can handle static rate
  203. * values of 2 and 3.
  204. */
  205. if (dev_lim->stat_rate_support)
  206. mdev->limits.stat_rate_support = dev_lim->stat_rate_support;
  207. else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  208. mdev->limits.stat_rate_support = 0xf;
  209. else
  210. mdev->limits.stat_rate_support = 0x3;
  211. /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
  212. May be doable since hardware supports it for SRQ.
  213. IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
  214. IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
  215. supported by driver. */
  216. mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  217. IB_DEVICE_PORT_ACTIVE_EVENT |
  218. IB_DEVICE_SYS_IMAGE_GUID |
  219. IB_DEVICE_RC_RNR_NAK_GEN;
  220. if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
  221. mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  222. if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
  223. mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  224. if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
  225. mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
  226. if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
  227. mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  228. if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
  229. mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
  230. if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
  231. mdev->mthca_flags |= MTHCA_FLAG_SRQ;
  232. return 0;
  233. }
  234. static int mthca_init_tavor(struct mthca_dev *mdev)
  235. {
  236. u8 status;
  237. int err;
  238. struct mthca_dev_lim dev_lim;
  239. struct mthca_profile profile;
  240. struct mthca_init_hca_param init_hca;
  241. err = mthca_SYS_EN(mdev, &status);
  242. if (err) {
  243. mthca_err(mdev, "SYS_EN command failed, aborting.\n");
  244. return err;
  245. }
  246. if (status) {
  247. mthca_err(mdev, "SYS_EN returned status 0x%02x, "
  248. "aborting.\n", status);
  249. return -EINVAL;
  250. }
  251. err = mthca_QUERY_FW(mdev, &status);
  252. if (err) {
  253. mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
  254. goto err_disable;
  255. }
  256. if (status) {
  257. mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
  258. "aborting.\n", status);
  259. err = -EINVAL;
  260. goto err_disable;
  261. }
  262. err = mthca_QUERY_DDR(mdev, &status);
  263. if (err) {
  264. mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
  265. goto err_disable;
  266. }
  267. if (status) {
  268. mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
  269. "aborting.\n", status);
  270. err = -EINVAL;
  271. goto err_disable;
  272. }
  273. err = mthca_dev_lim(mdev, &dev_lim);
  274. if (err) {
  275. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  276. goto err_disable;
  277. }
  278. profile = hca_profile;
  279. profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
  280. profile.uarc_size = 0;
  281. if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
  282. profile.num_srq = dev_lim.max_srqs;
  283. err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
  284. if (err < 0)
  285. goto err_disable;
  286. err = mthca_INIT_HCA(mdev, &init_hca, &status);
  287. if (err) {
  288. mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
  289. goto err_disable;
  290. }
  291. if (status) {
  292. mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
  293. "aborting.\n", status);
  294. err = -EINVAL;
  295. goto err_disable;
  296. }
  297. return 0;
  298. err_disable:
  299. mthca_SYS_DIS(mdev, &status);
  300. return err;
  301. }
  302. static int mthca_load_fw(struct mthca_dev *mdev)
  303. {
  304. u8 status;
  305. int err;
  306. /* FIXME: use HCA-attached memory for FW if present */
  307. mdev->fw.arbel.fw_icm =
  308. mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
  309. GFP_HIGHUSER | __GFP_NOWARN, 0);
  310. if (!mdev->fw.arbel.fw_icm) {
  311. mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
  312. return -ENOMEM;
  313. }
  314. err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
  315. if (err) {
  316. mthca_err(mdev, "MAP_FA command failed, aborting.\n");
  317. goto err_free;
  318. }
  319. if (status) {
  320. mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
  321. err = -EINVAL;
  322. goto err_free;
  323. }
  324. err = mthca_RUN_FW(mdev, &status);
  325. if (err) {
  326. mthca_err(mdev, "RUN_FW command failed, aborting.\n");
  327. goto err_unmap_fa;
  328. }
  329. if (status) {
  330. mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
  331. err = -EINVAL;
  332. goto err_unmap_fa;
  333. }
  334. return 0;
  335. err_unmap_fa:
  336. mthca_UNMAP_FA(mdev, &status);
  337. err_free:
  338. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
  339. return err;
  340. }
  341. static int mthca_init_icm(struct mthca_dev *mdev,
  342. struct mthca_dev_lim *dev_lim,
  343. struct mthca_init_hca_param *init_hca,
  344. u64 icm_size)
  345. {
  346. u64 aux_pages;
  347. u8 status;
  348. int err;
  349. err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
  350. if (err) {
  351. mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
  352. return err;
  353. }
  354. if (status) {
  355. mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
  356. "aborting.\n", status);
  357. return -EINVAL;
  358. }
  359. mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
  360. (unsigned long long) icm_size >> 10,
  361. (unsigned long long) aux_pages << 2);
  362. mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
  363. GFP_HIGHUSER | __GFP_NOWARN, 0);
  364. if (!mdev->fw.arbel.aux_icm) {
  365. mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
  366. return -ENOMEM;
  367. }
  368. err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
  369. if (err) {
  370. mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
  371. goto err_free_aux;
  372. }
  373. if (status) {
  374. mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
  375. err = -EINVAL;
  376. goto err_free_aux;
  377. }
  378. err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
  379. if (err) {
  380. mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
  381. goto err_unmap_aux;
  382. }
  383. /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */
  384. mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE,
  385. dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE;
  386. mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
  387. MTHCA_MTT_SEG_SIZE,
  388. mdev->limits.num_mtt_segs,
  389. mdev->limits.reserved_mtts,
  390. 1, 0);
  391. if (!mdev->mr_table.mtt_table) {
  392. mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
  393. err = -ENOMEM;
  394. goto err_unmap_eq;
  395. }
  396. mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
  397. dev_lim->mpt_entry_sz,
  398. mdev->limits.num_mpts,
  399. mdev->limits.reserved_mrws,
  400. 1, 1);
  401. if (!mdev->mr_table.mpt_table) {
  402. mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
  403. err = -ENOMEM;
  404. goto err_unmap_mtt;
  405. }
  406. mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
  407. dev_lim->qpc_entry_sz,
  408. mdev->limits.num_qps,
  409. mdev->limits.reserved_qps,
  410. 0, 0);
  411. if (!mdev->qp_table.qp_table) {
  412. mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
  413. err = -ENOMEM;
  414. goto err_unmap_mpt;
  415. }
  416. mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
  417. dev_lim->eqpc_entry_sz,
  418. mdev->limits.num_qps,
  419. mdev->limits.reserved_qps,
  420. 0, 0);
  421. if (!mdev->qp_table.eqp_table) {
  422. mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
  423. err = -ENOMEM;
  424. goto err_unmap_qp;
  425. }
  426. mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
  427. MTHCA_RDB_ENTRY_SIZE,
  428. mdev->limits.num_qps <<
  429. mdev->qp_table.rdb_shift, 0,
  430. 0, 0);
  431. if (!mdev->qp_table.rdb_table) {
  432. mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
  433. err = -ENOMEM;
  434. goto err_unmap_eqp;
  435. }
  436. mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
  437. dev_lim->cqc_entry_sz,
  438. mdev->limits.num_cqs,
  439. mdev->limits.reserved_cqs,
  440. 0, 0);
  441. if (!mdev->cq_table.table) {
  442. mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
  443. err = -ENOMEM;
  444. goto err_unmap_rdb;
  445. }
  446. if (mdev->mthca_flags & MTHCA_FLAG_SRQ) {
  447. mdev->srq_table.table =
  448. mthca_alloc_icm_table(mdev, init_hca->srqc_base,
  449. dev_lim->srq_entry_sz,
  450. mdev->limits.num_srqs,
  451. mdev->limits.reserved_srqs,
  452. 0, 0);
  453. if (!mdev->srq_table.table) {
  454. mthca_err(mdev, "Failed to map SRQ context memory, "
  455. "aborting.\n");
  456. err = -ENOMEM;
  457. goto err_unmap_cq;
  458. }
  459. }
  460. /*
  461. * It's not strictly required, but for simplicity just map the
  462. * whole multicast group table now. The table isn't very big
  463. * and it's a lot easier than trying to track ref counts.
  464. */
  465. mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
  466. MTHCA_MGM_ENTRY_SIZE,
  467. mdev->limits.num_mgms +
  468. mdev->limits.num_amgms,
  469. mdev->limits.num_mgms +
  470. mdev->limits.num_amgms,
  471. 0, 0);
  472. if (!mdev->mcg_table.table) {
  473. mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
  474. err = -ENOMEM;
  475. goto err_unmap_srq;
  476. }
  477. return 0;
  478. err_unmap_srq:
  479. if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
  480. mthca_free_icm_table(mdev, mdev->srq_table.table);
  481. err_unmap_cq:
  482. mthca_free_icm_table(mdev, mdev->cq_table.table);
  483. err_unmap_rdb:
  484. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  485. err_unmap_eqp:
  486. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  487. err_unmap_qp:
  488. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  489. err_unmap_mpt:
  490. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  491. err_unmap_mtt:
  492. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  493. err_unmap_eq:
  494. mthca_unmap_eq_icm(mdev);
  495. err_unmap_aux:
  496. mthca_UNMAP_ICM_AUX(mdev, &status);
  497. err_free_aux:
  498. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
  499. return err;
  500. }
  501. static void mthca_free_icms(struct mthca_dev *mdev)
  502. {
  503. u8 status;
  504. mthca_free_icm_table(mdev, mdev->mcg_table.table);
  505. if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
  506. mthca_free_icm_table(mdev, mdev->srq_table.table);
  507. mthca_free_icm_table(mdev, mdev->cq_table.table);
  508. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  509. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  510. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  511. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  512. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  513. mthca_unmap_eq_icm(mdev);
  514. mthca_UNMAP_ICM_AUX(mdev, &status);
  515. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
  516. }
  517. static int mthca_init_arbel(struct mthca_dev *mdev)
  518. {
  519. struct mthca_dev_lim dev_lim;
  520. struct mthca_profile profile;
  521. struct mthca_init_hca_param init_hca;
  522. u64 icm_size;
  523. u8 status;
  524. int err;
  525. err = mthca_QUERY_FW(mdev, &status);
  526. if (err) {
  527. mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
  528. return err;
  529. }
  530. if (status) {
  531. mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
  532. "aborting.\n", status);
  533. return -EINVAL;
  534. }
  535. err = mthca_ENABLE_LAM(mdev, &status);
  536. if (err) {
  537. mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
  538. return err;
  539. }
  540. if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
  541. mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
  542. mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
  543. } else if (status) {
  544. mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
  545. "aborting.\n", status);
  546. return -EINVAL;
  547. }
  548. err = mthca_load_fw(mdev);
  549. if (err) {
  550. mthca_err(mdev, "Failed to start FW, aborting.\n");
  551. goto err_disable;
  552. }
  553. err = mthca_dev_lim(mdev, &dev_lim);
  554. if (err) {
  555. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  556. goto err_stop_fw;
  557. }
  558. profile = hca_profile;
  559. profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
  560. profile.num_udav = 0;
  561. if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
  562. profile.num_srq = dev_lim.max_srqs;
  563. icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
  564. if ((int) icm_size < 0) {
  565. err = icm_size;
  566. goto err_stop_fw;
  567. }
  568. err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
  569. if (err)
  570. goto err_stop_fw;
  571. err = mthca_INIT_HCA(mdev, &init_hca, &status);
  572. if (err) {
  573. mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
  574. goto err_free_icm;
  575. }
  576. if (status) {
  577. mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
  578. "aborting.\n", status);
  579. err = -EINVAL;
  580. goto err_free_icm;
  581. }
  582. return 0;
  583. err_free_icm:
  584. mthca_free_icms(mdev);
  585. err_stop_fw:
  586. mthca_UNMAP_FA(mdev, &status);
  587. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
  588. err_disable:
  589. if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
  590. mthca_DISABLE_LAM(mdev, &status);
  591. return err;
  592. }
  593. static void mthca_close_hca(struct mthca_dev *mdev)
  594. {
  595. u8 status;
  596. mthca_CLOSE_HCA(mdev, 0, &status);
  597. if (mthca_is_memfree(mdev)) {
  598. mthca_free_icms(mdev);
  599. mthca_UNMAP_FA(mdev, &status);
  600. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
  601. if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
  602. mthca_DISABLE_LAM(mdev, &status);
  603. } else
  604. mthca_SYS_DIS(mdev, &status);
  605. }
  606. static int mthca_init_hca(struct mthca_dev *mdev)
  607. {
  608. u8 status;
  609. int err;
  610. struct mthca_adapter adapter;
  611. if (mthca_is_memfree(mdev))
  612. err = mthca_init_arbel(mdev);
  613. else
  614. err = mthca_init_tavor(mdev);
  615. if (err)
  616. return err;
  617. err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
  618. if (err) {
  619. mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
  620. goto err_close;
  621. }
  622. if (status) {
  623. mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
  624. "aborting.\n", status);
  625. err = -EINVAL;
  626. goto err_close;
  627. }
  628. mdev->eq_table.inta_pin = adapter.inta_pin;
  629. mdev->rev_id = adapter.revision_id;
  630. memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id);
  631. return 0;
  632. err_close:
  633. mthca_close_hca(mdev);
  634. return err;
  635. }
  636. static int mthca_setup_hca(struct mthca_dev *dev)
  637. {
  638. int err;
  639. u8 status;
  640. MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
  641. err = mthca_init_uar_table(dev);
  642. if (err) {
  643. mthca_err(dev, "Failed to initialize "
  644. "user access region table, aborting.\n");
  645. return err;
  646. }
  647. err = mthca_uar_alloc(dev, &dev->driver_uar);
  648. if (err) {
  649. mthca_err(dev, "Failed to allocate driver access region, "
  650. "aborting.\n");
  651. goto err_uar_table_free;
  652. }
  653. dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
  654. if (!dev->kar) {
  655. mthca_err(dev, "Couldn't map kernel access region, "
  656. "aborting.\n");
  657. err = -ENOMEM;
  658. goto err_uar_free;
  659. }
  660. err = mthca_init_pd_table(dev);
  661. if (err) {
  662. mthca_err(dev, "Failed to initialize "
  663. "protection domain table, aborting.\n");
  664. goto err_kar_unmap;
  665. }
  666. err = mthca_init_mr_table(dev);
  667. if (err) {
  668. mthca_err(dev, "Failed to initialize "
  669. "memory region table, aborting.\n");
  670. goto err_pd_table_free;
  671. }
  672. err = mthca_pd_alloc(dev, 1, &dev->driver_pd);
  673. if (err) {
  674. mthca_err(dev, "Failed to create driver PD, "
  675. "aborting.\n");
  676. goto err_mr_table_free;
  677. }
  678. err = mthca_init_eq_table(dev);
  679. if (err) {
  680. mthca_err(dev, "Failed to initialize "
  681. "event queue table, aborting.\n");
  682. goto err_pd_free;
  683. }
  684. err = mthca_cmd_use_events(dev);
  685. if (err) {
  686. mthca_err(dev, "Failed to switch to event-driven "
  687. "firmware commands, aborting.\n");
  688. goto err_eq_table_free;
  689. }
  690. err = mthca_NOP(dev, &status);
  691. if (err || status) {
  692. if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X)) {
  693. mthca_warn(dev, "NOP command failed to generate interrupt "
  694. "(IRQ %d).\n",
  695. dev->mthca_flags & MTHCA_FLAG_MSI_X ?
  696. dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector :
  697. dev->pdev->irq);
  698. mthca_warn(dev, "Trying again with MSI/MSI-X disabled.\n");
  699. } else {
  700. mthca_err(dev, "NOP command failed to generate interrupt "
  701. "(IRQ %d), aborting.\n",
  702. dev->pdev->irq);
  703. mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
  704. }
  705. goto err_cmd_poll;
  706. }
  707. mthca_dbg(dev, "NOP command IRQ test passed\n");
  708. err = mthca_init_cq_table(dev);
  709. if (err) {
  710. mthca_err(dev, "Failed to initialize "
  711. "completion queue table, aborting.\n");
  712. goto err_cmd_poll;
  713. }
  714. err = mthca_init_srq_table(dev);
  715. if (err) {
  716. mthca_err(dev, "Failed to initialize "
  717. "shared receive queue table, aborting.\n");
  718. goto err_cq_table_free;
  719. }
  720. err = mthca_init_qp_table(dev);
  721. if (err) {
  722. mthca_err(dev, "Failed to initialize "
  723. "queue pair table, aborting.\n");
  724. goto err_srq_table_free;
  725. }
  726. err = mthca_init_av_table(dev);
  727. if (err) {
  728. mthca_err(dev, "Failed to initialize "
  729. "address vector table, aborting.\n");
  730. goto err_qp_table_free;
  731. }
  732. err = mthca_init_mcg_table(dev);
  733. if (err) {
  734. mthca_err(dev, "Failed to initialize "
  735. "multicast group table, aborting.\n");
  736. goto err_av_table_free;
  737. }
  738. return 0;
  739. err_av_table_free:
  740. mthca_cleanup_av_table(dev);
  741. err_qp_table_free:
  742. mthca_cleanup_qp_table(dev);
  743. err_srq_table_free:
  744. mthca_cleanup_srq_table(dev);
  745. err_cq_table_free:
  746. mthca_cleanup_cq_table(dev);
  747. err_cmd_poll:
  748. mthca_cmd_use_polling(dev);
  749. err_eq_table_free:
  750. mthca_cleanup_eq_table(dev);
  751. err_pd_free:
  752. mthca_pd_free(dev, &dev->driver_pd);
  753. err_mr_table_free:
  754. mthca_cleanup_mr_table(dev);
  755. err_pd_table_free:
  756. mthca_cleanup_pd_table(dev);
  757. err_kar_unmap:
  758. iounmap(dev->kar);
  759. err_uar_free:
  760. mthca_uar_free(dev, &dev->driver_uar);
  761. err_uar_table_free:
  762. mthca_cleanup_uar_table(dev);
  763. return err;
  764. }
  765. static int mthca_request_regions(struct pci_dev *pdev, int ddr_hidden)
  766. {
  767. int err;
  768. /*
  769. * We can't just use pci_request_regions() because the MSI-X
  770. * table is right in the middle of the first BAR. If we did
  771. * pci_request_region and grab all of the first BAR, then
  772. * setting up MSI-X would fail, since the PCI core wants to do
  773. * request_mem_region on the MSI-X vector table.
  774. *
  775. * So just request what we need right now, and request any
  776. * other regions we need when setting up EQs.
  777. */
  778. if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  779. MTHCA_HCR_SIZE, DRV_NAME))
  780. return -EBUSY;
  781. err = pci_request_region(pdev, 2, DRV_NAME);
  782. if (err)
  783. goto err_bar2_failed;
  784. if (!ddr_hidden) {
  785. err = pci_request_region(pdev, 4, DRV_NAME);
  786. if (err)
  787. goto err_bar4_failed;
  788. }
  789. return 0;
  790. err_bar4_failed:
  791. pci_release_region(pdev, 2);
  792. err_bar2_failed:
  793. release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  794. MTHCA_HCR_SIZE);
  795. return err;
  796. }
  797. static void mthca_release_regions(struct pci_dev *pdev,
  798. int ddr_hidden)
  799. {
  800. if (!ddr_hidden)
  801. pci_release_region(pdev, 4);
  802. pci_release_region(pdev, 2);
  803. release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  804. MTHCA_HCR_SIZE);
  805. }
  806. static int mthca_enable_msi_x(struct mthca_dev *mdev)
  807. {
  808. struct msix_entry entries[3];
  809. int err;
  810. entries[0].entry = 0;
  811. entries[1].entry = 1;
  812. entries[2].entry = 2;
  813. err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
  814. if (err) {
  815. if (err > 0)
  816. mthca_info(mdev, "Only %d MSI-X vectors available, "
  817. "not using MSI-X\n", err);
  818. return err;
  819. }
  820. mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
  821. mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
  822. mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
  823. return 0;
  824. }
  825. /* Types of supported HCA */
  826. enum {
  827. TAVOR, /* MT23108 */
  828. ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
  829. ARBEL_NATIVE, /* MT25208 with extended features */
  830. SINAI /* MT25204 */
  831. };
  832. #define MTHCA_FW_VER(major, minor, subminor) \
  833. (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
  834. static struct {
  835. u64 latest_fw;
  836. u32 flags;
  837. } mthca_hca_table[] = {
  838. [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0),
  839. .flags = 0 },
  840. [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200),
  841. .flags = MTHCA_FLAG_PCIE },
  842. [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 2, 0),
  843. .flags = MTHCA_FLAG_MEMFREE |
  844. MTHCA_FLAG_PCIE },
  845. [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0),
  846. .flags = MTHCA_FLAG_MEMFREE |
  847. MTHCA_FLAG_PCIE |
  848. MTHCA_FLAG_SINAI_OPT }
  849. };
  850. static int __mthca_init_one(struct pci_dev *pdev, int hca_type)
  851. {
  852. int ddr_hidden = 0;
  853. int err;
  854. struct mthca_dev *mdev;
  855. printk(KERN_INFO PFX "Initializing %s\n",
  856. pci_name(pdev));
  857. err = pci_enable_device(pdev);
  858. if (err) {
  859. dev_err(&pdev->dev, "Cannot enable PCI device, "
  860. "aborting.\n");
  861. return err;
  862. }
  863. /*
  864. * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
  865. * be present)
  866. */
  867. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
  868. pci_resource_len(pdev, 0) != 1 << 20) {
  869. dev_err(&pdev->dev, "Missing DCS, aborting.\n");
  870. err = -ENODEV;
  871. goto err_disable_pdev;
  872. }
  873. if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
  874. dev_err(&pdev->dev, "Missing UAR, aborting.\n");
  875. err = -ENODEV;
  876. goto err_disable_pdev;
  877. }
  878. if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
  879. ddr_hidden = 1;
  880. err = mthca_request_regions(pdev, ddr_hidden);
  881. if (err) {
  882. dev_err(&pdev->dev, "Cannot obtain PCI resources, "
  883. "aborting.\n");
  884. goto err_disable_pdev;
  885. }
  886. pci_set_master(pdev);
  887. err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  888. if (err) {
  889. dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
  890. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  891. if (err) {
  892. dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
  893. goto err_free_res;
  894. }
  895. }
  896. err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
  897. if (err) {
  898. dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
  899. "consistent PCI DMA mask.\n");
  900. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  901. if (err) {
  902. dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
  903. "aborting.\n");
  904. goto err_free_res;
  905. }
  906. }
  907. mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
  908. if (!mdev) {
  909. dev_err(&pdev->dev, "Device struct alloc failed, "
  910. "aborting.\n");
  911. err = -ENOMEM;
  912. goto err_free_res;
  913. }
  914. mdev->pdev = pdev;
  915. mdev->mthca_flags = mthca_hca_table[hca_type].flags;
  916. if (ddr_hidden)
  917. mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
  918. /*
  919. * Now reset the HCA before we touch the PCI capabilities or
  920. * attempt a firmware command, since a boot ROM may have left
  921. * the HCA in an undefined state.
  922. */
  923. err = mthca_reset(mdev);
  924. if (err) {
  925. mthca_err(mdev, "Failed to reset HCA, aborting.\n");
  926. goto err_free_dev;
  927. }
  928. if (mthca_cmd_init(mdev)) {
  929. mthca_err(mdev, "Failed to init command interface, aborting.\n");
  930. goto err_free_dev;
  931. }
  932. err = mthca_tune_pci(mdev);
  933. if (err)
  934. goto err_cmd;
  935. err = mthca_init_hca(mdev);
  936. if (err)
  937. goto err_cmd;
  938. if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) {
  939. mthca_warn(mdev, "HCA FW version %d.%d.%03d is old (%d.%d.%03d is current).\n",
  940. (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
  941. (int) (mdev->fw_ver & 0xffff),
  942. (int) (mthca_hca_table[hca_type].latest_fw >> 32),
  943. (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff,
  944. (int) (mthca_hca_table[hca_type].latest_fw & 0xffff));
  945. mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
  946. }
  947. if (msi_x && !mthca_enable_msi_x(mdev))
  948. mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
  949. else if (msi) {
  950. static int warned;
  951. if (!warned) {
  952. printk(KERN_WARNING PFX "WARNING: MSI support will be "
  953. "removed from the ib_mthca driver in January 2008.\n");
  954. printk(KERN_WARNING " If you are using MSI and cannot "
  955. "switch to MSI-X, please tell "
  956. "<general@lists.openfabrics.org>.\n");
  957. ++warned;
  958. }
  959. if (!pci_enable_msi(pdev))
  960. mdev->mthca_flags |= MTHCA_FLAG_MSI;
  961. }
  962. err = mthca_setup_hca(mdev);
  963. if (err == -EBUSY && (mdev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))) {
  964. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  965. pci_disable_msix(pdev);
  966. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  967. pci_disable_msi(pdev);
  968. mdev->mthca_flags &= ~(MTHCA_FLAG_MSI_X | MTHCA_FLAG_MSI);
  969. err = mthca_setup_hca(mdev);
  970. }
  971. if (err)
  972. goto err_close;
  973. err = mthca_register_device(mdev);
  974. if (err)
  975. goto err_cleanup;
  976. err = mthca_create_agents(mdev);
  977. if (err)
  978. goto err_unregister;
  979. pci_set_drvdata(pdev, mdev);
  980. mdev->hca_type = hca_type;
  981. return 0;
  982. err_unregister:
  983. mthca_unregister_device(mdev);
  984. err_cleanup:
  985. mthca_cleanup_mcg_table(mdev);
  986. mthca_cleanup_av_table(mdev);
  987. mthca_cleanup_qp_table(mdev);
  988. mthca_cleanup_srq_table(mdev);
  989. mthca_cleanup_cq_table(mdev);
  990. mthca_cmd_use_polling(mdev);
  991. mthca_cleanup_eq_table(mdev);
  992. mthca_pd_free(mdev, &mdev->driver_pd);
  993. mthca_cleanup_mr_table(mdev);
  994. mthca_cleanup_pd_table(mdev);
  995. mthca_cleanup_uar_table(mdev);
  996. err_close:
  997. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  998. pci_disable_msix(pdev);
  999. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  1000. pci_disable_msi(pdev);
  1001. mthca_close_hca(mdev);
  1002. err_cmd:
  1003. mthca_cmd_cleanup(mdev);
  1004. err_free_dev:
  1005. ib_dealloc_device(&mdev->ib_dev);
  1006. err_free_res:
  1007. mthca_release_regions(pdev, ddr_hidden);
  1008. err_disable_pdev:
  1009. pci_disable_device(pdev);
  1010. pci_set_drvdata(pdev, NULL);
  1011. return err;
  1012. }
  1013. static void __mthca_remove_one(struct pci_dev *pdev)
  1014. {
  1015. struct mthca_dev *mdev = pci_get_drvdata(pdev);
  1016. u8 status;
  1017. int p;
  1018. if (mdev) {
  1019. mthca_free_agents(mdev);
  1020. mthca_unregister_device(mdev);
  1021. for (p = 1; p <= mdev->limits.num_ports; ++p)
  1022. mthca_CLOSE_IB(mdev, p, &status);
  1023. mthca_cleanup_mcg_table(mdev);
  1024. mthca_cleanup_av_table(mdev);
  1025. mthca_cleanup_qp_table(mdev);
  1026. mthca_cleanup_srq_table(mdev);
  1027. mthca_cleanup_cq_table(mdev);
  1028. mthca_cmd_use_polling(mdev);
  1029. mthca_cleanup_eq_table(mdev);
  1030. mthca_pd_free(mdev, &mdev->driver_pd);
  1031. mthca_cleanup_mr_table(mdev);
  1032. mthca_cleanup_pd_table(mdev);
  1033. iounmap(mdev->kar);
  1034. mthca_uar_free(mdev, &mdev->driver_uar);
  1035. mthca_cleanup_uar_table(mdev);
  1036. mthca_close_hca(mdev);
  1037. mthca_cmd_cleanup(mdev);
  1038. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  1039. pci_disable_msix(pdev);
  1040. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  1041. pci_disable_msi(pdev);
  1042. ib_dealloc_device(&mdev->ib_dev);
  1043. mthca_release_regions(pdev, mdev->mthca_flags &
  1044. MTHCA_FLAG_DDR_HIDDEN);
  1045. pci_disable_device(pdev);
  1046. pci_set_drvdata(pdev, NULL);
  1047. }
  1048. }
  1049. int __mthca_restart_one(struct pci_dev *pdev)
  1050. {
  1051. struct mthca_dev *mdev;
  1052. int hca_type;
  1053. mdev = pci_get_drvdata(pdev);
  1054. if (!mdev)
  1055. return -ENODEV;
  1056. hca_type = mdev->hca_type;
  1057. __mthca_remove_one(pdev);
  1058. return __mthca_init_one(pdev, hca_type);
  1059. }
  1060. static int __devinit mthca_init_one(struct pci_dev *pdev,
  1061. const struct pci_device_id *id)
  1062. {
  1063. static int mthca_version_printed = 0;
  1064. int ret;
  1065. mutex_lock(&mthca_device_mutex);
  1066. if (!mthca_version_printed) {
  1067. printk(KERN_INFO "%s", mthca_version);
  1068. ++mthca_version_printed;
  1069. }
  1070. if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
  1071. printk(KERN_ERR PFX "%s has invalid driver data %lx\n",
  1072. pci_name(pdev), id->driver_data);
  1073. mutex_unlock(&mthca_device_mutex);
  1074. return -ENODEV;
  1075. }
  1076. ret = __mthca_init_one(pdev, id->driver_data);
  1077. mutex_unlock(&mthca_device_mutex);
  1078. return ret;
  1079. }
  1080. static void __devexit mthca_remove_one(struct pci_dev *pdev)
  1081. {
  1082. mutex_lock(&mthca_device_mutex);
  1083. __mthca_remove_one(pdev);
  1084. mutex_unlock(&mthca_device_mutex);
  1085. }
  1086. static struct pci_device_id mthca_pci_table[] = {
  1087. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
  1088. .driver_data = TAVOR },
  1089. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
  1090. .driver_data = TAVOR },
  1091. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
  1092. .driver_data = ARBEL_COMPAT },
  1093. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
  1094. .driver_data = ARBEL_COMPAT },
  1095. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
  1096. .driver_data = ARBEL_NATIVE },
  1097. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
  1098. .driver_data = ARBEL_NATIVE },
  1099. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
  1100. .driver_data = SINAI },
  1101. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
  1102. .driver_data = SINAI },
  1103. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
  1104. .driver_data = SINAI },
  1105. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
  1106. .driver_data = SINAI },
  1107. { 0, }
  1108. };
  1109. MODULE_DEVICE_TABLE(pci, mthca_pci_table);
  1110. static struct pci_driver mthca_driver = {
  1111. .name = DRV_NAME,
  1112. .id_table = mthca_pci_table,
  1113. .probe = mthca_init_one,
  1114. .remove = __devexit_p(mthca_remove_one)
  1115. };
  1116. static void __init __mthca_check_profile_val(const char *name, int *pval,
  1117. int pval_default)
  1118. {
  1119. /* value must be positive and power of 2 */
  1120. int old_pval = *pval;
  1121. if (old_pval <= 0)
  1122. *pval = pval_default;
  1123. else
  1124. *pval = roundup_pow_of_two(old_pval);
  1125. if (old_pval != *pval) {
  1126. printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n",
  1127. old_pval, name);
  1128. printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval);
  1129. }
  1130. }
  1131. #define mthca_check_profile_val(name, default) \
  1132. __mthca_check_profile_val(#name, &hca_profile.name, default)
  1133. static void __init mthca_validate_profile(void)
  1134. {
  1135. mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP);
  1136. mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP);
  1137. mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ);
  1138. mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG);
  1139. mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT);
  1140. mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT);
  1141. mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV);
  1142. mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS);
  1143. if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) {
  1144. printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n",
  1145. hca_profile.fmr_reserved_mtts);
  1146. printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n",
  1147. hca_profile.num_mtt);
  1148. hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2;
  1149. printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n",
  1150. hca_profile.fmr_reserved_mtts);
  1151. }
  1152. }
  1153. static int __init mthca_init(void)
  1154. {
  1155. int ret;
  1156. mthca_validate_profile();
  1157. ret = mthca_catas_init();
  1158. if (ret)
  1159. return ret;
  1160. ret = pci_register_driver(&mthca_driver);
  1161. if (ret < 0) {
  1162. mthca_catas_cleanup();
  1163. return ret;
  1164. }
  1165. return 0;
  1166. }
  1167. static void __exit mthca_cleanup(void)
  1168. {
  1169. pci_unregister_driver(&mthca_driver);
  1170. mthca_catas_cleanup();
  1171. }
  1172. module_init(mthca_init);
  1173. module_exit(mthca_cleanup);