e_powersaver.c 7.8 KB

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  1. /*
  2. * Based on documentation provided by Dave Jones. Thanks!
  3. *
  4. * Licensed under the terms of the GNU GPL License version 2.
  5. *
  6. * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/init.h>
  11. #include <linux/cpufreq.h>
  12. #include <linux/ioport.h>
  13. #include <linux/slab.h>
  14. #include <asm/msr.h>
  15. #include <asm/tsc.h>
  16. #include <asm/timex.h>
  17. #include <asm/io.h>
  18. #include <asm/delay.h>
  19. #define EPS_BRAND_C7M 0
  20. #define EPS_BRAND_C7 1
  21. #define EPS_BRAND_EDEN 2
  22. #define EPS_BRAND_C3 3
  23. struct eps_cpu_data {
  24. u32 fsb;
  25. struct cpufreq_frequency_table freq_table[];
  26. };
  27. static struct eps_cpu_data *eps_cpu[NR_CPUS];
  28. static unsigned int eps_get(unsigned int cpu)
  29. {
  30. struct eps_cpu_data *centaur;
  31. u32 lo, hi;
  32. if (cpu)
  33. return 0;
  34. centaur = eps_cpu[cpu];
  35. if (centaur == NULL)
  36. return 0;
  37. /* Return current frequency */
  38. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  39. return centaur->fsb * ((lo >> 8) & 0xff);
  40. }
  41. static int eps_set_state(struct eps_cpu_data *centaur,
  42. unsigned int cpu,
  43. u32 dest_state)
  44. {
  45. struct cpufreq_freqs freqs;
  46. u32 lo, hi;
  47. int err = 0;
  48. int i;
  49. freqs.old = eps_get(cpu);
  50. freqs.new = centaur->fsb * ((dest_state >> 8) & 0xff);
  51. freqs.cpu = cpu;
  52. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  53. /* Wait while CPU is busy */
  54. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  55. i = 0;
  56. while (lo & ((1 << 16) | (1 << 17))) {
  57. udelay(16);
  58. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  59. i++;
  60. if (unlikely(i > 64)) {
  61. err = -ENODEV;
  62. goto postchange;
  63. }
  64. }
  65. /* Set new multiplier and voltage */
  66. wrmsr(MSR_IA32_PERF_CTL, dest_state & 0xffff, 0);
  67. /* Wait until transition end */
  68. i = 0;
  69. do {
  70. udelay(16);
  71. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  72. i++;
  73. if (unlikely(i > 64)) {
  74. err = -ENODEV;
  75. goto postchange;
  76. }
  77. } while (lo & ((1 << 16) | (1 << 17)));
  78. /* Return current frequency */
  79. postchange:
  80. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  81. freqs.new = centaur->fsb * ((lo >> 8) & 0xff);
  82. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  83. return err;
  84. }
  85. static int eps_target(struct cpufreq_policy *policy,
  86. unsigned int target_freq,
  87. unsigned int relation)
  88. {
  89. struct eps_cpu_data *centaur;
  90. unsigned int newstate = 0;
  91. unsigned int cpu = policy->cpu;
  92. unsigned int dest_state;
  93. int ret;
  94. if (unlikely(eps_cpu[cpu] == NULL))
  95. return -ENODEV;
  96. centaur = eps_cpu[cpu];
  97. if (unlikely(cpufreq_frequency_table_target(policy,
  98. &eps_cpu[cpu]->freq_table[0],
  99. target_freq,
  100. relation,
  101. &newstate))) {
  102. return -EINVAL;
  103. }
  104. /* Make frequency transition */
  105. dest_state = centaur->freq_table[newstate].index & 0xffff;
  106. ret = eps_set_state(centaur, cpu, dest_state);
  107. if (ret)
  108. printk(KERN_ERR "eps: Timeout!\n");
  109. return ret;
  110. }
  111. static int eps_verify(struct cpufreq_policy *policy)
  112. {
  113. return cpufreq_frequency_table_verify(policy,
  114. &eps_cpu[policy->cpu]->freq_table[0]);
  115. }
  116. static int eps_cpu_init(struct cpufreq_policy *policy)
  117. {
  118. unsigned int i;
  119. u32 lo, hi;
  120. u64 val;
  121. u8 current_multiplier, current_voltage;
  122. u8 max_multiplier, max_voltage;
  123. u8 min_multiplier, min_voltage;
  124. u8 brand;
  125. u32 fsb;
  126. struct eps_cpu_data *centaur;
  127. struct cpufreq_frequency_table *f_table;
  128. int k, step, voltage;
  129. int ret;
  130. int states;
  131. if (policy->cpu != 0)
  132. return -ENODEV;
  133. /* Check brand */
  134. printk("eps: Detected VIA ");
  135. rdmsr(0x1153, lo, hi);
  136. brand = (((lo >> 2) ^ lo) >> 18) & 3;
  137. switch(brand) {
  138. case EPS_BRAND_C7M:
  139. printk("C7-M\n");
  140. break;
  141. case EPS_BRAND_C7:
  142. printk("C7\n");
  143. break;
  144. case EPS_BRAND_EDEN:
  145. printk("Eden\n");
  146. break;
  147. case EPS_BRAND_C3:
  148. printk("C3\n");
  149. return -ENODEV;
  150. break;
  151. }
  152. /* Enable Enhanced PowerSaver */
  153. rdmsrl(MSR_IA32_MISC_ENABLE, val);
  154. if (!(val & 1 << 16)) {
  155. val |= 1 << 16;
  156. wrmsrl(MSR_IA32_MISC_ENABLE, val);
  157. /* Can be locked at 0 */
  158. rdmsrl(MSR_IA32_MISC_ENABLE, val);
  159. if (!(val & 1 << 16)) {
  160. printk("eps: Can't enable Enhanced PowerSaver\n");
  161. return -ENODEV;
  162. }
  163. }
  164. /* Print voltage and multiplier */
  165. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  166. current_voltage = lo & 0xff;
  167. printk("eps: Current voltage = %dmV\n", current_voltage * 16 + 700);
  168. current_multiplier = (lo >> 8) & 0xff;
  169. printk("eps: Current multiplier = %d\n", current_multiplier);
  170. /* Print limits */
  171. max_voltage = hi & 0xff;
  172. printk("eps: Highest voltage = %dmV\n", max_voltage * 16 + 700);
  173. max_multiplier = (hi >> 8) & 0xff;
  174. printk("eps: Highest multiplier = %d\n", max_multiplier);
  175. min_voltage = (hi >> 16) & 0xff;
  176. printk("eps: Lowest voltage = %dmV\n", min_voltage * 16 + 700);
  177. min_multiplier = (hi >> 24) & 0xff;
  178. printk("eps: Lowest multiplier = %d\n", min_multiplier);
  179. /* Sanity checks */
  180. if (current_multiplier == 0 || max_multiplier == 0
  181. || min_multiplier == 0)
  182. return -EINVAL;
  183. if (current_multiplier > max_multiplier
  184. || max_multiplier <= min_multiplier)
  185. return -EINVAL;
  186. if (current_voltage > 0x1c || max_voltage > 0x1c)
  187. return -EINVAL;
  188. if (max_voltage < min_voltage)
  189. return -EINVAL;
  190. /* Calc FSB speed */
  191. fsb = cpu_khz / current_multiplier;
  192. /* Calc number of p-states supported */
  193. if (brand == EPS_BRAND_C7M)
  194. states = max_multiplier - min_multiplier + 1;
  195. else
  196. states = 2;
  197. /* Allocate private data and frequency table for current cpu */
  198. centaur = kzalloc(sizeof(struct eps_cpu_data)
  199. + (states + 1) * sizeof(struct cpufreq_frequency_table),
  200. GFP_KERNEL);
  201. if (!centaur)
  202. return -ENOMEM;
  203. eps_cpu[0] = centaur;
  204. /* Copy basic values */
  205. centaur->fsb = fsb;
  206. /* Fill frequency and MSR value table */
  207. f_table = &centaur->freq_table[0];
  208. if (brand != EPS_BRAND_C7M) {
  209. f_table[0].frequency = fsb * min_multiplier;
  210. f_table[0].index = (min_multiplier << 8) | min_voltage;
  211. f_table[1].frequency = fsb * max_multiplier;
  212. f_table[1].index = (max_multiplier << 8) | max_voltage;
  213. f_table[2].frequency = CPUFREQ_TABLE_END;
  214. } else {
  215. k = 0;
  216. step = ((max_voltage - min_voltage) * 256)
  217. / (max_multiplier - min_multiplier);
  218. for (i = min_multiplier; i <= max_multiplier; i++) {
  219. voltage = (k * step) / 256 + min_voltage;
  220. f_table[k].frequency = fsb * i;
  221. f_table[k].index = (i << 8) | voltage;
  222. k++;
  223. }
  224. f_table[k].frequency = CPUFREQ_TABLE_END;
  225. }
  226. policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */
  227. policy->cur = fsb * current_multiplier;
  228. ret = cpufreq_frequency_table_cpuinfo(policy, &centaur->freq_table[0]);
  229. if (ret) {
  230. kfree(centaur);
  231. return ret;
  232. }
  233. cpufreq_frequency_table_get_attr(&centaur->freq_table[0], policy->cpu);
  234. return 0;
  235. }
  236. static int eps_cpu_exit(struct cpufreq_policy *policy)
  237. {
  238. unsigned int cpu = policy->cpu;
  239. struct eps_cpu_data *centaur;
  240. u32 lo, hi;
  241. if (eps_cpu[cpu] == NULL)
  242. return -ENODEV;
  243. centaur = eps_cpu[cpu];
  244. /* Get max frequency */
  245. rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
  246. /* Set max frequency */
  247. eps_set_state(centaur, cpu, hi & 0xffff);
  248. /* Bye */
  249. cpufreq_frequency_table_put_attr(policy->cpu);
  250. kfree(eps_cpu[cpu]);
  251. eps_cpu[cpu] = NULL;
  252. return 0;
  253. }
  254. static struct freq_attr* eps_attr[] = {
  255. &cpufreq_freq_attr_scaling_available_freqs,
  256. NULL,
  257. };
  258. static struct cpufreq_driver eps_driver = {
  259. .verify = eps_verify,
  260. .target = eps_target,
  261. .init = eps_cpu_init,
  262. .exit = eps_cpu_exit,
  263. .get = eps_get,
  264. .name = "e_powersaver",
  265. .owner = THIS_MODULE,
  266. .attr = eps_attr,
  267. };
  268. static int __init eps_init(void)
  269. {
  270. struct cpuinfo_x86 *c = cpu_data;
  271. /* This driver will work only on Centaur C7 processors with
  272. * Enhanced SpeedStep/PowerSaver registers */
  273. if (c->x86_vendor != X86_VENDOR_CENTAUR
  274. || c->x86 != 6 || c->x86_model != 10)
  275. return -ENODEV;
  276. if (!cpu_has(c, X86_FEATURE_EST))
  277. return -ENODEV;
  278. if (cpufreq_register_driver(&eps_driver))
  279. return -EINVAL;
  280. return 0;
  281. }
  282. static void __exit eps_exit(void)
  283. {
  284. cpufreq_unregister_driver(&eps_driver);
  285. }
  286. MODULE_AUTHOR("Rafa³ Bilski <rafalbilski@interia.pl>");
  287. MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
  288. MODULE_LICENSE("GPL");
  289. module_init(eps_init);
  290. module_exit(eps_exit);