maskreg.c 2.3 KB

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  1. /*
  2. * Interrupt handling for Simple external interrupt mask register
  3. *
  4. * Copyright (C) 2001 A&D Co., Ltd. <http://www.aandd.co.jp>
  5. *
  6. * This is for the machine which have single 16 bit register
  7. * for masking external IRQ individually.
  8. * Each bit of the register is for masking each interrupt.
  9. *
  10. * This file may be copied or modified under the terms of the GNU
  11. * General Public License. See linux/COPYING for more information.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/irq.h>
  16. #include <asm/system.h>
  17. #include <asm/io.h>
  18. /* address of external interrupt mask register */
  19. unsigned long irq_mask_register;
  20. /* forward declaration */
  21. static unsigned int startup_maskreg_irq(unsigned int irq);
  22. static void shutdown_maskreg_irq(unsigned int irq);
  23. static void enable_maskreg_irq(unsigned int irq);
  24. static void disable_maskreg_irq(unsigned int irq);
  25. static void mask_and_ack_maskreg(unsigned int);
  26. static void end_maskreg_irq(unsigned int irq);
  27. /* hw_interrupt_type */
  28. static struct hw_interrupt_type maskreg_irq_type = {
  29. .typename = "Mask Register",
  30. .startup = startup_maskreg_irq,
  31. .shutdown = shutdown_maskreg_irq,
  32. .enable = enable_maskreg_irq,
  33. .disable = disable_maskreg_irq,
  34. .ack = mask_and_ack_maskreg,
  35. .end = end_maskreg_irq
  36. };
  37. /* actual implementation */
  38. static unsigned int startup_maskreg_irq(unsigned int irq)
  39. {
  40. enable_maskreg_irq(irq);
  41. return 0; /* never anything pending */
  42. }
  43. static void shutdown_maskreg_irq(unsigned int irq)
  44. {
  45. disable_maskreg_irq(irq);
  46. }
  47. static void disable_maskreg_irq(unsigned int irq)
  48. {
  49. unsigned short val, mask = 0x01 << irq;
  50. BUG_ON(!irq_mask_register);
  51. /* Set "irq"th bit */
  52. val = ctrl_inw(irq_mask_register);
  53. val |= mask;
  54. ctrl_outw(val, irq_mask_register);
  55. }
  56. static void enable_maskreg_irq(unsigned int irq)
  57. {
  58. unsigned short val, mask = ~(0x01 << irq);
  59. BUG_ON(!irq_mask_register);
  60. /* Clear "irq"th bit */
  61. val = ctrl_inw(irq_mask_register);
  62. val &= mask;
  63. ctrl_outw(val, irq_mask_register);
  64. }
  65. static void mask_and_ack_maskreg(unsigned int irq)
  66. {
  67. disable_maskreg_irq(irq);
  68. }
  69. static void end_maskreg_irq(unsigned int irq)
  70. {
  71. if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
  72. enable_maskreg_irq(irq);
  73. }
  74. void make_maskreg_irq(unsigned int irq)
  75. {
  76. disable_irq_nosync(irq);
  77. irq_desc[irq].handler = &maskreg_irq_type;
  78. disable_maskreg_irq(irq);
  79. }