ppc85xx_rio.c 25 KB

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  1. /*
  2. * MPC85xx RapidIO support
  3. *
  4. * Copyright 2005 MontaVista Software, Inc.
  5. * Matt Porter <mporter@kernel.crashing.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/types.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/rio.h>
  18. #include <linux/rio_drv.h>
  19. #include <asm/io.h>
  20. #define RIO_REGS_BASE (CCSRBAR + 0xc0000)
  21. #define RIO_ATMU_REGS_OFFSET 0x10c00
  22. #define RIO_MSG_REGS_OFFSET 0x11000
  23. #define RIO_MAINT_WIN_SIZE 0x400000
  24. #define RIO_DBELL_WIN_SIZE 0x1000
  25. #define RIO_MSG_OMR_MUI 0x00000002
  26. #define RIO_MSG_OSR_TE 0x00000080
  27. #define RIO_MSG_OSR_QOI 0x00000020
  28. #define RIO_MSG_OSR_QFI 0x00000010
  29. #define RIO_MSG_OSR_MUB 0x00000004
  30. #define RIO_MSG_OSR_EOMI 0x00000002
  31. #define RIO_MSG_OSR_QEI 0x00000001
  32. #define RIO_MSG_IMR_MI 0x00000002
  33. #define RIO_MSG_ISR_TE 0x00000080
  34. #define RIO_MSG_ISR_QFI 0x00000010
  35. #define RIO_MSG_ISR_DIQI 0x00000001
  36. #define RIO_MSG_DESC_SIZE 32
  37. #define RIO_MSG_BUFFER_SIZE 4096
  38. #define RIO_MIN_TX_RING_SIZE 2
  39. #define RIO_MAX_TX_RING_SIZE 2048
  40. #define RIO_MIN_RX_RING_SIZE 2
  41. #define RIO_MAX_RX_RING_SIZE 2048
  42. #define DOORBELL_DMR_DI 0x00000002
  43. #define DOORBELL_DSR_TE 0x00000080
  44. #define DOORBELL_DSR_QFI 0x00000010
  45. #define DOORBELL_DSR_DIQI 0x00000001
  46. #define DOORBELL_TID_OFFSET 0x03
  47. #define DOORBELL_SID_OFFSET 0x05
  48. #define DOORBELL_INFO_OFFSET 0x06
  49. #define DOORBELL_MESSAGE_SIZE 0x08
  50. #define DBELL_SID(x) (*(u8 *)(x + DOORBELL_SID_OFFSET))
  51. #define DBELL_TID(x) (*(u8 *)(x + DOORBELL_TID_OFFSET))
  52. #define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET))
  53. struct rio_atmu_regs {
  54. u32 rowtar;
  55. u32 pad1;
  56. u32 rowbar;
  57. u32 pad2;
  58. u32 rowar;
  59. u32 pad3[3];
  60. };
  61. struct rio_msg_regs {
  62. u32 omr;
  63. u32 osr;
  64. u32 pad1;
  65. u32 odqdpar;
  66. u32 pad2;
  67. u32 osar;
  68. u32 odpr;
  69. u32 odatr;
  70. u32 odcr;
  71. u32 pad3;
  72. u32 odqepar;
  73. u32 pad4[13];
  74. u32 imr;
  75. u32 isr;
  76. u32 pad5;
  77. u32 ifqdpar;
  78. u32 pad6;
  79. u32 ifqepar;
  80. u32 pad7[250];
  81. u32 dmr;
  82. u32 dsr;
  83. u32 pad8;
  84. u32 dqdpar;
  85. u32 pad9;
  86. u32 dqepar;
  87. u32 pad10[26];
  88. u32 pwmr;
  89. u32 pwsr;
  90. u32 pad11;
  91. u32 pwqbar;
  92. };
  93. struct rio_tx_desc {
  94. u32 res1;
  95. u32 saddr;
  96. u32 dport;
  97. u32 dattr;
  98. u32 res2;
  99. u32 res3;
  100. u32 dwcnt;
  101. u32 res4;
  102. };
  103. static u32 regs_win;
  104. static struct rio_atmu_regs *atmu_regs;
  105. static struct rio_atmu_regs *maint_atmu_regs;
  106. static struct rio_atmu_regs *dbell_atmu_regs;
  107. static u32 dbell_win;
  108. static u32 maint_win;
  109. static struct rio_msg_regs *msg_regs;
  110. static struct rio_dbell_ring {
  111. void *virt;
  112. dma_addr_t phys;
  113. } dbell_ring;
  114. static struct rio_msg_tx_ring {
  115. void *virt;
  116. dma_addr_t phys;
  117. void *virt_buffer[RIO_MAX_TX_RING_SIZE];
  118. dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
  119. int tx_slot;
  120. int size;
  121. void *dev_id;
  122. } msg_tx_ring;
  123. static struct rio_msg_rx_ring {
  124. void *virt;
  125. dma_addr_t phys;
  126. void *virt_buffer[RIO_MAX_RX_RING_SIZE];
  127. int rx_slot;
  128. int size;
  129. void *dev_id;
  130. } msg_rx_ring;
  131. /**
  132. * mpc85xx_rio_doorbell_send - Send a MPC85xx doorbell message
  133. * @index: ID of RapidIO interface
  134. * @destid: Destination ID of target device
  135. * @data: 16-bit info field of RapidIO doorbell message
  136. *
  137. * Sends a MPC85xx doorbell message. Returns %0 on success or
  138. * %-EINVAL on failure.
  139. */
  140. static int mpc85xx_rio_doorbell_send(int index, u16 destid, u16 data)
  141. {
  142. pr_debug("mpc85xx_doorbell_send: index %d destid %4.4x data %4.4x\n",
  143. index, destid, data);
  144. out_be32((void *)&dbell_atmu_regs->rowtar, destid << 22);
  145. out_be16((void *)(dbell_win), data);
  146. return 0;
  147. }
  148. /**
  149. * mpc85xx_local_config_read - Generate a MPC85xx local config space read
  150. * @index: ID of RapdiIO interface
  151. * @offset: Offset into configuration space
  152. * @len: Length (in bytes) of the maintenance transaction
  153. * @data: Value to be read into
  154. *
  155. * Generates a MPC85xx local configuration space read. Returns %0 on
  156. * success or %-EINVAL on failure.
  157. */
  158. static int mpc85xx_local_config_read(int index, u32 offset, int len, u32 * data)
  159. {
  160. pr_debug("mpc85xx_local_config_read: index %d offset %8.8x\n", index,
  161. offset);
  162. *data = in_be32((void *)(regs_win + offset));
  163. return 0;
  164. }
  165. /**
  166. * mpc85xx_local_config_write - Generate a MPC85xx local config space write
  167. * @index: ID of RapdiIO interface
  168. * @offset: Offset into configuration space
  169. * @len: Length (in bytes) of the maintenance transaction
  170. * @data: Value to be written
  171. *
  172. * Generates a MPC85xx local configuration space write. Returns %0 on
  173. * success or %-EINVAL on failure.
  174. */
  175. static int mpc85xx_local_config_write(int index, u32 offset, int len, u32 data)
  176. {
  177. pr_debug
  178. ("mpc85xx_local_config_write: index %d offset %8.8x data %8.8x\n",
  179. index, offset, data);
  180. out_be32((void *)(regs_win + offset), data);
  181. return 0;
  182. }
  183. /**
  184. * mpc85xx_rio_config_read - Generate a MPC85xx read maintenance transaction
  185. * @index: ID of RapdiIO interface
  186. * @destid: Destination ID of transaction
  187. * @hopcount: Number of hops to target device
  188. * @offset: Offset into configuration space
  189. * @len: Length (in bytes) of the maintenance transaction
  190. * @val: Location to be read into
  191. *
  192. * Generates a MPC85xx read maintenance transaction. Returns %0 on
  193. * success or %-EINVAL on failure.
  194. */
  195. static int
  196. mpc85xx_rio_config_read(int index, u16 destid, u8 hopcount, u32 offset, int len,
  197. u32 * val)
  198. {
  199. u8 *data;
  200. pr_debug
  201. ("mpc85xx_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n",
  202. index, destid, hopcount, offset, len);
  203. out_be32((void *)&maint_atmu_regs->rowtar,
  204. (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
  205. data = (u8 *) maint_win + offset;
  206. switch (len) {
  207. case 1:
  208. *val = in_8((u8 *) data);
  209. break;
  210. case 2:
  211. *val = in_be16((u16 *) data);
  212. break;
  213. default:
  214. *val = in_be32((u32 *) data);
  215. break;
  216. }
  217. return 0;
  218. }
  219. /**
  220. * mpc85xx_rio_config_write - Generate a MPC85xx write maintenance transaction
  221. * @index: ID of RapdiIO interface
  222. * @destid: Destination ID of transaction
  223. * @hopcount: Number of hops to target device
  224. * @offset: Offset into configuration space
  225. * @len: Length (in bytes) of the maintenance transaction
  226. * @val: Value to be written
  227. *
  228. * Generates an MPC85xx write maintenance transaction. Returns %0 on
  229. * success or %-EINVAL on failure.
  230. */
  231. static int
  232. mpc85xx_rio_config_write(int index, u16 destid, u8 hopcount, u32 offset,
  233. int len, u32 val)
  234. {
  235. u8 *data;
  236. pr_debug
  237. ("mpc85xx_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
  238. index, destid, hopcount, offset, len, val);
  239. out_be32((void *)&maint_atmu_regs->rowtar,
  240. (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
  241. data = (u8 *) maint_win + offset;
  242. switch (len) {
  243. case 1:
  244. out_8((u8 *) data, val);
  245. break;
  246. case 2:
  247. out_be16((u16 *) data, val);
  248. break;
  249. default:
  250. out_be32((u32 *) data, val);
  251. break;
  252. }
  253. return 0;
  254. }
  255. /**
  256. * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue
  257. * @mport: Master port with outbound message queue
  258. * @rdev: Target of outbound message
  259. * @mbox: Outbound mailbox
  260. * @buffer: Message to add to outbound queue
  261. * @len: Length of message
  262. *
  263. * Adds the @buffer message to the MPC85xx outbound message queue. Returns
  264. * %0 on success or %-EINVAL on failure.
  265. */
  266. int
  267. rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
  268. void *buffer, size_t len)
  269. {
  270. u32 omr;
  271. struct rio_tx_desc *desc =
  272. (struct rio_tx_desc *)msg_tx_ring.virt + msg_tx_ring.tx_slot;
  273. int ret = 0;
  274. pr_debug
  275. ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n",
  276. rdev->destid, mbox, (int)buffer, len);
  277. if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
  278. ret = -EINVAL;
  279. goto out;
  280. }
  281. /* Copy and clear rest of buffer */
  282. memcpy(msg_tx_ring.virt_buffer[msg_tx_ring.tx_slot], buffer, len);
  283. if (len < (RIO_MAX_MSG_SIZE - 4))
  284. memset((void *)((u32) msg_tx_ring.
  285. virt_buffer[msg_tx_ring.tx_slot] + len), 0,
  286. RIO_MAX_MSG_SIZE - len);
  287. /* Set mbox field for message */
  288. desc->dport = mbox & 0x3;
  289. /* Enable EOMI interrupt, set priority, and set destid */
  290. desc->dattr = 0x28000000 | (rdev->destid << 2);
  291. /* Set transfer size aligned to next power of 2 (in double words) */
  292. desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
  293. /* Set snooping and source buffer address */
  294. desc->saddr = 0x00000004 | msg_tx_ring.phys_buffer[msg_tx_ring.tx_slot];
  295. /* Increment enqueue pointer */
  296. omr = in_be32((void *)&msg_regs->omr);
  297. out_be32((void *)&msg_regs->omr, omr | RIO_MSG_OMR_MUI);
  298. /* Go to next descriptor */
  299. if (++msg_tx_ring.tx_slot == msg_tx_ring.size)
  300. msg_tx_ring.tx_slot = 0;
  301. out:
  302. return ret;
  303. }
  304. EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
  305. /**
  306. * mpc85xx_rio_tx_handler - MPC85xx outbound message interrupt handler
  307. * @irq: Linux interrupt number
  308. * @dev_instance: Pointer to interrupt-specific data
  309. *
  310. * Handles outbound message interrupts. Executes a register outbound
  311. * mailbox event handler and acks the interrupt occurrence.
  312. */
  313. static irqreturn_t
  314. mpc85xx_rio_tx_handler(int irq, void *dev_instance)
  315. {
  316. int osr;
  317. struct rio_mport *port = (struct rio_mport *)dev_instance;
  318. osr = in_be32((void *)&msg_regs->osr);
  319. if (osr & RIO_MSG_OSR_TE) {
  320. pr_info("RIO: outbound message transmission error\n");
  321. out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_TE);
  322. goto out;
  323. }
  324. if (osr & RIO_MSG_OSR_QOI) {
  325. pr_info("RIO: outbound message queue overflow\n");
  326. out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_QOI);
  327. goto out;
  328. }
  329. if (osr & RIO_MSG_OSR_EOMI) {
  330. u32 dqp = in_be32((void *)&msg_regs->odqdpar);
  331. int slot = (dqp - msg_tx_ring.phys) >> 5;
  332. port->outb_msg[0].mcback(port, msg_tx_ring.dev_id, -1, slot);
  333. /* Ack the end-of-message interrupt */
  334. out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_EOMI);
  335. }
  336. out:
  337. return IRQ_HANDLED;
  338. }
  339. /**
  340. * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox
  341. * @mport: Master port implementing the outbound message unit
  342. * @dev_id: Device specific pointer to pass on event
  343. * @mbox: Mailbox to open
  344. * @entries: Number of entries in the outbound mailbox ring
  345. *
  346. * Initializes buffer ring, request the outbound message interrupt,
  347. * and enables the outbound message unit. Returns %0 on success and
  348. * %-EINVAL or %-ENOMEM on failure.
  349. */
  350. int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
  351. {
  352. int i, j, rc = 0;
  353. if ((entries < RIO_MIN_TX_RING_SIZE) ||
  354. (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
  355. rc = -EINVAL;
  356. goto out;
  357. }
  358. /* Initialize shadow copy ring */
  359. msg_tx_ring.dev_id = dev_id;
  360. msg_tx_ring.size = entries;
  361. for (i = 0; i < msg_tx_ring.size; i++) {
  362. if (!
  363. (msg_tx_ring.virt_buffer[i] =
  364. dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE,
  365. &msg_tx_ring.phys_buffer[i],
  366. GFP_KERNEL))) {
  367. rc = -ENOMEM;
  368. for (j = 0; j < msg_tx_ring.size; j++)
  369. if (msg_tx_ring.virt_buffer[j])
  370. dma_free_coherent(NULL,
  371. RIO_MSG_BUFFER_SIZE,
  372. msg_tx_ring.
  373. virt_buffer[j],
  374. msg_tx_ring.
  375. phys_buffer[j]);
  376. goto out;
  377. }
  378. }
  379. /* Initialize outbound message descriptor ring */
  380. if (!(msg_tx_ring.virt = dma_alloc_coherent(NULL,
  381. msg_tx_ring.size *
  382. RIO_MSG_DESC_SIZE,
  383. &msg_tx_ring.phys,
  384. GFP_KERNEL))) {
  385. rc = -ENOMEM;
  386. goto out_dma;
  387. }
  388. memset(msg_tx_ring.virt, 0, msg_tx_ring.size * RIO_MSG_DESC_SIZE);
  389. msg_tx_ring.tx_slot = 0;
  390. /* Point dequeue/enqueue pointers at first entry in ring */
  391. out_be32((void *)&msg_regs->odqdpar, msg_tx_ring.phys);
  392. out_be32((void *)&msg_regs->odqepar, msg_tx_ring.phys);
  393. /* Configure for snooping */
  394. out_be32((void *)&msg_regs->osar, 0x00000004);
  395. /* Clear interrupt status */
  396. out_be32((void *)&msg_regs->osr, 0x000000b3);
  397. /* Hook up outbound message handler */
  398. if ((rc =
  399. request_irq(MPC85xx_IRQ_RIO_TX, mpc85xx_rio_tx_handler, 0,
  400. "msg_tx", (void *)mport)) < 0)
  401. goto out_irq;
  402. /*
  403. * Configure outbound message unit
  404. * Snooping
  405. * Interrupts (all enabled, except QEIE)
  406. * Chaining mode
  407. * Disable
  408. */
  409. out_be32((void *)&msg_regs->omr, 0x00100220);
  410. /* Set number of entries */
  411. out_be32((void *)&msg_regs->omr,
  412. in_be32((void *)&msg_regs->omr) |
  413. ((get_bitmask_order(entries) - 2) << 12));
  414. /* Now enable the unit */
  415. out_be32((void *)&msg_regs->omr, in_be32((void *)&msg_regs->omr) | 0x1);
  416. out:
  417. return rc;
  418. out_irq:
  419. dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
  420. msg_tx_ring.virt, msg_tx_ring.phys);
  421. out_dma:
  422. for (i = 0; i < msg_tx_ring.size; i++)
  423. dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
  424. msg_tx_ring.virt_buffer[i],
  425. msg_tx_ring.phys_buffer[i]);
  426. return rc;
  427. }
  428. /**
  429. * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox
  430. * @mport: Master port implementing the outbound message unit
  431. * @mbox: Mailbox to close
  432. *
  433. * Disables the outbound message unit, free all buffers, and
  434. * frees the outbound message interrupt.
  435. */
  436. void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
  437. {
  438. /* Disable inbound message unit */
  439. out_be32((void *)&msg_regs->omr, 0);
  440. /* Free ring */
  441. dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
  442. msg_tx_ring.virt, msg_tx_ring.phys);
  443. /* Free interrupt */
  444. free_irq(MPC85xx_IRQ_RIO_TX, (void *)mport);
  445. }
  446. /**
  447. * mpc85xx_rio_rx_handler - MPC85xx inbound message interrupt handler
  448. * @irq: Linux interrupt number
  449. * @dev_instance: Pointer to interrupt-specific data
  450. *
  451. * Handles inbound message interrupts. Executes a registered inbound
  452. * mailbox event handler and acks the interrupt occurrence.
  453. */
  454. static irqreturn_t
  455. mpc85xx_rio_rx_handler(int irq, void *dev_instance)
  456. {
  457. int isr;
  458. struct rio_mport *port = (struct rio_mport *)dev_instance;
  459. isr = in_be32((void *)&msg_regs->isr);
  460. if (isr & RIO_MSG_ISR_TE) {
  461. pr_info("RIO: inbound message reception error\n");
  462. out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_TE);
  463. goto out;
  464. }
  465. /* XXX Need to check/dispatch until queue empty */
  466. if (isr & RIO_MSG_ISR_DIQI) {
  467. /*
  468. * We implement *only* mailbox 0, but can receive messages
  469. * for any mailbox/letter to that mailbox destination. So,
  470. * make the callback with an unknown/invalid mailbox number
  471. * argument.
  472. */
  473. port->inb_msg[0].mcback(port, msg_rx_ring.dev_id, -1, -1);
  474. /* Ack the queueing interrupt */
  475. out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_DIQI);
  476. }
  477. out:
  478. return IRQ_HANDLED;
  479. }
  480. /**
  481. * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox
  482. * @mport: Master port implementing the inbound message unit
  483. * @dev_id: Device specific pointer to pass on event
  484. * @mbox: Mailbox to open
  485. * @entries: Number of entries in the inbound mailbox ring
  486. *
  487. * Initializes buffer ring, request the inbound message interrupt,
  488. * and enables the inbound message unit. Returns %0 on success
  489. * and %-EINVAL or %-ENOMEM on failure.
  490. */
  491. int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
  492. {
  493. int i, rc = 0;
  494. if ((entries < RIO_MIN_RX_RING_SIZE) ||
  495. (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
  496. rc = -EINVAL;
  497. goto out;
  498. }
  499. /* Initialize client buffer ring */
  500. msg_rx_ring.dev_id = dev_id;
  501. msg_rx_ring.size = entries;
  502. msg_rx_ring.rx_slot = 0;
  503. for (i = 0; i < msg_rx_ring.size; i++)
  504. msg_rx_ring.virt_buffer[i] = NULL;
  505. /* Initialize inbound message ring */
  506. if (!(msg_rx_ring.virt = dma_alloc_coherent(NULL,
  507. msg_rx_ring.size *
  508. RIO_MAX_MSG_SIZE,
  509. &msg_rx_ring.phys,
  510. GFP_KERNEL))) {
  511. rc = -ENOMEM;
  512. goto out;
  513. }
  514. /* Point dequeue/enqueue pointers at first entry in ring */
  515. out_be32((void *)&msg_regs->ifqdpar, (u32) msg_rx_ring.phys);
  516. out_be32((void *)&msg_regs->ifqepar, (u32) msg_rx_ring.phys);
  517. /* Clear interrupt status */
  518. out_be32((void *)&msg_regs->isr, 0x00000091);
  519. /* Hook up inbound message handler */
  520. if ((rc =
  521. request_irq(MPC85xx_IRQ_RIO_RX, mpc85xx_rio_rx_handler, 0,
  522. "msg_rx", (void *)mport)) < 0) {
  523. dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
  524. msg_tx_ring.virt_buffer[i],
  525. msg_tx_ring.phys_buffer[i]);
  526. goto out;
  527. }
  528. /*
  529. * Configure inbound message unit:
  530. * Snooping
  531. * 4KB max message size
  532. * Unmask all interrupt sources
  533. * Disable
  534. */
  535. out_be32((void *)&msg_regs->imr, 0x001b0060);
  536. /* Set number of queue entries */
  537. out_be32((void *)&msg_regs->imr,
  538. in_be32((void *)&msg_regs->imr) |
  539. ((get_bitmask_order(entries) - 2) << 12));
  540. /* Now enable the unit */
  541. out_be32((void *)&msg_regs->imr, in_be32((void *)&msg_regs->imr) | 0x1);
  542. out:
  543. return rc;
  544. }
  545. /**
  546. * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox
  547. * @mport: Master port implementing the inbound message unit
  548. * @mbox: Mailbox to close
  549. *
  550. * Disables the inbound message unit, free all buffers, and
  551. * frees the inbound message interrupt.
  552. */
  553. void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
  554. {
  555. /* Disable inbound message unit */
  556. out_be32((void *)&msg_regs->imr, 0);
  557. /* Free ring */
  558. dma_free_coherent(NULL, msg_rx_ring.size * RIO_MAX_MSG_SIZE,
  559. msg_rx_ring.virt, msg_rx_ring.phys);
  560. /* Free interrupt */
  561. free_irq(MPC85xx_IRQ_RIO_RX, (void *)mport);
  562. }
  563. /**
  564. * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
  565. * @mport: Master port implementing the inbound message unit
  566. * @mbox: Inbound mailbox number
  567. * @buf: Buffer to add to inbound queue
  568. *
  569. * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
  570. * %0 on success or %-EINVAL on failure.
  571. */
  572. int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
  573. {
  574. int rc = 0;
  575. pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
  576. msg_rx_ring.rx_slot);
  577. if (msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot]) {
  578. printk(KERN_ERR
  579. "RIO: error adding inbound buffer %d, buffer exists\n",
  580. msg_rx_ring.rx_slot);
  581. rc = -EINVAL;
  582. goto out;
  583. }
  584. msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot] = buf;
  585. if (++msg_rx_ring.rx_slot == msg_rx_ring.size)
  586. msg_rx_ring.rx_slot = 0;
  587. out:
  588. return rc;
  589. }
  590. EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
  591. /**
  592. * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit
  593. * @mport: Master port implementing the inbound message unit
  594. * @mbox: Inbound mailbox number
  595. *
  596. * Gets the next available inbound message from the inbound message queue.
  597. * A pointer to the message is returned on success or NULL on failure.
  598. */
  599. void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
  600. {
  601. u32 imr;
  602. u32 phys_buf, virt_buf;
  603. void *buf = NULL;
  604. int buf_idx;
  605. phys_buf = in_be32((void *)&msg_regs->ifqdpar);
  606. /* If no more messages, then bail out */
  607. if (phys_buf == in_be32((void *)&msg_regs->ifqepar))
  608. goto out2;
  609. virt_buf = (u32) msg_rx_ring.virt + (phys_buf - msg_rx_ring.phys);
  610. buf_idx = (phys_buf - msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
  611. buf = msg_rx_ring.virt_buffer[buf_idx];
  612. if (!buf) {
  613. printk(KERN_ERR
  614. "RIO: inbound message copy failed, no buffers\n");
  615. goto out1;
  616. }
  617. /* Copy max message size, caller is expected to allocate that big */
  618. memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE);
  619. /* Clear the available buffer */
  620. msg_rx_ring.virt_buffer[buf_idx] = NULL;
  621. out1:
  622. imr = in_be32((void *)&msg_regs->imr);
  623. out_be32((void *)&msg_regs->imr, imr | RIO_MSG_IMR_MI);
  624. out2:
  625. return buf;
  626. }
  627. EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
  628. /**
  629. * mpc85xx_rio_dbell_handler - MPC85xx doorbell interrupt handler
  630. * @irq: Linux interrupt number
  631. * @dev_instance: Pointer to interrupt-specific data
  632. *
  633. * Handles doorbell interrupts. Parses a list of registered
  634. * doorbell event handlers and executes a matching event handler.
  635. */
  636. static irqreturn_t
  637. mpc85xx_rio_dbell_handler(int irq, void *dev_instance)
  638. {
  639. int dsr;
  640. struct rio_mport *port = (struct rio_mport *)dev_instance;
  641. dsr = in_be32((void *)&msg_regs->dsr);
  642. if (dsr & DOORBELL_DSR_TE) {
  643. pr_info("RIO: doorbell reception error\n");
  644. out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_TE);
  645. goto out;
  646. }
  647. if (dsr & DOORBELL_DSR_QFI) {
  648. pr_info("RIO: doorbell queue full\n");
  649. out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_QFI);
  650. goto out;
  651. }
  652. /* XXX Need to check/dispatch until queue empty */
  653. if (dsr & DOORBELL_DSR_DIQI) {
  654. u32 dmsg =
  655. (u32) dbell_ring.virt +
  656. (in_be32((void *)&msg_regs->dqdpar) & 0xfff);
  657. u32 dmr;
  658. struct rio_dbell *dbell;
  659. int found = 0;
  660. pr_debug
  661. ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n",
  662. DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
  663. list_for_each_entry(dbell, &port->dbells, node) {
  664. if ((dbell->res->start <= DBELL_INF(dmsg)) &&
  665. (dbell->res->end >= DBELL_INF(dmsg))) {
  666. found = 1;
  667. break;
  668. }
  669. }
  670. if (found) {
  671. dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg),
  672. DBELL_INF(dmsg));
  673. } else {
  674. pr_debug
  675. ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n",
  676. DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
  677. }
  678. dmr = in_be32((void *)&msg_regs->dmr);
  679. out_be32((void *)&msg_regs->dmr, dmr | DOORBELL_DMR_DI);
  680. out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_DIQI);
  681. }
  682. out:
  683. return IRQ_HANDLED;
  684. }
  685. /**
  686. * mpc85xx_rio_doorbell_init - MPC85xx doorbell interface init
  687. * @mport: Master port implementing the inbound doorbell unit
  688. *
  689. * Initializes doorbell unit hardware and inbound DMA buffer
  690. * ring. Called from mpc85xx_rio_setup(). Returns %0 on success
  691. * or %-ENOMEM on failure.
  692. */
  693. static int mpc85xx_rio_doorbell_init(struct rio_mport *mport)
  694. {
  695. int rc = 0;
  696. /* Map outbound doorbell window immediately after maintenance window */
  697. if (!(dbell_win =
  698. (u32) ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE,
  699. RIO_DBELL_WIN_SIZE))) {
  700. printk(KERN_ERR
  701. "RIO: unable to map outbound doorbell window\n");
  702. rc = -ENOMEM;
  703. goto out;
  704. }
  705. /* Initialize inbound doorbells */
  706. if (!(dbell_ring.virt = dma_alloc_coherent(NULL,
  707. 512 * DOORBELL_MESSAGE_SIZE,
  708. &dbell_ring.phys,
  709. GFP_KERNEL))) {
  710. printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n");
  711. rc = -ENOMEM;
  712. iounmap((void *)dbell_win);
  713. goto out;
  714. }
  715. /* Point dequeue/enqueue pointers at first entry in ring */
  716. out_be32((void *)&msg_regs->dqdpar, (u32) dbell_ring.phys);
  717. out_be32((void *)&msg_regs->dqepar, (u32) dbell_ring.phys);
  718. /* Clear interrupt status */
  719. out_be32((void *)&msg_regs->dsr, 0x00000091);
  720. /* Hook up doorbell handler */
  721. if ((rc =
  722. request_irq(MPC85xx_IRQ_RIO_BELL, mpc85xx_rio_dbell_handler, 0,
  723. "dbell_rx", (void *)mport) < 0)) {
  724. iounmap((void *)dbell_win);
  725. dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE,
  726. dbell_ring.virt, dbell_ring.phys);
  727. printk(KERN_ERR
  728. "MPC85xx RIO: unable to request inbound doorbell irq");
  729. goto out;
  730. }
  731. /* Configure doorbells for snooping, 512 entries, and enable */
  732. out_be32((void *)&msg_regs->dmr, 0x00108161);
  733. out:
  734. return rc;
  735. }
  736. static char *cmdline = NULL;
  737. static int mpc85xx_rio_get_hdid(int index)
  738. {
  739. /* XXX Need to parse multiple entries in some format */
  740. if (!cmdline)
  741. return -1;
  742. return simple_strtol(cmdline, NULL, 0);
  743. }
  744. static int mpc85xx_rio_get_cmdline(char *s)
  745. {
  746. if (!s)
  747. return 0;
  748. cmdline = s;
  749. return 1;
  750. }
  751. __setup("riohdid=", mpc85xx_rio_get_cmdline);
  752. /**
  753. * mpc85xx_rio_setup - Setup MPC85xx RapidIO interface
  754. * @law_start: Starting physical address of RapidIO LAW
  755. * @law_size: Size of RapidIO LAW
  756. *
  757. * Initializes MPC85xx RapidIO hardware interface, configures
  758. * master port with system-specific info, and registers the
  759. * master port with the RapidIO subsystem.
  760. */
  761. void mpc85xx_rio_setup(int law_start, int law_size)
  762. {
  763. struct rio_ops *ops;
  764. struct rio_mport *port;
  765. ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL);
  766. ops->lcread = mpc85xx_local_config_read;
  767. ops->lcwrite = mpc85xx_local_config_write;
  768. ops->cread = mpc85xx_rio_config_read;
  769. ops->cwrite = mpc85xx_rio_config_write;
  770. ops->dsend = mpc85xx_rio_doorbell_send;
  771. port = kmalloc(sizeof(struct rio_mport), GFP_KERNEL);
  772. port->id = 0;
  773. port->index = 0;
  774. INIT_LIST_HEAD(&port->dbells);
  775. port->iores.start = law_start;
  776. port->iores.end = law_start + law_size;
  777. port->iores.flags = IORESOURCE_MEM;
  778. rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
  779. rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
  780. rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
  781. strcpy(port->name, "RIO0 mport");
  782. port->ops = ops;
  783. port->host_deviceid = mpc85xx_rio_get_hdid(port->id);
  784. rio_register_mport(port);
  785. regs_win = (u32) ioremap(RIO_REGS_BASE, 0x20000);
  786. atmu_regs = (struct rio_atmu_regs *)(regs_win + RIO_ATMU_REGS_OFFSET);
  787. maint_atmu_regs = atmu_regs + 1;
  788. dbell_atmu_regs = atmu_regs + 2;
  789. msg_regs = (struct rio_msg_regs *)(regs_win + RIO_MSG_REGS_OFFSET);
  790. /* Configure maintenance transaction window */
  791. out_be32((void *)&maint_atmu_regs->rowbar, 0x000c0000);
  792. out_be32((void *)&maint_atmu_regs->rowar, 0x80077015);
  793. maint_win = (u32) ioremap(law_start, RIO_MAINT_WIN_SIZE);
  794. /* Configure outbound doorbell window */
  795. out_be32((void *)&dbell_atmu_regs->rowbar, 0x000c0400);
  796. out_be32((void *)&dbell_atmu_regs->rowar, 0x8004200b);
  797. mpc85xx_rio_doorbell_init(port);
  798. }