ppc_htab.c 11 KB

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  1. /*
  2. * PowerPC hash table management proc entry. Will show information
  3. * about the current hash table and will allow changes to it.
  4. *
  5. * Written by Cort Dougan (cort@cs.nmt.edu)
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/errno.h>
  13. #include <linux/sched.h>
  14. #include <linux/proc_fs.h>
  15. #include <linux/stat.h>
  16. #include <linux/sysctl.h>
  17. #include <linux/capability.h>
  18. #include <linux/ctype.h>
  19. #include <linux/threads.h>
  20. #include <linux/seq_file.h>
  21. #include <linux/init.h>
  22. #include <linux/bitops.h>
  23. #include <asm/uaccess.h>
  24. #include <asm/mmu.h>
  25. #include <asm/residual.h>
  26. #include <asm/io.h>
  27. #include <asm/pgtable.h>
  28. #include <asm/cputable.h>
  29. #include <asm/system.h>
  30. #include <asm/reg.h>
  31. static int ppc_htab_show(struct seq_file *m, void *v);
  32. static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
  33. size_t count, loff_t *ppos);
  34. extern PTE *Hash, *Hash_end;
  35. extern unsigned long Hash_size, Hash_mask;
  36. extern unsigned long _SDR1;
  37. extern unsigned long htab_reloads;
  38. extern unsigned long htab_preloads;
  39. extern unsigned long htab_evicts;
  40. extern unsigned long pte_misses;
  41. extern unsigned long pte_errors;
  42. extern unsigned int primary_pteg_full;
  43. extern unsigned int htab_hash_searches;
  44. static int ppc_htab_open(struct inode *inode, struct file *file)
  45. {
  46. return single_open(file, ppc_htab_show, NULL);
  47. }
  48. const struct file_operations ppc_htab_operations = {
  49. .open = ppc_htab_open,
  50. .read = seq_read,
  51. .llseek = seq_lseek,
  52. .write = ppc_htab_write,
  53. .release = single_release,
  54. };
  55. static char *pmc1_lookup(unsigned long mmcr0)
  56. {
  57. switch ( mmcr0 & (0x7f<<7) )
  58. {
  59. case 0x0:
  60. return "none";
  61. case MMCR0_PMC1_CYCLES:
  62. return "cycles";
  63. case MMCR0_PMC1_ICACHEMISS:
  64. return "ic miss";
  65. case MMCR0_PMC1_DTLB:
  66. return "dtlb miss";
  67. default:
  68. return "unknown";
  69. }
  70. }
  71. static char *pmc2_lookup(unsigned long mmcr0)
  72. {
  73. switch ( mmcr0 & 0x3f )
  74. {
  75. case 0x0:
  76. return "none";
  77. case MMCR0_PMC2_CYCLES:
  78. return "cycles";
  79. case MMCR0_PMC2_DCACHEMISS:
  80. return "dc miss";
  81. case MMCR0_PMC2_ITLB:
  82. return "itlb miss";
  83. case MMCR0_PMC2_LOADMISSTIME:
  84. return "load miss time";
  85. default:
  86. return "unknown";
  87. }
  88. }
  89. /*
  90. * print some useful info about the hash table. This function
  91. * is _REALLY_ slow (see the nested for loops below) but nothing
  92. * in here should be really timing critical. -- Cort
  93. */
  94. static int ppc_htab_show(struct seq_file *m, void *v)
  95. {
  96. unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
  97. #if defined(CONFIG_PPC_STD_MMU)
  98. unsigned int kptes = 0, uptes = 0;
  99. PTE *ptr;
  100. #endif /* CONFIG_PPC_STD_MMU */
  101. if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
  102. mmcr0 = mfspr(SPRN_MMCR0);
  103. pmc1 = mfspr(SPRN_PMC1);
  104. pmc2 = mfspr(SPRN_PMC2);
  105. seq_printf(m,
  106. "604 Performance Monitoring\n"
  107. "MMCR0\t\t: %08lx %s%s ",
  108. mmcr0,
  109. ( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
  110. ( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
  111. seq_printf(m,
  112. "\nPMC1\t\t: %08lx (%s)\n"
  113. "PMC2\t\t: %08lx (%s)\n",
  114. pmc1, pmc1_lookup(mmcr0),
  115. pmc2, pmc2_lookup(mmcr0));
  116. }
  117. #ifdef CONFIG_PPC_STD_MMU
  118. /* if we don't have a htab */
  119. if ( Hash_size == 0 ) {
  120. seq_printf(m, "No Hash Table used\n");
  121. return 0;
  122. }
  123. for (ptr = Hash; ptr < Hash_end; ptr++) {
  124. unsigned int mctx, vsid;
  125. if (!ptr->v)
  126. continue;
  127. /* undo the esid skew */
  128. vsid = ptr->vsid;
  129. mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff;
  130. if (mctx == 0)
  131. kptes++;
  132. else
  133. uptes++;
  134. }
  135. seq_printf(m,
  136. "PTE Hash Table Information\n"
  137. "Size\t\t: %luKb\n"
  138. "Buckets\t\t: %lu\n"
  139. "Address\t\t: %08lx\n"
  140. "Entries\t\t: %lu\n"
  141. "User ptes\t: %u\n"
  142. "Kernel ptes\t: %u\n"
  143. "Percent full\t: %lu%%\n"
  144. , (unsigned long)(Hash_size>>10),
  145. (Hash_size/(sizeof(PTE)*8)),
  146. (unsigned long)Hash,
  147. Hash_size/sizeof(PTE)
  148. , uptes,
  149. kptes,
  150. ((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
  151. );
  152. seq_printf(m,
  153. "Reloads\t\t: %lu\n"
  154. "Preloads\t: %lu\n"
  155. "Searches\t: %u\n"
  156. "Overflows\t: %u\n"
  157. "Evicts\t\t: %lu\n",
  158. htab_reloads, htab_preloads, htab_hash_searches,
  159. primary_pteg_full, htab_evicts);
  160. #endif /* CONFIG_PPC_STD_MMU */
  161. seq_printf(m,
  162. "Non-error misses: %lu\n"
  163. "Error misses\t: %lu\n",
  164. pte_misses, pte_errors);
  165. return 0;
  166. }
  167. /*
  168. * Allow user to define performance counters and resize the hash table
  169. */
  170. static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
  171. size_t count, loff_t *ppos)
  172. {
  173. #ifdef CONFIG_PPC_STD_MMU
  174. unsigned long tmp;
  175. char buffer[16];
  176. if (!capable(CAP_SYS_ADMIN))
  177. return -EACCES;
  178. if (strncpy_from_user(buffer, ubuffer, 15))
  179. return -EFAULT;
  180. buffer[15] = 0;
  181. /* don't set the htab size for now */
  182. if ( !strncmp( buffer, "size ", 5) )
  183. return -EBUSY;
  184. if ( !strncmp( buffer, "reset", 5) )
  185. {
  186. if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
  187. /* reset PMC1 and PMC2 */
  188. mtspr(SPRN_PMC1, 0);
  189. mtspr(SPRN_PMC2, 0);
  190. }
  191. htab_reloads = 0;
  192. htab_evicts = 0;
  193. pte_misses = 0;
  194. pte_errors = 0;
  195. }
  196. /* Everything below here requires the performance monitor feature. */
  197. if (!cpu_has_feature(CPU_FTR_604_PERF_MON))
  198. return count;
  199. /* turn off performance monitoring */
  200. if ( !strncmp( buffer, "off", 3) )
  201. {
  202. mtspr(SPRN_MMCR0, 0);
  203. mtspr(SPRN_PMC1, 0);
  204. mtspr(SPRN_PMC2, 0);
  205. }
  206. if ( !strncmp( buffer, "user", 4) )
  207. {
  208. /* setup mmcr0 and clear the correct pmc */
  209. tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000;
  210. mtspr(SPRN_MMCR0, tmp);
  211. mtspr(SPRN_PMC1, 0);
  212. mtspr(SPRN_PMC2, 0);
  213. }
  214. if ( !strncmp( buffer, "kernel", 6) )
  215. {
  216. /* setup mmcr0 and clear the correct pmc */
  217. tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000;
  218. mtspr(SPRN_MMCR0, tmp);
  219. mtspr(SPRN_PMC1, 0);
  220. mtspr(SPRN_PMC2, 0);
  221. }
  222. /* PMC1 values */
  223. if ( !strncmp( buffer, "dtlb", 4) )
  224. {
  225. /* setup mmcr0 and clear the correct pmc */
  226. tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB;
  227. mtspr(SPRN_MMCR0, tmp);
  228. mtspr(SPRN_PMC1, 0);
  229. }
  230. if ( !strncmp( buffer, "ic miss", 7) )
  231. {
  232. /* setup mmcr0 and clear the correct pmc */
  233. tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS;
  234. mtspr(SPRN_MMCR0, tmp);
  235. mtspr(SPRN_PMC1, 0);
  236. }
  237. /* PMC2 values */
  238. if ( !strncmp( buffer, "load miss time", 14) )
  239. {
  240. /* setup mmcr0 and clear the correct pmc */
  241. asm volatile(
  242. "mfspr %0,%1\n\t" /* get current mccr0 */
  243. "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
  244. "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
  245. "mtspr %1,%0 \n\t" /* set new mccr0 */
  246. "mtspr %3,%4 \n\t" /* reset the pmc */
  247. : "=r" (tmp)
  248. : "i" (SPRN_MMCR0),
  249. "i" (MMCR0_PMC2_LOADMISSTIME),
  250. "i" (SPRN_PMC2), "r" (0) );
  251. }
  252. if ( !strncmp( buffer, "itlb", 4) )
  253. {
  254. /* setup mmcr0 and clear the correct pmc */
  255. asm volatile(
  256. "mfspr %0,%1\n\t" /* get current mccr0 */
  257. "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
  258. "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
  259. "mtspr %1,%0 \n\t" /* set new mccr0 */
  260. "mtspr %3,%4 \n\t" /* reset the pmc */
  261. : "=r" (tmp)
  262. : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB),
  263. "i" (SPRN_PMC2), "r" (0) );
  264. }
  265. if ( !strncmp( buffer, "dc miss", 7) )
  266. {
  267. /* setup mmcr0 and clear the correct pmc */
  268. asm volatile(
  269. "mfspr %0,%1\n\t" /* get current mccr0 */
  270. "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
  271. "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
  272. "mtspr %1,%0 \n\t" /* set new mccr0 */
  273. "mtspr %3,%4 \n\t" /* reset the pmc */
  274. : "=r" (tmp)
  275. : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS),
  276. "i" (SPRN_PMC2), "r" (0) );
  277. }
  278. return count;
  279. #else /* CONFIG_PPC_STD_MMU */
  280. return 0;
  281. #endif /* CONFIG_PPC_STD_MMU */
  282. }
  283. int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
  284. void __user *buffer_arg, size_t *lenp, loff_t *ppos)
  285. {
  286. int vleft, first=1, len, left, val;
  287. char __user *buffer = (char __user *) buffer_arg;
  288. #define TMPBUFLEN 256
  289. char buf[TMPBUFLEN], *p;
  290. static const char *sizestrings[4] = {
  291. "2MB", "256KB", "512KB", "1MB"
  292. };
  293. static const char *clockstrings[8] = {
  294. "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
  295. "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
  296. };
  297. static const char *typestrings[4] = {
  298. "flow-through burst SRAM", "reserved SRAM",
  299. "pipelined burst SRAM", "pipelined late-write SRAM"
  300. };
  301. static const char *holdstrings[4] = {
  302. "0.5", "1.0", "(reserved2)", "(reserved3)"
  303. };
  304. if (!cpu_has_feature(CPU_FTR_L2CR))
  305. return -EFAULT;
  306. if ( /*!table->maxlen ||*/ (*ppos && !write)) {
  307. *lenp = 0;
  308. return 0;
  309. }
  310. vleft = table->maxlen / sizeof(int);
  311. left = *lenp;
  312. for (; left /*&& vleft--*/; first=0) {
  313. if (write) {
  314. while (left) {
  315. char c;
  316. if(get_user(c, buffer))
  317. return -EFAULT;
  318. if (!isspace(c))
  319. break;
  320. left--;
  321. buffer++;
  322. }
  323. if (!left)
  324. break;
  325. len = left;
  326. if (len > TMPBUFLEN-1)
  327. len = TMPBUFLEN-1;
  328. if(copy_from_user(buf, buffer, len))
  329. return -EFAULT;
  330. buf[len] = 0;
  331. p = buf;
  332. if (*p < '0' || *p > '9')
  333. break;
  334. val = simple_strtoul(p, &p, 0);
  335. len = p-buf;
  336. if ((len < left) && *p && !isspace(*p))
  337. break;
  338. buffer += len;
  339. left -= len;
  340. _set_L2CR(val);
  341. } else {
  342. p = buf;
  343. if (!first)
  344. *p++ = '\t';
  345. val = _get_L2CR();
  346. p += sprintf(p, "0x%08x: ", val);
  347. p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" :
  348. "disabled");
  349. p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no ");
  350. p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]);
  351. p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]);
  352. p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]);
  353. p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : "");
  354. p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": "");
  355. p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" :
  356. "copy-back");
  357. p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : "");
  358. p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]);
  359. p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : "");
  360. p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :"");
  361. p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :"");
  362. p += sprintf(p,"\n");
  363. len = strlen(buf);
  364. if (len > left)
  365. len = left;
  366. if (copy_to_user(buffer, buf, len))
  367. return -EFAULT;
  368. left -= len;
  369. buffer += len;
  370. break;
  371. }
  372. }
  373. if (!write && !first && left) {
  374. if(put_user('\n', (char __user *) buffer))
  375. return -EFAULT;
  376. left--, buffer++;
  377. }
  378. if (write) {
  379. char __user *s = (char __user *) buffer;
  380. while (left) {
  381. char c;
  382. if(get_user(c, s++))
  383. return -EFAULT;
  384. if (!isspace(c))
  385. break;
  386. left--;
  387. }
  388. }
  389. if (write && first)
  390. return -EINVAL;
  391. *lenp -= left;
  392. *ppos += *lenp;
  393. return 0;
  394. }
  395. #ifdef CONFIG_SYSCTL
  396. /*
  397. * Register our sysctl.
  398. */
  399. static ctl_table htab_ctl_table[]={
  400. {
  401. .ctl_name = KERN_PPC_L2CR,
  402. .procname = "l2cr",
  403. .mode = 0644,
  404. .proc_handler = &proc_dol2crvec,
  405. },
  406. {}
  407. };
  408. static ctl_table htab_sysctl_root[] = {
  409. {
  410. .ctl_name = CTL_KERN,
  411. .procname = "kernel",
  412. .mode = 0555,
  413. .child = htab_ctl_table,
  414. },
  415. {}
  416. };
  417. static int __init
  418. register_ppc_htab_sysctl(void)
  419. {
  420. register_sysctl_table(htab_sysctl_root);
  421. return 0;
  422. }
  423. __initcall(register_ppc_htab_sysctl);
  424. #endif