ras.c 10 KB

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  1. /*
  2. * Copyright (C) 2001 Dave Engebretsen IBM Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. */
  18. /* Change Activity:
  19. * 2001/09/21 : engebret : Created with minimal EPOW and HW exception support.
  20. * End Change Activity
  21. */
  22. #include <linux/errno.h>
  23. #include <linux/threads.h>
  24. #include <linux/kernel_stat.h>
  25. #include <linux/signal.h>
  26. #include <linux/sched.h>
  27. #include <linux/ioport.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/timex.h>
  30. #include <linux/init.h>
  31. #include <linux/slab.h>
  32. #include <linux/delay.h>
  33. #include <linux/irq.h>
  34. #include <linux/random.h>
  35. #include <linux/sysrq.h>
  36. #include <linux/bitops.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/system.h>
  39. #include <asm/io.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/irq.h>
  42. #include <asm/cache.h>
  43. #include <asm/prom.h>
  44. #include <asm/ptrace.h>
  45. #include <asm/machdep.h>
  46. #include <asm/rtas.h>
  47. #include <asm/udbg.h>
  48. #include <asm/firmware.h>
  49. #include "pseries.h"
  50. static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
  51. static DEFINE_SPINLOCK(ras_log_buf_lock);
  52. char mce_data_buf[RTAS_ERROR_LOG_MAX];
  53. static int ras_get_sensor_state_token;
  54. static int ras_check_exception_token;
  55. #define EPOW_SENSOR_TOKEN 9
  56. #define EPOW_SENSOR_INDEX 0
  57. #define RAS_VECTOR_OFFSET 0x500
  58. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id);
  59. static irqreturn_t ras_error_interrupt(int irq, void *dev_id);
  60. /* #define DEBUG */
  61. static void request_ras_irqs(struct device_node *np,
  62. irq_handler_t handler,
  63. const char *name)
  64. {
  65. int i, index, count = 0;
  66. struct of_irq oirq;
  67. const u32 *opicprop;
  68. unsigned int opicplen;
  69. unsigned int virqs[16];
  70. /* Check for obsolete "open-pic-interrupt" property. If present, then
  71. * map those interrupts using the default interrupt host and default
  72. * trigger
  73. */
  74. opicprop = of_get_property(np, "open-pic-interrupt", &opicplen);
  75. if (opicprop) {
  76. opicplen /= sizeof(u32);
  77. for (i = 0; i < opicplen; i++) {
  78. if (count > 15)
  79. break;
  80. virqs[count] = irq_create_mapping(NULL, *(opicprop++));
  81. if (virqs[count] == NO_IRQ)
  82. printk(KERN_ERR "Unable to allocate interrupt "
  83. "number for %s\n", np->full_name);
  84. else
  85. count++;
  86. }
  87. }
  88. /* Else use normal interrupt tree parsing */
  89. else {
  90. /* First try to do a proper OF tree parsing */
  91. for (index = 0; of_irq_map_one(np, index, &oirq) == 0;
  92. index++) {
  93. if (count > 15)
  94. break;
  95. virqs[count] = irq_create_of_mapping(oirq.controller,
  96. oirq.specifier,
  97. oirq.size);
  98. if (virqs[count] == NO_IRQ)
  99. printk(KERN_ERR "Unable to allocate interrupt "
  100. "number for %s\n", np->full_name);
  101. else
  102. count++;
  103. }
  104. }
  105. /* Now request them */
  106. for (i = 0; i < count; i++) {
  107. if (request_irq(virqs[i], handler, 0, name, NULL)) {
  108. printk(KERN_ERR "Unable to request interrupt %d for "
  109. "%s\n", virqs[i], np->full_name);
  110. return;
  111. }
  112. }
  113. }
  114. /*
  115. * Initialize handlers for the set of interrupts caused by hardware errors
  116. * and power system events.
  117. */
  118. static int __init init_ras_IRQ(void)
  119. {
  120. struct device_node *np;
  121. ras_get_sensor_state_token = rtas_token("get-sensor-state");
  122. ras_check_exception_token = rtas_token("check-exception");
  123. /* Internal Errors */
  124. np = of_find_node_by_path("/event-sources/internal-errors");
  125. if (np != NULL) {
  126. request_ras_irqs(np, ras_error_interrupt, "RAS_ERROR");
  127. of_node_put(np);
  128. }
  129. /* EPOW Events */
  130. np = of_find_node_by_path("/event-sources/epow-events");
  131. if (np != NULL) {
  132. request_ras_irqs(np, ras_epow_interrupt, "RAS_EPOW");
  133. of_node_put(np);
  134. }
  135. return 0;
  136. }
  137. __initcall(init_ras_IRQ);
  138. /*
  139. * Handle power subsystem events (EPOW).
  140. *
  141. * Presently we just log the event has occurred. This should be fixed
  142. * to examine the type of power failure and take appropriate action where
  143. * the time horizon permits something useful to be done.
  144. */
  145. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id)
  146. {
  147. int status = 0xdeadbeef;
  148. int state = 0;
  149. int critical;
  150. status = rtas_call(ras_get_sensor_state_token, 2, 2, &state,
  151. EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX);
  152. if (state > 3)
  153. critical = 1; /* Time Critical */
  154. else
  155. critical = 0;
  156. spin_lock(&ras_log_buf_lock);
  157. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  158. RAS_VECTOR_OFFSET,
  159. irq_map[irq].hwirq,
  160. RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS,
  161. critical, __pa(&ras_log_buf),
  162. rtas_get_error_log_max());
  163. udbg_printf("EPOW <0x%lx 0x%x 0x%x>\n",
  164. *((unsigned long *)&ras_log_buf), status, state);
  165. printk(KERN_WARNING "EPOW <0x%lx 0x%x 0x%x>\n",
  166. *((unsigned long *)&ras_log_buf), status, state);
  167. /* format and print the extended information */
  168. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
  169. spin_unlock(&ras_log_buf_lock);
  170. return IRQ_HANDLED;
  171. }
  172. /*
  173. * Handle hardware error interrupts.
  174. *
  175. * RTAS check-exception is called to collect data on the exception. If
  176. * the error is deemed recoverable, we log a warning and return.
  177. * For nonrecoverable errors, an error is logged and we stop all processing
  178. * as quickly as possible in order to prevent propagation of the failure.
  179. */
  180. static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
  181. {
  182. struct rtas_error_log *rtas_elog;
  183. int status = 0xdeadbeef;
  184. int fatal;
  185. spin_lock(&ras_log_buf_lock);
  186. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  187. RAS_VECTOR_OFFSET,
  188. irq_map[irq].hwirq,
  189. RTAS_INTERNAL_ERROR, 1 /*Time Critical */,
  190. __pa(&ras_log_buf),
  191. rtas_get_error_log_max());
  192. rtas_elog = (struct rtas_error_log *)ras_log_buf;
  193. if ((status == 0) && (rtas_elog->severity >= RTAS_SEVERITY_ERROR_SYNC))
  194. fatal = 1;
  195. else
  196. fatal = 0;
  197. /* format and print the extended information */
  198. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal);
  199. if (fatal) {
  200. udbg_printf("Fatal HW Error <0x%lx 0x%x>\n",
  201. *((unsigned long *)&ras_log_buf), status);
  202. printk(KERN_EMERG "Error: Fatal hardware error <0x%lx 0x%x>\n",
  203. *((unsigned long *)&ras_log_buf), status);
  204. #ifndef DEBUG
  205. /* Don't actually power off when debugging so we can test
  206. * without actually failing while injecting errors.
  207. * Error data will not be logged to syslog.
  208. */
  209. ppc_md.power_off();
  210. #endif
  211. } else {
  212. udbg_printf("Recoverable HW Error <0x%lx 0x%x>\n",
  213. *((unsigned long *)&ras_log_buf), status);
  214. printk(KERN_WARNING
  215. "Warning: Recoverable hardware error <0x%lx 0x%x>\n",
  216. *((unsigned long *)&ras_log_buf), status);
  217. }
  218. spin_unlock(&ras_log_buf_lock);
  219. return IRQ_HANDLED;
  220. }
  221. /* Get the error information for errors coming through the
  222. * FWNMI vectors. The pt_regs' r3 will be updated to reflect
  223. * the actual r3 if possible, and a ptr to the error log entry
  224. * will be returned if found.
  225. *
  226. * The mce_data_buf does not have any locks or protection around it,
  227. * if a second machine check comes in, or a system reset is done
  228. * before we have logged the error, then we will get corruption in the
  229. * error log. This is preferable over holding off on calling
  230. * ibm,nmi-interlock which would result in us checkstopping if a
  231. * second machine check did come in.
  232. */
  233. static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
  234. {
  235. unsigned long errdata = regs->gpr[3];
  236. struct rtas_error_log *errhdr = NULL;
  237. unsigned long *savep;
  238. if ((errdata >= 0x7000 && errdata < 0x7fff0) ||
  239. (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) {
  240. savep = __va(errdata);
  241. regs->gpr[3] = savep[0]; /* restore original r3 */
  242. memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
  243. memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX);
  244. errhdr = (struct rtas_error_log *)mce_data_buf;
  245. } else {
  246. printk("FWNMI: corrupt r3\n");
  247. }
  248. return errhdr;
  249. }
  250. /* Call this when done with the data returned by FWNMI_get_errinfo.
  251. * It will release the saved data area for other CPUs in the
  252. * partition to receive FWNMI errors.
  253. */
  254. static void fwnmi_release_errinfo(void)
  255. {
  256. int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL);
  257. if (ret != 0)
  258. printk("FWNMI: nmi-interlock failed: %d\n", ret);
  259. }
  260. int pSeries_system_reset_exception(struct pt_regs *regs)
  261. {
  262. if (fwnmi_active) {
  263. struct rtas_error_log *errhdr = fwnmi_get_errinfo(regs);
  264. if (errhdr) {
  265. /* XXX Should look at FWNMI information */
  266. }
  267. fwnmi_release_errinfo();
  268. }
  269. return 0; /* need to perform reset */
  270. }
  271. /*
  272. * See if we can recover from a machine check exception.
  273. * This is only called on power4 (or above) and only via
  274. * the Firmware Non-Maskable Interrupts (fwnmi) handler
  275. * which provides the error analysis for us.
  276. *
  277. * Return 1 if corrected (or delivered a signal).
  278. * Return 0 if there is nothing we can do.
  279. */
  280. static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err)
  281. {
  282. int nonfatal = 0;
  283. if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
  284. /* Platform corrected itself */
  285. nonfatal = 1;
  286. } else if ((regs->msr & MSR_RI) &&
  287. user_mode(regs) &&
  288. err->severity == RTAS_SEVERITY_ERROR_SYNC &&
  289. err->disposition == RTAS_DISP_NOT_RECOVERED &&
  290. err->target == RTAS_TARGET_MEMORY &&
  291. err->type == RTAS_TYPE_ECC_UNCORR &&
  292. !(current->pid == 0 || is_init(current))) {
  293. /* Kill off a user process with an ECC error */
  294. printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n",
  295. current->pid);
  296. /* XXX something better for ECC error? */
  297. _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
  298. nonfatal = 1;
  299. }
  300. log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
  301. return nonfatal;
  302. }
  303. /*
  304. * Handle a machine check.
  305. *
  306. * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi)
  307. * should be present. If so the handler which called us tells us if the
  308. * error was recovered (never true if RI=0).
  309. *
  310. * On hardware prior to Power 4 these exceptions were asynchronous which
  311. * means we can't tell exactly where it occurred and so we can't recover.
  312. */
  313. int pSeries_machine_check_exception(struct pt_regs *regs)
  314. {
  315. struct rtas_error_log *errp;
  316. if (fwnmi_active) {
  317. errp = fwnmi_get_errinfo(regs);
  318. fwnmi_release_errinfo();
  319. if (errp && recover_mce(regs, errp))
  320. return 1;
  321. }
  322. return 0;
  323. }