low_i2c.c 36 KB

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  1. /*
  2. * arch/powerpc/platforms/powermac/low_i2c.c
  3. *
  4. * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. * The linux i2c layer isn't completely suitable for our needs for various
  12. * reasons ranging from too late initialisation to semantics not perfectly
  13. * matching some requirements of the apple platform functions etc...
  14. *
  15. * This file thus provides a simple low level unified i2c interface for
  16. * powermac that covers the various types of i2c busses used in Apple machines.
  17. * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
  18. * banging busses found on older chipstes in earlier machines if we ever need
  19. * one of them.
  20. *
  21. * The drivers in this file are synchronous/blocking. In addition, the
  22. * keywest one is fairly slow due to the use of msleep instead of interrupts
  23. * as the interrupt is currently used by i2c-keywest. In the long run, we
  24. * might want to get rid of those high-level interfaces to linux i2c layer
  25. * either completely (converting all drivers) or replacing them all with a
  26. * single stub driver on top of this one. Once done, the interrupt will be
  27. * available for our use.
  28. */
  29. #undef DEBUG
  30. #undef DEBUG_LOW
  31. #include <linux/types.h>
  32. #include <linux/sched.h>
  33. #include <linux/init.h>
  34. #include <linux/module.h>
  35. #include <linux/adb.h>
  36. #include <linux/pmu.h>
  37. #include <linux/delay.h>
  38. #include <linux/completion.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/interrupt.h>
  41. #include <linux/timer.h>
  42. #include <linux/mutex.h>
  43. #include <asm/keylargo.h>
  44. #include <asm/uninorth.h>
  45. #include <asm/io.h>
  46. #include <asm/prom.h>
  47. #include <asm/machdep.h>
  48. #include <asm/smu.h>
  49. #include <asm/pmac_pfunc.h>
  50. #include <asm/pmac_low_i2c.h>
  51. #ifdef DEBUG
  52. #define DBG(x...) do {\
  53. printk(KERN_DEBUG "low_i2c:" x); \
  54. } while(0)
  55. #else
  56. #define DBG(x...)
  57. #endif
  58. #ifdef DEBUG_LOW
  59. #define DBG_LOW(x...) do {\
  60. printk(KERN_DEBUG "low_i2c:" x); \
  61. } while(0)
  62. #else
  63. #define DBG_LOW(x...)
  64. #endif
  65. static int pmac_i2c_force_poll = 1;
  66. /*
  67. * A bus structure. Each bus in the system has such a structure associated.
  68. */
  69. struct pmac_i2c_bus
  70. {
  71. struct list_head link;
  72. struct device_node *controller;
  73. struct device_node *busnode;
  74. int type;
  75. int flags;
  76. struct i2c_adapter *adapter;
  77. void *hostdata;
  78. int channel; /* some hosts have multiple */
  79. int mode; /* current mode */
  80. struct mutex mutex;
  81. int opened;
  82. int polled; /* open mode */
  83. struct platform_device *platform_dev;
  84. /* ops */
  85. int (*open)(struct pmac_i2c_bus *bus);
  86. void (*close)(struct pmac_i2c_bus *bus);
  87. int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
  88. u32 subaddr, u8 *data, int len);
  89. };
  90. static LIST_HEAD(pmac_i2c_busses);
  91. /*
  92. * Keywest implementation
  93. */
  94. struct pmac_i2c_host_kw
  95. {
  96. struct mutex mutex; /* Access mutex for use by
  97. * i2c-keywest */
  98. void __iomem *base; /* register base address */
  99. int bsteps; /* register stepping */
  100. int speed; /* speed */
  101. int irq;
  102. u8 *data;
  103. unsigned len;
  104. int state;
  105. int rw;
  106. int polled;
  107. int result;
  108. struct completion complete;
  109. spinlock_t lock;
  110. struct timer_list timeout_timer;
  111. };
  112. /* Register indices */
  113. typedef enum {
  114. reg_mode = 0,
  115. reg_control,
  116. reg_status,
  117. reg_isr,
  118. reg_ier,
  119. reg_addr,
  120. reg_subaddr,
  121. reg_data
  122. } reg_t;
  123. /* The Tumbler audio equalizer can be really slow sometimes */
  124. #define KW_POLL_TIMEOUT (2*HZ)
  125. /* Mode register */
  126. #define KW_I2C_MODE_100KHZ 0x00
  127. #define KW_I2C_MODE_50KHZ 0x01
  128. #define KW_I2C_MODE_25KHZ 0x02
  129. #define KW_I2C_MODE_DUMB 0x00
  130. #define KW_I2C_MODE_STANDARD 0x04
  131. #define KW_I2C_MODE_STANDARDSUB 0x08
  132. #define KW_I2C_MODE_COMBINED 0x0C
  133. #define KW_I2C_MODE_MODE_MASK 0x0C
  134. #define KW_I2C_MODE_CHAN_MASK 0xF0
  135. /* Control register */
  136. #define KW_I2C_CTL_AAK 0x01
  137. #define KW_I2C_CTL_XADDR 0x02
  138. #define KW_I2C_CTL_STOP 0x04
  139. #define KW_I2C_CTL_START 0x08
  140. /* Status register */
  141. #define KW_I2C_STAT_BUSY 0x01
  142. #define KW_I2C_STAT_LAST_AAK 0x02
  143. #define KW_I2C_STAT_LAST_RW 0x04
  144. #define KW_I2C_STAT_SDA 0x08
  145. #define KW_I2C_STAT_SCL 0x10
  146. /* IER & ISR registers */
  147. #define KW_I2C_IRQ_DATA 0x01
  148. #define KW_I2C_IRQ_ADDR 0x02
  149. #define KW_I2C_IRQ_STOP 0x04
  150. #define KW_I2C_IRQ_START 0x08
  151. #define KW_I2C_IRQ_MASK 0x0F
  152. /* State machine states */
  153. enum {
  154. state_idle,
  155. state_addr,
  156. state_read,
  157. state_write,
  158. state_stop,
  159. state_dead
  160. };
  161. #define WRONG_STATE(name) do {\
  162. printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
  163. "(isr: %02x)\n", \
  164. name, __kw_state_names[host->state], isr); \
  165. } while(0)
  166. static const char *__kw_state_names[] = {
  167. "state_idle",
  168. "state_addr",
  169. "state_read",
  170. "state_write",
  171. "state_stop",
  172. "state_dead"
  173. };
  174. static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
  175. {
  176. return readb(host->base + (((unsigned int)reg) << host->bsteps));
  177. }
  178. static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
  179. reg_t reg, u8 val)
  180. {
  181. writeb(val, host->base + (((unsigned)reg) << host->bsteps));
  182. (void)__kw_read_reg(host, reg_subaddr);
  183. }
  184. #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
  185. #define kw_read_reg(reg) __kw_read_reg(host, reg)
  186. static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
  187. {
  188. int i, j;
  189. u8 isr;
  190. for (i = 0; i < 1000; i++) {
  191. isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
  192. if (isr != 0)
  193. return isr;
  194. /* This code is used with the timebase frozen, we cannot rely
  195. * on udelay nor schedule when in polled mode !
  196. * For now, just use a bogus loop....
  197. */
  198. if (host->polled) {
  199. for (j = 1; j < 100000; j++)
  200. mb();
  201. } else
  202. msleep(1);
  203. }
  204. return isr;
  205. }
  206. static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
  207. {
  208. kw_write_reg(reg_control, KW_I2C_CTL_STOP);
  209. host->state = state_stop;
  210. host->result = result;
  211. }
  212. static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
  213. {
  214. u8 ack;
  215. DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
  216. __kw_state_names[host->state], isr);
  217. if (host->state == state_idle) {
  218. printk(KERN_WARNING "low_i2c: Keywest got an out of state"
  219. " interrupt, ignoring\n");
  220. kw_write_reg(reg_isr, isr);
  221. return;
  222. }
  223. if (isr == 0) {
  224. printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
  225. " on keywest !\n");
  226. if (host->state != state_stop) {
  227. kw_i2c_do_stop(host, -EIO);
  228. return;
  229. }
  230. ack = kw_read_reg(reg_status);
  231. if (ack & KW_I2C_STAT_BUSY)
  232. kw_write_reg(reg_status, 0);
  233. host->state = state_idle;
  234. kw_write_reg(reg_ier, 0x00);
  235. if (!host->polled)
  236. complete(&host->complete);
  237. return;
  238. }
  239. if (isr & KW_I2C_IRQ_ADDR) {
  240. ack = kw_read_reg(reg_status);
  241. if (host->state != state_addr) {
  242. WRONG_STATE("KW_I2C_IRQ_ADDR");
  243. kw_i2c_do_stop(host, -EIO);
  244. }
  245. if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
  246. host->result = -ENXIO;
  247. host->state = state_stop;
  248. DBG_LOW("KW: NAK on address\n");
  249. } else {
  250. if (host->len == 0)
  251. kw_i2c_do_stop(host, 0);
  252. else if (host->rw) {
  253. host->state = state_read;
  254. if (host->len > 1)
  255. kw_write_reg(reg_control,
  256. KW_I2C_CTL_AAK);
  257. } else {
  258. host->state = state_write;
  259. kw_write_reg(reg_data, *(host->data++));
  260. host->len--;
  261. }
  262. }
  263. kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
  264. }
  265. if (isr & KW_I2C_IRQ_DATA) {
  266. if (host->state == state_read) {
  267. *(host->data++) = kw_read_reg(reg_data);
  268. host->len--;
  269. kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
  270. if (host->len == 0)
  271. host->state = state_stop;
  272. else if (host->len == 1)
  273. kw_write_reg(reg_control, 0);
  274. } else if (host->state == state_write) {
  275. ack = kw_read_reg(reg_status);
  276. if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
  277. DBG_LOW("KW: nack on data write\n");
  278. host->result = -EFBIG;
  279. host->state = state_stop;
  280. } else if (host->len) {
  281. kw_write_reg(reg_data, *(host->data++));
  282. host->len--;
  283. } else
  284. kw_i2c_do_stop(host, 0);
  285. } else {
  286. WRONG_STATE("KW_I2C_IRQ_DATA");
  287. if (host->state != state_stop)
  288. kw_i2c_do_stop(host, -EIO);
  289. }
  290. kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
  291. }
  292. if (isr & KW_I2C_IRQ_STOP) {
  293. kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
  294. if (host->state != state_stop) {
  295. WRONG_STATE("KW_I2C_IRQ_STOP");
  296. host->result = -EIO;
  297. }
  298. host->state = state_idle;
  299. if (!host->polled)
  300. complete(&host->complete);
  301. }
  302. /* Below should only happen in manual mode which we don't use ... */
  303. if (isr & KW_I2C_IRQ_START)
  304. kw_write_reg(reg_isr, KW_I2C_IRQ_START);
  305. }
  306. /* Interrupt handler */
  307. static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
  308. {
  309. struct pmac_i2c_host_kw *host = dev_id;
  310. unsigned long flags;
  311. spin_lock_irqsave(&host->lock, flags);
  312. del_timer(&host->timeout_timer);
  313. kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
  314. if (host->state != state_idle) {
  315. host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
  316. add_timer(&host->timeout_timer);
  317. }
  318. spin_unlock_irqrestore(&host->lock, flags);
  319. return IRQ_HANDLED;
  320. }
  321. static void kw_i2c_timeout(unsigned long data)
  322. {
  323. struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
  324. unsigned long flags;
  325. spin_lock_irqsave(&host->lock, flags);
  326. kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
  327. if (host->state != state_idle) {
  328. host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
  329. add_timer(&host->timeout_timer);
  330. }
  331. spin_unlock_irqrestore(&host->lock, flags);
  332. }
  333. static int kw_i2c_open(struct pmac_i2c_bus *bus)
  334. {
  335. struct pmac_i2c_host_kw *host = bus->hostdata;
  336. mutex_lock(&host->mutex);
  337. return 0;
  338. }
  339. static void kw_i2c_close(struct pmac_i2c_bus *bus)
  340. {
  341. struct pmac_i2c_host_kw *host = bus->hostdata;
  342. mutex_unlock(&host->mutex);
  343. }
  344. static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
  345. u32 subaddr, u8 *data, int len)
  346. {
  347. struct pmac_i2c_host_kw *host = bus->hostdata;
  348. u8 mode_reg = host->speed;
  349. int use_irq = host->irq != NO_IRQ && !bus->polled;
  350. /* Setup mode & subaddress if any */
  351. switch(bus->mode) {
  352. case pmac_i2c_mode_dumb:
  353. return -EINVAL;
  354. case pmac_i2c_mode_std:
  355. mode_reg |= KW_I2C_MODE_STANDARD;
  356. if (subsize != 0)
  357. return -EINVAL;
  358. break;
  359. case pmac_i2c_mode_stdsub:
  360. mode_reg |= KW_I2C_MODE_STANDARDSUB;
  361. if (subsize != 1)
  362. return -EINVAL;
  363. break;
  364. case pmac_i2c_mode_combined:
  365. mode_reg |= KW_I2C_MODE_COMBINED;
  366. if (subsize != 1)
  367. return -EINVAL;
  368. break;
  369. }
  370. /* Setup channel & clear pending irqs */
  371. kw_write_reg(reg_isr, kw_read_reg(reg_isr));
  372. kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
  373. kw_write_reg(reg_status, 0);
  374. /* Set up address and r/w bit, strip possible stale bus number from
  375. * address top bits
  376. */
  377. kw_write_reg(reg_addr, addrdir & 0xff);
  378. /* Set up the sub address */
  379. if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
  380. || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
  381. kw_write_reg(reg_subaddr, subaddr);
  382. /* Prepare for async operations */
  383. host->data = data;
  384. host->len = len;
  385. host->state = state_addr;
  386. host->result = 0;
  387. host->rw = (addrdir & 1);
  388. host->polled = bus->polled;
  389. /* Enable interrupt if not using polled mode and interrupt is
  390. * available
  391. */
  392. if (use_irq) {
  393. /* Clear completion */
  394. INIT_COMPLETION(host->complete);
  395. /* Ack stale interrupts */
  396. kw_write_reg(reg_isr, kw_read_reg(reg_isr));
  397. /* Arm timeout */
  398. host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
  399. add_timer(&host->timeout_timer);
  400. /* Enable emission */
  401. kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
  402. }
  403. /* Start sending address */
  404. kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
  405. /* Wait for completion */
  406. if (use_irq)
  407. wait_for_completion(&host->complete);
  408. else {
  409. while(host->state != state_idle) {
  410. unsigned long flags;
  411. u8 isr = kw_i2c_wait_interrupt(host);
  412. spin_lock_irqsave(&host->lock, flags);
  413. kw_i2c_handle_interrupt(host, isr);
  414. spin_unlock_irqrestore(&host->lock, flags);
  415. }
  416. }
  417. /* Disable emission */
  418. kw_write_reg(reg_ier, 0);
  419. return host->result;
  420. }
  421. static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
  422. {
  423. struct pmac_i2c_host_kw *host;
  424. const u32 *psteps, *prate, *addrp;
  425. u32 steps;
  426. host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
  427. if (host == NULL) {
  428. printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
  429. np->full_name);
  430. return NULL;
  431. }
  432. /* Apple is kind enough to provide a valid AAPL,address property
  433. * on all i2c keywest nodes so far ... we would have to fallback
  434. * to macio parsing if that wasn't the case
  435. */
  436. addrp = of_get_property(np, "AAPL,address", NULL);
  437. if (addrp == NULL) {
  438. printk(KERN_ERR "low_i2c: Can't find address for %s\n",
  439. np->full_name);
  440. kfree(host);
  441. return NULL;
  442. }
  443. mutex_init(&host->mutex);
  444. init_completion(&host->complete);
  445. spin_lock_init(&host->lock);
  446. init_timer(&host->timeout_timer);
  447. host->timeout_timer.function = kw_i2c_timeout;
  448. host->timeout_timer.data = (unsigned long)host;
  449. psteps = of_get_property(np, "AAPL,address-step", NULL);
  450. steps = psteps ? (*psteps) : 0x10;
  451. for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
  452. steps >>= 1;
  453. /* Select interface rate */
  454. host->speed = KW_I2C_MODE_25KHZ;
  455. prate = of_get_property(np, "AAPL,i2c-rate", NULL);
  456. if (prate) switch(*prate) {
  457. case 100:
  458. host->speed = KW_I2C_MODE_100KHZ;
  459. break;
  460. case 50:
  461. host->speed = KW_I2C_MODE_50KHZ;
  462. break;
  463. case 25:
  464. host->speed = KW_I2C_MODE_25KHZ;
  465. break;
  466. }
  467. host->irq = irq_of_parse_and_map(np, 0);
  468. if (host->irq == NO_IRQ)
  469. printk(KERN_WARNING
  470. "low_i2c: Failed to map interrupt for %s\n",
  471. np->full_name);
  472. host->base = ioremap((*addrp), 0x1000);
  473. if (host->base == NULL) {
  474. printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
  475. np->full_name);
  476. kfree(host);
  477. return NULL;
  478. }
  479. /* Make sure IRQ is disabled */
  480. kw_write_reg(reg_ier, 0);
  481. /* Request chip interrupt */
  482. if (request_irq(host->irq, kw_i2c_irq, 0, "keywest i2c", host))
  483. host->irq = NO_IRQ;
  484. printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
  485. *addrp, host->irq, np->full_name);
  486. return host;
  487. }
  488. static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
  489. struct device_node *controller,
  490. struct device_node *busnode,
  491. int channel)
  492. {
  493. struct pmac_i2c_bus *bus;
  494. bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
  495. if (bus == NULL)
  496. return;
  497. bus->controller = of_node_get(controller);
  498. bus->busnode = of_node_get(busnode);
  499. bus->type = pmac_i2c_bus_keywest;
  500. bus->hostdata = host;
  501. bus->channel = channel;
  502. bus->mode = pmac_i2c_mode_std;
  503. bus->open = kw_i2c_open;
  504. bus->close = kw_i2c_close;
  505. bus->xfer = kw_i2c_xfer;
  506. mutex_init(&bus->mutex);
  507. if (controller == busnode)
  508. bus->flags = pmac_i2c_multibus;
  509. list_add(&bus->link, &pmac_i2c_busses);
  510. printk(KERN_INFO " channel %d bus %s\n", channel,
  511. (controller == busnode) ? "<multibus>" : busnode->full_name);
  512. }
  513. static void __init kw_i2c_probe(void)
  514. {
  515. struct device_node *np, *child, *parent;
  516. /* Probe keywest-i2c busses */
  517. for (np = NULL;
  518. (np = of_find_compatible_node(np, "i2c","keywest-i2c")) != NULL;){
  519. struct pmac_i2c_host_kw *host;
  520. int multibus, chans, i;
  521. /* Found one, init a host structure */
  522. host = kw_i2c_host_init(np);
  523. if (host == NULL)
  524. continue;
  525. /* Now check if we have a multibus setup (old style) or if we
  526. * have proper bus nodes. Note that the "new" way (proper bus
  527. * nodes) might cause us to not create some busses that are
  528. * kept hidden in the device-tree. In the future, we might
  529. * want to work around that by creating busses without a node
  530. * but not for now
  531. */
  532. child = of_get_next_child(np, NULL);
  533. multibus = !child || strcmp(child->name, "i2c-bus");
  534. of_node_put(child);
  535. /* For a multibus setup, we get the bus count based on the
  536. * parent type
  537. */
  538. if (multibus) {
  539. parent = of_get_parent(np);
  540. if (parent == NULL)
  541. continue;
  542. chans = parent->name[0] == 'u' ? 2 : 1;
  543. for (i = 0; i < chans; i++)
  544. kw_i2c_add(host, np, np, i);
  545. } else {
  546. for (child = NULL;
  547. (child = of_get_next_child(np, child)) != NULL;) {
  548. const u32 *reg = of_get_property(child,
  549. "reg", NULL);
  550. if (reg == NULL)
  551. continue;
  552. kw_i2c_add(host, np, child, *reg);
  553. }
  554. }
  555. }
  556. }
  557. /*
  558. *
  559. * PMU implementation
  560. *
  561. */
  562. #ifdef CONFIG_ADB_PMU
  563. /*
  564. * i2c command block to the PMU
  565. */
  566. struct pmu_i2c_hdr {
  567. u8 bus;
  568. u8 mode;
  569. u8 bus2;
  570. u8 address;
  571. u8 sub_addr;
  572. u8 comb_addr;
  573. u8 count;
  574. u8 data[];
  575. };
  576. static void pmu_i2c_complete(struct adb_request *req)
  577. {
  578. complete(req->arg);
  579. }
  580. static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
  581. u32 subaddr, u8 *data, int len)
  582. {
  583. struct adb_request *req = bus->hostdata;
  584. struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
  585. struct completion comp;
  586. int read = addrdir & 1;
  587. int retry;
  588. int rc = 0;
  589. /* For now, limit ourselves to 16 bytes transfers */
  590. if (len > 16)
  591. return -EINVAL;
  592. init_completion(&comp);
  593. for (retry = 0; retry < 16; retry++) {
  594. memset(req, 0, sizeof(struct adb_request));
  595. hdr->bus = bus->channel;
  596. hdr->count = len;
  597. switch(bus->mode) {
  598. case pmac_i2c_mode_std:
  599. if (subsize != 0)
  600. return -EINVAL;
  601. hdr->address = addrdir;
  602. hdr->mode = PMU_I2C_MODE_SIMPLE;
  603. break;
  604. case pmac_i2c_mode_stdsub:
  605. case pmac_i2c_mode_combined:
  606. if (subsize != 1)
  607. return -EINVAL;
  608. hdr->address = addrdir & 0xfe;
  609. hdr->comb_addr = addrdir;
  610. hdr->sub_addr = subaddr;
  611. if (bus->mode == pmac_i2c_mode_stdsub)
  612. hdr->mode = PMU_I2C_MODE_STDSUB;
  613. else
  614. hdr->mode = PMU_I2C_MODE_COMBINED;
  615. break;
  616. default:
  617. return -EINVAL;
  618. }
  619. INIT_COMPLETION(comp);
  620. req->data[0] = PMU_I2C_CMD;
  621. req->reply[0] = 0xff;
  622. req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
  623. req->done = pmu_i2c_complete;
  624. req->arg = &comp;
  625. if (!read && len) {
  626. memcpy(hdr->data, data, len);
  627. req->nbytes += len;
  628. }
  629. rc = pmu_queue_request(req);
  630. if (rc)
  631. return rc;
  632. wait_for_completion(&comp);
  633. if (req->reply[0] == PMU_I2C_STATUS_OK)
  634. break;
  635. msleep(15);
  636. }
  637. if (req->reply[0] != PMU_I2C_STATUS_OK)
  638. return -EIO;
  639. for (retry = 0; retry < 16; retry++) {
  640. memset(req, 0, sizeof(struct adb_request));
  641. /* I know that looks like a lot, slow as hell, but darwin
  642. * does it so let's be on the safe side for now
  643. */
  644. msleep(15);
  645. hdr->bus = PMU_I2C_BUS_STATUS;
  646. INIT_COMPLETION(comp);
  647. req->data[0] = PMU_I2C_CMD;
  648. req->reply[0] = 0xff;
  649. req->nbytes = 2;
  650. req->done = pmu_i2c_complete;
  651. req->arg = &comp;
  652. rc = pmu_queue_request(req);
  653. if (rc)
  654. return rc;
  655. wait_for_completion(&comp);
  656. if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
  657. return 0;
  658. if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
  659. int rlen = req->reply_len - 1;
  660. if (rlen != len) {
  661. printk(KERN_WARNING "low_i2c: PMU returned %d"
  662. " bytes, expected %d !\n", rlen, len);
  663. return -EIO;
  664. }
  665. if (len)
  666. memcpy(data, &req->reply[1], len);
  667. return 0;
  668. }
  669. }
  670. return -EIO;
  671. }
  672. static void __init pmu_i2c_probe(void)
  673. {
  674. struct pmac_i2c_bus *bus;
  675. struct device_node *busnode;
  676. int channel, sz;
  677. if (!pmu_present())
  678. return;
  679. /* There might or might not be a "pmu-i2c" node, we use that
  680. * or via-pmu itself, whatever we find. I haven't seen a machine
  681. * with separate bus nodes, so we assume a multibus setup
  682. */
  683. busnode = of_find_node_by_name(NULL, "pmu-i2c");
  684. if (busnode == NULL)
  685. busnode = of_find_node_by_name(NULL, "via-pmu");
  686. if (busnode == NULL)
  687. return;
  688. printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
  689. /*
  690. * We add bus 1 and 2 only for now, bus 0 is "special"
  691. */
  692. for (channel = 1; channel <= 2; channel++) {
  693. sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
  694. bus = kzalloc(sz, GFP_KERNEL);
  695. if (bus == NULL)
  696. return;
  697. bus->controller = busnode;
  698. bus->busnode = busnode;
  699. bus->type = pmac_i2c_bus_pmu;
  700. bus->channel = channel;
  701. bus->mode = pmac_i2c_mode_std;
  702. bus->hostdata = bus + 1;
  703. bus->xfer = pmu_i2c_xfer;
  704. mutex_init(&bus->mutex);
  705. bus->flags = pmac_i2c_multibus;
  706. list_add(&bus->link, &pmac_i2c_busses);
  707. printk(KERN_INFO " channel %d bus <multibus>\n", channel);
  708. }
  709. }
  710. #endif /* CONFIG_ADB_PMU */
  711. /*
  712. *
  713. * SMU implementation
  714. *
  715. */
  716. #ifdef CONFIG_PMAC_SMU
  717. static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
  718. {
  719. complete(misc);
  720. }
  721. static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
  722. u32 subaddr, u8 *data, int len)
  723. {
  724. struct smu_i2c_cmd *cmd = bus->hostdata;
  725. struct completion comp;
  726. int read = addrdir & 1;
  727. int rc = 0;
  728. if ((read && len > SMU_I2C_READ_MAX) ||
  729. ((!read) && len > SMU_I2C_WRITE_MAX))
  730. return -EINVAL;
  731. memset(cmd, 0, sizeof(struct smu_i2c_cmd));
  732. cmd->info.bus = bus->channel;
  733. cmd->info.devaddr = addrdir;
  734. cmd->info.datalen = len;
  735. switch(bus->mode) {
  736. case pmac_i2c_mode_std:
  737. if (subsize != 0)
  738. return -EINVAL;
  739. cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
  740. break;
  741. case pmac_i2c_mode_stdsub:
  742. case pmac_i2c_mode_combined:
  743. if (subsize > 3 || subsize < 1)
  744. return -EINVAL;
  745. cmd->info.sublen = subsize;
  746. /* that's big-endian only but heh ! */
  747. memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
  748. subsize);
  749. if (bus->mode == pmac_i2c_mode_stdsub)
  750. cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
  751. else
  752. cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
  753. break;
  754. default:
  755. return -EINVAL;
  756. }
  757. if (!read && len)
  758. memcpy(cmd->info.data, data, len);
  759. init_completion(&comp);
  760. cmd->done = smu_i2c_complete;
  761. cmd->misc = &comp;
  762. rc = smu_queue_i2c(cmd);
  763. if (rc < 0)
  764. return rc;
  765. wait_for_completion(&comp);
  766. rc = cmd->status;
  767. if (read && len)
  768. memcpy(data, cmd->info.data, len);
  769. return rc < 0 ? rc : 0;
  770. }
  771. static void __init smu_i2c_probe(void)
  772. {
  773. struct device_node *controller, *busnode;
  774. struct pmac_i2c_bus *bus;
  775. const u32 *reg;
  776. int sz;
  777. if (!smu_present())
  778. return;
  779. controller = of_find_node_by_name(NULL, "smu-i2c-control");
  780. if (controller == NULL)
  781. controller = of_find_node_by_name(NULL, "smu");
  782. if (controller == NULL)
  783. return;
  784. printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
  785. /* Look for childs, note that they might not be of the right
  786. * type as older device trees mix i2c busses and other thigns
  787. * at the same level
  788. */
  789. for (busnode = NULL;
  790. (busnode = of_get_next_child(controller, busnode)) != NULL;) {
  791. if (strcmp(busnode->type, "i2c") &&
  792. strcmp(busnode->type, "i2c-bus"))
  793. continue;
  794. reg = of_get_property(busnode, "reg", NULL);
  795. if (reg == NULL)
  796. continue;
  797. sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
  798. bus = kzalloc(sz, GFP_KERNEL);
  799. if (bus == NULL)
  800. return;
  801. bus->controller = controller;
  802. bus->busnode = of_node_get(busnode);
  803. bus->type = pmac_i2c_bus_smu;
  804. bus->channel = *reg;
  805. bus->mode = pmac_i2c_mode_std;
  806. bus->hostdata = bus + 1;
  807. bus->xfer = smu_i2c_xfer;
  808. mutex_init(&bus->mutex);
  809. bus->flags = 0;
  810. list_add(&bus->link, &pmac_i2c_busses);
  811. printk(KERN_INFO " channel %x bus %s\n",
  812. bus->channel, busnode->full_name);
  813. }
  814. }
  815. #endif /* CONFIG_PMAC_SMU */
  816. /*
  817. *
  818. * Core code
  819. *
  820. */
  821. struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
  822. {
  823. struct device_node *p = of_node_get(node);
  824. struct device_node *prev = NULL;
  825. struct pmac_i2c_bus *bus;
  826. while(p) {
  827. list_for_each_entry(bus, &pmac_i2c_busses, link) {
  828. if (p == bus->busnode) {
  829. if (prev && bus->flags & pmac_i2c_multibus) {
  830. const u32 *reg;
  831. reg = of_get_property(prev, "reg",
  832. NULL);
  833. if (!reg)
  834. continue;
  835. if (((*reg) >> 8) != bus->channel)
  836. continue;
  837. }
  838. of_node_put(p);
  839. of_node_put(prev);
  840. return bus;
  841. }
  842. }
  843. of_node_put(prev);
  844. prev = p;
  845. p = of_get_parent(p);
  846. }
  847. return NULL;
  848. }
  849. EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
  850. u8 pmac_i2c_get_dev_addr(struct device_node *device)
  851. {
  852. const u32 *reg = of_get_property(device, "reg", NULL);
  853. if (reg == NULL)
  854. return 0;
  855. return (*reg) & 0xff;
  856. }
  857. EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
  858. struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
  859. {
  860. return bus->controller;
  861. }
  862. EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
  863. struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
  864. {
  865. return bus->busnode;
  866. }
  867. EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
  868. int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
  869. {
  870. return bus->type;
  871. }
  872. EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
  873. int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
  874. {
  875. return bus->flags;
  876. }
  877. EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
  878. int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
  879. {
  880. return bus->channel;
  881. }
  882. EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
  883. void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
  884. struct i2c_adapter *adapter)
  885. {
  886. WARN_ON(bus->adapter != NULL);
  887. bus->adapter = adapter;
  888. }
  889. EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter);
  890. void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
  891. struct i2c_adapter *adapter)
  892. {
  893. WARN_ON(bus->adapter != adapter);
  894. bus->adapter = NULL;
  895. }
  896. EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter);
  897. struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
  898. {
  899. return bus->adapter;
  900. }
  901. EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
  902. struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
  903. {
  904. struct pmac_i2c_bus *bus;
  905. list_for_each_entry(bus, &pmac_i2c_busses, link)
  906. if (bus->adapter == adapter)
  907. return bus;
  908. return NULL;
  909. }
  910. EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
  911. int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
  912. {
  913. struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
  914. if (bus == NULL)
  915. return 0;
  916. return (bus->adapter == adapter);
  917. }
  918. EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
  919. int pmac_low_i2c_lock(struct device_node *np)
  920. {
  921. struct pmac_i2c_bus *bus, *found = NULL;
  922. list_for_each_entry(bus, &pmac_i2c_busses, link) {
  923. if (np == bus->controller) {
  924. found = bus;
  925. break;
  926. }
  927. }
  928. if (!found)
  929. return -ENODEV;
  930. return pmac_i2c_open(bus, 0);
  931. }
  932. EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
  933. int pmac_low_i2c_unlock(struct device_node *np)
  934. {
  935. struct pmac_i2c_bus *bus, *found = NULL;
  936. list_for_each_entry(bus, &pmac_i2c_busses, link) {
  937. if (np == bus->controller) {
  938. found = bus;
  939. break;
  940. }
  941. }
  942. if (!found)
  943. return -ENODEV;
  944. pmac_i2c_close(bus);
  945. return 0;
  946. }
  947. EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
  948. int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
  949. {
  950. int rc;
  951. mutex_lock(&bus->mutex);
  952. bus->polled = polled || pmac_i2c_force_poll;
  953. bus->opened = 1;
  954. bus->mode = pmac_i2c_mode_std;
  955. if (bus->open && (rc = bus->open(bus)) != 0) {
  956. bus->opened = 0;
  957. mutex_unlock(&bus->mutex);
  958. return rc;
  959. }
  960. return 0;
  961. }
  962. EXPORT_SYMBOL_GPL(pmac_i2c_open);
  963. void pmac_i2c_close(struct pmac_i2c_bus *bus)
  964. {
  965. WARN_ON(!bus->opened);
  966. if (bus->close)
  967. bus->close(bus);
  968. bus->opened = 0;
  969. mutex_unlock(&bus->mutex);
  970. }
  971. EXPORT_SYMBOL_GPL(pmac_i2c_close);
  972. int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
  973. {
  974. WARN_ON(!bus->opened);
  975. /* Report me if you see the error below as there might be a new
  976. * "combined4" mode that I need to implement for the SMU bus
  977. */
  978. if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
  979. printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
  980. " bus %s !\n", mode, bus->busnode->full_name);
  981. return -EINVAL;
  982. }
  983. bus->mode = mode;
  984. return 0;
  985. }
  986. EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
  987. int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
  988. u32 subaddr, u8 *data, int len)
  989. {
  990. int rc;
  991. WARN_ON(!bus->opened);
  992. DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
  993. " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
  994. subaddr, len, bus->busnode->full_name);
  995. rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
  996. #ifdef DEBUG
  997. if (rc)
  998. DBG("xfer error %d\n", rc);
  999. #endif
  1000. return rc;
  1001. }
  1002. EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
  1003. /* some quirks for platform function decoding */
  1004. enum {
  1005. pmac_i2c_quirk_invmask = 0x00000001u,
  1006. pmac_i2c_quirk_skip = 0x00000002u,
  1007. };
  1008. static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
  1009. int quirks))
  1010. {
  1011. struct pmac_i2c_bus *bus;
  1012. struct device_node *np;
  1013. static struct whitelist_ent {
  1014. char *name;
  1015. char *compatible;
  1016. int quirks;
  1017. } whitelist[] = {
  1018. /* XXX Study device-tree's & apple drivers are get the quirks
  1019. * right !
  1020. */
  1021. /* Workaround: It seems that running the clockspreading
  1022. * properties on the eMac will cause lockups during boot.
  1023. * The machine seems to work fine without that. So for now,
  1024. * let's make sure i2c-hwclock doesn't match about "imic"
  1025. * clocks and we'll figure out if we really need to do
  1026. * something special about those later.
  1027. */
  1028. { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
  1029. { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
  1030. { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
  1031. { "i2c-cpu-voltage", NULL, 0},
  1032. { "temp-monitor", NULL, 0 },
  1033. { "supply-monitor", NULL, 0 },
  1034. { NULL, NULL, 0 },
  1035. };
  1036. /* Only some devices need to have platform functions instanciated
  1037. * here. For now, we have a table. Others, like 9554 i2c GPIOs used
  1038. * on Xserve, if we ever do a driver for them, will use their own
  1039. * platform function instance
  1040. */
  1041. list_for_each_entry(bus, &pmac_i2c_busses, link) {
  1042. for (np = NULL;
  1043. (np = of_get_next_child(bus->busnode, np)) != NULL;) {
  1044. struct whitelist_ent *p;
  1045. /* If multibus, check if device is on that bus */
  1046. if (bus->flags & pmac_i2c_multibus)
  1047. if (bus != pmac_i2c_find_bus(np))
  1048. continue;
  1049. for (p = whitelist; p->name != NULL; p++) {
  1050. if (strcmp(np->name, p->name))
  1051. continue;
  1052. if (p->compatible &&
  1053. !of_device_is_compatible(np, p->compatible))
  1054. continue;
  1055. if (p->quirks & pmac_i2c_quirk_skip)
  1056. break;
  1057. callback(np, p->quirks);
  1058. break;
  1059. }
  1060. }
  1061. }
  1062. }
  1063. #define MAX_I2C_DATA 64
  1064. struct pmac_i2c_pf_inst
  1065. {
  1066. struct pmac_i2c_bus *bus;
  1067. u8 addr;
  1068. u8 buffer[MAX_I2C_DATA];
  1069. u8 scratch[MAX_I2C_DATA];
  1070. int bytes;
  1071. int quirks;
  1072. };
  1073. static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
  1074. {
  1075. struct pmac_i2c_pf_inst *inst;
  1076. struct pmac_i2c_bus *bus;
  1077. bus = pmac_i2c_find_bus(func->node);
  1078. if (bus == NULL) {
  1079. printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",
  1080. func->node->full_name);
  1081. return NULL;
  1082. }
  1083. if (pmac_i2c_open(bus, 0)) {
  1084. printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",
  1085. func->node->full_name);
  1086. return NULL;
  1087. }
  1088. /* XXX might need GFP_ATOMIC when called during the suspend process,
  1089. * but then, there are already lots of issues with suspending when
  1090. * near OOM that need to be resolved, the allocator itself should
  1091. * probably make GFP_NOIO implicit during suspend
  1092. */
  1093. inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
  1094. if (inst == NULL) {
  1095. pmac_i2c_close(bus);
  1096. return NULL;
  1097. }
  1098. inst->bus = bus;
  1099. inst->addr = pmac_i2c_get_dev_addr(func->node);
  1100. inst->quirks = (int)(long)func->driver_data;
  1101. return inst;
  1102. }
  1103. static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
  1104. {
  1105. struct pmac_i2c_pf_inst *inst = instdata;
  1106. if (inst == NULL)
  1107. return;
  1108. pmac_i2c_close(inst->bus);
  1109. if (inst)
  1110. kfree(inst);
  1111. }
  1112. static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
  1113. {
  1114. struct pmac_i2c_pf_inst *inst = instdata;
  1115. inst->bytes = len;
  1116. return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
  1117. inst->buffer, len);
  1118. }
  1119. static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
  1120. {
  1121. struct pmac_i2c_pf_inst *inst = instdata;
  1122. return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
  1123. (u8 *)data, len);
  1124. }
  1125. /* This function is used to do the masking & OR'ing for the "rmw" type
  1126. * callbacks. Ze should apply the mask and OR in the values in the
  1127. * buffer before writing back. The problem is that it seems that
  1128. * various darwin drivers implement the mask/or differently, thus
  1129. * we need to check the quirks first
  1130. */
  1131. static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
  1132. u32 len, const u8 *mask, const u8 *val)
  1133. {
  1134. int i;
  1135. if (inst->quirks & pmac_i2c_quirk_invmask) {
  1136. for (i = 0; i < len; i ++)
  1137. inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
  1138. } else {
  1139. for (i = 0; i < len; i ++)
  1140. inst->scratch[i] = (inst->buffer[i] & ~mask[i])
  1141. | (val[i] & mask[i]);
  1142. }
  1143. }
  1144. static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
  1145. u32 totallen, const u8 *maskdata,
  1146. const u8 *valuedata)
  1147. {
  1148. struct pmac_i2c_pf_inst *inst = instdata;
  1149. if (masklen > inst->bytes || valuelen > inst->bytes ||
  1150. totallen > inst->bytes || valuelen > masklen)
  1151. return -EINVAL;
  1152. pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
  1153. return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
  1154. inst->scratch, totallen);
  1155. }
  1156. static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
  1157. {
  1158. struct pmac_i2c_pf_inst *inst = instdata;
  1159. inst->bytes = len;
  1160. return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
  1161. inst->buffer, len);
  1162. }
  1163. static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
  1164. const u8 *data)
  1165. {
  1166. struct pmac_i2c_pf_inst *inst = instdata;
  1167. return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
  1168. subaddr, (u8 *)data, len);
  1169. }
  1170. static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
  1171. {
  1172. struct pmac_i2c_pf_inst *inst = instdata;
  1173. return pmac_i2c_setmode(inst->bus, mode);
  1174. }
  1175. static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
  1176. u32 valuelen, u32 totallen, const u8 *maskdata,
  1177. const u8 *valuedata)
  1178. {
  1179. struct pmac_i2c_pf_inst *inst = instdata;
  1180. if (masklen > inst->bytes || valuelen > inst->bytes ||
  1181. totallen > inst->bytes || valuelen > masklen)
  1182. return -EINVAL;
  1183. pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
  1184. return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
  1185. subaddr, inst->scratch, totallen);
  1186. }
  1187. static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
  1188. const u8 *maskdata,
  1189. const u8 *valuedata)
  1190. {
  1191. struct pmac_i2c_pf_inst *inst = instdata;
  1192. int i, match;
  1193. /* Get return value pointer, it's assumed to be a u32 */
  1194. if (!args || !args->count || !args->u[0].p)
  1195. return -EINVAL;
  1196. /* Check buffer */
  1197. if (len > inst->bytes)
  1198. return -EINVAL;
  1199. for (i = 0, match = 1; match && i < len; i ++)
  1200. if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
  1201. match = 0;
  1202. *args->u[0].p = match;
  1203. return 0;
  1204. }
  1205. static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
  1206. {
  1207. msleep((duration + 999) / 1000);
  1208. return 0;
  1209. }
  1210. static struct pmf_handlers pmac_i2c_pfunc_handlers = {
  1211. .begin = pmac_i2c_do_begin,
  1212. .end = pmac_i2c_do_end,
  1213. .read_i2c = pmac_i2c_do_read,
  1214. .write_i2c = pmac_i2c_do_write,
  1215. .rmw_i2c = pmac_i2c_do_rmw,
  1216. .read_i2c_sub = pmac_i2c_do_read_sub,
  1217. .write_i2c_sub = pmac_i2c_do_write_sub,
  1218. .rmw_i2c_sub = pmac_i2c_do_rmw_sub,
  1219. .set_i2c_mode = pmac_i2c_do_set_mode,
  1220. .mask_and_compare = pmac_i2c_do_mask_and_comp,
  1221. .delay = pmac_i2c_do_delay,
  1222. };
  1223. static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
  1224. {
  1225. DBG("dev_create(%s)\n", np->full_name);
  1226. pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
  1227. (void *)(long)quirks);
  1228. }
  1229. static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
  1230. {
  1231. DBG("dev_create(%s)\n", np->full_name);
  1232. pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
  1233. }
  1234. static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
  1235. {
  1236. DBG("dev_suspend(%s)\n", np->full_name);
  1237. pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
  1238. }
  1239. static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
  1240. {
  1241. DBG("dev_resume(%s)\n", np->full_name);
  1242. pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
  1243. }
  1244. void pmac_pfunc_i2c_suspend(void)
  1245. {
  1246. pmac_i2c_devscan(pmac_i2c_dev_suspend);
  1247. }
  1248. void pmac_pfunc_i2c_resume(void)
  1249. {
  1250. pmac_i2c_devscan(pmac_i2c_dev_resume);
  1251. }
  1252. /*
  1253. * Initialize us: probe all i2c busses on the machine, instantiate
  1254. * busses and platform functions as needed.
  1255. */
  1256. /* This is non-static as it might be called early by smp code */
  1257. int __init pmac_i2c_init(void)
  1258. {
  1259. static int i2c_inited;
  1260. if (i2c_inited)
  1261. return 0;
  1262. i2c_inited = 1;
  1263. if (!machine_is(powermac))
  1264. return 0;
  1265. /* Probe keywest-i2c busses */
  1266. kw_i2c_probe();
  1267. #ifdef CONFIG_ADB_PMU
  1268. /* Probe PMU i2c busses */
  1269. pmu_i2c_probe();
  1270. #endif
  1271. #ifdef CONFIG_PMAC_SMU
  1272. /* Probe SMU i2c busses */
  1273. smu_i2c_probe();
  1274. #endif
  1275. /* Now add plaform functions for some known devices */
  1276. pmac_i2c_devscan(pmac_i2c_dev_create);
  1277. return 0;
  1278. }
  1279. arch_initcall(pmac_i2c_init);
  1280. /* Since pmac_i2c_init can be called too early for the platform device
  1281. * registration, we need to do it at a later time. In our case, subsys
  1282. * happens to fit well, though I agree it's a bit of a hack...
  1283. */
  1284. static int __init pmac_i2c_create_platform_devices(void)
  1285. {
  1286. struct pmac_i2c_bus *bus;
  1287. int i = 0;
  1288. /* In the case where we are initialized from smp_init(), we must
  1289. * not use the timer (and thus the irq). It's safe from now on
  1290. * though
  1291. */
  1292. pmac_i2c_force_poll = 0;
  1293. /* Create platform devices */
  1294. list_for_each_entry(bus, &pmac_i2c_busses, link) {
  1295. bus->platform_dev =
  1296. platform_device_alloc("i2c-powermac", i++);
  1297. if (bus->platform_dev == NULL)
  1298. return -ENOMEM;
  1299. bus->platform_dev->dev.platform_data = bus;
  1300. platform_device_add(bus->platform_dev);
  1301. }
  1302. /* Now call platform "init" functions */
  1303. pmac_i2c_devscan(pmac_i2c_dev_init);
  1304. return 0;
  1305. }
  1306. subsys_initcall(pmac_i2c_create_platform_devices);